1 /* Print i386 instructions for GDB, the GNU debugger.
2 Copyright 1988, 1989, 1991, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
3 2001, 2002, 2003, 2004 Free Software Foundation, Inc.
5 This file is part of GDB.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
22 * 80386 instruction printer by Pace Willisson (pace@prep.ai.mit.edu)
24 * modified by John Hassey (hassey@dg-rtp.dg.com)
25 * x86-64 support added by Jan Hubicka (jh@suse.cz)
26 * VIA PadLock support by Michal Ludvig (mludvig@suse.cz)
30 * The main tables describing the instructions is essentially a copy
31 * of the "Opcode Map" chapter (Appendix A) of the Intel 80386
32 * Programmers Manual. Usually, there is a capital letter, followed
33 * by a small letter. The capital letter tell the addressing mode,
34 * and the small letter tells about the operand size. Refer to
35 * the Intel manual for details.
46 #ifndef UNIXWARE_COMPAT
47 /* Set non-zero for broken, compatible instructions. Set to zero for
48 non-broken opcodes. */
49 #define UNIXWARE_COMPAT 1
52 static int fetch_data (struct disassemble_info *, bfd_byte *);
53 static void ckprefix (void);
54 static const char *prefix_name (int, int);
55 static int print_insn (bfd_vma, disassemble_info *);
56 static void dofloat (int);
57 static void OP_ST (int, int);
58 static void OP_STi (int, int);
59 static int putop (const char *, int);
60 static void oappend (const char *);
61 static void append_seg (void);
62 static void OP_indirE (int, int);
63 static void print_operand_value (char *, int, bfd_vma);
64 static void OP_E (int, int);
65 static void OP_G (int, int);
66 static bfd_vma get64 (void);
67 static bfd_signed_vma get32 (void);
68 static bfd_signed_vma get32s (void);
69 static int get16 (void);
70 static void set_op (bfd_vma, int);
71 static void OP_REG (int, int);
72 static void OP_IMREG (int, int);
73 static void OP_I (int, int);
74 static void OP_I64 (int, int);
75 static void OP_sI (int, int);
76 static void OP_J (int, int);
77 static void OP_SEG (int, int);
78 static void OP_DIR (int, int);
79 static void OP_OFF (int, int);
80 static void OP_OFF64 (int, int);
81 static void ptr_reg (int, int);
82 static void OP_ESreg (int, int);
83 static void OP_DSreg (int, int);
84 static void OP_C (int, int);
85 static void OP_D (int, int);
86 static void OP_T (int, int);
87 static void OP_Rd (int, int);
88 static void OP_MMX (int, int);
89 static void OP_XMM (int, int);
90 static void OP_EM (int, int);
91 static void OP_EX (int, int);
92 static void OP_MS (int, int);
93 static void OP_XS (int, int);
94 static void OP_M (int, int);
95 static void OP_0fae (int, int);
96 static void OP_0f07 (int, int);
97 static void NOP_Fixup (int, int);
98 static void OP_3DNowSuffix (int, int);
99 static void OP_SIMD_Suffix (int, int);
100 static void SIMD_Fixup (int, int);
101 static void PNI_Fixup (int, int);
102 static void INVLPG_Fixup (int, int);
103 static void BadOp (void);
106 /* Points to first byte not fetched. */
107 bfd_byte *max_fetched;
108 bfd_byte the_buffer[MAXLEN];
114 /* The opcode for the fwait instruction, which we treat as a prefix
116 #define FWAIT_OPCODE (0x9b)
118 /* Set to 1 for 64bit mode disassembly. */
119 static int mode_64bit;
121 /* Flags for the prefixes for the current instruction. See below. */
124 /* REX prefix the current instruction. See below. */
126 /* Bits of REX we've already used. */
132 /* Mark parts used in the REX prefix. When we are testing for
133 empty prefix (for 8bit register REX extension), just mask it
134 out. Otherwise test for REX bit is excuse for existence of REX
135 only in case value is nonzero. */
136 #define USED_REX(value) \
139 rex_used |= (rex & value) ? (value) | 0x40 : 0; \
144 /* Flags for prefixes which we somehow handled when printing the
145 current instruction. */
146 static int used_prefixes;
148 /* Flags stored in PREFIXES. */
149 #define PREFIX_REPZ 1
150 #define PREFIX_REPNZ 2
151 #define PREFIX_LOCK 4
153 #define PREFIX_SS 0x10
154 #define PREFIX_DS 0x20
155 #define PREFIX_ES 0x40
156 #define PREFIX_FS 0x80
157 #define PREFIX_GS 0x100
158 #define PREFIX_DATA 0x200
159 #define PREFIX_ADDR 0x400
160 #define PREFIX_FWAIT 0x800
162 /* Make sure that bytes from INFO->PRIVATE_DATA->BUFFER (inclusive)
163 to ADDR (exclusive) are valid. Returns 1 for success, longjmps
165 #define FETCH_DATA(info, addr) \
166 ((addr) <= ((struct dis_private *) (info->private_data))->max_fetched \
167 ? 1 : fetch_data ((info), (addr)))
170 fetch_data (struct disassemble_info *info, bfd_byte *addr)
173 struct dis_private *priv = (struct dis_private *) info->private_data;
174 bfd_vma start = priv->insn_start + (priv->max_fetched - priv->the_buffer);
176 status = (*info->read_memory_func) (start,
178 addr - priv->max_fetched,
182 /* If we did manage to read at least one byte, then
183 print_insn_i386 will do something sensible. Otherwise, print
184 an error. We do that here because this is where we know
186 if (priv->max_fetched == priv->the_buffer)
187 (*info->memory_error_func) (status, start, info);
188 longjmp (priv->bailout, 1);
191 priv->max_fetched = addr;
197 #define Eb OP_E, b_mode
198 #define Ev OP_E, v_mode
199 #define Ed OP_E, d_mode
200 #define Edq OP_E, dq_mode
201 #define indirEb OP_indirE, b_mode
202 #define indirEv OP_indirE, v_mode
203 #define Ew OP_E, w_mode
204 #define Ma OP_E, v_mode
205 #define M OP_M, 0 /* lea, lgdt, etc. */
206 #define Mp OP_M, 0 /* 32 or 48 bit memory operand for LDS, LES etc */
207 #define Gb OP_G, b_mode
208 #define Gv OP_G, v_mode
209 #define Gd OP_G, d_mode
210 #define Gw OP_G, w_mode
211 #define Rd OP_Rd, d_mode
212 #define Rm OP_Rd, m_mode
213 #define Ib OP_I, b_mode
214 #define sIb OP_sI, b_mode /* sign extened byte */
215 #define Iv OP_I, v_mode
216 #define Iq OP_I, q_mode
217 #define Iv64 OP_I64, v_mode
218 #define Iw OP_I, w_mode
219 #define Jb OP_J, b_mode
220 #define Jv OP_J, v_mode
221 #define Cm OP_C, m_mode
222 #define Dm OP_D, m_mode
223 #define Td OP_T, d_mode
225 #define RMeAX OP_REG, eAX_reg
226 #define RMeBX OP_REG, eBX_reg
227 #define RMeCX OP_REG, eCX_reg
228 #define RMeDX OP_REG, eDX_reg
229 #define RMeSP OP_REG, eSP_reg
230 #define RMeBP OP_REG, eBP_reg
231 #define RMeSI OP_REG, eSI_reg
232 #define RMeDI OP_REG, eDI_reg
233 #define RMrAX OP_REG, rAX_reg
234 #define RMrBX OP_REG, rBX_reg
235 #define RMrCX OP_REG, rCX_reg
236 #define RMrDX OP_REG, rDX_reg
237 #define RMrSP OP_REG, rSP_reg
238 #define RMrBP OP_REG, rBP_reg
239 #define RMrSI OP_REG, rSI_reg
240 #define RMrDI OP_REG, rDI_reg
241 #define RMAL OP_REG, al_reg
242 #define RMAL OP_REG, al_reg
243 #define RMCL OP_REG, cl_reg
244 #define RMDL OP_REG, dl_reg
245 #define RMBL OP_REG, bl_reg
246 #define RMAH OP_REG, ah_reg
247 #define RMCH OP_REG, ch_reg
248 #define RMDH OP_REG, dh_reg
249 #define RMBH OP_REG, bh_reg
250 #define RMAX OP_REG, ax_reg
251 #define RMDX OP_REG, dx_reg
253 #define eAX OP_IMREG, eAX_reg
254 #define eBX OP_IMREG, eBX_reg
255 #define eCX OP_IMREG, eCX_reg
256 #define eDX OP_IMREG, eDX_reg
257 #define eSP OP_IMREG, eSP_reg
258 #define eBP OP_IMREG, eBP_reg
259 #define eSI OP_IMREG, eSI_reg
260 #define eDI OP_IMREG, eDI_reg
261 #define AL OP_IMREG, al_reg
262 #define AL OP_IMREG, al_reg
263 #define CL OP_IMREG, cl_reg
264 #define DL OP_IMREG, dl_reg
265 #define BL OP_IMREG, bl_reg
266 #define AH OP_IMREG, ah_reg
267 #define CH OP_IMREG, ch_reg
268 #define DH OP_IMREG, dh_reg
269 #define BH OP_IMREG, bh_reg
270 #define AX OP_IMREG, ax_reg
271 #define DX OP_IMREG, dx_reg
272 #define indirDX OP_IMREG, indir_dx_reg
274 #define Sw OP_SEG, w_mode
276 #define Ob OP_OFF, b_mode
277 #define Ob64 OP_OFF64, b_mode
278 #define Ov OP_OFF, v_mode
279 #define Ov64 OP_OFF64, v_mode
280 #define Xb OP_DSreg, eSI_reg
281 #define Xv OP_DSreg, eSI_reg
282 #define Yb OP_ESreg, eDI_reg
283 #define Yv OP_ESreg, eDI_reg
284 #define DSBX OP_DSreg, eBX_reg
286 #define es OP_REG, es_reg
287 #define ss OP_REG, ss_reg
288 #define cs OP_REG, cs_reg
289 #define ds OP_REG, ds_reg
290 #define fs OP_REG, fs_reg
291 #define gs OP_REG, gs_reg
295 #define EM OP_EM, v_mode
296 #define EX OP_EX, v_mode
297 #define MS OP_MS, v_mode
298 #define XS OP_XS, v_mode
299 #define OPSUF OP_3DNowSuffix, 0
300 #define OPSIMD OP_SIMD_Suffix, 0
302 #define cond_jump_flag NULL, cond_jump_mode
303 #define loop_jcxz_flag NULL, loop_jcxz_mode
305 /* bits in sizeflag */
306 #define SUFFIX_ALWAYS 4
310 #define b_mode 1 /* byte operand */
311 #define v_mode 2 /* operand size depends on prefixes */
312 #define w_mode 3 /* word operand */
313 #define d_mode 4 /* double word operand */
314 #define q_mode 5 /* quad word operand */
316 #define m_mode 7 /* d_mode in 32bit, q_mode in 64bit mode. */
317 #define cond_jump_mode 8
318 #define loop_jcxz_mode 9
319 #define dq_mode 10 /* operand size depends on REX prefixes. */
364 #define indir_dx_reg 150
368 #define USE_PREFIX_USER_TABLE 3
369 #define X86_64_SPECIAL 4
370 #define IS_3BYTE_OPCODE 5
372 #define FLOAT NULL, NULL, FLOATCODE, NULL, 0, NULL, 0
374 #define GRP1b NULL, NULL, USE_GROUPS, NULL, 0, NULL, 0
375 #define GRP1S NULL, NULL, USE_GROUPS, NULL, 1, NULL, 0
376 #define GRP1Ss NULL, NULL, USE_GROUPS, NULL, 2, NULL, 0
377 #define GRP2b NULL, NULL, USE_GROUPS, NULL, 3, NULL, 0
378 #define GRP2S NULL, NULL, USE_GROUPS, NULL, 4, NULL, 0
379 #define GRP2b_one NULL, NULL, USE_GROUPS, NULL, 5, NULL, 0
380 #define GRP2S_one NULL, NULL, USE_GROUPS, NULL, 6, NULL, 0
381 #define GRP2b_cl NULL, NULL, USE_GROUPS, NULL, 7, NULL, 0
382 #define GRP2S_cl NULL, NULL, USE_GROUPS, NULL, 8, NULL, 0
383 #define GRP3b NULL, NULL, USE_GROUPS, NULL, 9, NULL, 0
384 #define GRP3S NULL, NULL, USE_GROUPS, NULL, 10, NULL, 0
385 #define GRP4 NULL, NULL, USE_GROUPS, NULL, 11, NULL, 0
386 #define GRP5 NULL, NULL, USE_GROUPS, NULL, 12, NULL, 0
387 #define GRP6 NULL, NULL, USE_GROUPS, NULL, 13, NULL, 0
388 #define GRP7 NULL, NULL, USE_GROUPS, NULL, 14, NULL, 0
389 #define GRP8 NULL, NULL, USE_GROUPS, NULL, 15, NULL, 0
390 #define GRP9 NULL, NULL, USE_GROUPS, NULL, 16, NULL, 0
391 #define GRP10 NULL, NULL, USE_GROUPS, NULL, 17, NULL, 0
392 #define GRP11 NULL, NULL, USE_GROUPS, NULL, 18, NULL, 0
393 #define GRP12 NULL, NULL, USE_GROUPS, NULL, 19, NULL, 0
394 #define GRP13 NULL, NULL, USE_GROUPS, NULL, 20, NULL, 0
395 #define GRP14 NULL, NULL, USE_GROUPS, NULL, 21, NULL, 0
396 #define GRPAMD NULL, NULL, USE_GROUPS, NULL, 22, NULL, 0
397 #define GRPPADLCK NULL, NULL, USE_GROUPS, NULL, 23, NULL, 0
399 #define PREGRP0 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 0, NULL, 0
400 #define PREGRP1 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 1, NULL, 0
401 #define PREGRP2 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 2, NULL, 0
402 #define PREGRP3 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 3, NULL, 0
403 #define PREGRP4 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 4, NULL, 0
404 #define PREGRP5 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 5, NULL, 0
405 #define PREGRP6 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 6, NULL, 0
406 #define PREGRP7 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 7, NULL, 0
407 #define PREGRP8 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 8, NULL, 0
408 #define PREGRP9 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 9, NULL, 0
409 #define PREGRP10 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 10, NULL, 0
410 #define PREGRP11 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 11, NULL, 0
411 #define PREGRP12 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 12, NULL, 0
412 #define PREGRP13 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 13, NULL, 0
413 #define PREGRP14 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 14, NULL, 0
414 #define PREGRP15 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 15, NULL, 0
415 #define PREGRP16 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 16, NULL, 0
416 #define PREGRP17 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 17, NULL, 0
417 #define PREGRP18 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 18, NULL, 0
418 #define PREGRP19 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 19, NULL, 0
419 #define PREGRP20 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 20, NULL, 0
420 #define PREGRP21 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 21, NULL, 0
421 #define PREGRP22 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 22, NULL, 0
422 #define PREGRP23 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 23, NULL, 0
423 #define PREGRP24 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 24, NULL, 0
424 #define PREGRP25 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 25, NULL, 0
425 #define PREGRP26 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 26, NULL, 0
426 #define PREGRP27 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 27, NULL, 0
427 #define PREGRP28 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 28, NULL, 0
428 #define PREGRP29 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 29, NULL, 0
429 #define PREGRP30 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 30, NULL, 0
430 #define PREGRP31 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 31, NULL, 0
431 #define PREGRP32 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 32, NULL, 0
433 #define X86_64_0 NULL, NULL, X86_64_SPECIAL, NULL, 0, NULL, 0
435 #define THREE_BYTE_0 NULL, NULL, IS_3BYTE_OPCODE, NULL, 0, NULL, 0
436 #define THREE_BYTE_1 NULL, NULL, IS_3BYTE_OPCODE, NULL, 1, NULL, 0
438 typedef void (*op_rtn) (int bytemode, int sizeflag);
450 /* Upper case letters in the instruction names here are macros.
451 'A' => print 'b' if no register operands or suffix_always is true
452 'B' => print 'b' if suffix_always is true
453 'E' => print 'e' if 32-bit form of jcxz
454 'F' => print 'w' or 'l' depending on address size prefix (loop insns)
455 'H' => print ",pt" or ",pn" branch hint
456 'L' => print 'l' if suffix_always is true
457 'N' => print 'n' if instruction has no wait "prefix"
458 'O' => print 'd', or 'o'
459 'P' => print 'w', 'l' or 'q' if instruction has an operand size prefix,
460 . or suffix_always is true. print 'q' if rex prefix is present.
461 'Q' => print 'w', 'l' or 'q' if no register operands or suffix_always
463 'R' => print 'w', 'l' or 'q' ("wd" or "dq" in intel mode)
464 'S' => print 'w', 'l' or 'q' if suffix_always is true
465 'T' => print 'q' in 64bit mode and behave as 'P' otherwise
466 'U' => print 'q' in 64bit mode and behave as 'Q' otherwise
467 'X' => print 's', 'd' depending on data16 prefix (for XMM)
468 'W' => print 'b' or 'w' ("w" or "de" in intel mode)
469 'Y' => 'q' if instruction has an REX 64bit overwrite prefix
471 Many of the above letters print nothing in Intel mode. See "putop"
474 Braces '{' and '}', and vertical bars '|', indicate alternative
475 mnemonic strings for AT&T, Intel, X86_64 AT&T, and X86_64 Intel
476 modes. In cases where there are only two alternatives, the X86_64
477 instruction is reserved, and "(bad)" is printed.
480 static const struct dis386 dis386[] = {
482 { "addB", Eb, Gb, XX },
483 { "addS", Ev, Gv, XX },
484 { "addB", Gb, Eb, XX },
485 { "addS", Gv, Ev, XX },
486 { "addB", AL, Ib, XX },
487 { "addS", eAX, Iv, XX },
488 { "push{T|}", es, XX, XX },
489 { "pop{T|}", es, XX, XX },
491 { "orB", Eb, Gb, XX },
492 { "orS", Ev, Gv, XX },
493 { "orB", Gb, Eb, XX },
494 { "orS", Gv, Ev, XX },
495 { "orB", AL, Ib, XX },
496 { "orS", eAX, Iv, XX },
497 { "push{T|}", cs, XX, XX },
498 { "(bad)", XX, XX, XX }, /* 0x0f extended opcode escape */
500 { "adcB", Eb, Gb, XX },
501 { "adcS", Ev, Gv, XX },
502 { "adcB", Gb, Eb, XX },
503 { "adcS", Gv, Ev, XX },
504 { "adcB", AL, Ib, XX },
505 { "adcS", eAX, Iv, XX },
506 { "push{T|}", ss, XX, XX },
507 { "popT|}", ss, XX, XX },
509 { "sbbB", Eb, Gb, XX },
510 { "sbbS", Ev, Gv, XX },
511 { "sbbB", Gb, Eb, XX },
512 { "sbbS", Gv, Ev, XX },
513 { "sbbB", AL, Ib, XX },
514 { "sbbS", eAX, Iv, XX },
515 { "push{T|}", ds, XX, XX },
516 { "pop{T|}", ds, XX, XX },
518 { "andB", Eb, Gb, XX },
519 { "andS", Ev, Gv, XX },
520 { "andB", Gb, Eb, XX },
521 { "andS", Gv, Ev, XX },
522 { "andB", AL, Ib, XX },
523 { "andS", eAX, Iv, XX },
524 { "(bad)", XX, XX, XX }, /* SEG ES prefix */
525 { "daa{|}", XX, XX, XX },
527 { "subB", Eb, Gb, XX },
528 { "subS", Ev, Gv, XX },
529 { "subB", Gb, Eb, XX },
530 { "subS", Gv, Ev, XX },
531 { "subB", AL, Ib, XX },
532 { "subS", eAX, Iv, XX },
533 { "(bad)", XX, XX, XX }, /* SEG CS prefix */
534 { "das{|}", XX, XX, XX },
536 { "xorB", Eb, Gb, XX },
537 { "xorS", Ev, Gv, XX },
538 { "xorB", Gb, Eb, XX },
539 { "xorS", Gv, Ev, XX },
540 { "xorB", AL, Ib, XX },
541 { "xorS", eAX, Iv, XX },
542 { "(bad)", XX, XX, XX }, /* SEG SS prefix */
543 { "aaa{|}", XX, XX, XX },
545 { "cmpB", Eb, Gb, XX },
546 { "cmpS", Ev, Gv, XX },
547 { "cmpB", Gb, Eb, XX },
548 { "cmpS", Gv, Ev, XX },
549 { "cmpB", AL, Ib, XX },
550 { "cmpS", eAX, Iv, XX },
551 { "(bad)", XX, XX, XX }, /* SEG DS prefix */
552 { "aas{|}", XX, XX, XX },
554 { "inc{S|}", RMeAX, XX, XX },
555 { "inc{S|}", RMeCX, XX, XX },
556 { "inc{S|}", RMeDX, XX, XX },
557 { "inc{S|}", RMeBX, XX, XX },
558 { "inc{S|}", RMeSP, XX, XX },
559 { "inc{S|}", RMeBP, XX, XX },
560 { "inc{S|}", RMeSI, XX, XX },
561 { "inc{S|}", RMeDI, XX, XX },
563 { "dec{S|}", RMeAX, XX, XX },
564 { "dec{S|}", RMeCX, XX, XX },
565 { "dec{S|}", RMeDX, XX, XX },
566 { "dec{S|}", RMeBX, XX, XX },
567 { "dec{S|}", RMeSP, XX, XX },
568 { "dec{S|}", RMeBP, XX, XX },
569 { "dec{S|}", RMeSI, XX, XX },
570 { "dec{S|}", RMeDI, XX, XX },
572 { "pushS", RMrAX, XX, XX },
573 { "pushS", RMrCX, XX, XX },
574 { "pushS", RMrDX, XX, XX },
575 { "pushS", RMrBX, XX, XX },
576 { "pushS", RMrSP, XX, XX },
577 { "pushS", RMrBP, XX, XX },
578 { "pushS", RMrSI, XX, XX },
579 { "pushS", RMrDI, XX, XX },
581 { "popS", RMrAX, XX, XX },
582 { "popS", RMrCX, XX, XX },
583 { "popS", RMrDX, XX, XX },
584 { "popS", RMrBX, XX, XX },
585 { "popS", RMrSP, XX, XX },
586 { "popS", RMrBP, XX, XX },
587 { "popS", RMrSI, XX, XX },
588 { "popS", RMrDI, XX, XX },
590 { "pusha{P|}", XX, XX, XX },
591 { "popa{P|}", XX, XX, XX },
592 { "bound{S|}", Gv, Ma, XX },
594 { "(bad)", XX, XX, XX }, /* seg fs */
595 { "(bad)", XX, XX, XX }, /* seg gs */
596 { "(bad)", XX, XX, XX }, /* op size prefix */
597 { "(bad)", XX, XX, XX }, /* adr size prefix */
599 { "pushT", Iq, XX, XX },
600 { "imulS", Gv, Ev, Iv },
601 { "pushT", sIb, XX, XX },
602 { "imulS", Gv, Ev, sIb },
603 { "ins{b||b|}", Yb, indirDX, XX },
604 { "ins{R||R|}", Yv, indirDX, XX },
605 { "outs{b||b|}", indirDX, Xb, XX },
606 { "outs{R||R|}", indirDX, Xv, XX },
608 { "joH", Jb, XX, cond_jump_flag },
609 { "jnoH", Jb, XX, cond_jump_flag },
610 { "jbH", Jb, XX, cond_jump_flag },
611 { "jaeH", Jb, XX, cond_jump_flag },
612 { "jeH", Jb, XX, cond_jump_flag },
613 { "jneH", Jb, XX, cond_jump_flag },
614 { "jbeH", Jb, XX, cond_jump_flag },
615 { "jaH", Jb, XX, cond_jump_flag },
617 { "jsH", Jb, XX, cond_jump_flag },
618 { "jnsH", Jb, XX, cond_jump_flag },
619 { "jpH", Jb, XX, cond_jump_flag },
620 { "jnpH", Jb, XX, cond_jump_flag },
621 { "jlH", Jb, XX, cond_jump_flag },
622 { "jgeH", Jb, XX, cond_jump_flag },
623 { "jleH", Jb, XX, cond_jump_flag },
624 { "jgH", Jb, XX, cond_jump_flag },
628 { "(bad)", XX, XX, XX },
630 { "testB", Eb, Gb, XX },
631 { "testS", Ev, Gv, XX },
632 { "xchgB", Eb, Gb, XX },
633 { "xchgS", Ev, Gv, XX },
635 { "movB", Eb, Gb, XX },
636 { "movS", Ev, Gv, XX },
637 { "movB", Gb, Eb, XX },
638 { "movS", Gv, Ev, XX },
639 { "movQ", Ev, Sw, XX },
640 { "leaS", Gv, M, XX },
641 { "movQ", Sw, Ev, XX },
642 { "popU", Ev, XX, XX },
644 { "nop", NOP_Fixup, 0, XX, XX },
645 { "xchgS", RMeCX, eAX, XX },
646 { "xchgS", RMeDX, eAX, XX },
647 { "xchgS", RMeBX, eAX, XX },
648 { "xchgS", RMeSP, eAX, XX },
649 { "xchgS", RMeBP, eAX, XX },
650 { "xchgS", RMeSI, eAX, XX },
651 { "xchgS", RMeDI, eAX, XX },
653 { "cW{tR||tR|}", XX, XX, XX },
654 { "cR{tO||tO|}", XX, XX, XX },
655 { "lcall{T|}", Ap, XX, XX },
656 { "(bad)", XX, XX, XX }, /* fwait */
657 { "pushfT", XX, XX, XX },
658 { "popfT", XX, XX, XX },
659 { "sahf{|}", XX, XX, XX },
660 { "lahf{|}", XX, XX, XX },
662 { "movB", AL, Ob64, XX },
663 { "movS", eAX, Ov64, XX },
664 { "movB", Ob64, AL, XX },
665 { "movS", Ov64, eAX, XX },
666 { "movs{b||b|}", Yb, Xb, XX },
667 { "movs{R||R|}", Yv, Xv, XX },
668 { "cmps{b||b|}", Xb, Yb, XX },
669 { "cmps{R||R|}", Xv, Yv, XX },
671 { "testB", AL, Ib, XX },
672 { "testS", eAX, Iv, XX },
673 { "stosB", Yb, AL, XX },
674 { "stosS", Yv, eAX, XX },
675 { "lodsB", AL, Xb, XX },
676 { "lodsS", eAX, Xv, XX },
677 { "scasB", AL, Yb, XX },
678 { "scasS", eAX, Yv, XX },
680 { "movB", RMAL, Ib, XX },
681 { "movB", RMCL, Ib, XX },
682 { "movB", RMDL, Ib, XX },
683 { "movB", RMBL, Ib, XX },
684 { "movB", RMAH, Ib, XX },
685 { "movB", RMCH, Ib, XX },
686 { "movB", RMDH, Ib, XX },
687 { "movB", RMBH, Ib, XX },
689 { "movS", RMeAX, Iv64, XX },
690 { "movS", RMeCX, Iv64, XX },
691 { "movS", RMeDX, Iv64, XX },
692 { "movS", RMeBX, Iv64, XX },
693 { "movS", RMeSP, Iv64, XX },
694 { "movS", RMeBP, Iv64, XX },
695 { "movS", RMeSI, Iv64, XX },
696 { "movS", RMeDI, Iv64, XX },
700 { "retT", Iw, XX, XX },
701 { "retT", XX, XX, XX },
702 { "les{S|}", Gv, Mp, XX },
703 { "ldsS", Gv, Mp, XX },
704 { "movA", Eb, Ib, XX },
705 { "movQ", Ev, Iv, XX },
707 { "enterT", Iw, Ib, XX },
708 { "leaveT", XX, XX, XX },
709 { "lretP", Iw, XX, XX },
710 { "lretP", XX, XX, XX },
711 { "int3", XX, XX, XX },
712 { "int", Ib, XX, XX },
713 { "into{|}", XX, XX, XX },
714 { "iretP", XX, XX, XX },
720 { "aam{|}", sIb, XX, XX },
721 { "aad{|}", sIb, XX, XX },
722 { "(bad)", XX, XX, XX },
723 { "xlat", DSBX, XX, XX },
734 { "loopneFH", Jb, XX, loop_jcxz_flag },
735 { "loopeFH", Jb, XX, loop_jcxz_flag },
736 { "loopFH", Jb, XX, loop_jcxz_flag },
737 { "jEcxzH", Jb, XX, loop_jcxz_flag },
738 { "inB", AL, Ib, XX },
739 { "inS", eAX, Ib, XX },
740 { "outB", Ib, AL, XX },
741 { "outS", Ib, eAX, XX },
743 { "callT", Jv, XX, XX },
744 { "jmpT", Jv, XX, XX },
745 { "ljmp{T|}", Ap, XX, XX },
746 { "jmp", Jb, XX, XX },
747 { "inB", AL, indirDX, XX },
748 { "inS", eAX, indirDX, XX },
749 { "outB", indirDX, AL, XX },
750 { "outS", indirDX, eAX, XX },
752 { "(bad)", XX, XX, XX }, /* lock prefix */
753 { "icebp", XX, XX, XX },
754 { "(bad)", XX, XX, XX }, /* repne */
755 { "(bad)", XX, XX, XX }, /* repz */
756 { "hlt", XX, XX, XX },
757 { "cmc", XX, XX, XX },
761 { "clc", XX, XX, XX },
762 { "stc", XX, XX, XX },
763 { "cli", XX, XX, XX },
764 { "sti", XX, XX, XX },
765 { "cld", XX, XX, XX },
766 { "std", XX, XX, XX },
771 static const struct dis386 dis386_twobyte[] = {
775 { "larS", Gv, Ew, XX },
776 { "lslS", Gv, Ew, XX },
777 { "(bad)", XX, XX, XX },
778 { "syscall", XX, XX, XX },
779 { "clts", XX, XX, XX },
780 { "sysretP", XX, XX, XX },
782 { "invd", XX, XX, XX },
783 { "wbinvd", XX, XX, XX },
784 { "(bad)", XX, XX, XX },
785 { "ud2a", XX, XX, XX },
786 { "(bad)", XX, XX, XX },
788 { "femms", XX, XX, XX },
789 { "", MX, EM, OPSUF }, /* See OP_3DNowSuffix. */
794 { "movlpX", EX, XM, SIMD_Fixup, 'h' },
795 { "unpcklpX", XM, EX, XX },
796 { "unpckhpX", XM, EX, XX },
798 { "movhpX", EX, XM, SIMD_Fixup, 'l' },
801 { "(bad)", XX, XX, XX },
802 { "(bad)", XX, XX, XX },
803 { "(bad)", XX, XX, XX },
804 { "(bad)", XX, XX, XX },
805 { "(bad)", XX, XX, XX },
806 { "(bad)", XX, XX, XX },
807 { "(bad)", XX, XX, XX },
809 { "movL", Rm, Cm, XX },
810 { "movL", Rm, Dm, XX },
811 { "movL", Cm, Rm, XX },
812 { "movL", Dm, Rm, XX },
813 { "movL", Rd, Td, XX },
814 { "(bad)", XX, XX, XX },
815 { "movL", Td, Rd, XX },
816 { "(bad)", XX, XX, XX },
818 { "movapX", XM, EX, XX },
819 { "movapX", EX, XM, XX },
821 { "movntpX", Ev, XM, XX },
824 { "ucomisX", XM,EX, XX },
825 { "comisX", XM,EX, XX },
827 { "wrmsr", XX, XX, XX },
828 { "rdtsc", XX, XX, XX },
829 { "rdmsr", XX, XX, XX },
830 { "rdpmc", XX, XX, XX },
831 { "sysenter", XX, XX, XX },
832 { "sysexit", XX, XX, XX },
833 { "(bad)", XX, XX, XX },
834 { "(bad)", XX, XX, XX },
837 { "(bad)", XX, XX, XX },
839 { "(bad)", XX, XX, XX },
840 { "(bad)", XX, XX, XX },
841 { "(bad)", XX, XX, XX },
842 { "(bad)", XX, XX, XX },
843 { "(bad)", XX, XX, XX },
845 { "cmovo", Gv, Ev, XX },
846 { "cmovno", Gv, Ev, XX },
847 { "cmovb", Gv, Ev, XX },
848 { "cmovae", Gv, Ev, XX },
849 { "cmove", Gv, Ev, XX },
850 { "cmovne", Gv, Ev, XX },
851 { "cmovbe", Gv, Ev, XX },
852 { "cmova", Gv, Ev, XX },
854 { "cmovs", Gv, Ev, XX },
855 { "cmovns", Gv, Ev, XX },
856 { "cmovp", Gv, Ev, XX },
857 { "cmovnp", Gv, Ev, XX },
858 { "cmovl", Gv, Ev, XX },
859 { "cmovge", Gv, Ev, XX },
860 { "cmovle", Gv, Ev, XX },
861 { "cmovg", Gv, Ev, XX },
863 { "movmskpX", Gd, XS, XX },
867 { "andpX", XM, EX, XX },
868 { "andnpX", XM, EX, XX },
869 { "orpX", XM, EX, XX },
870 { "xorpX", XM, EX, XX },
881 { "punpcklbw", MX, EM, XX },
882 { "punpcklwd", MX, EM, XX },
883 { "punpckldq", MX, EM, XX },
884 { "packsswb", MX, EM, XX },
885 { "pcmpgtb", MX, EM, XX },
886 { "pcmpgtw", MX, EM, XX },
887 { "pcmpgtd", MX, EM, XX },
888 { "packuswb", MX, EM, XX },
890 { "punpckhbw", MX, EM, XX },
891 { "punpckhwd", MX, EM, XX },
892 { "punpckhdq", MX, EM, XX },
893 { "packssdw", MX, EM, XX },
896 { "movd", MX, Edq, XX },
903 { "pcmpeqb", MX, EM, XX },
904 { "pcmpeqw", MX, EM, XX },
905 { "pcmpeqd", MX, EM, XX },
906 { "emms", XX, XX, XX },
908 { "(bad)", XX, XX, XX },
909 { "(bad)", XX, XX, XX },
910 { "(bad)", XX, XX, XX },
911 { "(bad)", XX, XX, XX },
917 { "joH", Jv, XX, cond_jump_flag },
918 { "jnoH", Jv, XX, cond_jump_flag },
919 { "jbH", Jv, XX, cond_jump_flag },
920 { "jaeH", Jv, XX, cond_jump_flag },
921 { "jeH", Jv, XX, cond_jump_flag },
922 { "jneH", Jv, XX, cond_jump_flag },
923 { "jbeH", Jv, XX, cond_jump_flag },
924 { "jaH", Jv, XX, cond_jump_flag },
926 { "jsH", Jv, XX, cond_jump_flag },
927 { "jnsH", Jv, XX, cond_jump_flag },
928 { "jpH", Jv, XX, cond_jump_flag },
929 { "jnpH", Jv, XX, cond_jump_flag },
930 { "jlH", Jv, XX, cond_jump_flag },
931 { "jgeH", Jv, XX, cond_jump_flag },
932 { "jleH", Jv, XX, cond_jump_flag },
933 { "jgH", Jv, XX, cond_jump_flag },
935 { "seto", Eb, XX, XX },
936 { "setno", Eb, XX, XX },
937 { "setb", Eb, XX, XX },
938 { "setae", Eb, XX, XX },
939 { "sete", Eb, XX, XX },
940 { "setne", Eb, XX, XX },
941 { "setbe", Eb, XX, XX },
942 { "seta", Eb, XX, XX },
944 { "sets", Eb, XX, XX },
945 { "setns", Eb, XX, XX },
946 { "setp", Eb, XX, XX },
947 { "setnp", Eb, XX, XX },
948 { "setl", Eb, XX, XX },
949 { "setge", Eb, XX, XX },
950 { "setle", Eb, XX, XX },
951 { "setg", Eb, XX, XX },
953 { "pushT", fs, XX, XX },
954 { "popT", fs, XX, XX },
955 { "cpuid", XX, XX, XX },
956 { "btS", Ev, Gv, XX },
957 { "shldS", Ev, Gv, Ib },
958 { "shldS", Ev, Gv, CL },
959 { "(bad)", XX, XX, XX },
962 { "pushT", gs, XX, XX },
963 { "popT", gs, XX, XX },
964 { "rsm", XX, XX, XX },
965 { "btsS", Ev, Gv, XX },
966 { "shrdS", Ev, Gv, Ib },
967 { "shrdS", Ev, Gv, CL },
969 { "imulS", Gv, Ev, XX },
971 { "cmpxchgB", Eb, Gb, XX },
972 { "cmpxchgS", Ev, Gv, XX },
973 { "lssS", Gv, Mp, XX },
974 { "btrS", Ev, Gv, XX },
975 { "lfsS", Gv, Mp, XX },
976 { "lgsS", Gv, Mp, XX },
977 { "movz{bR|x|bR|x}", Gv, Eb, XX },
978 { "movz{wR|x|wR|x}", Gv, Ew, XX }, /* yes, there really is movzww ! */
980 { "(bad)", XX, XX, XX },
981 { "ud2b", XX, XX, XX },
983 { "btcS", Ev, Gv, XX },
984 { "bsfS", Gv, Ev, XX },
985 { "bsrS", Gv, Ev, XX },
986 { "movs{bR|x|bR|x}", Gv, Eb, XX },
987 { "movs{wR|x|wR|x}", Gv, Ew, XX }, /* yes, there really is movsww ! */
989 { "xaddB", Eb, Gb, XX },
990 { "xaddS", Ev, Gv, XX },
992 { "movntiS", Ev, Gv, XX },
993 { "pinsrw", MX, Ed, Ib },
994 { "pextrw", Gd, MS, Ib },
995 { "shufpX", XM, EX, Ib },
998 { "bswap", RMeAX, XX, XX },
999 { "bswap", RMeCX, XX, XX },
1000 { "bswap", RMeDX, XX, XX },
1001 { "bswap", RMeBX, XX, XX },
1002 { "bswap", RMeSP, XX, XX },
1003 { "bswap", RMeBP, XX, XX },
1004 { "bswap", RMeSI, XX, XX },
1005 { "bswap", RMeDI, XX, XX },
1008 { "psrlw", MX, EM, XX },
1009 { "psrld", MX, EM, XX },
1010 { "psrlq", MX, EM, XX },
1011 { "paddq", MX, EM, XX },
1012 { "pmullw", MX, EM, XX },
1014 { "pmovmskb", Gd, MS, XX },
1016 { "psubusb", MX, EM, XX },
1017 { "psubusw", MX, EM, XX },
1018 { "pminub", MX, EM, XX },
1019 { "pand", MX, EM, XX },
1020 { "paddusb", MX, EM, XX },
1021 { "paddusw", MX, EM, XX },
1022 { "pmaxub", MX, EM, XX },
1023 { "pandn", MX, EM, XX },
1025 { "pavgb", MX, EM, XX },
1026 { "psraw", MX, EM, XX },
1027 { "psrad", MX, EM, XX },
1028 { "pavgw", MX, EM, XX },
1029 { "pmulhuw", MX, EM, XX },
1030 { "pmulhw", MX, EM, XX },
1034 { "psubsb", MX, EM, XX },
1035 { "psubsw", MX, EM, XX },
1036 { "pminsw", MX, EM, XX },
1037 { "por", MX, EM, XX },
1038 { "paddsb", MX, EM, XX },
1039 { "paddsw", MX, EM, XX },
1040 { "pmaxsw", MX, EM, XX },
1041 { "pxor", MX, EM, XX },
1044 { "psllw", MX, EM, XX },
1045 { "pslld", MX, EM, XX },
1046 { "psllq", MX, EM, XX },
1047 { "pmuludq", MX, EM, XX },
1048 { "pmaddwd", MX, EM, XX },
1049 { "psadbw", MX, EM, XX },
1052 { "psubb", MX, EM, XX },
1053 { "psubw", MX, EM, XX },
1054 { "psubd", MX, EM, XX },
1055 { "psubq", MX, EM, XX },
1056 { "paddb", MX, EM, XX },
1057 { "paddw", MX, EM, XX },
1058 { "paddd", MX, EM, XX },
1059 { "(bad)", XX, XX, XX }
1062 static const unsigned char onebyte_has_modrm[256] = {
1063 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1064 /* ------------------------------- */
1065 /* 00 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 00 */
1066 /* 10 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 10 */
1067 /* 20 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 20 */
1068 /* 30 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 30 */
1069 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 40 */
1070 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 50 */
1071 /* 60 */ 0,0,1,1,0,0,0,0,0,1,0,1,0,0,0,0, /* 60 */
1072 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 70 */
1073 /* 80 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 80 */
1074 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 90 */
1075 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* a0 */
1076 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* b0 */
1077 /* c0 */ 1,1,0,0,1,1,1,1,0,0,0,0,0,0,0,0, /* c0 */
1078 /* d0 */ 1,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1, /* d0 */
1079 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* e0 */
1080 /* f0 */ 0,0,0,0,0,0,1,1,0,0,0,0,0,0,1,1 /* f0 */
1081 /* ------------------------------- */
1082 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1085 static const unsigned char twobyte_has_modrm[256] = {
1086 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1087 /* ------------------------------- */
1088 /* 00 */ 1,1,1,1,0,0,0,0,0,0,0,0,0,1,0,1, /* 0f */
1089 /* 10 */ 1,1,1,1,1,1,1,1,1,0,0,0,0,0,0,0, /* 1f */
1090 /* 20 */ 1,1,1,1,1,0,1,0,1,1,1,1,1,1,1,1, /* 2f */
1091 /* 30 */ 0,0,0,0,0,0,0,0,1,0,1,0,0,0,0,0, /* 3f */
1092 /* 40 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 4f */
1093 /* 50 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 5f */
1094 /* 60 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 6f */
1095 /* 70 */ 1,1,1,1,1,1,1,0,0,0,0,0,1,1,1,1, /* 7f */
1096 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1097 /* 90 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 9f */
1098 /* a0 */ 0,0,0,1,1,1,0,1,0,0,0,1,1,1,1,1, /* af */
1099 /* b0 */ 1,1,1,1,1,1,1,1,0,0,1,1,1,1,1,1, /* bf */
1100 /* c0 */ 1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0, /* cf */
1101 /* d0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* df */
1102 /* e0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* ef */
1103 /* f0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0 /* ff */
1104 /* ------------------------------- */
1105 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1108 static const unsigned char twobyte_uses_SSE_prefix[256] = {
1109 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1110 /* ------------------------------- */
1111 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */
1112 /* 10 */ 1,1,1,0,0,0,1,0,0,0,0,0,0,0,0,0, /* 1f */
1113 /* 20 */ 0,0,0,0,0,0,0,0,0,0,1,0,1,1,0,0, /* 2f */
1114 /* 30 */ 0,0,0,0,0,0,0,0,1,0,1,0,0,0,0,0, /* 3f */
1115 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */
1116 /* 50 */ 0,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1, /* 5f */
1117 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,1,0,1, /* 6f */
1118 /* 70 */ 1,0,0,0,0,0,0,0,0,0,0,0,1,1,1,1, /* 7f */
1119 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */
1120 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */
1121 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */
1122 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */
1123 /* c0 */ 0,0,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */
1124 /* d0 */ 1,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* df */
1125 /* e0 */ 0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* ef */
1126 /* f0 */ 1,0,0,0,0,0,0,1,0,0,0,0,0,0,0,0 /* ff */
1127 /* ------------------------------- */
1128 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
1131 static char obuf[100];
1133 static char scratchbuf[100];
1134 static unsigned char *start_codep;
1135 static unsigned char *insn_codep;
1136 static unsigned char *codep;
1137 static disassemble_info *the_info;
1141 static unsigned char need_modrm;
1143 /* If we are accessing mod/rm/reg without need_modrm set, then the
1144 values are stale. Hitting this abort likely indicates that you
1145 need to update onebyte_has_modrm or twobyte_has_modrm. */
1146 #define MODRM_CHECK if (!need_modrm) abort ()
1148 static const char **names64;
1149 static const char **names32;
1150 static const char **names16;
1151 static const char **names8;
1152 static const char **names8rex;
1153 static const char **names_seg;
1154 static const char **index16;
1156 static const char *intel_names64[] = {
1157 "rax", "rcx", "rdx", "rbx", "rsp", "rbp", "rsi", "rdi",
1158 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
1160 static const char *intel_names32[] = {
1161 "eax", "ecx", "edx", "ebx", "esp", "ebp", "esi", "edi",
1162 "r8d", "r9d", "r10d", "r11d", "r12d", "r13d", "r14d", "r15d"
1164 static const char *intel_names16[] = {
1165 "ax", "cx", "dx", "bx", "sp", "bp", "si", "di",
1166 "r8w", "r9w", "r10w", "r11w", "r12w", "r13w", "r14w", "r15w"
1168 static const char *intel_names8[] = {
1169 "al", "cl", "dl", "bl", "ah", "ch", "dh", "bh",
1171 static const char *intel_names8rex[] = {
1172 "al", "cl", "dl", "bl", "spl", "bpl", "sil", "dil",
1173 "r8b", "r9b", "r10b", "r11b", "r12b", "r13b", "r14b", "r15b"
1175 static const char *intel_names_seg[] = {
1176 "es", "cs", "ss", "ds", "fs", "gs", "?", "?",
1178 static const char *intel_index16[] = {
1179 "bx+si", "bx+di", "bp+si", "bp+di", "si", "di", "bp", "bx"
1182 static const char *att_names64[] = {
1183 "%rax", "%rcx", "%rdx", "%rbx", "%rsp", "%rbp", "%rsi", "%rdi",
1184 "%r8", "%r9", "%r10", "%r11", "%r12", "%r13", "%r14", "%r15"
1186 static const char *att_names32[] = {
1187 "%eax", "%ecx", "%edx", "%ebx", "%esp", "%ebp", "%esi", "%edi",
1188 "%r8d", "%r9d", "%r10d", "%r11d", "%r12d", "%r13d", "%r14d", "%r15d"
1190 static const char *att_names16[] = {
1191 "%ax", "%cx", "%dx", "%bx", "%sp", "%bp", "%si", "%di",
1192 "%r8w", "%r9w", "%r10w", "%r11w", "%r12w", "%r13w", "%r14w", "%r15w"
1194 static const char *att_names8[] = {
1195 "%al", "%cl", "%dl", "%bl", "%ah", "%ch", "%dh", "%bh",
1197 static const char *att_names8rex[] = {
1198 "%al", "%cl", "%dl", "%bl", "%spl", "%bpl", "%sil", "%dil",
1199 "%r8b", "%r9b", "%r10b", "%r11b", "%r12b", "%r13b", "%r14b", "%r15b"
1201 static const char *att_names_seg[] = {
1202 "%es", "%cs", "%ss", "%ds", "%fs", "%gs", "%?", "%?",
1204 static const char *att_index16[] = {
1205 "%bx,%si", "%bx,%di", "%bp,%si", "%bp,%di", "%si", "%di", "%bp", "%bx"
1208 static const struct dis386 grps[][8] = {
1211 { "addA", Eb, Ib, XX },
1212 { "orA", Eb, Ib, XX },
1213 { "adcA", Eb, Ib, XX },
1214 { "sbbA", Eb, Ib, XX },
1215 { "andA", Eb, Ib, XX },
1216 { "subA", Eb, Ib, XX },
1217 { "xorA", Eb, Ib, XX },
1218 { "cmpA", Eb, Ib, XX }
1222 { "addQ", Ev, Iv, XX },
1223 { "orQ", Ev, Iv, XX },
1224 { "adcQ", Ev, Iv, XX },
1225 { "sbbQ", Ev, Iv, XX },
1226 { "andQ", Ev, Iv, XX },
1227 { "subQ", Ev, Iv, XX },
1228 { "xorQ", Ev, Iv, XX },
1229 { "cmpQ", Ev, Iv, XX }
1233 { "addQ", Ev, sIb, XX },
1234 { "orQ", Ev, sIb, XX },
1235 { "adcQ", Ev, sIb, XX },
1236 { "sbbQ", Ev, sIb, XX },
1237 { "andQ", Ev, sIb, XX },
1238 { "subQ", Ev, sIb, XX },
1239 { "xorQ", Ev, sIb, XX },
1240 { "cmpQ", Ev, sIb, XX }
1244 { "rolA", Eb, Ib, XX },
1245 { "rorA", Eb, Ib, XX },
1246 { "rclA", Eb, Ib, XX },
1247 { "rcrA", Eb, Ib, XX },
1248 { "shlA", Eb, Ib, XX },
1249 { "shrA", Eb, Ib, XX },
1250 { "(bad)", XX, XX, XX },
1251 { "sarA", Eb, Ib, XX },
1255 { "rolQ", Ev, Ib, XX },
1256 { "rorQ", Ev, Ib, XX },
1257 { "rclQ", Ev, Ib, XX },
1258 { "rcrQ", Ev, Ib, XX },
1259 { "shlQ", Ev, Ib, XX },
1260 { "shrQ", Ev, Ib, XX },
1261 { "(bad)", XX, XX, XX },
1262 { "sarQ", Ev, Ib, XX },
1266 { "rolA", Eb, XX, XX },
1267 { "rorA", Eb, XX, XX },
1268 { "rclA", Eb, XX, XX },
1269 { "rcrA", Eb, XX, XX },
1270 { "shlA", Eb, XX, XX },
1271 { "shrA", Eb, XX, XX },
1272 { "(bad)", XX, XX, XX },
1273 { "sarA", Eb, XX, XX },
1277 { "rolQ", Ev, XX, XX },
1278 { "rorQ", Ev, XX, XX },
1279 { "rclQ", Ev, XX, XX },
1280 { "rcrQ", Ev, XX, XX },
1281 { "shlQ", Ev, XX, XX },
1282 { "shrQ", Ev, XX, XX },
1283 { "(bad)", XX, XX, XX},
1284 { "sarQ", Ev, XX, XX },
1288 { "rolA", Eb, CL, XX },
1289 { "rorA", Eb, CL, XX },
1290 { "rclA", Eb, CL, XX },
1291 { "rcrA", Eb, CL, XX },
1292 { "shlA", Eb, CL, XX },
1293 { "shrA", Eb, CL, XX },
1294 { "(bad)", XX, XX, XX },
1295 { "sarA", Eb, CL, XX },
1299 { "rolQ", Ev, CL, XX },
1300 { "rorQ", Ev, CL, XX },
1301 { "rclQ", Ev, CL, XX },
1302 { "rcrQ", Ev, CL, XX },
1303 { "shlQ", Ev, CL, XX },
1304 { "shrQ", Ev, CL, XX },
1305 { "(bad)", XX, XX, XX },
1306 { "sarQ", Ev, CL, XX }
1310 { "testA", Eb, Ib, XX },
1311 { "(bad)", Eb, XX, XX },
1312 { "notA", Eb, XX, XX },
1313 { "negA", Eb, XX, XX },
1314 { "mulA", Eb, XX, XX }, /* Don't print the implicit %al register, */
1315 { "imulA", Eb, XX, XX }, /* to distinguish these opcodes from other */
1316 { "divA", Eb, XX, XX }, /* mul/imul opcodes. Do the same for div */
1317 { "idivA", Eb, XX, XX } /* and idiv for consistency. */
1321 { "testQ", Ev, Iv, XX },
1322 { "(bad)", XX, XX, XX },
1323 { "notQ", Ev, XX, XX },
1324 { "negQ", Ev, XX, XX },
1325 { "mulQ", Ev, XX, XX }, /* Don't print the implicit register. */
1326 { "imulQ", Ev, XX, XX },
1327 { "divQ", Ev, XX, XX },
1328 { "idivQ", Ev, XX, XX },
1332 { "incA", Eb, XX, XX },
1333 { "decA", Eb, XX, XX },
1334 { "(bad)", XX, XX, XX },
1335 { "(bad)", XX, XX, XX },
1336 { "(bad)", XX, XX, XX },
1337 { "(bad)", XX, XX, XX },
1338 { "(bad)", XX, XX, XX },
1339 { "(bad)", XX, XX, XX },
1343 { "incQ", Ev, XX, XX },
1344 { "decQ", Ev, XX, XX },
1345 { "callT", indirEv, XX, XX },
1346 { "lcallT", indirEv, XX, XX },
1347 { "jmpT", indirEv, XX, XX },
1348 { "ljmpT", indirEv, XX, XX },
1349 { "pushU", Ev, XX, XX },
1350 { "(bad)", XX, XX, XX },
1354 { "sldtQ", Ev, XX, XX },
1355 { "strQ", Ev, XX, XX },
1356 { "lldt", Ew, XX, XX },
1357 { "ltr", Ew, XX, XX },
1358 { "verr", Ew, XX, XX },
1359 { "verw", Ew, XX, XX },
1360 { "(bad)", XX, XX, XX },
1361 { "(bad)", XX, XX, XX }
1365 { "sgdtQ", M, XX, XX },
1366 { "sidtQ", PNI_Fixup, 0, XX, XX },
1367 { "lgdtQ", M, XX, XX },
1368 { "lidtQ", M, XX, XX },
1369 { "smswQ", Ev, XX, XX },
1370 { "(bad)", XX, XX, XX },
1371 { "lmsw", Ew, XX, XX },
1372 { "invlpg", INVLPG_Fixup, w_mode, XX, XX },
1376 { "(bad)", XX, XX, XX },
1377 { "(bad)", XX, XX, XX },
1378 { "(bad)", XX, XX, XX },
1379 { "(bad)", XX, XX, XX },
1380 { "btQ", Ev, Ib, XX },
1381 { "btsQ", Ev, Ib, XX },
1382 { "btrQ", Ev, Ib, XX },
1383 { "btcQ", Ev, Ib, XX },
1387 { "(bad)", XX, XX, XX },
1388 { "cmpxchg8b", Ev, XX, XX },
1389 { "(bad)", XX, XX, XX },
1390 { "(bad)", XX, XX, XX },
1391 { "(bad)", XX, XX, XX },
1392 { "(bad)", XX, XX, XX },
1393 { "(bad)", XX, XX, XX },
1394 { "(bad)", XX, XX, XX },
1398 { "(bad)", XX, XX, XX },
1399 { "(bad)", XX, XX, XX },
1400 { "psrlw", MS, Ib, XX },
1401 { "(bad)", XX, XX, XX },
1402 { "psraw", MS, Ib, XX },
1403 { "(bad)", XX, XX, XX },
1404 { "psllw", MS, Ib, XX },
1405 { "(bad)", XX, XX, XX },
1409 { "(bad)", XX, XX, XX },
1410 { "(bad)", XX, XX, XX },
1411 { "psrld", MS, Ib, XX },
1412 { "(bad)", XX, XX, XX },
1413 { "psrad", MS, Ib, XX },
1414 { "(bad)", XX, XX, XX },
1415 { "pslld", MS, Ib, XX },
1416 { "(bad)", XX, XX, XX },
1420 { "(bad)", XX, XX, XX },
1421 { "(bad)", XX, XX, XX },
1422 { "psrlq", MS, Ib, XX },
1423 { "psrldq", MS, Ib, XX },
1424 { "(bad)", XX, XX, XX },
1425 { "(bad)", XX, XX, XX },
1426 { "psllq", MS, Ib, XX },
1427 { "pslldq", MS, Ib, XX },
1431 { "fxsave", Ev, XX, XX },
1432 { "fxrstor", Ev, XX, XX },
1433 { "ldmxcsr", Ev, XX, XX },
1434 { "stmxcsr", Ev, XX, XX },
1435 { "(bad)", XX, XX, XX },
1436 { "lfence", OP_0fae, 0, XX, XX },
1437 { "mfence", OP_0fae, 0, XX, XX },
1438 { "clflush", OP_0fae, 0, XX, XX },
1442 { "prefetchnta", Ev, XX, XX },
1443 { "prefetcht0", Ev, XX, XX },
1444 { "prefetcht1", Ev, XX, XX },
1445 { "prefetcht2", Ev, XX, XX },
1446 { "(bad)", XX, XX, XX },
1447 { "(bad)", XX, XX, XX },
1448 { "(bad)", XX, XX, XX },
1449 { "(bad)", XX, XX, XX },
1453 { "prefetch", Eb, XX, XX },
1454 { "prefetchw", Eb, XX, XX },
1455 { "(bad)", XX, XX, XX },
1456 { "(bad)", XX, XX, XX },
1457 { "(bad)", XX, XX, XX },
1458 { "(bad)", XX, XX, XX },
1459 { "(bad)", XX, XX, XX },
1460 { "(bad)", XX, XX, XX },
1464 { "xstorerng", OP_0f07, 0, XX, XX },
1465 { "xcryptecb", OP_0f07, 0, XX, XX },
1466 { "xcryptcbc", OP_0f07, 0, XX, XX },
1467 { "(bad)", OP_0f07, 0, XX, XX },
1468 { "xcryptcfb", OP_0f07, 0, XX, XX },
1469 { "xcryptofb", OP_0f07, 0, XX, XX },
1470 { "(bad)", OP_0f07, 0, XX, XX },
1471 { "(bad)", OP_0f07, 0, XX, XX },
1475 static const struct dis386 prefix_user_table[][4] = {
1478 { "addps", XM, EX, XX },
1479 { "addss", XM, EX, XX },
1480 { "addpd", XM, EX, XX },
1481 { "addsd", XM, EX, XX },
1485 { "", XM, EX, OPSIMD }, /* See OP_SIMD_SUFFIX. */
1486 { "", XM, EX, OPSIMD },
1487 { "", XM, EX, OPSIMD },
1488 { "", XM, EX, OPSIMD },
1492 { "cvtpi2ps", XM, EM, XX },
1493 { "cvtsi2ssY", XM, Ev, XX },
1494 { "cvtpi2pd", XM, EM, XX },
1495 { "cvtsi2sdY", XM, Ev, XX },
1499 { "cvtps2pi", MX, EX, XX },
1500 { "cvtss2siY", Gv, EX, XX },
1501 { "cvtpd2pi", MX, EX, XX },
1502 { "cvtsd2siY", Gv, EX, XX },
1506 { "cvttps2pi", MX, EX, XX },
1507 { "cvttss2siY", Gv, EX, XX },
1508 { "cvttpd2pi", MX, EX, XX },
1509 { "cvttsd2siY", Gv, EX, XX },
1513 { "divps", XM, EX, XX },
1514 { "divss", XM, EX, XX },
1515 { "divpd", XM, EX, XX },
1516 { "divsd", XM, EX, XX },
1520 { "maxps", XM, EX, XX },
1521 { "maxss", XM, EX, XX },
1522 { "maxpd", XM, EX, XX },
1523 { "maxsd", XM, EX, XX },
1527 { "minps", XM, EX, XX },
1528 { "minss", XM, EX, XX },
1529 { "minpd", XM, EX, XX },
1530 { "minsd", XM, EX, XX },
1534 { "movups", XM, EX, XX },
1535 { "movss", XM, EX, XX },
1536 { "movupd", XM, EX, XX },
1537 { "movsd", XM, EX, XX },
1541 { "movups", EX, XM, XX },
1542 { "movss", EX, XM, XX },
1543 { "movupd", EX, XM, XX },
1544 { "movsd", EX, XM, XX },
1548 { "mulps", XM, EX, XX },
1549 { "mulss", XM, EX, XX },
1550 { "mulpd", XM, EX, XX },
1551 { "mulsd", XM, EX, XX },
1555 { "rcpps", XM, EX, XX },
1556 { "rcpss", XM, EX, XX },
1557 { "(bad)", XM, EX, XX },
1558 { "(bad)", XM, EX, XX },
1562 { "rsqrtps", XM, EX, XX },
1563 { "rsqrtss", XM, EX, XX },
1564 { "(bad)", XM, EX, XX },
1565 { "(bad)", XM, EX, XX },
1569 { "sqrtps", XM, EX, XX },
1570 { "sqrtss", XM, EX, XX },
1571 { "sqrtpd", XM, EX, XX },
1572 { "sqrtsd", XM, EX, XX },
1576 { "subps", XM, EX, XX },
1577 { "subss", XM, EX, XX },
1578 { "subpd", XM, EX, XX },
1579 { "subsd", XM, EX, XX },
1583 { "(bad)", XM, EX, XX },
1584 { "cvtdq2pd", XM, EX, XX },
1585 { "cvttpd2dq", XM, EX, XX },
1586 { "cvtpd2dq", XM, EX, XX },
1590 { "cvtdq2ps", XM, EX, XX },
1591 { "cvttps2dq",XM, EX, XX },
1592 { "cvtps2dq",XM, EX, XX },
1593 { "(bad)", XM, EX, XX },
1597 { "cvtps2pd", XM, EX, XX },
1598 { "cvtss2sd", XM, EX, XX },
1599 { "cvtpd2ps", XM, EX, XX },
1600 { "cvtsd2ss", XM, EX, XX },
1604 { "maskmovq", MX, MS, XX },
1605 { "(bad)", XM, EX, XX },
1606 { "maskmovdqu", XM, EX, XX },
1607 { "(bad)", XM, EX, XX },
1611 { "movq", MX, EM, XX },
1612 { "movdqu", XM, EX, XX },
1613 { "movdqa", XM, EX, XX },
1614 { "(bad)", XM, EX, XX },
1618 { "movq", EM, MX, XX },
1619 { "movdqu", EX, XM, XX },
1620 { "movdqa", EX, XM, XX },
1621 { "(bad)", EX, XM, XX },
1625 { "(bad)", EX, XM, XX },
1626 { "movq2dq", XM, MS, XX },
1627 { "movq", EX, XM, XX },
1628 { "movdq2q", MX, XS, XX },
1632 { "pshufw", MX, EM, Ib },
1633 { "pshufhw", XM, EX, Ib },
1634 { "pshufd", XM, EX, Ib },
1635 { "pshuflw", XM, EX, Ib },
1639 { "movd", Edq, MX, XX },
1640 { "movq", XM, EX, XX },
1641 { "movd", Edq, XM, XX },
1642 { "(bad)", Ed, XM, XX },
1646 { "(bad)", MX, EX, XX },
1647 { "(bad)", XM, EX, XX },
1648 { "punpckhqdq", XM, EX, XX },
1649 { "(bad)", XM, EX, XX },
1653 { "movntq", Ev, MX, XX },
1654 { "(bad)", Ev, XM, XX },
1655 { "movntdq", Ev, XM, XX },
1656 { "(bad)", Ev, XM, XX },
1660 { "(bad)", MX, EX, XX },
1661 { "(bad)", XM, EX, XX },
1662 { "punpcklqdq", XM, EX, XX },
1663 { "(bad)", XM, EX, XX },
1667 { "(bad)", MX, EX, XX },
1668 { "(bad)", XM, EX, XX },
1669 { "addsubpd", XM, EX, XX },
1670 { "addsubps", XM, EX, XX },
1674 { "(bad)", MX, EX, XX },
1675 { "(bad)", XM, EX, XX },
1676 { "haddpd", XM, EX, XX },
1677 { "haddps", XM, EX, XX },
1681 { "(bad)", MX, EX, XX },
1682 { "(bad)", XM, EX, XX },
1683 { "hsubpd", XM, EX, XX },
1684 { "hsubps", XM, EX, XX },
1688 { "movlpX", XM, EX, SIMD_Fixup, 'h' }, /* really only 2 operands */
1689 { "movsldup", XM, EX, XX },
1690 { "movlpd", XM, EX, XX },
1691 { "movddup", XM, EX, XX },
1695 { "movhpX", XM, EX, SIMD_Fixup, 'l' },
1696 { "movshdup", XM, EX, XX },
1697 { "movhpd", XM, EX, XX },
1698 { "(bad)", XM, EX, XX },
1702 { "(bad)", XM, EX, XX },
1703 { "(bad)", XM, EX, XX },
1704 { "(bad)", XM, EX, XX },
1705 { "lddqu", XM, M, XX },
1709 static const struct dis386 x86_64_table[][2] = {
1711 { "arpl", Ew, Gw, XX },
1712 { "movs{||lq|xd}", Gv, Ed, XX },
1716 static const struct dis386 three_byte_table[][32] = {
1719 { "pshufb", MX, EM, XX },
1720 { "phaddw", MX, EM, XX },
1721 { "phaddd", MX, EM, XX },
1722 { "phaddsw", MX, EM, XX },
1723 { "pmaddubsw", MX, EM, XX },
1724 { "phsubw", MX, EM, XX },
1725 { "phsubd", MX, EM, XX },
1726 { "phsubsw", MX, EM, XX },
1727 { "psignb", MX, EM, XX },
1728 { "psignw", MX, EM, XX },
1729 { "psignd", MX, EM, XX },
1730 { "pmulhrsw", MX, EM, XX },
1731 { "(bad)", XX, XX, XX },
1732 { "(bad)", XX, XX, XX },
1733 { "(bad)", XX, XX, XX },
1734 { "(bad)", XX, XX, XX },
1735 { "(bad)", XX, XX, XX },
1736 { "(bad)", XX, XX, XX },
1737 { "(bad)", XX, XX, XX },
1738 { "(bad)", XX, XX, XX },
1739 { "(bad)", XX, XX, XX },
1740 { "(bad)", XX, XX, XX },
1741 { "(bad)", XX, XX, XX },
1742 { "(bad)", XX, XX, XX },
1743 { "(bad)", XX, XX, XX },
1744 { "(bad)", XX, XX, XX },
1745 { "(bad)", XX, XX, XX },
1746 { "(bad)", XX, XX, XX },
1747 { "pabsb", MX, EM, XX },
1748 { "pabsw", MX, EM, XX },
1749 { "pabsd", MX, EM, XX },
1750 { "(bad)", XX, XX, XX }
1754 { "(bad)", XX, XX, XX },
1755 { "(bad)", XX, XX, XX },
1756 { "(bad)", XX, XX, XX },
1757 { "(bad)", XX, XX, XX },
1758 { "(bad)", XX, XX, XX },
1759 { "(bad)", XX, XX, XX },
1760 { "(bad)", XX, XX, XX },
1761 { "(bad)", XX, XX, XX },
1762 { "(bad)", XX, XX, XX },
1763 { "(bad)", XX, XX, XX },
1764 { "(bad)", XX, XX, XX },
1765 { "(bad)", XX, XX, XX },
1766 { "(bad)", XX, XX, XX },
1767 { "(bad)", XX, XX, XX },
1768 { "(bad)", XX, XX, XX },
1769 { "palignr", MX, EM, Ib },
1770 { "(bad)", XX, XX, XX },
1771 { "(bad)", XX, XX, XX },
1772 { "(bad)", XX, XX, XX },
1773 { "(bad)", XX, XX, XX },
1774 { "(bad)", XX, XX, XX },
1775 { "(bad)", XX, XX, XX },
1776 { "(bad)", XX, XX, XX },
1777 { "(bad)", XX, XX, XX },
1778 { "(bad)", XX, XX, XX },
1779 { "(bad)", XX, XX, XX },
1780 { "(bad)", XX, XX, XX },
1781 { "(bad)", XX, XX, XX },
1782 { "(bad)", XX, XX, XX },
1783 { "(bad)", XX, XX, XX },
1784 { "(bad)", XX, XX, XX },
1785 { "(bad)", XX, XX, XX }
1789 #define INTERNAL_DISASSEMBLER_ERROR _("<internal disassembler error>")
1801 FETCH_DATA (the_info, codep + 1);
1805 /* REX prefixes family. */
1828 prefixes |= PREFIX_REPZ;
1831 prefixes |= PREFIX_REPNZ;
1834 prefixes |= PREFIX_LOCK;
1837 prefixes |= PREFIX_CS;
1840 prefixes |= PREFIX_SS;
1843 prefixes |= PREFIX_DS;
1846 prefixes |= PREFIX_ES;
1849 prefixes |= PREFIX_FS;
1852 prefixes |= PREFIX_GS;
1855 prefixes |= PREFIX_DATA;
1858 prefixes |= PREFIX_ADDR;
1861 /* fwait is really an instruction. If there are prefixes
1862 before the fwait, they belong to the fwait, *not* to the
1863 following instruction. */
1866 prefixes |= PREFIX_FWAIT;
1870 prefixes = PREFIX_FWAIT;
1875 /* Rex is ignored when followed by another prefix. */
1878 oappend (prefix_name (rex, 0));
1886 /* Return the name of the prefix byte PREF, or NULL if PREF is not a
1890 prefix_name (int pref, int sizeflag)
1894 /* REX prefixes family. */
1946 return (sizeflag & DFLAG) ? "data16" : "data32";
1949 return (sizeflag & AFLAG) ? "addr32" : "addr64";
1951 return ((sizeflag & AFLAG) && !mode_64bit) ? "addr16" : "addr32";
1959 static char op1out[100], op2out[100], op3out[100];
1960 static int op_ad, op_index[3];
1961 static bfd_vma op_address[3];
1962 static bfd_vma op_riprel[3];
1963 static bfd_vma start_pc;
1966 * On the 386's of 1988, the maximum length of an instruction is 15 bytes.
1967 * (see topic "Redundant prefixes" in the "Differences from 8086"
1968 * section of the "Virtual 8086 Mode" chapter.)
1969 * 'pc' should be the address of this instruction, it will
1970 * be used to print the target address if this is a relative jump or call
1971 * The function returns the length of this instruction in bytes.
1974 static char intel_syntax;
1975 static char open_char;
1976 static char close_char;
1977 static char separator_char;
1978 static char scale_char;
1980 /* Here for backwards compatibility. When gdb stops using
1981 print_insn_i386_att and print_insn_i386_intel these functions can
1982 disappear, and print_insn_i386 be merged into print_insn. */
1984 print_insn_i386_att (bfd_vma pc, disassemble_info *info)
1988 return print_insn (pc, info);
1992 print_insn_i386_intel (bfd_vma pc, disassemble_info *info)
1996 return print_insn (pc, info);
2000 print_insn_i386 (bfd_vma pc, disassemble_info *info)
2004 return print_insn (pc, info);
2008 print_insn (bfd_vma pc, disassemble_info *info)
2010 const struct dis386 *dp;
2013 char *first, *second, *third;
2015 unsigned char uses_SSE_prefix;
2018 struct dis_private priv;
2020 mode_64bit = (info->mach == bfd_mach_x86_64_intel_syntax
2021 || info->mach == bfd_mach_x86_64);
2023 if (intel_syntax == (char) -1)
2024 intel_syntax = (info->mach == bfd_mach_i386_i386_intel_syntax
2025 || info->mach == bfd_mach_x86_64_intel_syntax);
2027 if (info->mach == bfd_mach_i386_i386
2028 || info->mach == bfd_mach_x86_64
2029 || info->mach == bfd_mach_i386_i386_intel_syntax
2030 || info->mach == bfd_mach_x86_64_intel_syntax)
2031 priv.orig_sizeflag = AFLAG | DFLAG;
2032 else if (info->mach == bfd_mach_i386_i8086)
2033 priv.orig_sizeflag = 0;
2037 for (p = info->disassembler_options; p != NULL; )
2039 if (strncmp (p, "x86-64", 6) == 0)
2042 priv.orig_sizeflag = AFLAG | DFLAG;
2044 else if (strncmp (p, "i386", 4) == 0)
2047 priv.orig_sizeflag = AFLAG | DFLAG;
2049 else if (strncmp (p, "i8086", 5) == 0)
2052 priv.orig_sizeflag = 0;
2054 else if (strncmp (p, "intel", 5) == 0)
2058 else if (strncmp (p, "att", 3) == 0)
2062 else if (strncmp (p, "addr", 4) == 0)
2064 if (p[4] == '1' && p[5] == '6')
2065 priv.orig_sizeflag &= ~AFLAG;
2066 else if (p[4] == '3' && p[5] == '2')
2067 priv.orig_sizeflag |= AFLAG;
2069 else if (strncmp (p, "data", 4) == 0)
2071 if (p[4] == '1' && p[5] == '6')
2072 priv.orig_sizeflag &= ~DFLAG;
2073 else if (p[4] == '3' && p[5] == '2')
2074 priv.orig_sizeflag |= DFLAG;
2076 else if (strncmp (p, "suffix", 6) == 0)
2077 priv.orig_sizeflag |= SUFFIX_ALWAYS;
2079 p = strchr (p, ',');
2086 names64 = intel_names64;
2087 names32 = intel_names32;
2088 names16 = intel_names16;
2089 names8 = intel_names8;
2090 names8rex = intel_names8rex;
2091 names_seg = intel_names_seg;
2092 index16 = intel_index16;
2095 separator_char = '+';
2100 names64 = att_names64;
2101 names32 = att_names32;
2102 names16 = att_names16;
2103 names8 = att_names8;
2104 names8rex = att_names8rex;
2105 names_seg = att_names_seg;
2106 index16 = att_index16;
2109 separator_char = ',';
2113 /* The output looks better if we put 7 bytes on a line, since that
2114 puts most long word instructions on a single line. */
2115 info->bytes_per_line = 7;
2117 info->private_data = &priv;
2118 priv.max_fetched = priv.the_buffer;
2119 priv.insn_start = pc;
2126 op_index[0] = op_index[1] = op_index[2] = -1;
2130 start_codep = priv.the_buffer;
2131 codep = priv.the_buffer;
2133 if (setjmp (priv.bailout) != 0)
2137 /* Getting here means we tried for data but didn't get it. That
2138 means we have an incomplete instruction of some sort. Just
2139 print the first byte as a prefix or a .byte pseudo-op. */
2140 if (codep > priv.the_buffer)
2142 name = prefix_name (priv.the_buffer[0], priv.orig_sizeflag);
2144 (*info->fprintf_func) (info->stream, "%s", name);
2147 /* Just print the first byte as a .byte instruction. */
2148 (*info->fprintf_func) (info->stream, ".byte 0x%x",
2149 (unsigned int) priv.the_buffer[0]);
2162 sizeflag = priv.orig_sizeflag;
2164 FETCH_DATA (info, codep + 1);
2165 two_source_ops = (*codep == 0x62) || (*codep == 0xc8);
2167 if ((prefixes & PREFIX_FWAIT)
2168 && ((*codep < 0xd8) || (*codep > 0xdf)))
2172 /* fwait not followed by floating point instruction. Print the
2173 first prefix, which is probably fwait itself. */
2174 name = prefix_name (priv.the_buffer[0], priv.orig_sizeflag);
2176 name = INTERNAL_DISASSEMBLER_ERROR;
2177 (*info->fprintf_func) (info->stream, "%s", name);
2183 FETCH_DATA (info, codep + 2);
2184 dp = &dis386_twobyte[*++codep];
2185 need_modrm = twobyte_has_modrm[*codep];
2186 uses_SSE_prefix = twobyte_uses_SSE_prefix[*codep];
2190 dp = &dis386[*codep];
2191 need_modrm = onebyte_has_modrm[*codep];
2192 uses_SSE_prefix = 0;
2196 if (!uses_SSE_prefix && (prefixes & PREFIX_REPZ))
2199 used_prefixes |= PREFIX_REPZ;
2201 if (!uses_SSE_prefix && (prefixes & PREFIX_REPNZ))
2204 used_prefixes |= PREFIX_REPNZ;
2206 if (prefixes & PREFIX_LOCK)
2209 used_prefixes |= PREFIX_LOCK;
2212 if (prefixes & PREFIX_ADDR)
2215 if (dp->bytemode3 != loop_jcxz_mode || intel_syntax)
2217 if ((sizeflag & AFLAG) || mode_64bit)
2218 oappend ("addr32 ");
2220 oappend ("addr16 ");
2221 used_prefixes |= PREFIX_ADDR;
2225 if (!uses_SSE_prefix && (prefixes & PREFIX_DATA))
2228 if (dp->bytemode3 == cond_jump_mode
2229 && dp->bytemode1 == v_mode
2232 if (sizeflag & DFLAG)
2233 oappend ("data32 ");
2235 oappend ("data16 ");
2236 used_prefixes |= PREFIX_DATA;
2240 if (dp->name == NULL && dp->bytemode1 == IS_3BYTE_OPCODE)
2242 FETCH_DATA (info, codep + 2);
2243 dp = &three_byte_table[dp->bytemode2][*codep++];
2244 mod = (*codep >> 6) & 3;
2245 reg = (*codep >> 3) & 7;
2248 else if (need_modrm)
2250 FETCH_DATA (info, codep + 1);
2251 mod = (*codep >> 6) & 3;
2252 reg = (*codep >> 3) & 7;
2256 if (dp->name == NULL && dp->bytemode1 == FLOATCODE)
2263 if (dp->name == NULL)
2265 switch (dp->bytemode1)
2268 dp = &grps[dp->bytemode2][reg];
2271 case USE_PREFIX_USER_TABLE:
2273 used_prefixes |= (prefixes & PREFIX_REPZ);
2274 if (prefixes & PREFIX_REPZ)
2278 used_prefixes |= (prefixes & PREFIX_DATA);
2279 if (prefixes & PREFIX_DATA)
2283 used_prefixes |= (prefixes & PREFIX_REPNZ);
2284 if (prefixes & PREFIX_REPNZ)
2288 dp = &prefix_user_table[dp->bytemode2][index];
2291 case X86_64_SPECIAL:
2292 dp = &x86_64_table[dp->bytemode2][mode_64bit];
2296 oappend (INTERNAL_DISASSEMBLER_ERROR);
2301 if (putop (dp->name, sizeflag) == 0)
2306 (*dp->op1) (dp->bytemode1, sizeflag);
2311 (*dp->op2) (dp->bytemode2, sizeflag);
2316 (*dp->op3) (dp->bytemode3, sizeflag);
2320 /* See if any prefixes were not used. If so, print the first one
2321 separately. If we don't do this, we'll wind up printing an
2322 instruction stream which does not precisely correspond to the
2323 bytes we are disassembling. */
2324 if ((prefixes & ~used_prefixes) != 0)
2328 name = prefix_name (priv.the_buffer[0], priv.orig_sizeflag);
2330 name = INTERNAL_DISASSEMBLER_ERROR;
2331 (*info->fprintf_func) (info->stream, "%s", name);
2334 if (rex & ~rex_used)
2337 name = prefix_name (rex | 0x40, priv.orig_sizeflag);
2339 name = INTERNAL_DISASSEMBLER_ERROR;
2340 (*info->fprintf_func) (info->stream, "%s ", name);
2343 obufp = obuf + strlen (obuf);
2344 for (i = strlen (obuf); i < 6; i++)
2347 (*info->fprintf_func) (info->stream, "%s", obuf);
2349 /* The enter and bound instructions are printed with operands in the same
2350 order as the intel book; everything else is printed in reverse order. */
2351 if (intel_syntax || two_source_ops)
2356 op_ad = op_index[0];
2357 op_index[0] = op_index[2];
2358 op_index[2] = op_ad;
2369 if (op_index[0] != -1 && !op_riprel[0])
2370 (*info->print_address_func) ((bfd_vma) op_address[op_index[0]], info);
2372 (*info->fprintf_func) (info->stream, "%s", first);
2378 (*info->fprintf_func) (info->stream, ",");
2379 if (op_index[1] != -1 && !op_riprel[1])
2380 (*info->print_address_func) ((bfd_vma) op_address[op_index[1]], info);
2382 (*info->fprintf_func) (info->stream, "%s", second);
2388 (*info->fprintf_func) (info->stream, ",");
2389 if (op_index[2] != -1 && !op_riprel[2])
2390 (*info->print_address_func) ((bfd_vma) op_address[op_index[2]], info);
2392 (*info->fprintf_func) (info->stream, "%s", third);
2394 for (i = 0; i < 3; i++)
2395 if (op_index[i] != -1 && op_riprel[i])
2397 (*info->fprintf_func) (info->stream, " # ");
2398 (*info->print_address_func) ((bfd_vma) (start_pc + codep - start_codep
2399 + op_address[op_index[i]]), info);
2401 return codep - priv.the_buffer;
2404 static const char *float_mem[] = {
2480 #define STi OP_STi, 0
2482 #define FGRPd9_2 NULL, NULL, 0, NULL, 0, NULL, 0
2483 #define FGRPd9_4 NULL, NULL, 1, NULL, 0, NULL, 0
2484 #define FGRPd9_5 NULL, NULL, 2, NULL, 0, NULL, 0
2485 #define FGRPd9_6 NULL, NULL, 3, NULL, 0, NULL, 0
2486 #define FGRPd9_7 NULL, NULL, 4, NULL, 0, NULL, 0
2487 #define FGRPda_5 NULL, NULL, 5, NULL, 0, NULL, 0
2488 #define FGRPdb_4 NULL, NULL, 6, NULL, 0, NULL, 0
2489 #define FGRPde_3 NULL, NULL, 7, NULL, 0, NULL, 0
2490 #define FGRPdf_4 NULL, NULL, 8, NULL, 0, NULL, 0
2492 static const struct dis386 float_reg[][8] = {
2495 { "fadd", ST, STi, XX },
2496 { "fmul", ST, STi, XX },
2497 { "fcom", STi, XX, XX },
2498 { "fcomp", STi, XX, XX },
2499 { "fsub", ST, STi, XX },
2500 { "fsubr", ST, STi, XX },
2501 { "fdiv", ST, STi, XX },
2502 { "fdivr", ST, STi, XX },
2506 { "fld", STi, XX, XX },
2507 { "fxch", STi, XX, XX },
2509 { "(bad)", XX, XX, XX },
2517 { "fcmovb", ST, STi, XX },
2518 { "fcmove", ST, STi, XX },
2519 { "fcmovbe",ST, STi, XX },
2520 { "fcmovu", ST, STi, XX },
2521 { "(bad)", XX, XX, XX },
2523 { "(bad)", XX, XX, XX },
2524 { "(bad)", XX, XX, XX },
2528 { "fcmovnb",ST, STi, XX },
2529 { "fcmovne",ST, STi, XX },
2530 { "fcmovnbe",ST, STi, XX },
2531 { "fcmovnu",ST, STi, XX },
2533 { "fucomi", ST, STi, XX },
2534 { "fcomi", ST, STi, XX },
2535 { "(bad)", XX, XX, XX },
2539 { "fadd", STi, ST, XX },
2540 { "fmul", STi, ST, XX },
2541 { "(bad)", XX, XX, XX },
2542 { "(bad)", XX, XX, XX },
2544 { "fsub", STi, ST, XX },
2545 { "fsubr", STi, ST, XX },
2546 { "fdiv", STi, ST, XX },
2547 { "fdivr", STi, ST, XX },
2549 { "fsubr", STi, ST, XX },
2550 { "fsub", STi, ST, XX },
2551 { "fdivr", STi, ST, XX },
2552 { "fdiv", STi, ST, XX },
2557 { "ffree", STi, XX, XX },
2558 { "(bad)", XX, XX, XX },
2559 { "fst", STi, XX, XX },
2560 { "fstp", STi, XX, XX },
2561 { "fucom", STi, XX, XX },
2562 { "fucomp", STi, XX, XX },
2563 { "(bad)", XX, XX, XX },
2564 { "(bad)", XX, XX, XX },
2568 { "faddp", STi, ST, XX },
2569 { "fmulp", STi, ST, XX },
2570 { "(bad)", XX, XX, XX },
2573 { "fsubp", STi, ST, XX },
2574 { "fsubrp", STi, ST, XX },
2575 { "fdivp", STi, ST, XX },
2576 { "fdivrp", STi, ST, XX },
2578 { "fsubrp", STi, ST, XX },
2579 { "fsubp", STi, ST, XX },
2580 { "fdivrp", STi, ST, XX },
2581 { "fdivp", STi, ST, XX },
2586 { "ffreep", STi, XX, XX },
2587 { "(bad)", XX, XX, XX },
2588 { "(bad)", XX, XX, XX },
2589 { "(bad)", XX, XX, XX },
2591 { "fucomip",ST, STi, XX },
2592 { "fcomip", ST, STi, XX },
2593 { "(bad)", XX, XX, XX },
2597 static char *fgrps[][8] = {
2600 "fnop","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
2605 "fchs","fabs","(bad)","(bad)","ftst","fxam","(bad)","(bad)",
2610 "fld1","fldl2t","fldl2e","fldpi","fldlg2","fldln2","fldz","(bad)",
2615 "f2xm1","fyl2x","fptan","fpatan","fxtract","fprem1","fdecstp","fincstp",
2620 "fprem","fyl2xp1","fsqrt","fsincos","frndint","fscale","fsin","fcos",
2625 "(bad)","fucompp","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
2630 "feni(287 only)","fdisi(287 only)","fNclex","fNinit",
2631 "fNsetpm(287 only)","(bad)","(bad)","(bad)",
2636 "(bad)","fcompp","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
2641 "fNstsw","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)",
2646 dofloat (int sizeflag)
2648 const struct dis386 *dp;
2649 unsigned char floatop;
2651 floatop = codep[-1];
2655 putop (float_mem[(floatop - 0xd8) * 8 + reg], sizeflag);
2657 if (floatop == 0xdb)
2658 OP_E (x_mode, sizeflag);
2659 else if (floatop == 0xdd)
2660 OP_E (d_mode, sizeflag);
2662 OP_E (v_mode, sizeflag);
2665 /* Skip mod/rm byte. */
2669 dp = &float_reg[floatop - 0xd8][reg];
2670 if (dp->name == NULL)
2672 putop (fgrps[dp->bytemode1][rm], sizeflag);
2674 /* Instruction fnstsw is only one with strange arg. */
2675 if (floatop == 0xdf && codep[-1] == 0xe0)
2676 strcpy (op1out, names16[0]);
2680 putop (dp->name, sizeflag);
2684 (*dp->op1) (dp->bytemode1, sizeflag);
2687 (*dp->op2) (dp->bytemode2, sizeflag);
2692 OP_ST (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
2698 OP_STi (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
2700 sprintf (scratchbuf, "%%st(%d)", rm);
2701 oappend (scratchbuf + intel_syntax);
2704 /* Capital letters in template are macros. */
2706 putop (const char *template, int sizeflag)
2711 for (p = template; *p; p++)
2730 /* Alternative not valid. */
2731 strcpy (obuf, "(bad)");
2735 else if (*p == '\0')
2753 if (mod != 3 || (sizeflag & SUFFIX_ALWAYS))
2759 if (sizeflag & SUFFIX_ALWAYS)
2762 case 'E': /* For jcxz/jecxz */
2765 if (sizeflag & AFLAG)
2771 if (sizeflag & AFLAG)
2773 used_prefixes |= (prefixes & PREFIX_ADDR);
2778 if ((prefixes & PREFIX_ADDR) || (sizeflag & SUFFIX_ALWAYS))
2780 if (sizeflag & AFLAG)
2781 *obufp++ = mode_64bit ? 'q' : 'l';
2783 *obufp++ = mode_64bit ? 'l' : 'w';
2784 used_prefixes |= (prefixes & PREFIX_ADDR);
2790 if ((prefixes & (PREFIX_CS | PREFIX_DS)) == PREFIX_CS
2791 || (prefixes & (PREFIX_CS | PREFIX_DS)) == PREFIX_DS)
2793 used_prefixes |= prefixes & (PREFIX_CS | PREFIX_DS);
2796 if (prefixes & PREFIX_DS)
2805 if (sizeflag & SUFFIX_ALWAYS)
2809 if ((prefixes & PREFIX_FWAIT) == 0)
2812 used_prefixes |= PREFIX_FWAIT;
2815 USED_REX (REX_MODE64);
2816 if (rex & REX_MODE64)
2833 if ((prefixes & PREFIX_DATA)
2834 || (rex & REX_MODE64)
2835 || (sizeflag & SUFFIX_ALWAYS))
2837 USED_REX (REX_MODE64);
2838 if (rex & REX_MODE64)
2842 if (sizeflag & DFLAG)
2846 used_prefixes |= (prefixes & PREFIX_DATA);
2862 USED_REX (REX_MODE64);
2863 if (mod != 3 || (sizeflag & SUFFIX_ALWAYS))
2865 if (rex & REX_MODE64)
2869 if (sizeflag & DFLAG)
2873 used_prefixes |= (prefixes & PREFIX_DATA);
2878 USED_REX (REX_MODE64);
2881 if (rex & REX_MODE64)
2886 else if (sizeflag & DFLAG)
2899 if (rex & REX_MODE64)
2901 else if (sizeflag & DFLAG)
2906 if (!(rex & REX_MODE64))
2907 used_prefixes |= (prefixes & PREFIX_DATA);
2912 if (sizeflag & SUFFIX_ALWAYS)
2914 if (rex & REX_MODE64)
2918 if (sizeflag & DFLAG)
2922 used_prefixes |= (prefixes & PREFIX_DATA);
2927 if (prefixes & PREFIX_DATA)
2931 used_prefixes |= (prefixes & PREFIX_DATA);
2936 if (rex & REX_MODE64)
2938 USED_REX (REX_MODE64);
2942 /* implicit operand size 'l' for i386 or 'q' for x86-64 */
2944 /* operand size flag for cwtl, cbtw */
2948 else if (sizeflag & DFLAG)
2959 if (sizeflag & DFLAG)
2970 used_prefixes |= (prefixes & PREFIX_DATA);
2979 oappend (const char *s)
2982 obufp += strlen (s);
2988 if (prefixes & PREFIX_CS)
2990 used_prefixes |= PREFIX_CS;
2991 oappend ("%cs:" + intel_syntax);
2993 if (prefixes & PREFIX_DS)
2995 used_prefixes |= PREFIX_DS;
2996 oappend ("%ds:" + intel_syntax);
2998 if (prefixes & PREFIX_SS)
3000 used_prefixes |= PREFIX_SS;
3001 oappend ("%ss:" + intel_syntax);
3003 if (prefixes & PREFIX_ES)
3005 used_prefixes |= PREFIX_ES;
3006 oappend ("%es:" + intel_syntax);
3008 if (prefixes & PREFIX_FS)
3010 used_prefixes |= PREFIX_FS;
3011 oappend ("%fs:" + intel_syntax);
3013 if (prefixes & PREFIX_GS)
3015 used_prefixes |= PREFIX_GS;
3016 oappend ("%gs:" + intel_syntax);
3021 OP_indirE (int bytemode, int sizeflag)
3025 OP_E (bytemode, sizeflag);
3029 print_operand_value (char *buf, int hex, bfd_vma disp)
3039 sprintf_vma (tmp, disp);
3040 for (i = 0; tmp[i] == '0' && tmp[i + 1]; i++);
3041 strcpy (buf + 2, tmp + i);
3045 bfd_signed_vma v = disp;
3052 /* Check for possible overflow on 0x8000000000000000. */
3055 strcpy (buf, "9223372036854775808");
3069 tmp[28 - i] = (v % 10) + '0';
3073 strcpy (buf, tmp + 29 - i);
3079 sprintf (buf, "0x%x", (unsigned int) disp);
3081 sprintf (buf, "%d", (int) disp);
3086 OP_E (int bytemode, int sizeflag)
3091 USED_REX (REX_EXTZ);
3095 /* Skip mod/rm byte. */
3106 oappend (names8rex[rm + add]);
3108 oappend (names8[rm + add]);
3111 oappend (names16[rm + add]);
3114 oappend (names32[rm + add]);
3117 oappend (names64[rm + add]);
3121 oappend (names64[rm + add]);
3123 oappend (names32[rm + add]);
3127 USED_REX (REX_MODE64);
3128 if (rex & REX_MODE64)
3129 oappend (names64[rm + add]);
3130 else if ((sizeflag & DFLAG) || bytemode == dq_mode)
3131 oappend (names32[rm + add]);
3133 oappend (names16[rm + add]);
3134 used_prefixes |= (prefixes & PREFIX_DATA);
3139 oappend (INTERNAL_DISASSEMBLER_ERROR);
3148 if ((sizeflag & AFLAG) || mode_64bit) /* 32 bit address mode */
3163 FETCH_DATA (the_info, codep + 1);
3164 scale = (*codep >> 6) & 3;
3165 index = (*codep >> 3) & 7;
3167 USED_REX (REX_EXTY);
3168 USED_REX (REX_EXTZ);
3179 if ((base & 7) == 5)
3182 if (mode_64bit && !havesib && (sizeflag & AFLAG))
3188 FETCH_DATA (the_info, codep + 1);
3190 if ((disp & 0x80) != 0)
3199 if (mod != 0 || (base & 7) == 5)
3201 print_operand_value (scratchbuf, !riprel, disp);
3202 oappend (scratchbuf);
3210 if (havebase || (havesib && (index != 4 || scale != 0)))
3217 oappend ("BYTE PTR ");
3220 oappend ("WORD PTR ");
3223 oappend ("DWORD PTR ");
3226 oappend ("QWORD PTR ");
3230 oappend ("DWORD PTR ");
3232 oappend ("QWORD PTR ");
3235 oappend ("XWORD PTR ");
3241 *obufp++ = open_char;
3242 if (intel_syntax && riprel)
3245 USED_REX (REX_EXTZ);
3246 if (!havesib && (rex & REX_EXTZ))
3249 oappend (mode_64bit && (sizeflag & AFLAG)
3250 ? names64[base] : names32[base]);
3259 *obufp++ = separator_char;
3262 sprintf (scratchbuf, "%s",
3263 mode_64bit && (sizeflag & AFLAG)
3264 ? names64[index] : names32[index]);
3267 sprintf (scratchbuf, ",%s",
3268 mode_64bit && (sizeflag & AFLAG)
3269 ? names64[index] : names32[index]);
3270 oappend (scratchbuf);
3272 if (scale != 0 || (!intel_syntax && index != 4))
3274 *obufp++ = scale_char;
3276 sprintf (scratchbuf, "%d", 1 << scale);
3277 oappend (scratchbuf);
3281 if (mod != 0 || (base & 7) == 5)
3283 /* Don't print zero displacements. */
3286 if ((bfd_signed_vma) disp > 0)
3292 print_operand_value (scratchbuf, 0, disp);
3293 oappend (scratchbuf);
3297 *obufp++ = close_char;
3300 else if (intel_syntax)
3302 if (mod != 0 || (base & 7) == 5)
3304 if (prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
3305 | PREFIX_ES | PREFIX_FS | PREFIX_GS))
3309 oappend (names_seg[ds_reg - es_reg]);
3312 print_operand_value (scratchbuf, 1, disp);
3313 oappend (scratchbuf);
3318 { /* 16 bit address mode */
3325 if ((disp & 0x8000) != 0)
3330 FETCH_DATA (the_info, codep + 1);
3332 if ((disp & 0x80) != 0)
3337 if ((disp & 0x8000) != 0)
3343 if (mod != 0 || (rm & 7) == 6)
3345 print_operand_value (scratchbuf, 0, disp);
3346 oappend (scratchbuf);
3349 if (mod != 0 || (rm & 7) != 6)
3351 *obufp++ = open_char;
3353 oappend (index16[rm + add]);
3354 *obufp++ = close_char;
3361 OP_G (int bytemode, int sizeflag)
3364 USED_REX (REX_EXTX);
3372 oappend (names8rex[reg + add]);
3374 oappend (names8[reg + add]);
3377 oappend (names16[reg + add]);
3380 oappend (names32[reg + add]);
3383 oappend (names64[reg + add]);
3386 USED_REX (REX_MODE64);
3387 if (rex & REX_MODE64)
3388 oappend (names64[reg + add]);
3389 else if (sizeflag & DFLAG)
3390 oappend (names32[reg + add]);
3392 oappend (names16[reg + add]);
3393 used_prefixes |= (prefixes & PREFIX_DATA);
3396 oappend (INTERNAL_DISASSEMBLER_ERROR);
3409 FETCH_DATA (the_info, codep + 8);
3410 a = *codep++ & 0xff;
3411 a |= (*codep++ & 0xff) << 8;
3412 a |= (*codep++ & 0xff) << 16;
3413 a |= (*codep++ & 0xff) << 24;
3414 b = *codep++ & 0xff;
3415 b |= (*codep++ & 0xff) << 8;
3416 b |= (*codep++ & 0xff) << 16;
3417 b |= (*codep++ & 0xff) << 24;
3418 x = a + ((bfd_vma) b << 32);
3426 static bfd_signed_vma
3429 bfd_signed_vma x = 0;
3431 FETCH_DATA (the_info, codep + 4);
3432 x = *codep++ & (bfd_signed_vma) 0xff;
3433 x |= (*codep++ & (bfd_signed_vma) 0xff) << 8;
3434 x |= (*codep++ & (bfd_signed_vma) 0xff) << 16;
3435 x |= (*codep++ & (bfd_signed_vma) 0xff) << 24;
3439 static bfd_signed_vma
3442 bfd_signed_vma x = 0;
3444 FETCH_DATA (the_info, codep + 4);
3445 x = *codep++ & (bfd_signed_vma) 0xff;
3446 x |= (*codep++ & (bfd_signed_vma) 0xff) << 8;
3447 x |= (*codep++ & (bfd_signed_vma) 0xff) << 16;
3448 x |= (*codep++ & (bfd_signed_vma) 0xff) << 24;
3450 x = (x ^ ((bfd_signed_vma) 1 << 31)) - ((bfd_signed_vma) 1 << 31);
3460 FETCH_DATA (the_info, codep + 2);
3461 x = *codep++ & 0xff;
3462 x |= (*codep++ & 0xff) << 8;
3467 set_op (bfd_vma op, int riprel)
3469 op_index[op_ad] = op_ad;
3472 op_address[op_ad] = op;
3473 op_riprel[op_ad] = riprel;
3477 /* Mask to get a 32-bit address. */
3478 op_address[op_ad] = op & 0xffffffff;
3479 op_riprel[op_ad] = riprel & 0xffffffff;
3484 OP_REG (int code, int sizeflag)
3488 USED_REX (REX_EXTZ);
3500 case ax_reg: case cx_reg: case dx_reg: case bx_reg:
3501 case sp_reg: case bp_reg: case si_reg: case di_reg:
3502 s = names16[code - ax_reg + add];
3504 case es_reg: case ss_reg: case cs_reg:
3505 case ds_reg: case fs_reg: case gs_reg:
3506 s = names_seg[code - es_reg + add];
3508 case al_reg: case ah_reg: case cl_reg: case ch_reg:
3509 case dl_reg: case dh_reg: case bl_reg: case bh_reg:
3512 s = names8rex[code - al_reg + add];
3514 s = names8[code - al_reg];
3516 case rAX_reg: case rCX_reg: case rDX_reg: case rBX_reg:
3517 case rSP_reg: case rBP_reg: case rSI_reg: case rDI_reg:
3520 s = names64[code - rAX_reg + add];
3523 code += eAX_reg - rAX_reg;
3525 case eAX_reg: case eCX_reg: case eDX_reg: case eBX_reg:
3526 case eSP_reg: case eBP_reg: case eSI_reg: case eDI_reg:
3527 USED_REX (REX_MODE64);
3528 if (rex & REX_MODE64)
3529 s = names64[code - eAX_reg + add];
3530 else if (sizeflag & DFLAG)
3531 s = names32[code - eAX_reg + add];
3533 s = names16[code - eAX_reg + add];
3534 used_prefixes |= (prefixes & PREFIX_DATA);
3537 s = INTERNAL_DISASSEMBLER_ERROR;
3544 OP_IMREG (int code, int sizeflag)
3556 case ax_reg: case cx_reg: case dx_reg: case bx_reg:
3557 case sp_reg: case bp_reg: case si_reg: case di_reg:
3558 s = names16[code - ax_reg];
3560 case es_reg: case ss_reg: case cs_reg:
3561 case ds_reg: case fs_reg: case gs_reg:
3562 s = names_seg[code - es_reg];
3564 case al_reg: case ah_reg: case cl_reg: case ch_reg:
3565 case dl_reg: case dh_reg: case bl_reg: case bh_reg:
3568 s = names8rex[code - al_reg];
3570 s = names8[code - al_reg];
3572 case eAX_reg: case eCX_reg: case eDX_reg: case eBX_reg:
3573 case eSP_reg: case eBP_reg: case eSI_reg: case eDI_reg:
3574 USED_REX (REX_MODE64);
3575 if (rex & REX_MODE64)
3576 s = names64[code - eAX_reg];
3577 else if (sizeflag & DFLAG)
3578 s = names32[code - eAX_reg];
3580 s = names16[code - eAX_reg];
3581 used_prefixes |= (prefixes & PREFIX_DATA);
3584 s = INTERNAL_DISASSEMBLER_ERROR;
3591 OP_I (int bytemode, int sizeflag)
3594 bfd_signed_vma mask = -1;
3599 FETCH_DATA (the_info, codep + 1);
3611 USED_REX (REX_MODE64);
3612 if (rex & REX_MODE64)
3614 else if (sizeflag & DFLAG)
3624 used_prefixes |= (prefixes & PREFIX_DATA);
3631 oappend (INTERNAL_DISASSEMBLER_ERROR);
3636 scratchbuf[0] = '$';
3637 print_operand_value (scratchbuf + 1, 1, op);
3638 oappend (scratchbuf + intel_syntax);
3639 scratchbuf[0] = '\0';
3643 OP_I64 (int bytemode, int sizeflag)
3646 bfd_signed_vma mask = -1;
3650 OP_I (bytemode, sizeflag);
3657 FETCH_DATA (the_info, codep + 1);
3662 USED_REX (REX_MODE64);
3663 if (rex & REX_MODE64)
3665 else if (sizeflag & DFLAG)
3675 used_prefixes |= (prefixes & PREFIX_DATA);
3682 oappend (INTERNAL_DISASSEMBLER_ERROR);
3687 scratchbuf[0] = '$';
3688 print_operand_value (scratchbuf + 1, 1, op);
3689 oappend (scratchbuf + intel_syntax);
3690 scratchbuf[0] = '\0';
3694 OP_sI (int bytemode, int sizeflag)
3697 bfd_signed_vma mask = -1;
3702 FETCH_DATA (the_info, codep + 1);
3704 if ((op & 0x80) != 0)
3709 USED_REX (REX_MODE64);
3710 if (rex & REX_MODE64)
3712 else if (sizeflag & DFLAG)
3721 if ((op & 0x8000) != 0)
3724 used_prefixes |= (prefixes & PREFIX_DATA);
3729 if ((op & 0x8000) != 0)
3733 oappend (INTERNAL_DISASSEMBLER_ERROR);
3737 scratchbuf[0] = '$';
3738 print_operand_value (scratchbuf + 1, 1, op);
3739 oappend (scratchbuf + intel_syntax);
3743 OP_J (int bytemode, int sizeflag)
3751 FETCH_DATA (the_info, codep + 1);
3753 if ((disp & 0x80) != 0)
3757 if (sizeflag & DFLAG)
3762 /* For some reason, a data16 prefix on a jump instruction
3763 means that the pc is masked to 16 bits after the
3764 displacement is added! */
3769 oappend (INTERNAL_DISASSEMBLER_ERROR);
3772 disp = (start_pc + codep - start_codep + disp) & mask;
3774 print_operand_value (scratchbuf, 1, disp);
3775 oappend (scratchbuf);
3779 OP_SEG (int dummy ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
3781 oappend (names_seg[reg]);
3785 OP_DIR (int dummy ATTRIBUTE_UNUSED, int sizeflag)
3789 if (sizeflag & DFLAG)
3799 used_prefixes |= (prefixes & PREFIX_DATA);
3801 sprintf (scratchbuf, "0x%x,0x%x", seg, offset);
3803 sprintf (scratchbuf, "$0x%x,$0x%x", seg, offset);
3804 oappend (scratchbuf);
3808 OP_OFF (int bytemode ATTRIBUTE_UNUSED, int sizeflag)
3814 if ((sizeflag & AFLAG) || mode_64bit)
3821 if (!(prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
3822 | PREFIX_ES | PREFIX_FS | PREFIX_GS)))
3824 oappend (names_seg[ds_reg - es_reg]);
3828 print_operand_value (scratchbuf, 1, off);
3829 oappend (scratchbuf);
3833 OP_OFF64 (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
3839 OP_OFF (bytemode, sizeflag);
3849 if (!(prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
3850 | PREFIX_ES | PREFIX_FS | PREFIX_GS)))
3852 oappend (names_seg[ds_reg - es_reg]);
3856 print_operand_value (scratchbuf, 1, off);
3857 oappend (scratchbuf);
3861 ptr_reg (int code, int sizeflag)
3869 USED_REX (REX_MODE64);
3870 if (rex & REX_MODE64)
3872 if (!(sizeflag & AFLAG))
3873 s = names32[code - eAX_reg];
3875 s = names64[code - eAX_reg];
3877 else if (sizeflag & AFLAG)
3878 s = names32[code - eAX_reg];
3880 s = names16[code - eAX_reg];
3889 OP_ESreg (int code, int sizeflag)
3891 oappend ("%es:" + intel_syntax);
3892 ptr_reg (code, sizeflag);
3896 OP_DSreg (int code, int sizeflag)
3905 prefixes |= PREFIX_DS;
3907 ptr_reg (code, sizeflag);
3911 OP_C (int dummy ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
3914 USED_REX (REX_EXTX);
3917 sprintf (scratchbuf, "%%cr%d", reg + add);
3918 oappend (scratchbuf + intel_syntax);
3922 OP_D (int dummy ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
3925 USED_REX (REX_EXTX);
3929 sprintf (scratchbuf, "db%d", reg + add);
3931 sprintf (scratchbuf, "%%db%d", reg + add);
3932 oappend (scratchbuf);
3936 OP_T (int dummy ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
3938 sprintf (scratchbuf, "%%tr%d", reg);
3939 oappend (scratchbuf + intel_syntax);
3943 OP_Rd (int bytemode, int sizeflag)
3946 OP_E (bytemode, sizeflag);
3952 OP_MMX (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
3955 USED_REX (REX_EXTX);
3958 used_prefixes |= (prefixes & PREFIX_DATA);
3959 if (prefixes & PREFIX_DATA)
3960 sprintf (scratchbuf, "%%xmm%d", reg + add);
3962 sprintf (scratchbuf, "%%mm%d", reg + add);
3963 oappend (scratchbuf + intel_syntax);
3967 OP_XMM (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
3970 USED_REX (REX_EXTX);
3973 sprintf (scratchbuf, "%%xmm%d", reg + add);
3974 oappend (scratchbuf + intel_syntax);
3978 OP_EM (int bytemode, int sizeflag)
3983 OP_E (bytemode, sizeflag);
3986 USED_REX (REX_EXTZ);
3990 /* Skip mod/rm byte. */
3993 used_prefixes |= (prefixes & PREFIX_DATA);
3994 if (prefixes & PREFIX_DATA)
3995 sprintf (scratchbuf, "%%xmm%d", rm + add);
3997 sprintf (scratchbuf, "%%mm%d", rm + add);
3998 oappend (scratchbuf + intel_syntax);
4002 OP_EX (int bytemode, int sizeflag)
4007 OP_E (bytemode, sizeflag);
4010 USED_REX (REX_EXTZ);
4014 /* Skip mod/rm byte. */
4017 sprintf (scratchbuf, "%%xmm%d", rm + add);
4018 oappend (scratchbuf + intel_syntax);
4022 OP_MS (int bytemode, int sizeflag)
4025 OP_EM (bytemode, sizeflag);
4031 OP_XS (int bytemode, int sizeflag)
4034 OP_EX (bytemode, sizeflag);
4040 OP_M (int bytemode, int sizeflag)
4043 BadOp (); /* bad lea,lds,les,lfs,lgs,lss modrm */
4045 OP_E (bytemode, sizeflag);
4049 OP_0f07 (int bytemode, int sizeflag)
4051 if (mod != 3 || rm != 0)
4054 OP_E (bytemode, sizeflag);
4058 OP_0fae (int bytemode, int sizeflag)
4063 strcpy (obuf + strlen (obuf) - sizeof ("clflush") + 1, "sfence");
4065 if (reg < 5 || rm != 0)
4067 BadOp (); /* bad sfence, mfence, or lfence */
4073 BadOp (); /* bad clflush */
4077 OP_E (bytemode, sizeflag);
4081 NOP_Fixup (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
4083 /* NOP with REPZ prefix is called PAUSE. */
4084 if (prefixes == PREFIX_REPZ)
4085 strcpy (obuf, "pause");
4088 static const char *const Suffix3DNow[] = {
4089 /* 00 */ NULL, NULL, NULL, NULL,
4090 /* 04 */ NULL, NULL, NULL, NULL,
4091 /* 08 */ NULL, NULL, NULL, NULL,
4092 /* 0C */ "pi2fw", "pi2fd", NULL, NULL,
4093 /* 10 */ NULL, NULL, NULL, NULL,
4094 /* 14 */ NULL, NULL, NULL, NULL,
4095 /* 18 */ NULL, NULL, NULL, NULL,
4096 /* 1C */ "pf2iw", "pf2id", NULL, NULL,
4097 /* 20 */ NULL, NULL, NULL, NULL,
4098 /* 24 */ NULL, NULL, NULL, NULL,
4099 /* 28 */ NULL, NULL, NULL, NULL,
4100 /* 2C */ NULL, NULL, NULL, NULL,
4101 /* 30 */ NULL, NULL, NULL, NULL,
4102 /* 34 */ NULL, NULL, NULL, NULL,
4103 /* 38 */ NULL, NULL, NULL, NULL,
4104 /* 3C */ NULL, NULL, NULL, NULL,
4105 /* 40 */ NULL, NULL, NULL, NULL,
4106 /* 44 */ NULL, NULL, NULL, NULL,
4107 /* 48 */ NULL, NULL, NULL, NULL,
4108 /* 4C */ NULL, NULL, NULL, NULL,
4109 /* 50 */ NULL, NULL, NULL, NULL,
4110 /* 54 */ NULL, NULL, NULL, NULL,
4111 /* 58 */ NULL, NULL, NULL, NULL,
4112 /* 5C */ NULL, NULL, NULL, NULL,
4113 /* 60 */ NULL, NULL, NULL, NULL,
4114 /* 64 */ NULL, NULL, NULL, NULL,
4115 /* 68 */ NULL, NULL, NULL, NULL,
4116 /* 6C */ NULL, NULL, NULL, NULL,
4117 /* 70 */ NULL, NULL, NULL, NULL,
4118 /* 74 */ NULL, NULL, NULL, NULL,
4119 /* 78 */ NULL, NULL, NULL, NULL,
4120 /* 7C */ NULL, NULL, NULL, NULL,
4121 /* 80 */ NULL, NULL, NULL, NULL,
4122 /* 84 */ NULL, NULL, NULL, NULL,
4123 /* 88 */ NULL, NULL, "pfnacc", NULL,
4124 /* 8C */ NULL, NULL, "pfpnacc", NULL,
4125 /* 90 */ "pfcmpge", NULL, NULL, NULL,
4126 /* 94 */ "pfmin", NULL, "pfrcp", "pfrsqrt",
4127 /* 98 */ NULL, NULL, "pfsub", NULL,
4128 /* 9C */ NULL, NULL, "pfadd", NULL,
4129 /* A0 */ "pfcmpgt", NULL, NULL, NULL,
4130 /* A4 */ "pfmax", NULL, "pfrcpit1", "pfrsqit1",
4131 /* A8 */ NULL, NULL, "pfsubr", NULL,
4132 /* AC */ NULL, NULL, "pfacc", NULL,
4133 /* B0 */ "pfcmpeq", NULL, NULL, NULL,
4134 /* B4 */ "pfmul", NULL, "pfrcpit2", "pfmulhrw",
4135 /* B8 */ NULL, NULL, NULL, "pswapd",
4136 /* BC */ NULL, NULL, NULL, "pavgusb",
4137 /* C0 */ NULL, NULL, NULL, NULL,
4138 /* C4 */ NULL, NULL, NULL, NULL,
4139 /* C8 */ NULL, NULL, NULL, NULL,
4140 /* CC */ NULL, NULL, NULL, NULL,
4141 /* D0 */ NULL, NULL, NULL, NULL,
4142 /* D4 */ NULL, NULL, NULL, NULL,
4143 /* D8 */ NULL, NULL, NULL, NULL,
4144 /* DC */ NULL, NULL, NULL, NULL,
4145 /* E0 */ NULL, NULL, NULL, NULL,
4146 /* E4 */ NULL, NULL, NULL, NULL,
4147 /* E8 */ NULL, NULL, NULL, NULL,
4148 /* EC */ NULL, NULL, NULL, NULL,
4149 /* F0 */ NULL, NULL, NULL, NULL,
4150 /* F4 */ NULL, NULL, NULL, NULL,
4151 /* F8 */ NULL, NULL, NULL, NULL,
4152 /* FC */ NULL, NULL, NULL, NULL,
4156 OP_3DNowSuffix (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
4158 const char *mnemonic;
4160 FETCH_DATA (the_info, codep + 1);
4161 /* AMD 3DNow! instructions are specified by an opcode suffix in the
4162 place where an 8-bit immediate would normally go. ie. the last
4163 byte of the instruction. */
4164 obufp = obuf + strlen (obuf);
4165 mnemonic = Suffix3DNow[*codep++ & 0xff];
4170 /* Since a variable sized modrm/sib chunk is between the start
4171 of the opcode (0x0f0f) and the opcode suffix, we need to do
4172 all the modrm processing first, and don't know until now that
4173 we have a bad opcode. This necessitates some cleaning up. */
4180 static const char *simd_cmp_op[] = {
4192 OP_SIMD_Suffix (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED)
4194 unsigned int cmp_type;
4196 FETCH_DATA (the_info, codep + 1);
4197 obufp = obuf + strlen (obuf);
4198 cmp_type = *codep++ & 0xff;
4201 char suffix1 = 'p', suffix2 = 's';
4202 used_prefixes |= (prefixes & PREFIX_REPZ);
4203 if (prefixes & PREFIX_REPZ)
4207 used_prefixes |= (prefixes & PREFIX_DATA);
4208 if (prefixes & PREFIX_DATA)
4212 used_prefixes |= (prefixes & PREFIX_REPNZ);
4213 if (prefixes & PREFIX_REPNZ)
4214 suffix1 = 's', suffix2 = 'd';
4217 sprintf (scratchbuf, "cmp%s%c%c",
4218 simd_cmp_op[cmp_type], suffix1, suffix2);
4219 used_prefixes |= (prefixes & PREFIX_REPZ);
4220 oappend (scratchbuf);
4224 /* We have a bad extension byte. Clean up. */
4232 SIMD_Fixup (int extrachar, int sizeflag ATTRIBUTE_UNUSED)
4234 /* Change movlps/movhps to movhlps/movlhps for 2 register operand
4235 forms of these instructions. */
4238 char *p = obuf + strlen (obuf);
4241 *(p - 1) = *(p - 2);
4242 *(p - 2) = *(p - 3);
4243 *(p - 3) = extrachar;
4248 PNI_Fixup (int extrachar ATTRIBUTE_UNUSED, int sizeflag)
4250 if (mod == 3 && reg == 1)
4252 char *p = obuf + strlen (obuf);
4254 /* Override "sidt". */
4257 /* mwait %eax,%ecx */
4258 strcpy (p - 4, "mwait %eax,%ecx");
4262 /* monitor %eax,%ecx,%edx" */
4263 strcpy (p - 4, "monitor %eax,%ecx,%edx");
4273 INVLPG_Fixup (int bytemode, int sizeflag)
4277 char *p = obuf + strlen (obuf);
4279 /* Override "invlpg". */
4280 strcpy (p - 6, "swapgs");
4284 OP_E (bytemode, sizeflag);
4290 /* Throw away prefixes and 1st. opcode byte. */
4291 codep = insn_codep + 1;