1 //=======- NVPTXFrameLowering.cpp - NVPTX Frame Information ---*- C++ -*-=====//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains the NVPTX implementation of TargetFrameLowering class.
12 //===----------------------------------------------------------------------===//
14 #include "NVPTXFrameLowering.h"
16 #include "NVPTXRegisterInfo.h"
17 #include "NVPTXSubtarget.h"
18 #include "NVPTXTargetMachine.h"
19 #include "llvm/ADT/BitVector.h"
20 #include "llvm/CodeGen/MachineFrameInfo.h"
21 #include "llvm/CodeGen/MachineFunction.h"
22 #include "llvm/CodeGen/MachineInstrBuilder.h"
23 #include "llvm/MC/MachineLocation.h"
24 #include "llvm/Target/TargetInstrInfo.h"
28 bool NVPTXFrameLowering::hasFP(const MachineFunction &MF) const { return true; }
30 void NVPTXFrameLowering::emitPrologue(MachineFunction &MF) const {
31 if (MF.getFrameInfo()->hasStackObjects()) {
32 MachineBasicBlock &MBB = MF.front();
33 // Insert "mov.u32 %SP, %Depot"
34 MachineBasicBlock::iterator MBBI = MBB.begin();
35 // This instruction really occurs before first instruction
36 // in the BB, so giving it no debug location.
37 DebugLoc dl = DebugLoc();
39 if (tm.getSubtargetImpl()->hasGenericLdSt()) {
41 // cvta.local %SP, %SPL;
43 MachineInstr *MI = BuildMI(
44 MBB, MBBI, dl, tm.getInstrInfo()->get(NVPTX::cvta_local_yes_64),
45 NVPTX::VRFrame).addReg(NVPTX::VRFrameLocal);
46 BuildMI(MBB, MI, dl, tm.getInstrInfo()->get(NVPTX::IMOV64rr),
47 NVPTX::VRFrameLocal).addReg(NVPTX::VRDepot);
49 MachineInstr *MI = BuildMI(
50 MBB, MBBI, dl, tm.getInstrInfo()->get(NVPTX::cvta_local_yes),
51 NVPTX::VRFrame).addReg(NVPTX::VRFrameLocal);
52 BuildMI(MBB, MI, dl, tm.getInstrInfo()->get(NVPTX::IMOV32rr),
53 NVPTX::VRFrameLocal).addReg(NVPTX::VRDepot);
58 BuildMI(MBB, MBBI, dl, tm.getInstrInfo()->get(NVPTX::IMOV64rr),
59 NVPTX::VRFrame).addReg(NVPTX::VRDepot);
61 BuildMI(MBB, MBBI, dl, tm.getInstrInfo()->get(NVPTX::IMOV32rr),
62 NVPTX::VRFrame).addReg(NVPTX::VRDepot);
67 void NVPTXFrameLowering::emitEpilogue(MachineFunction &MF,
68 MachineBasicBlock &MBB) const {}
70 // This function eliminates ADJCALLSTACKDOWN,
71 // ADJCALLSTACKUP pseudo instructions
72 void NVPTXFrameLowering::eliminateCallFramePseudoInstr(
73 MachineFunction &MF, MachineBasicBlock &MBB,
74 MachineBasicBlock::iterator I) const {
75 // Simply discard ADJCALLSTACKDOWN,
76 // ADJCALLSTACKUP instructions.