1 //===-- PPCCTRLoops.cpp - Identify and generate CTR loops -----------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This pass identifies loops where we can generate the PPC branch instructions
11 // that decrement and test the count register (CTR) (bdnz and friends).
13 // The pattern that defines the induction variable can changed depending on
14 // prior optimizations. For example, the IndVarSimplify phase run by 'opt'
15 // normalizes induction variables, and the Loop Strength Reduction pass
16 // run by 'llc' may also make changes to the induction variable.
18 // Criteria for CTR loops:
19 // - Countable loops (w/ ind. var for a trip count)
20 // - Try inner-most loops first
21 // - No nested CTR loops.
22 // - No function calls in loops.
24 //===----------------------------------------------------------------------===//
26 #define DEBUG_TYPE "ctrloops"
28 #include "llvm/Transforms/Scalar.h"
29 #include "llvm/ADT/Statistic.h"
30 #include "llvm/ADT/STLExtras.h"
31 #include "llvm/Analysis/Dominators.h"
32 #include "llvm/Analysis/LoopInfo.h"
33 #include "llvm/Analysis/ScalarEvolutionExpander.h"
34 #include "llvm/IR/Constants.h"
35 #include "llvm/IR/DerivedTypes.h"
36 #include "llvm/IR/InlineAsm.h"
37 #include "llvm/IR/Instructions.h"
38 #include "llvm/IR/IntrinsicInst.h"
39 #include "llvm/IR/Module.h"
40 #include "llvm/PassSupport.h"
41 #include "llvm/Support/CommandLine.h"
42 #include "llvm/Support/Debug.h"
43 #include "llvm/Support/ValueHandle.h"
44 #include "llvm/Support/raw_ostream.h"
45 #include "llvm/Transforms/Utils/BasicBlockUtils.h"
46 #include "llvm/Transforms/Utils/Local.h"
47 #include "llvm/Transforms/Utils/LoopUtils.h"
48 #include "llvm/Target/TargetLibraryInfo.h"
49 #include "PPCTargetMachine.h"
53 #include "llvm/CodeGen/MachineDominators.h"
54 #include "llvm/CodeGen/MachineFunction.h"
55 #include "llvm/CodeGen/MachineFunctionPass.h"
56 #include "llvm/CodeGen/MachineRegisterInfo.h"
65 static cl::opt<int> CTRLoopLimit("ppc-max-ctrloop", cl::Hidden, cl::init(-1));
68 STATISTIC(NumCTRLoops, "Number of loops converted to CTR loops");
71 void initializePPCCTRLoopsPass(PassRegistry&);
73 void initializePPCCTRLoopsVerifyPass(PassRegistry&);
78 struct PPCCTRLoops : public FunctionPass {
87 PPCCTRLoops() : FunctionPass(ID), TM(0) {
88 initializePPCCTRLoopsPass(*PassRegistry::getPassRegistry());
90 PPCCTRLoops(PPCTargetMachine &TM) : FunctionPass(ID), TM(&TM) {
91 initializePPCCTRLoopsPass(*PassRegistry::getPassRegistry());
94 virtual bool runOnFunction(Function &F);
96 virtual void getAnalysisUsage(AnalysisUsage &AU) const {
97 AU.addRequired<LoopInfo>();
98 AU.addPreserved<LoopInfo>();
99 AU.addRequired<DominatorTree>();
100 AU.addPreserved<DominatorTree>();
101 AU.addRequired<ScalarEvolution>();
105 bool mightUseCTR(const Triple &TT, BasicBlock *BB);
106 bool convertToCTRLoop(Loop *L);
109 PPCTargetMachine *TM;
114 const TargetLibraryInfo *LibInfo;
117 char PPCCTRLoops::ID = 0;
119 int PPCCTRLoops::Counter = 0;
123 struct PPCCTRLoopsVerify : public MachineFunctionPass {
127 PPCCTRLoopsVerify() : MachineFunctionPass(ID) {
128 initializePPCCTRLoopsVerifyPass(*PassRegistry::getPassRegistry());
131 virtual void getAnalysisUsage(AnalysisUsage &AU) const {
132 AU.addRequired<MachineDominatorTree>();
133 MachineFunctionPass::getAnalysisUsage(AU);
136 virtual bool runOnMachineFunction(MachineFunction &MF);
139 MachineDominatorTree *MDT;
142 char PPCCTRLoopsVerify::ID = 0;
144 } // end anonymous namespace
146 INITIALIZE_PASS_BEGIN(PPCCTRLoops, "ppc-ctr-loops", "PowerPC CTR Loops",
148 INITIALIZE_PASS_DEPENDENCY(DominatorTree)
149 INITIALIZE_PASS_DEPENDENCY(LoopInfo)
150 INITIALIZE_PASS_DEPENDENCY(ScalarEvolution)
151 INITIALIZE_PASS_END(PPCCTRLoops, "ppc-ctr-loops", "PowerPC CTR Loops",
154 FunctionPass *llvm::createPPCCTRLoops(PPCTargetMachine &TM) {
155 return new PPCCTRLoops(TM);
159 INITIALIZE_PASS_BEGIN(PPCCTRLoopsVerify, "ppc-ctr-loops-verify",
160 "PowerPC CTR Loops Verify", false, false)
161 INITIALIZE_PASS_DEPENDENCY(MachineDominatorTree)
162 INITIALIZE_PASS_END(PPCCTRLoopsVerify, "ppc-ctr-loops-verify",
163 "PowerPC CTR Loops Verify", false, false)
165 FunctionPass *llvm::createPPCCTRLoopsVerify() {
166 return new PPCCTRLoopsVerify();
170 bool PPCCTRLoops::runOnFunction(Function &F) {
171 LI = &getAnalysis<LoopInfo>();
172 SE = &getAnalysis<ScalarEvolution>();
173 DT = &getAnalysis<DominatorTree>();
174 TD = getAnalysisIfAvailable<DataLayout>();
175 LibInfo = getAnalysisIfAvailable<TargetLibraryInfo>();
177 bool MadeChange = false;
179 for (LoopInfo::iterator I = LI->begin(), E = LI->end();
182 if (!L->getParentLoop())
183 MadeChange |= convertToCTRLoop(L);
189 static bool isLargeIntegerTy(bool Is32Bit, Type *Ty) {
190 if (IntegerType *ITy = dyn_cast<IntegerType>(Ty))
191 return ITy->getBitWidth() > (Is32Bit ? 32 : 64);
196 bool PPCCTRLoops::mightUseCTR(const Triple &TT, BasicBlock *BB) {
197 for (BasicBlock::iterator J = BB->begin(), JE = BB->end();
199 if (CallInst *CI = dyn_cast<CallInst>(J)) {
200 if (InlineAsm *IA = dyn_cast<InlineAsm>(CI->getCalledValue())) {
201 // Inline ASM is okay, unless it clobbers the ctr register.
202 InlineAsm::ConstraintInfoVector CIV = IA->ParseConstraints();
203 for (unsigned i = 0, ie = CIV.size(); i < ie; ++i) {
204 InlineAsm::ConstraintInfo &C = CIV[i];
205 if (C.Type != InlineAsm::isInput)
206 for (unsigned j = 0, je = C.Codes.size(); j < je; ++j)
207 if (StringRef(C.Codes[j]).equals_lower("{ctr}"))
216 const TargetLowering *TLI = TM->getTargetLowering();
218 if (Function *F = CI->getCalledFunction()) {
219 // Most intrinsics don't become function calls, but some might.
220 // sin, cos, exp and log are always calls.
222 if (F->getIntrinsicID() != Intrinsic::not_intrinsic) {
223 switch (F->getIntrinsicID()) {
226 // VisualStudio defines setjmp as _setjmp
227 #if defined(_MSC_VER) && defined(setjmp) && \
228 !defined(setjmp_undefined_for_msvc)
229 # pragma push_macro("setjmp")
231 # define setjmp_undefined_for_msvc
234 case Intrinsic::setjmp:
236 #if defined(_MSC_VER) && defined(setjmp_undefined_for_msvc)
237 // let's return it to _setjmp state
238 # pragma pop_macro("setjmp")
239 # undef setjmp_undefined_for_msvc
242 case Intrinsic::longjmp:
244 // Exclude eh_sjlj_setjmp; we don't need to exclude eh_sjlj_longjmp
245 // because, although it does clobber the counter register, the
246 // control can't then return to inside the loop unless there is also
247 // an eh_sjlj_setjmp.
248 case Intrinsic::eh_sjlj_setjmp:
250 case Intrinsic::memcpy:
251 case Intrinsic::memmove:
252 case Intrinsic::memset:
253 case Intrinsic::powi:
255 case Intrinsic::log2:
256 case Intrinsic::log10:
258 case Intrinsic::exp2:
263 case Intrinsic::copysign:
264 if (CI->getArgOperand(0)->getType()->getScalarType()->
268 continue; // ISD::FCOPYSIGN is never a library call.
269 case Intrinsic::sqrt: Opcode = ISD::FSQRT; break;
270 case Intrinsic::floor: Opcode = ISD::FFLOOR; break;
271 case Intrinsic::ceil: Opcode = ISD::FCEIL; break;
272 case Intrinsic::trunc: Opcode = ISD::FTRUNC; break;
273 case Intrinsic::rint: Opcode = ISD::FRINT; break;
274 case Intrinsic::nearbyint: Opcode = ISD::FNEARBYINT; break;
275 case Intrinsic::round: Opcode = ISD::FROUND; break;
279 // PowerPC does not use [US]DIVREM or other library calls for
280 // operations on regular types which are not otherwise library calls
281 // (i.e. soft float or atomics). If adapting for targets that do,
282 // additional care is required here.
285 if (!F->hasLocalLinkage() && F->hasName() && LibInfo &&
286 LibInfo->getLibFunc(F->getName(), Func) &&
287 LibInfo->hasOptimizedCodeGen(Func)) {
288 // Non-read-only functions are never treated as intrinsics.
289 if (!CI->onlyReadsMemory())
292 // Conversion happens only for FP calls.
293 if (!CI->getArgOperand(0)->getType()->isFloatingPointTy())
297 default: return true;
298 case LibFunc::copysign:
299 case LibFunc::copysignf:
300 continue; // ISD::FCOPYSIGN is never a library call.
301 case LibFunc::copysignl:
306 continue; // ISD::FABS is never a library call.
310 Opcode = ISD::FSQRT; break;
312 case LibFunc::floorf:
313 case LibFunc::floorl:
314 Opcode = ISD::FFLOOR; break;
315 case LibFunc::nearbyint:
316 case LibFunc::nearbyintf:
317 case LibFunc::nearbyintl:
318 Opcode = ISD::FNEARBYINT; break;
322 Opcode = ISD::FCEIL; break;
326 Opcode = ISD::FRINT; break;
328 case LibFunc::roundf:
329 case LibFunc::roundl:
330 Opcode = ISD::FROUND; break;
332 case LibFunc::truncf:
333 case LibFunc::truncl:
334 Opcode = ISD::FTRUNC; break;
338 TLI->getSimpleValueType(CI->getArgOperand(0)->getType(), true);
339 if (VTy == MVT::Other)
342 if (TLI->isOperationLegalOrCustom(Opcode, VTy))
344 else if (VTy.isVector() &&
345 TLI->isOperationLegalOrCustom(Opcode, VTy.getScalarType()))
353 } else if (isa<BinaryOperator>(J) &&
354 J->getType()->getScalarType()->isPPC_FP128Ty()) {
355 // Most operations on ppc_f128 values become calls.
357 } else if (isa<UIToFPInst>(J) || isa<SIToFPInst>(J) ||
358 isa<FPToUIInst>(J) || isa<FPToSIInst>(J)) {
359 CastInst *CI = cast<CastInst>(J);
360 if (CI->getSrcTy()->getScalarType()->isPPC_FP128Ty() ||
361 CI->getDestTy()->getScalarType()->isPPC_FP128Ty() ||
362 isLargeIntegerTy(TT.isArch32Bit(), CI->getSrcTy()->getScalarType()) ||
363 isLargeIntegerTy(TT.isArch32Bit(), CI->getDestTy()->getScalarType()))
365 } else if (isLargeIntegerTy(TT.isArch32Bit(),
366 J->getType()->getScalarType()) &&
367 (J->getOpcode() == Instruction::UDiv ||
368 J->getOpcode() == Instruction::SDiv ||
369 J->getOpcode() == Instruction::URem ||
370 J->getOpcode() == Instruction::SRem)) {
372 } else if (isa<IndirectBrInst>(J) || isa<InvokeInst>(J)) {
373 // On PowerPC, indirect jumps use the counter register.
375 } else if (SwitchInst *SI = dyn_cast<SwitchInst>(J)) {
378 const TargetLowering *TLI = TM->getTargetLowering();
380 if (TLI->supportJumpTables() &&
381 SI->getNumCases()+1 >= (unsigned) TLI->getMinimumJumpTableEntries())
389 bool PPCCTRLoops::convertToCTRLoop(Loop *L) {
390 bool MadeChange = false;
392 Triple TT = Triple(L->getHeader()->getParent()->getParent()->
394 if (!TT.isArch32Bit() && !TT.isArch64Bit())
395 return MadeChange; // Unknown arch. type.
397 // Process nested loops first.
398 for (Loop::iterator I = L->begin(), E = L->end(); I != E; ++I) {
399 MadeChange |= convertToCTRLoop(*I);
402 // If a nested loop has been converted, then we can't convert this loop.
407 // Stop trying after reaching the limit (if any).
408 int Limit = CTRLoopLimit;
410 if (Counter >= CTRLoopLimit)
416 // We don't want to spill/restore the counter register, and so we don't
417 // want to use the counter register if the loop contains calls.
418 for (Loop::block_iterator I = L->block_begin(), IE = L->block_end();
420 if (mightUseCTR(TT, *I))
423 SmallVector<BasicBlock*, 4> ExitingBlocks;
424 L->getExitingBlocks(ExitingBlocks);
426 BasicBlock *CountedExitBlock = 0;
427 const SCEV *ExitCount = 0;
428 BranchInst *CountedExitBranch = 0;
429 for (SmallVectorImpl<BasicBlock *>::iterator I = ExitingBlocks.begin(),
430 IE = ExitingBlocks.end(); I != IE; ++I) {
431 const SCEV *EC = SE->getExitCount(L, *I);
432 DEBUG(dbgs() << "Exit Count for " << *L << " from block " <<
433 (*I)->getName() << ": " << *EC << "\n");
434 if (isa<SCEVCouldNotCompute>(EC))
436 if (const SCEVConstant *ConstEC = dyn_cast<SCEVConstant>(EC)) {
437 if (ConstEC->getValue()->isZero())
439 } else if (!SE->isLoopInvariant(EC, L))
442 if (SE->getTypeSizeInBits(EC->getType()) > (TT.isArch64Bit() ? 64 : 32))
445 // We now have a loop-invariant count of loop iterations (which is not the
446 // constant zero) for which we know that this loop will not exit via this
449 // We need to make sure that this block will run on every loop iteration.
450 // For this to be true, we must dominate all blocks with backedges. Such
451 // blocks are in-loop predecessors to the header block.
452 bool NotAlways = false;
453 for (pred_iterator PI = pred_begin(L->getHeader()),
454 PIE = pred_end(L->getHeader()); PI != PIE; ++PI) {
455 if (!L->contains(*PI))
458 if (!DT->dominates(*I, *PI)) {
467 // Make sure this blocks ends with a conditional branch.
468 Instruction *TI = (*I)->getTerminator();
472 if (BranchInst *BI = dyn_cast<BranchInst>(TI)) {
473 if (!BI->isConditional())
476 CountedExitBranch = BI;
480 // Note that this block may not be the loop latch block, even if the loop
481 // has a latch block.
482 CountedExitBlock = *I;
487 if (!CountedExitBlock)
490 BasicBlock *Preheader = L->getLoopPreheader();
492 // If we don't have a preheader, then insert one. If we already have a
493 // preheader, then we can use it (except if the preheader contains a use of
494 // the CTR register because some such uses might be reordered by the
495 // selection DAG after the mtctr instruction).
496 if (!Preheader || mightUseCTR(TT, Preheader))
497 Preheader = InsertPreheaderForLoop(L, this);
501 DEBUG(dbgs() << "Preheader for exit count: " << Preheader->getName() << "\n");
503 // Insert the count into the preheader and replace the condition used by the
507 SCEVExpander SCEVE(*SE, "loopcnt");
508 LLVMContext &C = SE->getContext();
509 Type *CountType = TT.isArch64Bit() ? Type::getInt64Ty(C) :
511 if (!ExitCount->getType()->isPointerTy() &&
512 ExitCount->getType() != CountType)
513 ExitCount = SE->getZeroExtendExpr(ExitCount, CountType);
514 ExitCount = SE->getAddExpr(ExitCount,
515 SE->getConstant(CountType, 1));
516 Value *ECValue = SCEVE.expandCodeFor(ExitCount, CountType,
517 Preheader->getTerminator());
519 IRBuilder<> CountBuilder(Preheader->getTerminator());
520 Module *M = Preheader->getParent()->getParent();
521 Value *MTCTRFunc = Intrinsic::getDeclaration(M, Intrinsic::ppc_mtctr,
523 CountBuilder.CreateCall(MTCTRFunc, ECValue);
525 IRBuilder<> CondBuilder(CountedExitBranch);
527 Intrinsic::getDeclaration(M, Intrinsic::ppc_is_decremented_ctr_nonzero);
528 Value *NewCond = CondBuilder.CreateCall(DecFunc);
529 Value *OldCond = CountedExitBranch->getCondition();
530 CountedExitBranch->setCondition(NewCond);
532 // The false branch must exit the loop.
533 if (!L->contains(CountedExitBranch->getSuccessor(0)))
534 CountedExitBranch->swapSuccessors();
536 // The old condition may be dead now, and may have even created a dead PHI
537 // (the original induction variable).
538 RecursivelyDeleteTriviallyDeadInstructions(OldCond);
539 DeleteDeadPHIs(CountedExitBlock);
546 static bool clobbersCTR(const MachineInstr *MI) {
547 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
548 const MachineOperand &MO = MI->getOperand(i);
550 if (MO.isDef() && (MO.getReg() == PPC::CTR || MO.getReg() == PPC::CTR8))
552 } else if (MO.isRegMask()) {
553 if (MO.clobbersPhysReg(PPC::CTR) || MO.clobbersPhysReg(PPC::CTR8))
561 static bool verifyCTRBranch(MachineBasicBlock *MBB,
562 MachineBasicBlock::iterator I) {
563 MachineBasicBlock::iterator BI = I;
564 SmallSet<MachineBasicBlock *, 16> Visited;
565 SmallVector<MachineBasicBlock *, 8> Preds;
568 if (I == MBB->begin()) {
580 for (MachineBasicBlock::iterator IE = MBB->begin();; --I) {
581 unsigned Opc = I->getOpcode();
582 if (Opc == PPC::MTCTRloop || Opc == PPC::MTCTR8loop) {
587 if (I != BI && clobbersCTR(I)) {
588 DEBUG(dbgs() << "BB#" << MBB->getNumber() << " (" <<
589 MBB->getFullName() << ") instruction " << *I <<
590 " clobbers CTR, invalidating " << "BB#" <<
591 BI->getParent()->getNumber() << " (" <<
592 BI->getParent()->getFullName() << ") instruction " <<
601 if (!CheckPreds && Preds.empty())
606 if (MachineFunction::iterator(MBB) == MBB->getParent()->begin()) {
607 DEBUG(dbgs() << "Unable to find a MTCTR instruction for BB#" <<
608 BI->getParent()->getNumber() << " (" <<
609 BI->getParent()->getFullName() << ") instruction " <<
614 for (MachineBasicBlock::pred_iterator PI = MBB->pred_begin(),
615 PIE = MBB->pred_end(); PI != PIE; ++PI)
616 Preds.push_back(*PI);
620 MBB = Preds.pop_back_val();
621 if (!Visited.count(MBB)) {
622 I = MBB->getLastNonDebugInstr();
625 } while (!Preds.empty());
630 bool PPCCTRLoopsVerify::runOnMachineFunction(MachineFunction &MF) {
631 MDT = &getAnalysis<MachineDominatorTree>();
633 // Verify that all bdnz/bdz instructions are dominated by a loop mtctr before
634 // any other instructions that might clobber the ctr register.
635 for (MachineFunction::iterator I = MF.begin(), IE = MF.end();
637 MachineBasicBlock *MBB = I;
638 if (!MDT->isReachableFromEntry(MBB))
641 for (MachineBasicBlock::iterator MII = MBB->getFirstTerminator(),
642 MIIE = MBB->end(); MII != MIIE; ++MII) {
643 unsigned Opc = MII->getOpcode();
644 if (Opc == PPC::BDNZ8 || Opc == PPC::BDNZ ||
645 Opc == PPC::BDZ8 || Opc == PPC::BDZ)
646 if (!verifyCTRBranch(MBB, MII))
647 llvm_unreachable("Invalid PPC CTR loop!");