1 //===-- XCoreISelLowering.h - XCore DAG Lowering Interface ------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file defines the interfaces that XCore uses to lower LLVM code into a
13 //===----------------------------------------------------------------------===//
15 #ifndef XCOREISELLOWERING_H
16 #define XCOREISELLOWERING_H
19 #include "llvm/CodeGen/SelectionDAG.h"
20 #include "llvm/Target/TargetLowering.h"
24 // Forward delcarations
26 class XCoreTargetMachine;
30 // Start the numbering where the builtin ops and target ops leave off.
31 FIRST_NUMBER = ISD::BUILTIN_OP_END,
33 // Branch and link (call)
36 // pc relative address
39 // dp relative address
42 // cp relative address
45 // Store word to stack
48 // Corresponds to retsp instruction
51 // Corresponds to LADD instruction
54 // Corresponds to LSUB instruction
57 // Corresponds to LMUL instruction
60 // Corresponds to MACCU instruction
63 // Corresponds to MACCS instruction
66 // Corresponds to CRC8 instruction
72 // Jumptable branch using long branches for each entry.
77 //===--------------------------------------------------------------------===//
78 // TargetLowering Implementation
79 //===--------------------------------------------------------------------===//
80 class XCoreTargetLowering : public TargetLowering
84 explicit XCoreTargetLowering(XCoreTargetMachine &TM);
86 virtual unsigned getJumpTableEncoding() const;
87 virtual MVT getScalarShiftAmountTy(EVT LHSTy) const { return MVT::i32; }
89 /// LowerOperation - Provide custom lowering hooks for some operations.
90 virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const;
92 /// ReplaceNodeResults - Replace the results of node with an illegal result
93 /// type with new values built out of custom code.
95 virtual void ReplaceNodeResults(SDNode *N, SmallVectorImpl<SDValue>&Results,
96 SelectionDAG &DAG) const;
98 /// getTargetNodeName - This method returns the name of a target specific
100 virtual const char *getTargetNodeName(unsigned Opcode) const;
102 virtual MachineBasicBlock *
103 EmitInstrWithCustomInserter(MachineInstr *MI,
104 MachineBasicBlock *MBB) const;
106 virtual bool isLegalAddressingMode(const AddrMode &AM,
110 const XCoreTargetMachine &TM;
111 const XCoreSubtarget &Subtarget;
113 // Lower Operand helpers
114 SDValue LowerCCCArguments(SDValue Chain,
115 CallingConv::ID CallConv,
117 const SmallVectorImpl<ISD::InputArg> &Ins,
118 DebugLoc dl, SelectionDAG &DAG,
119 SmallVectorImpl<SDValue> &InVals) const;
120 SDValue LowerCCCCallTo(SDValue Chain, SDValue Callee,
121 CallingConv::ID CallConv, bool isVarArg,
123 const SmallVectorImpl<ISD::OutputArg> &Outs,
124 const SmallVectorImpl<SDValue> &OutVals,
125 const SmallVectorImpl<ISD::InputArg> &Ins,
126 DebugLoc dl, SelectionDAG &DAG,
127 SmallVectorImpl<SDValue> &InVals) const;
128 SDValue LowerCallResult(SDValue Chain, SDValue InFlag,
129 CallingConv::ID CallConv, bool isVarArg,
130 const SmallVectorImpl<ISD::InputArg> &Ins,
131 DebugLoc dl, SelectionDAG &DAG,
132 SmallVectorImpl<SDValue> &InVals) const;
133 SDValue getReturnAddressFrameIndex(SelectionDAG &DAG) const;
134 SDValue getGlobalAddressWrapper(SDValue GA, const GlobalValue *GV,
135 SelectionDAG &DAG) const;
136 SDValue lowerLoadWordFromAlignedBasePlusOffset(DebugLoc DL, SDValue Chain,
137 SDValue Base, int64_t Offset,
138 SelectionDAG &DAG) const;
140 // Lower Operand specifics
141 SDValue LowerLOAD(SDValue Op, SelectionDAG &DAG) const;
142 SDValue LowerSTORE(SDValue Op, SelectionDAG &DAG) const;
143 SDValue LowerGlobalAddress(SDValue Op, SelectionDAG &DAG) const;
144 SDValue LowerGlobalTLSAddress(SDValue Op, SelectionDAG &DAG) const;
145 SDValue LowerBlockAddress(SDValue Op, SelectionDAG &DAG) const;
146 SDValue LowerConstantPool(SDValue Op, SelectionDAG &DAG) const;
147 SDValue LowerBR_JT(SDValue Op, SelectionDAG &DAG) const;
148 SDValue LowerSELECT_CC(SDValue Op, SelectionDAG &DAG) const;
149 SDValue LowerVAARG(SDValue Op, SelectionDAG &DAG) const;
150 SDValue LowerVASTART(SDValue Op, SelectionDAG &DAG) const;
151 SDValue LowerUMUL_LOHI(SDValue Op, SelectionDAG &DAG) const;
152 SDValue LowerSMUL_LOHI(SDValue Op, SelectionDAG &DAG) const;
153 SDValue LowerFRAMEADDR(SDValue Op, SelectionDAG &DAG) const;
154 SDValue LowerINIT_TRAMPOLINE(SDValue Op, SelectionDAG &DAG) const;
155 SDValue LowerADJUST_TRAMPOLINE(SDValue Op, SelectionDAG &DAG) const;
156 SDValue LowerINTRINSIC_WO_CHAIN(SDValue Op, SelectionDAG &DAG) const;
158 // Inline asm support
159 std::pair<unsigned, const TargetRegisterClass*>
160 getRegForInlineAsmConstraint(const std::string &Constraint,
164 SDValue TryExpandADDWithMul(SDNode *Op, SelectionDAG &DAG) const;
165 SDValue ExpandADDSUB(SDNode *Op, SelectionDAG &DAG) const;
167 virtual SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const;
169 virtual void computeMaskedBitsForTargetNode(const SDValue Op,
172 const SelectionDAG &DAG,
173 unsigned Depth = 0) const;
176 LowerFormalArguments(SDValue Chain,
177 CallingConv::ID CallConv,
179 const SmallVectorImpl<ISD::InputArg> &Ins,
180 DebugLoc dl, SelectionDAG &DAG,
181 SmallVectorImpl<SDValue> &InVals) const;
184 LowerCall(TargetLowering::CallLoweringInfo &CLI,
185 SmallVectorImpl<SDValue> &InVals) const;
188 LowerReturn(SDValue Chain,
189 CallingConv::ID CallConv, bool isVarArg,
190 const SmallVectorImpl<ISD::OutputArg> &Outs,
191 const SmallVectorImpl<SDValue> &OutVals,
192 DebugLoc dl, SelectionDAG &DAG) const;
195 CanLowerReturn(CallingConv::ID CallConv, MachineFunction &MF,
197 const SmallVectorImpl<ISD::OutputArg> &ArgsFlags,
198 LLVMContext &Context) const;
202 #endif // XCOREISELLOWERING_H