1 Pull in r200617 from upstream llvm trunk (by Venkatraman Govindaraju):
3 [Sparc] Set %o7 as the return address register instead of %i7 in MCRegisterInfo. Also, add CFI instructions to initialize the frame correctly.
5 Introduced here: http://svn.freebsd.org/changeset/base/262261
7 Index: lib/Target/Sparc/MCTargetDesc/SparcMCTargetDesc.cpp
8 ===================================================================
9 --- lib/Target/Sparc/MCTargetDesc/SparcMCTargetDesc.cpp
10 +++ lib/Target/Sparc/MCTargetDesc/SparcMCTargetDesc.cpp
16 +static MCAsmInfo *createSparcMCAsmInfo(const MCRegisterInfo &MRI,
18 + MCAsmInfo *MAI = new SparcELFMCAsmInfo(TT);
19 + unsigned Reg = MRI.getDwarfRegNum(SP::O6, true);
20 + MCCFIInstruction Inst = MCCFIInstruction::createDefCfa(0, Reg, 0);
21 + MAI->addInitialFrameState(Inst);
25 +static MCAsmInfo *createSparcV9MCAsmInfo(const MCRegisterInfo &MRI,
27 + MCAsmInfo *MAI = new SparcELFMCAsmInfo(TT);
28 + unsigned Reg = MRI.getDwarfRegNum(SP::O6, true);
29 + MCCFIInstruction Inst = MCCFIInstruction::createDefCfa(0, Reg, 2047);
30 + MAI->addInitialFrameState(Inst);
34 static MCInstrInfo *createSparcMCInstrInfo() {
35 MCInstrInfo *X = new MCInstrInfo();
36 InitSparcMCInstrInfo(X);
37 @@ -41,7 +60,7 @@ static MCInstrInfo *createSparcMCInstrInfo() {
39 static MCRegisterInfo *createSparcMCRegisterInfo(StringRef TT) {
40 MCRegisterInfo *X = new MCRegisterInfo();
41 - InitSparcMCRegisterInfo(X, SP::I7);
42 + InitSparcMCRegisterInfo(X, SP::O7);
46 @@ -132,8 +151,8 @@ static MCInstPrinter *createSparcMCInstPrinter(con
48 extern "C" void LLVMInitializeSparcTargetMC() {
49 // Register the MC asm info.
50 - RegisterMCAsmInfo<SparcELFMCAsmInfo> X(TheSparcTarget);
51 - RegisterMCAsmInfo<SparcELFMCAsmInfo> Y(TheSparcV9Target);
52 + RegisterMCAsmInfoFn X(TheSparcTarget, createSparcMCAsmInfo);
53 + RegisterMCAsmInfoFn Y(TheSparcV9Target, createSparcV9MCAsmInfo);
55 // Register the MC codegen info.
56 TargetRegistry::RegisterMCCodeGenInfo(TheSparcTarget,
57 Index: lib/Target/Sparc/SparcRegisterInfo.cpp
58 ===================================================================
59 --- lib/Target/Sparc/SparcRegisterInfo.cpp
60 +++ lib/Target/Sparc/SparcRegisterInfo.cpp
61 @@ -35,7 +35,7 @@ ReserveAppRegisters("sparc-reserve-app-registers",
62 cl::desc("Reserve application registers (%g2-%g4)"));
64 SparcRegisterInfo::SparcRegisterInfo(SparcSubtarget &st)
65 - : SparcGenRegisterInfo(SP::I7), Subtarget(st) {
66 + : SparcGenRegisterInfo(SP::O7), Subtarget(st) {
69 const uint16_t* SparcRegisterInfo::getCalleeSavedRegs(const MachineFunction *MF)
70 Index: test/CodeGen/SPARC/exception.ll
71 ===================================================================
72 --- test/CodeGen/SPARC/exception.ll
73 +++ test/CodeGen/SPARC/exception.ll
75 ; V8PIC_NOCFI-NEXT: .word _ZTIi
76 ; V8PIC_NOCFI: .section .eh_frame
77 ; V8PIC_NOCFI-NOT: .section
78 +; V8PIC_NOCFI: .byte 15 ! CIE Return Address Column
79 ; V8PIC_NOCFI: .word %r_disp32(DW.ref.__gxx_personality_v0)
80 +; V8PIC_NOCFI: .byte 12 ! DW_CFA_def_cfa
81 +; V8PIC_NOCFI: .byte 14 ! Reg 14
82 +; V8PIC_NOCFI-NEXT: .byte 0 ! Offset 0
83 ; V8PIC_NOCFI: .word %r_disp32(.Ltmp{{.+}}) ! FDE initial location
87 ; V9PIC_NOCFI-NEXT: .xword _ZTIi
88 ; V9PIC_NOCFI: .section .eh_frame
89 ; V9PIC_NOCFI-NOT: .section
90 +; V9PIC_NOCFI: .byte 15 ! CIE Return Address Column
91 ; V9PIC_NOCFI: .word %r_disp32(DW.ref.__gxx_personality_v0)
92 +; V9PIC_NOCFI: .byte 12 ! DW_CFA_def_cfa
93 +; V9PIC_NOCFI-NEXT: .byte 14 ! Reg 14
94 +; V9PIC_NOCFI: .ascii "\377\017" ! Offset 2047
95 ; V9PIC_NOCFI: .word %r_disp32(.Ltmp{{.+}}) ! FDE initial location
97 define i32 @main(i32 %argc, i8** nocapture readnone %argv) unnamed_addr #0 {