1 //===--- Targets.cpp - Implement -arch option and targets -----------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file implements construction of a TargetInfo object from a
13 //===----------------------------------------------------------------------===//
15 #include "clang/Basic/TargetInfo.h"
16 #include "clang/Basic/Builtins.h"
17 #include "clang/Basic/Diagnostic.h"
18 #include "clang/Basic/LangOptions.h"
19 #include "clang/Basic/MacroBuilder.h"
20 #include "clang/Basic/TargetBuiltins.h"
21 #include "clang/Basic/TargetOptions.h"
22 #include "llvm/ADT/APFloat.h"
23 #include "llvm/ADT/OwningPtr.h"
24 #include "llvm/ADT/STLExtras.h"
25 #include "llvm/ADT/StringRef.h"
26 #include "llvm/ADT/StringSwitch.h"
27 #include "llvm/ADT/Triple.h"
28 #include "llvm/MC/MCSectionMachO.h"
29 #include "llvm/Support/ErrorHandling.h"
30 #include "llvm/Type.h"
32 using namespace clang;
34 //===----------------------------------------------------------------------===//
35 // Common code shared among targets.
36 //===----------------------------------------------------------------------===//
38 /// DefineStd - Define a macro name and standard variants. For example if
39 /// MacroName is "unix", then this will define "__unix", "__unix__", and "unix"
41 static void DefineStd(MacroBuilder &Builder, StringRef MacroName,
42 const LangOptions &Opts) {
43 assert(MacroName[0] != '_' && "Identifier should be in the user's namespace");
45 // If in GNU mode (e.g. -std=gnu99 but not -std=c99) define the raw identifier
46 // in the user's namespace.
48 Builder.defineMacro(MacroName);
51 Builder.defineMacro("__" + MacroName);
54 Builder.defineMacro("__" + MacroName + "__");
57 //===----------------------------------------------------------------------===//
58 // Defines specific to certain operating systems.
59 //===----------------------------------------------------------------------===//
62 template<typename TgtInfo>
63 class OSTargetInfo : public TgtInfo {
65 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
66 MacroBuilder &Builder) const=0;
68 OSTargetInfo(const std::string& triple) : TgtInfo(triple) {}
69 virtual void getTargetDefines(const LangOptions &Opts,
70 MacroBuilder &Builder) const {
71 TgtInfo::getTargetDefines(Opts, Builder);
72 getOSDefines(Opts, TgtInfo::getTriple(), Builder);
76 } // end anonymous namespace
79 static void getDarwinDefines(MacroBuilder &Builder, const LangOptions &Opts,
80 const llvm::Triple &Triple,
81 StringRef &PlatformName,
82 VersionTuple &PlatformMinVersion) {
83 Builder.defineMacro("__APPLE_CC__", "5621");
84 Builder.defineMacro("__APPLE__");
85 Builder.defineMacro("__MACH__");
86 Builder.defineMacro("OBJC_NEW_PROPERTIES");
88 if (!Opts.ObjCAutoRefCount) {
89 // __weak is always defined, for use in blocks and with objc pointers.
90 Builder.defineMacro("__weak", "__attribute__((objc_gc(weak)))");
92 // Darwin defines __strong even in C mode (just to nothing).
93 if (Opts.getGC() != LangOptions::NonGC)
94 Builder.defineMacro("__strong", "__attribute__((objc_gc(strong)))");
96 Builder.defineMacro("__strong", "");
98 // __unsafe_unretained is defined to nothing in non-ARC mode. We even
99 // allow this in C, since one might have block pointers in structs that
100 // are used in pure C code and in Objective-C ARC.
101 Builder.defineMacro("__unsafe_unretained", "");
103 // The Objective-C bridged cast keywords are defined to nothing in non-ARC
104 // mode; then they become normal, C-style casts.
105 Builder.defineMacro("__bridge", "");
106 Builder.defineMacro("__bridge_transfer", "");
107 Builder.defineMacro("__bridge_retained", "");
108 Builder.defineMacro("__bridge_retain", "");
112 Builder.defineMacro("__STATIC__");
114 Builder.defineMacro("__DYNAMIC__");
116 if (Opts.POSIXThreads)
117 Builder.defineMacro("_REENTRANT");
119 // Get the platform type and version number from the triple.
120 unsigned Maj, Min, Rev;
122 // If no version was given, default to to 10.4.0, for simplifying tests.
123 if (Triple.getOSName() == "darwin" || Triple.getOSName() == "osx") {
124 PlatformName = "macosx";
128 // Otherwise, honor all three triple forms ("-darwinNNN[-iphoneos]",
129 // "-osxNNN", and "-iosNNN").
131 if (Triple.getOS() == llvm::Triple::Darwin) {
132 // For historical reasons that make little sense, the version passed here
133 // is the "darwin" version, which drops the 10 and offsets by 4.
134 Triple.getOSVersion(Maj, Min, Rev);
136 if (Triple.getEnvironmentName() == "iphoneos") {
137 PlatformName = "ios";
139 PlatformName = "macosx";
145 Triple.getOSVersion(Maj, Min, Rev);
146 PlatformName = llvm::Triple::getOSTypeName(Triple.getOS());
150 // If -ccc-host-triple arch-pc-win32-macho option specified, we're
151 // generating code for Win32 ABI. No need to emit
152 // __ENVIRONMENT_XX_OS_VERSION_MIN_REQUIRED__.
153 if (PlatformName == "win32") {
154 PlatformMinVersion = VersionTuple(Maj, Min, Rev);
158 // Set the appropriate OS version define.
159 if (PlatformName == "ios") {
160 assert(Maj < 10 && Min < 100 && Rev < 100 && "Invalid version!");
163 Str[1] = '0' + (Min / 10);
164 Str[2] = '0' + (Min % 10);
165 Str[3] = '0' + (Rev / 10);
166 Str[4] = '0' + (Rev % 10);
168 Builder.defineMacro("__ENVIRONMENT_IPHONE_OS_VERSION_MIN_REQUIRED__", Str);
170 // Note that the Driver allows versions which aren't representable in the
171 // define (because we only get a single digit for the minor and micro
172 // revision numbers). So, we limit them to the maximum representable
174 assert(Triple.getEnvironmentName().empty() && "Invalid environment!");
175 assert(Maj < 100 && Min < 100 && Rev < 100 && "Invalid version!");
177 Str[0] = '0' + (Maj / 10);
178 Str[1] = '0' + (Maj % 10);
179 Str[2] = '0' + std::min(Min, 9U);
180 Str[3] = '0' + std::min(Rev, 9U);
182 Builder.defineMacro("__ENVIRONMENT_MAC_OS_X_VERSION_MIN_REQUIRED__", Str);
185 PlatformMinVersion = VersionTuple(Maj, Min, Rev);
189 template<typename Target>
190 class DarwinTargetInfo : public OSTargetInfo<Target> {
192 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
193 MacroBuilder &Builder) const {
194 getDarwinDefines(Builder, Opts, Triple, this->PlatformName,
195 this->PlatformMinVersion);
199 DarwinTargetInfo(const std::string& triple) :
200 OSTargetInfo<Target>(triple) {
201 llvm::Triple T = llvm::Triple(triple);
202 this->TLSSupported = T.isMacOSX() && !T.isMacOSXVersionLT(10,7);
203 this->MCountName = "\01mcount";
206 virtual std::string isValidSectionSpecifier(StringRef SR) const {
207 // Let MCSectionMachO validate this.
208 StringRef Segment, Section;
209 unsigned TAA, StubSize;
211 return llvm::MCSectionMachO::ParseSectionSpecifier(SR, Segment, Section,
212 TAA, HasTAA, StubSize);
215 virtual const char *getStaticInitSectionSpecifier() const {
216 // FIXME: We should return 0 when building kexts.
217 return "__TEXT,__StaticInit,regular,pure_instructions";
223 // DragonFlyBSD Target
224 template<typename Target>
225 class DragonFlyBSDTargetInfo : public OSTargetInfo<Target> {
227 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
228 MacroBuilder &Builder) const {
229 // DragonFly defines; list based off of gcc output
230 Builder.defineMacro("__DragonFly__");
231 Builder.defineMacro("__DragonFly_cc_version", "100001");
232 Builder.defineMacro("__ELF__");
233 Builder.defineMacro("__KPRINTF_ATTRIBUTE__");
234 Builder.defineMacro("__tune_i386__");
235 DefineStd(Builder, "unix", Opts);
238 DragonFlyBSDTargetInfo(const std::string &triple)
239 : OSTargetInfo<Target>(triple) {}
243 template<typename Target>
244 class FreeBSDTargetInfo : public OSTargetInfo<Target> {
246 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
247 MacroBuilder &Builder) const {
248 // FreeBSD defines; list based off of gcc output
250 unsigned Release = Triple.getOSMajorVersion();
254 Builder.defineMacro("__FreeBSD__", Twine(Release));
255 Builder.defineMacro("__FreeBSD_cc_version", Twine(Release * 100000U + 1U));
256 Builder.defineMacro("__KPRINTF_ATTRIBUTE__");
257 DefineStd(Builder, "unix", Opts);
258 Builder.defineMacro("__ELF__");
261 FreeBSDTargetInfo(const std::string &triple)
262 : OSTargetInfo<Target>(triple) {
263 this->UserLabelPrefix = "";
265 llvm::Triple Triple(triple);
266 switch (Triple.getArch()) {
268 case llvm::Triple::x86:
269 case llvm::Triple::x86_64:
270 this->MCountName = ".mcount";
272 case llvm::Triple::mips:
273 case llvm::Triple::mipsel:
274 case llvm::Triple::ppc:
275 case llvm::Triple::ppc64:
276 this->MCountName = "_mcount";
278 case llvm::Triple::arm:
279 this->MCountName = "__mcount";
287 template<typename Target>
288 class MinixTargetInfo : public OSTargetInfo<Target> {
290 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
291 MacroBuilder &Builder) const {
294 Builder.defineMacro("__minix", "3");
295 Builder.defineMacro("_EM_WSIZE", "4");
296 Builder.defineMacro("_EM_PSIZE", "4");
297 Builder.defineMacro("_EM_SSIZE", "2");
298 Builder.defineMacro("_EM_LSIZE", "4");
299 Builder.defineMacro("_EM_FSIZE", "4");
300 Builder.defineMacro("_EM_DSIZE", "8");
301 DefineStd(Builder, "unix", Opts);
304 MinixTargetInfo(const std::string &triple)
305 : OSTargetInfo<Target>(triple) {
306 this->UserLabelPrefix = "";
311 template<typename Target>
312 class LinuxTargetInfo : public OSTargetInfo<Target> {
314 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
315 MacroBuilder &Builder) const {
316 // Linux defines; list based off of gcc output
317 DefineStd(Builder, "unix", Opts);
318 DefineStd(Builder, "linux", Opts);
319 Builder.defineMacro("__gnu_linux__");
320 Builder.defineMacro("__ELF__");
321 if (Opts.POSIXThreads)
322 Builder.defineMacro("_REENTRANT");
324 Builder.defineMacro("_GNU_SOURCE");
327 LinuxTargetInfo(const std::string& triple)
328 : OSTargetInfo<Target>(triple) {
329 this->UserLabelPrefix = "";
330 this->WIntType = TargetInfo::UnsignedInt;
335 template<typename Target>
336 class NetBSDTargetInfo : public OSTargetInfo<Target> {
338 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
339 MacroBuilder &Builder) const {
340 // NetBSD defines; list based off of gcc output
341 Builder.defineMacro("__NetBSD__");
342 Builder.defineMacro("__unix__");
343 Builder.defineMacro("__ELF__");
344 if (Opts.POSIXThreads)
345 Builder.defineMacro("_POSIX_THREADS");
348 NetBSDTargetInfo(const std::string &triple)
349 : OSTargetInfo<Target>(triple) {
350 this->UserLabelPrefix = "";
355 template<typename Target>
356 class OpenBSDTargetInfo : public OSTargetInfo<Target> {
358 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
359 MacroBuilder &Builder) const {
360 // OpenBSD defines; list based off of gcc output
362 Builder.defineMacro("__OpenBSD__");
363 DefineStd(Builder, "unix", Opts);
364 Builder.defineMacro("__ELF__");
365 if (Opts.POSIXThreads)
366 Builder.defineMacro("_POSIX_THREADS");
369 OpenBSDTargetInfo(const std::string &triple)
370 : OSTargetInfo<Target>(triple) {}
374 template<typename Target>
375 class PSPTargetInfo : public OSTargetInfo<Target> {
377 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
378 MacroBuilder &Builder) const {
379 // PSP defines; list based on the output of the pspdev gcc toolchain.
380 Builder.defineMacro("PSP");
381 Builder.defineMacro("_PSP");
382 Builder.defineMacro("__psp__");
383 Builder.defineMacro("__ELF__");
386 PSPTargetInfo(const std::string& triple)
387 : OSTargetInfo<Target>(triple) {
388 this->UserLabelPrefix = "";
393 template<typename Target>
394 class PS3PPUTargetInfo : public OSTargetInfo<Target> {
396 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
397 MacroBuilder &Builder) const {
399 Builder.defineMacro("__PPC__");
400 Builder.defineMacro("__PPU__");
401 Builder.defineMacro("__CELLOS_LV2__");
402 Builder.defineMacro("__ELF__");
403 Builder.defineMacro("__LP32__");
404 Builder.defineMacro("_ARCH_PPC64");
405 Builder.defineMacro("__powerpc64__");
408 PS3PPUTargetInfo(const std::string& triple)
409 : OSTargetInfo<Target>(triple) {
410 this->UserLabelPrefix = "";
411 this->LongWidth = this->LongAlign = this->PointerWidth = this->PointerAlign = 32;
412 this->IntMaxType = TargetInfo::SignedLongLong;
413 this->UIntMaxType = TargetInfo::UnsignedLongLong;
414 this->Int64Type = TargetInfo::SignedLongLong;
415 this->SizeType = TargetInfo::UnsignedInt;
416 this->DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
417 "i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32";
421 // FIXME: Need a real SPU target.
423 template<typename Target>
424 class PS3SPUTargetInfo : public OSTargetInfo<Target> {
426 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
427 MacroBuilder &Builder) const {
429 Builder.defineMacro("__SPU__");
430 Builder.defineMacro("__ELF__");
433 PS3SPUTargetInfo(const std::string& triple)
434 : OSTargetInfo<Target>(triple) {
435 this->UserLabelPrefix = "";
440 template<typename Target>
441 class AuroraUXTargetInfo : public OSTargetInfo<Target> {
443 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
444 MacroBuilder &Builder) const {
445 DefineStd(Builder, "sun", Opts);
446 DefineStd(Builder, "unix", Opts);
447 Builder.defineMacro("__ELF__");
448 Builder.defineMacro("__svr4__");
449 Builder.defineMacro("__SVR4");
452 AuroraUXTargetInfo(const std::string& triple)
453 : OSTargetInfo<Target>(triple) {
454 this->UserLabelPrefix = "";
455 this->WCharType = this->SignedLong;
456 // FIXME: WIntType should be SignedLong
461 template<typename Target>
462 class SolarisTargetInfo : public OSTargetInfo<Target> {
464 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
465 MacroBuilder &Builder) const {
466 DefineStd(Builder, "sun", Opts);
467 DefineStd(Builder, "unix", Opts);
468 Builder.defineMacro("__ELF__");
469 Builder.defineMacro("__svr4__");
470 Builder.defineMacro("__SVR4");
473 SolarisTargetInfo(const std::string& triple)
474 : OSTargetInfo<Target>(triple) {
475 this->UserLabelPrefix = "";
476 this->WCharType = this->SignedLong;
477 // FIXME: WIntType should be SignedLong
482 template<typename Target>
483 class WindowsTargetInfo : public OSTargetInfo<Target> {
485 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
486 MacroBuilder &Builder) const {
487 Builder.defineMacro("_WIN32");
489 void getVisualStudioDefines(const LangOptions &Opts,
490 MacroBuilder &Builder) const {
491 if (Opts.CPlusPlus) {
493 Builder.defineMacro("_CPPRTTI");
496 Builder.defineMacro("_CPPUNWIND");
499 if (!Opts.CharIsSigned)
500 Builder.defineMacro("_CHAR_UNSIGNED");
502 // FIXME: POSIXThreads isn't exactly the option this should be defined for,
503 // but it works for now.
504 if (Opts.POSIXThreads)
505 Builder.defineMacro("_MT");
507 if (Opts.MSCVersion != 0)
508 Builder.defineMacro("_MSC_VER", Twine(Opts.MSCVersion));
510 if (Opts.MicrosoftExt) {
511 Builder.defineMacro("_MSC_EXTENSIONS");
513 if (Opts.CPlusPlus0x) {
514 Builder.defineMacro("_RVALUE_REFERENCES_V2_SUPPORTED");
515 Builder.defineMacro("_RVALUE_REFERENCES_SUPPORTED");
516 Builder.defineMacro("_NATIVE_NULLPTR_SUPPORTED");
520 Builder.defineMacro("_INTEGRAL_MAX_BITS", "64");
524 WindowsTargetInfo(const std::string &triple)
525 : OSTargetInfo<Target>(triple) {}
528 } // end anonymous namespace.
530 //===----------------------------------------------------------------------===//
531 // Specific target implementations.
532 //===----------------------------------------------------------------------===//
535 // PPC abstract base class
536 class PPCTargetInfo : public TargetInfo {
537 static const Builtin::Info BuiltinInfo[];
538 static const char * const GCCRegNames[];
539 static const TargetInfo::GCCRegAlias GCCRegAliases[];
541 PPCTargetInfo(const std::string& triple) : TargetInfo(triple) {}
543 virtual void getTargetBuiltins(const Builtin::Info *&Records,
544 unsigned &NumRecords) const {
545 Records = BuiltinInfo;
546 NumRecords = clang::PPC::LastTSBuiltin-Builtin::FirstTSBuiltin;
549 virtual void getTargetDefines(const LangOptions &Opts,
550 MacroBuilder &Builder) const;
552 virtual void getGCCRegNames(const char * const *&Names,
553 unsigned &NumNames) const;
554 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
555 unsigned &NumAliases) const;
556 virtual bool validateAsmConstraint(const char *&Name,
557 TargetInfo::ConstraintInfo &Info) const {
559 default: return false;
562 case 'b': // Base register
563 case 'f': // Floating point register
564 Info.setAllowsRegister();
566 // FIXME: The following are added to allow parsing.
567 // I just took a guess at what the actions should be.
568 // Also, is more specific checking needed? I.e. specific registers?
569 case 'd': // Floating point register (containing 64-bit value)
570 case 'v': // Altivec vector register
571 Info.setAllowsRegister();
575 case 'd':// VSX vector register to hold vector double data
576 case 'f':// VSX vector register to hold vector float data
577 case 's':// VSX vector register to hold scalar float data
578 case 'a':// Any VSX register
583 Info.setAllowsRegister();
584 Name++; // Skip over 'w'.
586 case 'h': // `MQ', `CTR', or `LINK' register
587 case 'q': // `MQ' register
588 case 'c': // `CTR' register
589 case 'l': // `LINK' register
590 case 'x': // `CR' register (condition register) number 0
591 case 'y': // `CR' register (condition register)
592 case 'z': // `XER[CA]' carry bit (part of the XER register)
593 Info.setAllowsRegister();
595 case 'I': // Signed 16-bit constant
596 case 'J': // Unsigned 16-bit constant shifted left 16 bits
597 // (use `L' instead for SImode constants)
598 case 'K': // Unsigned 16-bit constant
599 case 'L': // Signed 16-bit constant shifted left 16 bits
600 case 'M': // Constant larger than 31
601 case 'N': // Exact power of 2
602 case 'P': // Constant whose negation is a signed 16-bit constant
603 case 'G': // Floating point constant that can be loaded into a
604 // register with one instruction per word
605 case 'H': // Integer/Floating point constant that can be loaded
606 // into a register using three instructions
608 case 'm': // Memory operand. Note that on PowerPC targets, m can
609 // include addresses that update the base register. It
610 // is therefore only safe to use `m' in an asm statement
611 // if that asm statement accesses the operand exactly once.
612 // The asm statement must also use `%U<opno>' as a
613 // placeholder for the "update" flag in the corresponding
614 // load or store instruction. For example:
615 // asm ("st%U0 %1,%0" : "=m" (mem) : "r" (val));
617 // asm ("st %1,%0" : "=m" (mem) : "r" (val));
618 // is not. Use es rather than m if you don't want the base
619 // register to be updated.
623 // es: A "stable" memory operand; that is, one which does not
624 // include any automodification of the base register. Unlike
625 // `m', this constraint can be used in asm statements that
626 // might access the operand several times, or that might not
628 Info.setAllowsMemory();
629 Name++; // Skip over 'e'.
631 case 'Q': // Memory operand that is an offset from a register (it is
632 // usually better to use `m' or `es' in asm statements)
633 case 'Z': // Memory operand that is an indexed or indirect from a
634 // register (it is usually better to use `m' or `es' in
636 Info.setAllowsMemory();
637 Info.setAllowsRegister();
639 case 'R': // AIX TOC entry
640 case 'a': // Address operand that is an indexed or indirect from a
641 // register (`p' is preferable for asm statements)
642 case 'S': // Constant suitable as a 64-bit mask operand
643 case 'T': // Constant suitable as a 32-bit mask operand
644 case 'U': // System V Release 4 small data area reference
645 case 't': // AND masks that can be performed by two rldic{l, r}
647 case 'W': // Vector constant that does not require memory
648 case 'j': // Vector constant that is all zeros.
654 virtual const char *getClobbers() const {
659 const Builtin::Info PPCTargetInfo::BuiltinInfo[] = {
660 #define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES },
661 #define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\
663 #include "clang/Basic/BuiltinsPPC.def"
667 /// PPCTargetInfo::getTargetDefines - Return a set of the PowerPC-specific
668 /// #defines that are not tied to a specific subtarget.
669 void PPCTargetInfo::getTargetDefines(const LangOptions &Opts,
670 MacroBuilder &Builder) const {
671 // Target identification.
672 Builder.defineMacro("__ppc__");
673 Builder.defineMacro("_ARCH_PPC");
674 Builder.defineMacro("__powerpc__");
675 Builder.defineMacro("__POWERPC__");
676 if (PointerWidth == 64) {
677 Builder.defineMacro("_ARCH_PPC64");
678 Builder.defineMacro("_LP64");
679 Builder.defineMacro("__LP64__");
680 Builder.defineMacro("__powerpc64__");
681 Builder.defineMacro("__ppc64__");
683 Builder.defineMacro("__ppc__");
686 // Target properties.
687 if (getTriple().getOS() != llvm::Triple::NetBSD)
688 Builder.defineMacro("_BIG_ENDIAN");
689 Builder.defineMacro("__BIG_ENDIAN__");
691 // Subtarget options.
692 Builder.defineMacro("__NATURAL_ALIGNMENT__");
693 Builder.defineMacro("__REGISTER_PREFIX__", "");
695 // FIXME: Should be controlled by command line option.
696 Builder.defineMacro("__LONG_DOUBLE_128__");
699 Builder.defineMacro("__VEC__", "10206");
700 Builder.defineMacro("__ALTIVEC__");
705 const char * const PPCTargetInfo::GCCRegNames[] = {
706 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
707 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
708 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
709 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
710 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
711 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
712 "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
713 "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",
714 "mq", "lr", "ctr", "ap",
715 "cr0", "cr1", "cr2", "cr3", "cr4", "cr5", "cr6", "cr7",
717 "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7",
718 "v8", "v9", "v10", "v11", "v12", "v13", "v14", "v15",
719 "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23",
720 "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31",
722 "spe_acc", "spefscr",
726 void PPCTargetInfo::getGCCRegNames(const char * const *&Names,
727 unsigned &NumNames) const {
729 NumNames = llvm::array_lengthof(GCCRegNames);
732 const TargetInfo::GCCRegAlias PPCTargetInfo::GCCRegAliases[] = {
733 // While some of these aliases do map to different registers
734 // they still share the same register name.
777 { { "fr10" }, "f10" },
778 { { "fr11" }, "f11" },
779 { { "fr12" }, "f12" },
780 { { "fr13" }, "f13" },
781 { { "fr14" }, "f14" },
782 { { "fr15" }, "f15" },
783 { { "fr16" }, "f16" },
784 { { "fr17" }, "f17" },
785 { { "fr18" }, "f18" },
786 { { "fr19" }, "f19" },
787 { { "fr20" }, "f20" },
788 { { "fr21" }, "f21" },
789 { { "fr22" }, "f22" },
790 { { "fr23" }, "f23" },
791 { { "fr24" }, "f24" },
792 { { "fr25" }, "f25" },
793 { { "fr26" }, "f26" },
794 { { "fr27" }, "f27" },
795 { { "fr28" }, "f28" },
796 { { "fr29" }, "f29" },
797 { { "fr30" }, "f30" },
798 { { "fr31" }, "f31" },
802 void PPCTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases,
803 unsigned &NumAliases) const {
804 Aliases = GCCRegAliases;
805 NumAliases = llvm::array_lengthof(GCCRegAliases);
807 } // end anonymous namespace.
810 class PPC32TargetInfo : public PPCTargetInfo {
812 PPC32TargetInfo(const std::string &triple) : PPCTargetInfo(triple) {
813 DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
814 "i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32";
816 switch (getTriple().getOS()) {
817 case llvm::Triple::FreeBSD:
818 case llvm::Triple::NetBSD:
819 SizeType = UnsignedInt;
826 virtual const char *getVAListDeclaration() const {
827 // This is the ELF definition, and is overridden by the Darwin sub-target
828 return "typedef struct __va_list_tag {"
829 " unsigned char gpr;"
830 " unsigned char fpr;"
831 " unsigned short reserved;"
832 " void* overflow_arg_area;"
833 " void* reg_save_area;"
834 "} __builtin_va_list[1];";
837 } // end anonymous namespace.
840 class PPC64TargetInfo : public PPCTargetInfo {
842 PPC64TargetInfo(const std::string& triple) : PPCTargetInfo(triple) {
843 LongWidth = LongAlign = PointerWidth = PointerAlign = 64;
844 IntMaxType = SignedLong;
845 UIntMaxType = UnsignedLong;
846 Int64Type = SignedLong;
847 DescriptionString = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
848 "i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32:64";
850 virtual const char *getVAListDeclaration() const {
851 return "typedef char* __builtin_va_list;";
854 } // end anonymous namespace.
858 class DarwinPPC32TargetInfo :
859 public DarwinTargetInfo<PPC32TargetInfo> {
861 DarwinPPC32TargetInfo(const std::string& triple)
862 : DarwinTargetInfo<PPC32TargetInfo>(triple) {
863 HasAlignMac68kSupport = true;
864 BoolWidth = BoolAlign = 32; //XXX support -mone-byte-bool?
866 virtual const char *getVAListDeclaration() const {
867 return "typedef char* __builtin_va_list;";
871 class DarwinPPC64TargetInfo :
872 public DarwinTargetInfo<PPC64TargetInfo> {
874 DarwinPPC64TargetInfo(const std::string& triple)
875 : DarwinTargetInfo<PPC64TargetInfo>(triple) {
876 HasAlignMac68kSupport = true;
879 } // end anonymous namespace.
882 static const unsigned PTXAddrSpaceMap[] = {
887 class PTXTargetInfo : public TargetInfo {
888 static const char * const GCCRegNames[];
889 static const Builtin::Info BuiltinInfo[];
890 std::vector<llvm::StringRef> AvailableFeatures;
892 PTXTargetInfo(const std::string& triple) : TargetInfo(triple) {
893 TLSSupported = false;
894 LongWidth = LongAlign = 64;
895 AddrSpaceMap = &PTXAddrSpaceMap;
896 // Define available target features
897 // These must be defined in sorted order!
898 AvailableFeatures.push_back("compute10");
899 AvailableFeatures.push_back("compute11");
900 AvailableFeatures.push_back("compute12");
901 AvailableFeatures.push_back("compute13");
902 AvailableFeatures.push_back("compute20");
903 AvailableFeatures.push_back("double");
904 AvailableFeatures.push_back("no-fma");
905 AvailableFeatures.push_back("ptx20");
906 AvailableFeatures.push_back("ptx21");
907 AvailableFeatures.push_back("ptx22");
908 AvailableFeatures.push_back("ptx23");
909 AvailableFeatures.push_back("sm10");
910 AvailableFeatures.push_back("sm11");
911 AvailableFeatures.push_back("sm12");
912 AvailableFeatures.push_back("sm13");
913 AvailableFeatures.push_back("sm20");
914 AvailableFeatures.push_back("sm21");
915 AvailableFeatures.push_back("sm22");
916 AvailableFeatures.push_back("sm23");
918 virtual void getTargetDefines(const LangOptions &Opts,
919 MacroBuilder &Builder) const {
920 Builder.defineMacro("__PTX__");
922 virtual void getTargetBuiltins(const Builtin::Info *&Records,
923 unsigned &NumRecords) const {
924 Records = BuiltinInfo;
925 NumRecords = clang::PTX::LastTSBuiltin-Builtin::FirstTSBuiltin;
928 virtual void getGCCRegNames(const char * const *&Names,
929 unsigned &NumNames) const;
930 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
931 unsigned &NumAliases) const {
936 virtual bool validateAsmConstraint(const char *&Name,
937 TargetInfo::ConstraintInfo &info) const {
941 virtual const char *getClobbers() const {
942 // FIXME: Is this really right?
945 virtual const char *getVAListDeclaration() const {
947 return "typedef char* __builtin_va_list;";
950 virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features,
951 const std::string &Name,
955 const Builtin::Info PTXTargetInfo::BuiltinInfo[] = {
956 #define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES },
957 #define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\
959 #include "clang/Basic/BuiltinsPTX.def"
962 const char * const PTXTargetInfo::GCCRegNames[] = {
966 void PTXTargetInfo::getGCCRegNames(const char * const *&Names,
967 unsigned &NumNames) const {
969 NumNames = llvm::array_lengthof(GCCRegNames);
972 bool PTXTargetInfo::setFeatureEnabled(llvm::StringMap<bool> &Features,
973 const std::string &Name,
974 bool Enabled) const {
975 if(std::binary_search(AvailableFeatures.begin(), AvailableFeatures.end(),
977 Features[Name] = Enabled;
984 class PTX32TargetInfo : public PTXTargetInfo {
986 PTX32TargetInfo(const std::string& triple) : PTXTargetInfo(triple) {
987 PointerWidth = PointerAlign = 32;
988 SizeType = PtrDiffType = IntPtrType = TargetInfo::UnsignedInt;
990 = "e-p:32:32-i64:64:64-f64:64:64-n1:8:16:32:64";
994 class PTX64TargetInfo : public PTXTargetInfo {
996 PTX64TargetInfo(const std::string& triple) : PTXTargetInfo(triple) {
997 PointerWidth = PointerAlign = 64;
998 SizeType = PtrDiffType = IntPtrType = TargetInfo::UnsignedLongLong;
1000 = "e-p:64:64-i64:64:64-f64:64:64-n1:8:16:32:64";
1006 // MBlaze abstract base class
1007 class MBlazeTargetInfo : public TargetInfo {
1008 static const char * const GCCRegNames[];
1009 static const TargetInfo::GCCRegAlias GCCRegAliases[];
1012 MBlazeTargetInfo(const std::string& triple) : TargetInfo(triple) {
1013 DescriptionString = "E-p:32:32:32-i8:8:8-i16:16:16";
1016 virtual void getTargetBuiltins(const Builtin::Info *&Records,
1017 unsigned &NumRecords) const {
1018 // FIXME: Implement.
1023 virtual void getTargetDefines(const LangOptions &Opts,
1024 MacroBuilder &Builder) const;
1026 virtual const char *getVAListDeclaration() const {
1027 return "typedef char* __builtin_va_list;";
1029 virtual const char *getTargetPrefix() const {
1032 virtual void getGCCRegNames(const char * const *&Names,
1033 unsigned &NumNames) const;
1034 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
1035 unsigned &NumAliases) const;
1036 virtual bool validateAsmConstraint(const char *&Name,
1037 TargetInfo::ConstraintInfo &Info) const {
1039 default: return false;
1042 case 'b': // Base register
1043 case 'f': // Floating point register
1044 Info.setAllowsRegister();
1048 virtual const char *getClobbers() const {
1053 /// MBlazeTargetInfo::getTargetDefines - Return a set of the MBlaze-specific
1054 /// #defines that are not tied to a specific subtarget.
1055 void MBlazeTargetInfo::getTargetDefines(const LangOptions &Opts,
1056 MacroBuilder &Builder) const {
1057 // Target identification.
1058 Builder.defineMacro("__microblaze__");
1059 Builder.defineMacro("_ARCH_MICROBLAZE");
1060 Builder.defineMacro("__MICROBLAZE__");
1062 // Target properties.
1063 Builder.defineMacro("_BIG_ENDIAN");
1064 Builder.defineMacro("__BIG_ENDIAN__");
1066 // Subtarget options.
1067 Builder.defineMacro("__REGISTER_PREFIX__", "");
1071 const char * const MBlazeTargetInfo::GCCRegNames[] = {
1072 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
1073 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
1074 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
1075 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
1076 "$f0", "$f1", "$f2", "$f3", "$f4", "$f5", "$f6", "$f7",
1077 "$f8", "$f9", "$f10", "$f11", "$f12", "$f13", "$f14", "$f15",
1078 "$f16", "$f17", "$f18", "$f19", "$f20", "$f21", "$f22", "$f23",
1079 "$f24", "$f25", "$f26", "$f27", "$f28", "$f29", "$f30", "$f31",
1080 "hi", "lo", "accum","rmsr", "$fcc1","$fcc2","$fcc3","$fcc4",
1081 "$fcc5","$fcc6","$fcc7","$ap", "$rap", "$frp"
1084 void MBlazeTargetInfo::getGCCRegNames(const char * const *&Names,
1085 unsigned &NumNames) const {
1086 Names = GCCRegNames;
1087 NumNames = llvm::array_lengthof(GCCRegNames);
1090 const TargetInfo::GCCRegAlias MBlazeTargetInfo::GCCRegAliases[] = {
1125 void MBlazeTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases,
1126 unsigned &NumAliases) const {
1127 Aliases = GCCRegAliases;
1128 NumAliases = llvm::array_lengthof(GCCRegAliases);
1130 } // end anonymous namespace.
1133 // Namespace for x86 abstract base class
1134 const Builtin::Info BuiltinInfo[] = {
1135 #define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES },
1136 #define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\
1138 #include "clang/Basic/BuiltinsX86.def"
1141 static const char* const GCCRegNames[] = {
1142 "ax", "dx", "cx", "bx", "si", "di", "bp", "sp",
1143 "st", "st(1)", "st(2)", "st(3)", "st(4)", "st(5)", "st(6)", "st(7)",
1144 "argp", "flags", "fpcr", "fpsr", "dirflag", "frame",
1145 "xmm0", "xmm1", "xmm2", "xmm3", "xmm4", "xmm5", "xmm6", "xmm7",
1146 "mm0", "mm1", "mm2", "mm3", "mm4", "mm5", "mm6", "mm7",
1147 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
1148 "xmm8", "xmm9", "xmm10", "xmm11", "xmm12", "xmm13", "xmm14", "xmm15",
1151 const TargetInfo::AddlRegName AddlRegNames[] = {
1152 { { "al", "ah", "eax", "rax" }, 0 },
1153 { { "bl", "bh", "ebx", "rbx" }, 3 },
1154 { { "cl", "ch", "ecx", "rcx" }, 2 },
1155 { { "dl", "dh", "edx", "rdx" }, 1 },
1156 { { "esi", "rsi" }, 4 },
1157 { { "edi", "rdi" }, 5 },
1158 { { "esp", "rsp" }, 7 },
1159 { { "ebp", "rbp" }, 6 },
1162 // X86 target abstract base class; x86-32 and x86-64 are very close, so
1163 // most of the implementation can be shared.
1164 class X86TargetInfo : public TargetInfo {
1166 NoSSE, SSE1, SSE2, SSE3, SSSE3, SSE41, SSE42
1169 NoMMX3DNow, MMX, AMD3DNow, AMD3DNowAthlon
1175 /// \brief Enumeration of all of the X86 CPUs supported by Clang.
1177 /// Each enumeration represents a particular CPU supported by Clang. These
1178 /// loosely correspond to the options passed to '-march' or '-mtune' flags.
1183 /// i386-generation processors.
1189 /// i486-generation processors.
1198 /// i586-generation processors, P5 microarchitecture based.
1206 /// i686-generation processors, P6 / Pentium M microarchitecture based.
1216 /// This enumerator is a bit odd, as GCC no longer accepts -march=yonah.
1217 /// Clang however has some logic to suport this.
1218 // FIXME: Warn, deprecate, and potentially remove this.
1223 /// Netburst microarchitecture based processors.
1232 /// Core microarchitecture based processors.
1236 /// This enumerator, like \see CK_Yonah, is a bit odd. It is another
1237 /// codename which GCC no longer accepts as an option to -march, but Clang
1238 /// has some logic for recognizing it.
1239 // FIXME: Warn, deprecate, and potentially remove this.
1250 /// Nehalem microarchitecture based processors.
1258 /// K6 architecture processors.
1266 /// K7 architecture processors.
1269 CK_AthlonThunderbird,
1276 /// K8 architecture processors.
1287 /// This specification is deprecated and will be removed in the future.
1288 /// Users should prefer \see CK_K8.
1289 // FIXME: Warn on this when the CPU is set to it.
1294 /// Geode processors.
1301 X86TargetInfo(const std::string& triple)
1302 : TargetInfo(triple), SSELevel(NoSSE), MMX3DNowLevel(NoMMX3DNow),
1303 HasAES(false), HasAVX(false), CPU(CK_Generic) {
1304 LongDoubleFormat = &llvm::APFloat::x87DoubleExtended;
1306 virtual void getTargetBuiltins(const Builtin::Info *&Records,
1307 unsigned &NumRecords) const {
1308 Records = BuiltinInfo;
1309 NumRecords = clang::X86::LastTSBuiltin-Builtin::FirstTSBuiltin;
1311 virtual void getGCCRegNames(const char * const *&Names,
1312 unsigned &NumNames) const {
1313 Names = GCCRegNames;
1314 NumNames = llvm::array_lengthof(GCCRegNames);
1316 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
1317 unsigned &NumAliases) const {
1321 virtual void getGCCAddlRegNames(const AddlRegName *&Names,
1322 unsigned &NumNames) const {
1323 Names = AddlRegNames;
1324 NumNames = llvm::array_lengthof(AddlRegNames);
1326 virtual bool validateAsmConstraint(const char *&Name,
1327 TargetInfo::ConstraintInfo &info) const;
1328 virtual std::string convertConstraint(const char *&Constraint) const;
1329 virtual const char *getClobbers() const {
1330 return "~{dirflag},~{fpsr},~{flags}";
1332 virtual void getTargetDefines(const LangOptions &Opts,
1333 MacroBuilder &Builder) const;
1334 virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features,
1335 const std::string &Name,
1336 bool Enabled) const;
1337 virtual void getDefaultFeatures(llvm::StringMap<bool> &Features) const;
1338 virtual void HandleTargetFeatures(std::vector<std::string> &Features);
1339 virtual const char* getABI() const {
1340 return MMX3DNowLevel == NoMMX3DNow ? "no-mmx" : "";
1342 virtual bool setCPU(const std::string &Name) {
1343 CPU = llvm::StringSwitch<CPUKind>(Name)
1344 .Case("i386", CK_i386)
1345 .Case("i486", CK_i486)
1346 .Case("winchip-c6", CK_WinChipC6)
1347 .Case("winchip2", CK_WinChip2)
1349 .Case("i586", CK_i586)
1350 .Case("pentium", CK_Pentium)
1351 .Case("pentium-mmx", CK_PentiumMMX)
1352 .Case("i686", CK_i686)
1353 .Case("pentiumpro", CK_PentiumPro)
1354 .Case("pentium2", CK_Pentium2)
1355 .Case("pentium3", CK_Pentium3)
1356 .Case("pentium3m", CK_Pentium3M)
1357 .Case("pentium-m", CK_PentiumM)
1358 .Case("c3-2", CK_C3_2)
1359 .Case("yonah", CK_Yonah)
1360 .Case("pentium4", CK_Pentium4)
1361 .Case("pentium4m", CK_Pentium4M)
1362 .Case("prescott", CK_Prescott)
1363 .Case("nocona", CK_Nocona)
1364 .Case("core2", CK_Core2)
1365 .Case("penryn", CK_Penryn)
1366 .Case("atom", CK_Atom)
1367 .Case("corei7", CK_Corei7)
1368 .Case("corei7-avx", CK_Corei7AVX)
1369 .Case("core-avx-i", CK_CoreAVXi)
1371 .Case("k6-2", CK_K6_2)
1372 .Case("k6-3", CK_K6_3)
1373 .Case("athlon", CK_Athlon)
1374 .Case("athlon-tbird", CK_AthlonThunderbird)
1375 .Case("athlon-4", CK_Athlon4)
1376 .Case("athlon-xp", CK_AthlonXP)
1377 .Case("athlon-mp", CK_AthlonMP)
1378 .Case("athlon64", CK_Athlon64)
1379 .Case("athlon64-sse3", CK_Athlon64SSE3)
1380 .Case("athlon-fx", CK_AthlonFX)
1382 .Case("k8-sse3", CK_K8SSE3)
1383 .Case("opteron", CK_Opteron)
1384 .Case("opteron-sse3", CK_OpteronSSE3)
1385 .Case("amdfam10", CK_AMDFAM10)
1386 .Case("x86-64", CK_x86_64)
1387 .Case("geode", CK_Geode)
1388 .Default(CK_Generic);
1390 // Perform any per-CPU checks necessary to determine if this CPU is
1392 // FIXME: This results in terrible diagnostics. Clang just says the CPU is
1393 // invalid without explaining *why*.
1396 // No processor selected!
1422 case CK_AthlonThunderbird:
1427 // Only accept certain architectures when compiling in 32-bit mode.
1428 if (PointerWidth != 32)
1440 case CK_Athlon64SSE3:
1445 case CK_OpteronSSE3:
1450 llvm_unreachable("Unhandled CPU kind");
1454 void X86TargetInfo::getDefaultFeatures(llvm::StringMap<bool> &Features) const {
1455 // FIXME: This should not be here.
1456 Features["3dnow"] = false;
1457 Features["3dnowa"] = false;
1458 Features["mmx"] = false;
1459 Features["sse"] = false;
1460 Features["sse2"] = false;
1461 Features["sse3"] = false;
1462 Features["ssse3"] = false;
1463 Features["sse41"] = false;
1464 Features["sse42"] = false;
1465 Features["sse4a"] = false;
1466 Features["aes"] = false;
1467 Features["avx"] = false;
1469 // FIXME: This *really* should not be here.
1471 // X86_64 always has SSE2.
1472 if (PointerWidth == 64)
1473 Features["sse2"] = Features["sse"] = Features["mmx"] = true;
1486 setFeatureEnabled(Features, "mmx", true);
1490 setFeatureEnabled(Features, "mmx", true);
1491 setFeatureEnabled(Features, "sse", true);
1497 setFeatureEnabled(Features, "mmx", true);
1498 setFeatureEnabled(Features, "sse2", true);
1503 setFeatureEnabled(Features, "mmx", true);
1504 setFeatureEnabled(Features, "sse3", true);
1507 setFeatureEnabled(Features, "mmx", true);
1508 setFeatureEnabled(Features, "ssse3", true);
1511 setFeatureEnabled(Features, "mmx", true);
1512 setFeatureEnabled(Features, "sse4", true);
1513 Features["sse42"] = false;
1516 setFeatureEnabled(Features, "mmx", true);
1517 setFeatureEnabled(Features, "ssse3", true);
1520 setFeatureEnabled(Features, "mmx", true);
1521 setFeatureEnabled(Features, "sse4", true);
1522 setFeatureEnabled(Features, "aes", true);
1526 setFeatureEnabled(Features, "mmx", true);
1527 setFeatureEnabled(Features, "sse4", true);
1528 setFeatureEnabled(Features, "aes", true);
1529 //setFeatureEnabled(Features, "avx", true);
1533 setFeatureEnabled(Features, "mmx", true);
1539 setFeatureEnabled(Features, "3dnow", true);
1542 case CK_AthlonThunderbird:
1544 setFeatureEnabled(Features, "3dnowa", true);
1549 setFeatureEnabled(Features, "sse", true);
1550 setFeatureEnabled(Features, "3dnowa", true);
1556 setFeatureEnabled(Features, "sse2", true);
1557 setFeatureEnabled(Features, "3dnowa", true);
1560 case CK_OpteronSSE3:
1561 case CK_Athlon64SSE3:
1562 setFeatureEnabled(Features, "sse3", true);
1563 setFeatureEnabled(Features, "3dnowa", true);
1566 setFeatureEnabled(Features, "sse3", true);
1567 setFeatureEnabled(Features, "sse4a", true);
1568 setFeatureEnabled(Features, "3dnowa", true);
1571 setFeatureEnabled(Features, "mmx", true);
1572 setFeatureEnabled(Features, "sse", true);
1577 bool X86TargetInfo::setFeatureEnabled(llvm::StringMap<bool> &Features,
1578 const std::string &Name,
1579 bool Enabled) const {
1580 // FIXME: This *really* should not be here. We need some way of translating
1581 // options into llvm subtarget features.
1582 if (!Features.count(Name) &&
1583 (Name != "sse4" && Name != "sse4.2" && Name != "sse4.1"))
1586 // FIXME: this should probably use a switch with fall through.
1590 Features["mmx"] = true;
1591 else if (Name == "sse")
1592 Features["mmx"] = Features["sse"] = true;
1593 else if (Name == "sse2")
1594 Features["mmx"] = Features["sse"] = Features["sse2"] = true;
1595 else if (Name == "sse3")
1596 Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
1598 else if (Name == "ssse3")
1599 Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
1600 Features["ssse3"] = true;
1601 else if (Name == "sse4" || Name == "sse4.2")
1602 Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
1603 Features["ssse3"] = Features["sse41"] = Features["sse42"] = true;
1604 else if (Name == "sse4.1")
1605 Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
1606 Features["ssse3"] = Features["sse41"] = true;
1607 else if (Name == "3dnow")
1608 Features["mmx"] = Features["3dnow"] = true;
1609 else if (Name == "3dnowa")
1610 Features["mmx"] = Features["3dnow"] = Features["3dnowa"] = true;
1611 else if (Name == "aes")
1612 Features["aes"] = true;
1613 else if (Name == "avx")
1614 Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
1615 Features["ssse3"] = Features["sse41"] = Features["sse42"] =
1616 Features["avx"] = true;
1617 else if (Name == "sse4a")
1618 Features["mmx"] = Features["sse4a"] = true;
1621 Features["mmx"] = Features["3dnow"] = Features["3dnowa"] = false;
1622 else if (Name == "sse")
1623 Features["sse"] = Features["sse2"] = Features["sse3"] =
1624 Features["ssse3"] = Features["sse41"] = Features["sse42"] = false;
1625 else if (Name == "sse2")
1626 Features["sse2"] = Features["sse3"] = Features["ssse3"] =
1627 Features["sse41"] = Features["sse42"] = false;
1628 else if (Name == "sse3")
1629 Features["sse3"] = Features["ssse3"] = Features["sse41"] =
1630 Features["sse42"] = false;
1631 else if (Name == "ssse3")
1632 Features["ssse3"] = Features["sse41"] = Features["sse42"] = false;
1633 else if (Name == "sse4" || Name == "sse4.1")
1634 Features["sse41"] = Features["sse42"] = false;
1635 else if (Name == "sse4.2")
1636 Features["sse42"] = false;
1637 else if (Name == "3dnow")
1638 Features["3dnow"] = Features["3dnowa"] = false;
1639 else if (Name == "3dnowa")
1640 Features["3dnowa"] = false;
1641 else if (Name == "aes")
1642 Features["aes"] = false;
1643 else if (Name == "avx")
1644 Features["avx"] = false;
1645 else if (Name == "sse4a")
1646 Features["sse4a"] = false;
1652 /// HandleTargetOptions - Perform initialization based on the user
1653 /// configured set of features.
1654 void X86TargetInfo::HandleTargetFeatures(std::vector<std::string> &Features) {
1655 // Remember the maximum enabled sselevel.
1656 for (unsigned i = 0, e = Features.size(); i !=e; ++i) {
1657 // Ignore disabled features.
1658 if (Features[i][0] == '-')
1661 if (Features[i].substr(1) == "aes") {
1666 // FIXME: Not sure yet how to treat AVX in regard to SSE levels.
1667 // For now let it be enabled together with other SSE levels.
1668 if (Features[i].substr(1) == "avx") {
1673 assert(Features[i][0] == '+' && "Invalid target feature!");
1674 X86SSEEnum Level = llvm::StringSwitch<X86SSEEnum>(Features[i].substr(1))
1675 .Case("sse42", SSE42)
1676 .Case("sse41", SSE41)
1677 .Case("ssse3", SSSE3)
1682 SSELevel = std::max(SSELevel, Level);
1684 MMX3DNowEnum ThreeDNowLevel =
1685 llvm::StringSwitch<MMX3DNowEnum>(Features[i].substr(1))
1686 .Case("3dnowa", AMD3DNowAthlon)
1687 .Case("3dnow", AMD3DNow)
1689 .Default(NoMMX3DNow);
1691 MMX3DNowLevel = std::max(MMX3DNowLevel, ThreeDNowLevel);
1694 // Don't tell the backend if we're turning off mmx; it will end up disabling
1695 // SSE, which we don't want.
1696 std::vector<std::string>::iterator it;
1697 it = std::find(Features.begin(), Features.end(), "-mmx");
1698 if (it != Features.end())
1702 /// X86TargetInfo::getTargetDefines - Return the set of the X86-specific macro
1703 /// definitions for this particular subtarget.
1704 void X86TargetInfo::getTargetDefines(const LangOptions &Opts,
1705 MacroBuilder &Builder) const {
1706 // Target identification.
1707 if (PointerWidth == 64) {
1708 Builder.defineMacro("_LP64");
1709 Builder.defineMacro("__LP64__");
1710 Builder.defineMacro("__amd64__");
1711 Builder.defineMacro("__amd64");
1712 Builder.defineMacro("__x86_64");
1713 Builder.defineMacro("__x86_64__");
1715 DefineStd(Builder, "i386", Opts);
1718 // Subtarget options.
1719 // FIXME: We are hard-coding the tune parameters based on the CPU, but they
1720 // truly should be based on -mtune options.
1725 // The rest are coming from the i386 define above.
1726 Builder.defineMacro("__tune_i386__");
1732 Builder.defineMacro("__i486");
1733 Builder.defineMacro("__i486__");
1734 Builder.defineMacro("__tune_i486__");
1737 Builder.defineMacro("__pentium_mmx__");
1738 Builder.defineMacro("__tune_pentium_mmx__");
1742 Builder.defineMacro("__i586");
1743 Builder.defineMacro("__i586__");
1744 Builder.defineMacro("__tune_i586__");
1745 Builder.defineMacro("__pentium");
1746 Builder.defineMacro("__pentium__");
1747 Builder.defineMacro("__tune_pentium__");
1752 Builder.defineMacro("__tune_pentium3__");
1756 Builder.defineMacro("__tune_pentium2__");
1759 Builder.defineMacro("__tune_i686__");
1760 Builder.defineMacro("__tune_pentiumpro__");
1763 Builder.defineMacro("__i686");
1764 Builder.defineMacro("__i686__");
1765 // Strangely, __tune_i686__ isn't defined by GCC when CPU == i686.
1766 Builder.defineMacro("__pentiumpro");
1767 Builder.defineMacro("__pentiumpro__");
1771 Builder.defineMacro("__pentium4");
1772 Builder.defineMacro("__pentium4__");
1773 Builder.defineMacro("__tune_pentium4__");
1778 Builder.defineMacro("__nocona");
1779 Builder.defineMacro("__nocona__");
1780 Builder.defineMacro("__tune_nocona__");
1784 Builder.defineMacro("__core2");
1785 Builder.defineMacro("__core2__");
1786 Builder.defineMacro("__tune_core2__");
1789 Builder.defineMacro("__atom");
1790 Builder.defineMacro("__atom__");
1791 Builder.defineMacro("__tune_atom__");
1796 Builder.defineMacro("__corei7");
1797 Builder.defineMacro("__corei7__");
1798 Builder.defineMacro("__tune_corei7__");
1801 Builder.defineMacro("__k6_2__");
1802 Builder.defineMacro("__tune_k6_2__");
1805 if (CPU != CK_K6_2) { // In case of fallthrough
1806 // FIXME: GCC may be enabling these in cases where some other k6
1807 // architecture is specified but -m3dnow is explicitly provided. The
1808 // exact semantics need to be determined and emulated here.
1809 Builder.defineMacro("__k6_3__");
1810 Builder.defineMacro("__tune_k6_3__");
1814 Builder.defineMacro("__k6");
1815 Builder.defineMacro("__k6__");
1816 Builder.defineMacro("__tune_k6__");
1819 case CK_AthlonThunderbird:
1823 Builder.defineMacro("__athlon");
1824 Builder.defineMacro("__athlon__");
1825 Builder.defineMacro("__tune_athlon__");
1826 if (SSELevel != NoSSE) {
1827 Builder.defineMacro("__athlon_sse__");
1828 Builder.defineMacro("__tune_athlon_sse__");
1835 case CK_OpteronSSE3:
1837 case CK_Athlon64SSE3:
1839 Builder.defineMacro("__k8");
1840 Builder.defineMacro("__k8__");
1841 Builder.defineMacro("__tune_k8__");
1844 Builder.defineMacro("__amdfam10");
1845 Builder.defineMacro("__amdfam10__");
1846 Builder.defineMacro("__tune_amdfam10__");
1849 Builder.defineMacro("__geode");
1850 Builder.defineMacro("__geode__");
1851 Builder.defineMacro("__tune_geode__");
1855 // Target properties.
1856 Builder.defineMacro("__LITTLE_ENDIAN__");
1857 Builder.defineMacro("__REGISTER_PREFIX__", "");
1859 // Define __NO_MATH_INLINES on linux/x86 so that we don't get inline
1860 // functions in glibc header files that use FP Stack inline asm which the
1861 // backend can't deal with (PR879).
1862 Builder.defineMacro("__NO_MATH_INLINES");
1865 Builder.defineMacro("__AES__");
1868 Builder.defineMacro("__AVX__");
1870 // Each case falls through to the previous one here.
1873 Builder.defineMacro("__SSE4_2__");
1875 Builder.defineMacro("__SSE4_1__");
1877 Builder.defineMacro("__SSSE3__");
1879 Builder.defineMacro("__SSE3__");
1881 Builder.defineMacro("__SSE2__");
1882 Builder.defineMacro("__SSE2_MATH__"); // -mfp-math=sse always implied.
1884 Builder.defineMacro("__SSE__");
1885 Builder.defineMacro("__SSE_MATH__"); // -mfp-math=sse always implied.
1890 if (Opts.MicrosoftExt && PointerWidth == 32) {
1897 Builder.defineMacro("_M_IX86_FP", Twine(2));
1900 Builder.defineMacro("_M_IX86_FP", Twine(1));
1903 Builder.defineMacro("_M_IX86_FP", Twine(0));
1907 // Each case falls through to the previous one here.
1908 switch (MMX3DNowLevel) {
1909 case AMD3DNowAthlon:
1910 Builder.defineMacro("__3dNOW_A__");
1912 Builder.defineMacro("__3dNOW__");
1914 Builder.defineMacro("__MMX__");
1922 X86TargetInfo::validateAsmConstraint(const char *&Name,
1923 TargetInfo::ConstraintInfo &Info) const {
1925 default: return false;
1926 case 'Y': // first letter of a pair:
1927 switch (*(Name+1)) {
1928 default: return false;
1929 case '0': // First SSE register.
1930 case 't': // Any SSE register, when SSE2 is enabled.
1931 case 'i': // Any SSE register, when SSE2 and inter-unit moves enabled.
1932 case 'm': // any MMX register, when inter-unit moves enabled.
1933 break; // falls through to setAllowsRegister.
1941 case 'A': // edx:eax.
1942 case 'f': // any x87 floating point stack register.
1943 case 't': // top of floating point stack.
1944 case 'u': // second from top of floating point stack.
1945 case 'q': // Any register accessible as [r]l: a, b, c, and d.
1946 case 'y': // Any MMX register.
1947 case 'x': // Any SSE register.
1948 case 'Q': // Any register accessible as [r]h: a, b, c, and d.
1949 case 'R': // "Legacy" registers: ax, bx, cx, dx, di, si, sp, bp.
1950 case 'l': // "Index" registers: any general register that can be used as an
1951 // index in a base+index memory access.
1952 Info.setAllowsRegister();
1954 case 'C': // SSE floating point constant.
1955 case 'G': // x87 floating point constant.
1956 case 'e': // 32-bit signed integer constant for use with zero-extending
1957 // x86_64 instructions.
1958 case 'Z': // 32-bit unsigned integer constant for use with zero-extending
1959 // x86_64 instructions.
1967 X86TargetInfo::convertConstraint(const char *&Constraint) const {
1968 switch (*Constraint) {
1969 case 'a': return std::string("{ax}");
1970 case 'b': return std::string("{bx}");
1971 case 'c': return std::string("{cx}");
1972 case 'd': return std::string("{dx}");
1973 case 'S': return std::string("{si}");
1974 case 'D': return std::string("{di}");
1975 case 'p': // address
1976 return std::string("im");
1977 case 't': // top of floating point stack.
1978 return std::string("{st}");
1979 case 'u': // second from top of floating point stack.
1980 return std::string("{st(1)}"); // second from top of floating point stack.
1982 return std::string(1, *Constraint);
1985 } // end anonymous namespace
1988 // X86-32 generic target
1989 class X86_32TargetInfo : public X86TargetInfo {
1991 X86_32TargetInfo(const std::string& triple) : X86TargetInfo(triple) {
1992 DoubleAlign = LongLongAlign = 32;
1993 LongDoubleWidth = 96;
1994 LongDoubleAlign = 32;
1995 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
1996 "i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-"
1997 "a0:0:64-f80:32:32-n8:16:32-S128";
1998 SizeType = UnsignedInt;
1999 PtrDiffType = SignedInt;
2000 IntPtrType = SignedInt;
2003 // Use fpret for all types.
2004 RealTypeUsesObjCFPRet = ((1 << TargetInfo::Float) |
2005 (1 << TargetInfo::Double) |
2006 (1 << TargetInfo::LongDouble));
2008 // x86-32 has atomics up to 8 bytes
2009 // FIXME: Check that we actually have cmpxchg8b before setting
2010 // MaxAtomicInlineWidth. (cmpxchg8b is an i586 instruction.)
2011 MaxAtomicPromoteWidth = MaxAtomicInlineWidth = 64;
2013 virtual const char *getVAListDeclaration() const {
2014 return "typedef char* __builtin_va_list;";
2017 int getEHDataRegisterNumber(unsigned RegNo) const {
2018 if (RegNo == 0) return 0;
2019 if (RegNo == 1) return 2;
2023 } // end anonymous namespace
2026 class OpenBSDI386TargetInfo : public OpenBSDTargetInfo<X86_32TargetInfo> {
2028 OpenBSDI386TargetInfo(const std::string& triple) :
2029 OpenBSDTargetInfo<X86_32TargetInfo>(triple) {
2030 SizeType = UnsignedLong;
2031 IntPtrType = SignedLong;
2032 PtrDiffType = SignedLong;
2035 } // end anonymous namespace
2038 class DarwinI386TargetInfo : public DarwinTargetInfo<X86_32TargetInfo> {
2040 DarwinI386TargetInfo(const std::string& triple) :
2041 DarwinTargetInfo<X86_32TargetInfo>(triple) {
2042 LongDoubleWidth = 128;
2043 LongDoubleAlign = 128;
2044 SizeType = UnsignedLong;
2045 IntPtrType = SignedLong;
2046 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
2047 "i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-"
2048 "a0:0:64-f80:128:128-n8:16:32-S128";
2049 HasAlignMac68kSupport = true;
2053 } // end anonymous namespace
2056 // x86-32 Windows target
2057 class WindowsX86_32TargetInfo : public WindowsTargetInfo<X86_32TargetInfo> {
2059 WindowsX86_32TargetInfo(const std::string& triple)
2060 : WindowsTargetInfo<X86_32TargetInfo>(triple) {
2061 TLSSupported = false;
2062 WCharType = UnsignedShort;
2063 DoubleAlign = LongLongAlign = 64;
2064 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
2065 "i64:64:64-f32:32:32-f64:64:64-f80:128:128-v64:64:64-"
2066 "v128:128:128-a0:0:64-f80:32:32-n8:16:32-S32";
2068 virtual void getTargetDefines(const LangOptions &Opts,
2069 MacroBuilder &Builder) const {
2070 WindowsTargetInfo<X86_32TargetInfo>::getTargetDefines(Opts, Builder);
2073 } // end anonymous namespace
2077 // x86-32 Windows Visual Studio target
2078 class VisualStudioWindowsX86_32TargetInfo : public WindowsX86_32TargetInfo {
2080 VisualStudioWindowsX86_32TargetInfo(const std::string& triple)
2081 : WindowsX86_32TargetInfo(triple) {
2082 LongDoubleWidth = LongDoubleAlign = 64;
2083 LongDoubleFormat = &llvm::APFloat::IEEEdouble;
2085 virtual void getTargetDefines(const LangOptions &Opts,
2086 MacroBuilder &Builder) const {
2087 WindowsX86_32TargetInfo::getTargetDefines(Opts, Builder);
2088 WindowsX86_32TargetInfo::getVisualStudioDefines(Opts, Builder);
2089 // The value of the following reflects processor type.
2090 // 300=386, 400=486, 500=Pentium, 600=Blend (default)
2091 // We lost the original triple, so we use the default.
2092 Builder.defineMacro("_M_IX86", "600");
2095 } // end anonymous namespace
2098 // x86-32 MinGW target
2099 class MinGWX86_32TargetInfo : public WindowsX86_32TargetInfo {
2101 MinGWX86_32TargetInfo(const std::string& triple)
2102 : WindowsX86_32TargetInfo(triple) {
2104 virtual void getTargetDefines(const LangOptions &Opts,
2105 MacroBuilder &Builder) const {
2106 WindowsX86_32TargetInfo::getTargetDefines(Opts, Builder);
2107 DefineStd(Builder, "WIN32", Opts);
2108 DefineStd(Builder, "WINNT", Opts);
2109 Builder.defineMacro("_X86_");
2110 Builder.defineMacro("__MSVCRT__");
2111 Builder.defineMacro("__MINGW32__");
2113 // mingw32-gcc provides __declspec(a) as alias of __attribute__((a)).
2114 // In contrast, clang-cc1 provides __declspec(a) with -fms-extensions.
2115 if (Opts.MicrosoftExt)
2116 // Provide "as-is" __declspec.
2117 Builder.defineMacro("__declspec", "__declspec");
2119 // Provide alias of __attribute__ like mingw32-gcc.
2120 Builder.defineMacro("__declspec(a)", "__attribute__((a))");
2123 } // end anonymous namespace
2126 // x86-32 Cygwin target
2127 class CygwinX86_32TargetInfo : public X86_32TargetInfo {
2129 CygwinX86_32TargetInfo(const std::string& triple)
2130 : X86_32TargetInfo(triple) {
2131 TLSSupported = false;
2132 WCharType = UnsignedShort;
2133 DoubleAlign = LongLongAlign = 64;
2134 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
2135 "i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-"
2136 "a0:0:64-f80:32:32-n8:16:32-S32";
2138 virtual void getTargetDefines(const LangOptions &Opts,
2139 MacroBuilder &Builder) const {
2140 X86_32TargetInfo::getTargetDefines(Opts, Builder);
2141 Builder.defineMacro("__CYGWIN__");
2142 Builder.defineMacro("__CYGWIN32__");
2143 DefineStd(Builder, "unix", Opts);
2145 Builder.defineMacro("_GNU_SOURCE");
2148 } // end anonymous namespace
2151 // x86-32 Haiku target
2152 class HaikuX86_32TargetInfo : public X86_32TargetInfo {
2154 HaikuX86_32TargetInfo(const std::string& triple)
2155 : X86_32TargetInfo(triple) {
2156 SizeType = UnsignedLong;
2157 IntPtrType = SignedLong;
2158 PtrDiffType = SignedLong;
2159 this->UserLabelPrefix = "";
2161 virtual void getTargetDefines(const LangOptions &Opts,
2162 MacroBuilder &Builder) const {
2163 X86_32TargetInfo::getTargetDefines(Opts, Builder);
2164 Builder.defineMacro("__INTEL__");
2165 Builder.defineMacro("__HAIKU__");
2168 } // end anonymous namespace
2171 template<typename Target>
2172 class RTEMSTargetInfo : public OSTargetInfo<Target> {
2174 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
2175 MacroBuilder &Builder) const {
2176 // RTEMS defines; list based off of gcc output
2178 Builder.defineMacro("__rtems__");
2179 Builder.defineMacro("__ELF__");
2182 RTEMSTargetInfo(const std::string &triple)
2183 : OSTargetInfo<Target>(triple) {
2184 this->UserLabelPrefix = "";
2186 llvm::Triple Triple(triple);
2187 switch (Triple.getArch()) {
2189 case llvm::Triple::x86:
2190 // this->MCountName = ".mcount";
2192 case llvm::Triple::mips:
2193 case llvm::Triple::mipsel:
2194 case llvm::Triple::ppc:
2195 case llvm::Triple::ppc64:
2196 // this->MCountName = "_mcount";
2198 case llvm::Triple::arm:
2199 // this->MCountName = "__mcount";
2207 // x86-32 RTEMS target
2208 class RTEMSX86_32TargetInfo : public X86_32TargetInfo {
2210 RTEMSX86_32TargetInfo(const std::string& triple)
2211 : X86_32TargetInfo(triple) {
2212 SizeType = UnsignedLong;
2213 IntPtrType = SignedLong;
2214 PtrDiffType = SignedLong;
2215 this->UserLabelPrefix = "";
2217 virtual void getTargetDefines(const LangOptions &Opts,
2218 MacroBuilder &Builder) const {
2219 X86_32TargetInfo::getTargetDefines(Opts, Builder);
2220 Builder.defineMacro("__INTEL__");
2221 Builder.defineMacro("__rtems__");
2224 } // end anonymous namespace
2227 // x86-64 generic target
2228 class X86_64TargetInfo : public X86TargetInfo {
2230 X86_64TargetInfo(const std::string &triple) : X86TargetInfo(triple) {
2231 LongWidth = LongAlign = PointerWidth = PointerAlign = 64;
2232 LongDoubleWidth = 128;
2233 LongDoubleAlign = 128;
2234 LargeArrayMinWidth = 128;
2235 LargeArrayAlign = 128;
2236 IntMaxType = SignedLong;
2237 UIntMaxType = UnsignedLong;
2238 Int64Type = SignedLong;
2241 DescriptionString = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
2242 "i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-"
2243 "a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128";
2245 // Use fpret only for long double.
2246 RealTypeUsesObjCFPRet = (1 << TargetInfo::LongDouble);
2248 // x86-64 has atomics up to 16 bytes.
2249 // FIXME: Once the backend is fixed, increase MaxAtomicInlineWidth to 128
2250 // on CPUs with cmpxchg16b
2251 MaxAtomicPromoteWidth = 128;
2252 MaxAtomicInlineWidth = 64;
2254 virtual const char *getVAListDeclaration() const {
2255 return "typedef struct __va_list_tag {"
2256 " unsigned gp_offset;"
2257 " unsigned fp_offset;"
2258 " void* overflow_arg_area;"
2259 " void* reg_save_area;"
2261 "typedef __va_list_tag __builtin_va_list[1];";
2264 int getEHDataRegisterNumber(unsigned RegNo) const {
2265 if (RegNo == 0) return 0;
2266 if (RegNo == 1) return 1;
2270 } // end anonymous namespace
2273 // x86-64 Windows target
2274 class WindowsX86_64TargetInfo : public WindowsTargetInfo<X86_64TargetInfo> {
2276 WindowsX86_64TargetInfo(const std::string& triple)
2277 : WindowsTargetInfo<X86_64TargetInfo>(triple) {
2278 TLSSupported = false;
2279 WCharType = UnsignedShort;
2280 LongWidth = LongAlign = 32;
2281 DoubleAlign = LongLongAlign = 64;
2282 IntMaxType = SignedLongLong;
2283 UIntMaxType = UnsignedLongLong;
2284 Int64Type = SignedLongLong;
2285 SizeType = UnsignedLongLong;
2286 PtrDiffType = SignedLongLong;
2287 IntPtrType = SignedLongLong;
2288 this->UserLabelPrefix = "";
2290 virtual void getTargetDefines(const LangOptions &Opts,
2291 MacroBuilder &Builder) const {
2292 WindowsTargetInfo<X86_64TargetInfo>::getTargetDefines(Opts, Builder);
2293 Builder.defineMacro("_WIN64");
2295 virtual const char *getVAListDeclaration() const {
2296 return "typedef char* __builtin_va_list;";
2299 } // end anonymous namespace
2302 // x86-64 Windows Visual Studio target
2303 class VisualStudioWindowsX86_64TargetInfo : public WindowsX86_64TargetInfo {
2305 VisualStudioWindowsX86_64TargetInfo(const std::string& triple)
2306 : WindowsX86_64TargetInfo(triple) {
2307 LongDoubleWidth = LongDoubleAlign = 64;
2308 LongDoubleFormat = &llvm::APFloat::IEEEdouble;
2310 virtual void getTargetDefines(const LangOptions &Opts,
2311 MacroBuilder &Builder) const {
2312 WindowsX86_64TargetInfo::getTargetDefines(Opts, Builder);
2313 WindowsX86_64TargetInfo::getVisualStudioDefines(Opts, Builder);
2314 Builder.defineMacro("_M_X64");
2315 Builder.defineMacro("_M_AMD64");
2318 } // end anonymous namespace
2321 // x86-64 MinGW target
2322 class MinGWX86_64TargetInfo : public WindowsX86_64TargetInfo {
2324 MinGWX86_64TargetInfo(const std::string& triple)
2325 : WindowsX86_64TargetInfo(triple) {
2327 virtual void getTargetDefines(const LangOptions &Opts,
2328 MacroBuilder &Builder) const {
2329 WindowsX86_64TargetInfo::getTargetDefines(Opts, Builder);
2330 DefineStd(Builder, "WIN64", Opts);
2331 Builder.defineMacro("__MSVCRT__");
2332 Builder.defineMacro("__MINGW32__");
2333 Builder.defineMacro("__MINGW64__");
2335 // mingw32-gcc provides __declspec(a) as alias of __attribute__((a)).
2336 // In contrast, clang-cc1 provides __declspec(a) with -fms-extensions.
2337 if (Opts.MicrosoftExt)
2338 // Provide "as-is" __declspec.
2339 Builder.defineMacro("__declspec", "__declspec");
2341 // Provide alias of __attribute__ like mingw32-gcc.
2342 Builder.defineMacro("__declspec(a)", "__attribute__((a))");
2345 } // end anonymous namespace
2348 class DarwinX86_64TargetInfo : public DarwinTargetInfo<X86_64TargetInfo> {
2350 DarwinX86_64TargetInfo(const std::string& triple)
2351 : DarwinTargetInfo<X86_64TargetInfo>(triple) {
2352 Int64Type = SignedLongLong;
2355 } // end anonymous namespace
2358 class OpenBSDX86_64TargetInfo : public OpenBSDTargetInfo<X86_64TargetInfo> {
2360 OpenBSDX86_64TargetInfo(const std::string& triple)
2361 : OpenBSDTargetInfo<X86_64TargetInfo>(triple) {
2362 IntMaxType = SignedLongLong;
2363 UIntMaxType = UnsignedLongLong;
2364 Int64Type = SignedLongLong;
2367 } // end anonymous namespace
2370 class ARMTargetInfo : public TargetInfo {
2371 // Possible FPU choices.
2379 static bool FPUModeIsVFP(FPUMode Mode) {
2380 return Mode >= VFP2FPU && Mode <= NeonFPU;
2383 static const TargetInfo::GCCRegAlias GCCRegAliases[];
2384 static const char * const GCCRegNames[];
2386 std::string ABI, CPU;
2390 unsigned IsThumb : 1;
2392 // Initialized via features.
2393 unsigned SoftFloat : 1;
2394 unsigned SoftFloatABI : 1;
2396 static const Builtin::Info BuiltinInfo[];
2399 ARMTargetInfo(const std::string &TripleStr)
2400 : TargetInfo(TripleStr), ABI("aapcs-linux"), CPU("arm1136j-s")
2402 SizeType = UnsignedInt;
2403 PtrDiffType = SignedInt;
2405 // {} in inline assembly are neon specifiers, not assembly variant
2407 NoAsmVariants = true;
2409 // FIXME: Should we just treat this as a feature?
2410 IsThumb = getTriple().getArchName().startswith("thumb");
2412 // Thumb1 add sp, #imm requires the immediate value be multiple of 4,
2413 // so set preferred for small types to 32.
2414 DescriptionString = ("e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-"
2415 "i64:64:64-f32:32:32-f64:64:64-"
2416 "v64:64:64-v128:64:128-a0:0:32-n32-S64");
2418 DescriptionString = ("e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
2419 "i64:64:64-f32:32:32-f64:64:64-"
2420 "v64:64:64-v128:64:128-a0:0:64-n32-S64");
2423 // ARM targets default to using the ARM C++ ABI.
2424 CXXABI = CXXABI_ARM;
2426 // ARM has atomics up to 8 bytes
2427 // FIXME: Set MaxAtomicInlineWidth if we have the feature v6e
2428 MaxAtomicPromoteWidth = 64;
2430 virtual const char *getABI() const { return ABI.c_str(); }
2431 virtual bool setABI(const std::string &Name) {
2434 // The defaults (above) are for AAPCS, check if we need to change them.
2436 // FIXME: We need support for -meabi... we could just mangle it into the
2438 if (Name == "apcs-gnu") {
2439 DoubleAlign = LongLongAlign = LongDoubleAlign = 32;
2440 SizeType = UnsignedLong;
2442 // Do not respect the alignment of bit-field types when laying out
2443 // structures. This corresponds to PCC_BITFIELD_TYPE_MATTERS in gcc.
2444 UseBitFieldTypeAlignment = false;
2446 /// Do force alignment of members that follow zero length bitfields. If
2447 /// the alignment of the zero-length bitfield is greater than the member
2448 /// that follows it, `bar', `bar' will be aligned as the type of the
2449 /// zero length bitfield.
2450 UseZeroLengthBitfieldAlignment = true;
2452 /// gcc forces the alignment to 4 bytes, regardless of the type of the
2453 /// zero length bitfield. This corresponds to EMPTY_FIELD_BOUNDARY in
2455 ZeroLengthBitfieldBoundary = 32;
2458 // Thumb1 add sp, #imm requires the immediate value be multiple of 4,
2459 // so set preferred for small types to 32.
2460 DescriptionString = ("e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-"
2461 "i64:32:64-f32:32:32-f64:32:64-"
2462 "v64:32:64-v128:32:128-a0:0:32-n32-S32");
2464 DescriptionString = ("e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
2465 "i64:32:64-f32:32:32-f64:32:64-"
2466 "v64:32:64-v128:32:128-a0:0:32-n32-S32");
2469 // FIXME: Override "preferred align" for double and long long.
2470 } else if (Name == "aapcs") {
2471 // FIXME: Enumerated types are variable width in straight AAPCS.
2472 } else if (Name == "aapcs-linux") {
2480 void getDefaultFeatures(llvm::StringMap<bool> &Features) const {
2481 if (CPU == "arm1136jf-s" || CPU == "arm1176jzf-s" || CPU == "mpcore")
2482 Features["vfp2"] = true;
2483 else if (CPU == "cortex-a8" || CPU == "cortex-a9")
2484 Features["neon"] = true;
2487 virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features,
2488 const std::string &Name,
2489 bool Enabled) const {
2490 if (Name == "soft-float" || Name == "soft-float-abi" ||
2491 Name == "vfp2" || Name == "vfp3" || Name == "neon") {
2492 Features[Name] = Enabled;
2499 virtual void HandleTargetFeatures(std::vector<std::string> &Features) {
2501 SoftFloat = SoftFloatABI = false;
2502 for (unsigned i = 0, e = Features.size(); i != e; ++i) {
2503 if (Features[i] == "+soft-float")
2505 else if (Features[i] == "+soft-float-abi")
2506 SoftFloatABI = true;
2507 else if (Features[i] == "+vfp2")
2509 else if (Features[i] == "+vfp3")
2511 else if (Features[i] == "+neon")
2515 // Remove front-end specific options which the backend handles differently.
2516 std::vector<std::string>::iterator it;
2517 it = std::find(Features.begin(), Features.end(), "+soft-float");
2518 if (it != Features.end())
2520 it = std::find(Features.begin(), Features.end(), "+soft-float-abi");
2521 if (it != Features.end())
2525 static const char *getCPUDefineSuffix(StringRef Name) {
2526 return llvm::StringSwitch<const char*>(Name)
2527 .Cases("arm8", "arm810", "4")
2528 .Cases("strongarm", "strongarm110", "strongarm1100", "strongarm1110", "4")
2529 .Cases("arm7tdmi", "arm7tdmi-s", "arm710t", "arm720t", "arm9", "4T")
2530 .Cases("arm9tdmi", "arm920", "arm920t", "arm922t", "arm940t", "4T")
2531 .Case("ep9312", "4T")
2532 .Cases("arm10tdmi", "arm1020t", "5T")
2533 .Cases("arm9e", "arm946e-s", "arm966e-s", "arm968e-s", "5TE")
2534 .Case("arm926ej-s", "5TEJ")
2535 .Cases("arm10e", "arm1020e", "arm1022e", "5TE")
2536 .Cases("xscale", "iwmmxt", "5TE")
2537 .Case("arm1136j-s", "6J")
2538 .Cases("arm1176jz-s", "arm1176jzf-s", "6ZK")
2539 .Cases("arm1136jf-s", "mpcorenovfp", "mpcore", "6K")
2540 .Cases("arm1156t2-s", "arm1156t2f-s", "6T2")
2541 .Cases("cortex-a8", "cortex-a9", "7A")
2542 .Case("cortex-m3", "7M")
2543 .Case("cortex-m0", "6M")
2546 virtual bool setCPU(const std::string &Name) {
2547 if (!getCPUDefineSuffix(Name))
2553 virtual void getTargetDefines(const LangOptions &Opts,
2554 MacroBuilder &Builder) const {
2555 // Target identification.
2556 Builder.defineMacro("__arm");
2557 Builder.defineMacro("__arm__");
2559 // Target properties.
2560 Builder.defineMacro("__ARMEL__");
2561 Builder.defineMacro("__LITTLE_ENDIAN__");
2562 Builder.defineMacro("__REGISTER_PREFIX__", "");
2564 StringRef CPUArch = getCPUDefineSuffix(CPU);
2565 Builder.defineMacro("__ARM_ARCH_" + CPUArch + "__");
2567 // Subtarget options.
2569 // FIXME: It's more complicated than this and we don't really support
2571 if ('5' <= CPUArch[0] && CPUArch[0] <= '7')
2572 Builder.defineMacro("__THUMB_INTERWORK__");
2574 if (ABI == "aapcs" || ABI == "aapcs-linux")
2575 Builder.defineMacro("__ARM_EABI__");
2578 Builder.defineMacro("__SOFTFP__");
2580 if (CPU == "xscale")
2581 Builder.defineMacro("__XSCALE__");
2583 bool IsARMv7 = CPUArch.startswith("7");
2585 Builder.defineMacro("__THUMBEL__");
2586 Builder.defineMacro("__thumb__");
2587 if (CPUArch == "6T2" || IsARMv7)
2588 Builder.defineMacro("__thumb2__");
2591 // Note, this is always on in gcc, even though it doesn't make sense.
2592 Builder.defineMacro("__APCS_32__");
2594 if (FPUModeIsVFP((FPUMode) FPU))
2595 Builder.defineMacro("__VFP_FP__");
2597 // This only gets set when Neon instructions are actually available, unlike
2598 // the VFP define, hence the soft float and arch check. This is subtly
2599 // different from gcc, we follow the intent which was that it should be set
2600 // when Neon instructions are actually available.
2601 if (FPU == NeonFPU && !SoftFloat && IsARMv7)
2602 Builder.defineMacro("__ARM_NEON__");
2604 virtual void getTargetBuiltins(const Builtin::Info *&Records,
2605 unsigned &NumRecords) const {
2606 Records = BuiltinInfo;
2607 NumRecords = clang::ARM::LastTSBuiltin-Builtin::FirstTSBuiltin;
2609 virtual const char *getVAListDeclaration() const {
2610 return "typedef void* __builtin_va_list;";
2612 virtual void getGCCRegNames(const char * const *&Names,
2613 unsigned &NumNames) const;
2614 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
2615 unsigned &NumAliases) const;
2616 virtual bool validateAsmConstraint(const char *&Name,
2617 TargetInfo::ConstraintInfo &Info) const {
2618 // FIXME: Check if this is complete
2623 case 'w': // VFP Floating point register single precision
2624 case 'P': // VFP Floating point register double precision
2625 Info.setAllowsRegister();
2627 case 'Q': // A memory address that is a single base register.
2628 Info.setAllowsMemory();
2630 case 'U': // a memory reference...
2632 case 'q': // ...ARMV4 ldrsb
2633 case 'v': // ...VFP load/store (reg+constant offset)
2634 case 'y': // ...iWMMXt load/store
2635 case 't': // address valid for load/store opaque types wider
2637 case 'n': // valid address for Neon doubleword vector load/store
2638 case 'm': // valid address for Neon element and structure load/store
2639 case 's': // valid address for non-offset loads/stores of quad-word
2640 // values in four ARM registers
2641 Info.setAllowsMemory();
2648 virtual std::string convertConstraint(const char *&Constraint) const {
2650 switch (*Constraint) {
2651 case 'U': // Two-character constraint; add "^" hint for later parsing.
2652 R = std::string("^") + std::string(Constraint, 2);
2655 case 'p': // 'p' should be translated to 'r' by default.
2656 R = std::string("r");
2659 return std::string(1, *Constraint);
2663 virtual const char *getClobbers() const {
2664 // FIXME: Is this really right?
2669 const char * const ARMTargetInfo::GCCRegNames[] = {
2670 // Integer registers
2671 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
2672 "r8", "r9", "r10", "r11", "r12", "sp", "lr", "pc",
2675 "s0", "s1", "s2", "s3", "s4", "s5", "s6", "s7",
2676 "s8", "s9", "s10", "s11", "s12", "s13", "s14", "s15",
2677 "s16", "s17", "s18", "s19", "s20", "s21", "s22", "s23",
2678 "s24", "s25", "s26", "s27", "s28", "s29", "s30", "s31",
2681 "d0", "d1", "d2", "d3", "d4", "d5", "d6", "d7",
2682 "d8", "d9", "d10", "d11", "d12", "d13", "d14", "d15",
2683 "d16", "d17", "d18", "d19", "d20", "d21", "d22", "d23",
2684 "d24", "d25", "d26", "d27", "d28", "d29", "d30", "d31",
2687 "q0", "q1", "q2", "q3", "q4", "q5", "q6", "q7",
2688 "q8", "q9", "q10", "q11", "q12", "q13", "q14", "q15"
2691 void ARMTargetInfo::getGCCRegNames(const char * const *&Names,
2692 unsigned &NumNames) const {
2693 Names = GCCRegNames;
2694 NumNames = llvm::array_lengthof(GCCRegNames);
2697 const TargetInfo::GCCRegAlias ARMTargetInfo::GCCRegAliases[] = {
2707 { { "v6", "rfp" }, "r9" },
2708 { { "sl" }, "r10" },
2709 { { "fp" }, "r11" },
2710 { { "ip" }, "r12" },
2711 { { "r13" }, "sp" },
2712 { { "r14" }, "lr" },
2713 { { "r15" }, "pc" },
2714 // The S, D and Q registers overlap, but aren't really aliases; we
2715 // don't want to substitute one of these for a different-sized one.
2718 void ARMTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases,
2719 unsigned &NumAliases) const {
2720 Aliases = GCCRegAliases;
2721 NumAliases = llvm::array_lengthof(GCCRegAliases);
2724 const Builtin::Info ARMTargetInfo::BuiltinInfo[] = {
2725 #define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES },
2726 #define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\
2728 #include "clang/Basic/BuiltinsARM.def"
2730 } // end anonymous namespace.
2734 class DarwinARMTargetInfo :
2735 public DarwinTargetInfo<ARMTargetInfo> {
2737 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
2738 MacroBuilder &Builder) const {
2739 getDarwinDefines(Builder, Opts, Triple, PlatformName, PlatformMinVersion);
2743 DarwinARMTargetInfo(const std::string& triple)
2744 : DarwinTargetInfo<ARMTargetInfo>(triple) {
2745 HasAlignMac68kSupport = true;
2746 // iOS always has 64-bit atomic instructions.
2747 // FIXME: This should be based off of the target features in ARMTargetInfo.
2748 MaxAtomicInlineWidth = 64;
2751 } // end anonymous namespace.
2754 class SparcV8TargetInfo : public TargetInfo {
2755 static const TargetInfo::GCCRegAlias GCCRegAliases[];
2756 static const char * const GCCRegNames[];
2759 SparcV8TargetInfo(const std::string& triple) : TargetInfo(triple) {
2760 // FIXME: Support Sparc quad-precision long double?
2761 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
2762 "i64:64:64-f32:32:32-f64:64:64-v64:64:64-n32";
2764 virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features,
2765 const std::string &Name,
2766 bool Enabled) const {
2767 if (Name == "soft-float")
2768 Features[Name] = Enabled;
2774 virtual void HandleTargetFeatures(std::vector<std::string> &Features) {
2776 for (unsigned i = 0, e = Features.size(); i != e; ++i)
2777 if (Features[i] == "+soft-float")
2780 virtual void getTargetDefines(const LangOptions &Opts,
2781 MacroBuilder &Builder) const {
2782 DefineStd(Builder, "sparc", Opts);
2783 Builder.defineMacro("__sparcv8");
2784 Builder.defineMacro("__REGISTER_PREFIX__", "");
2787 Builder.defineMacro("SOFT_FLOAT", "1");
2789 virtual void getTargetBuiltins(const Builtin::Info *&Records,
2790 unsigned &NumRecords) const {
2791 // FIXME: Implement!
2793 virtual const char *getVAListDeclaration() const {
2794 return "typedef void* __builtin_va_list;";
2796 virtual void getGCCRegNames(const char * const *&Names,
2797 unsigned &NumNames) const;
2798 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
2799 unsigned &NumAliases) const;
2800 virtual bool validateAsmConstraint(const char *&Name,
2801 TargetInfo::ConstraintInfo &info) const {
2802 // FIXME: Implement!
2805 virtual const char *getClobbers() const {
2806 // FIXME: Implement!
2811 const char * const SparcV8TargetInfo::GCCRegNames[] = {
2812 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
2813 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
2814 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
2815 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31"
2818 void SparcV8TargetInfo::getGCCRegNames(const char * const *&Names,
2819 unsigned &NumNames) const {
2820 Names = GCCRegNames;
2821 NumNames = llvm::array_lengthof(GCCRegNames);
2824 const TargetInfo::GCCRegAlias SparcV8TargetInfo::GCCRegAliases[] = {
2835 { { "o2" }, "r10" },
2836 { { "o3" }, "r11" },
2837 { { "o4" }, "r12" },
2838 { { "o5" }, "r13" },
2839 { { "o6", "sp" }, "r14" },
2840 { { "o7" }, "r15" },
2841 { { "l0" }, "r16" },
2842 { { "l1" }, "r17" },
2843 { { "l2" }, "r18" },
2844 { { "l3" }, "r19" },
2845 { { "l4" }, "r20" },
2846 { { "l5" }, "r21" },
2847 { { "l6" }, "r22" },
2848 { { "l7" }, "r23" },
2849 { { "i0" }, "r24" },
2850 { { "i1" }, "r25" },
2851 { { "i2" }, "r26" },
2852 { { "i3" }, "r27" },
2853 { { "i4" }, "r28" },
2854 { { "i5" }, "r29" },
2855 { { "i6", "fp" }, "r30" },
2856 { { "i7" }, "r31" },
2859 void SparcV8TargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases,
2860 unsigned &NumAliases) const {
2861 Aliases = GCCRegAliases;
2862 NumAliases = llvm::array_lengthof(GCCRegAliases);
2864 } // end anonymous namespace.
2867 class AuroraUXSparcV8TargetInfo : public AuroraUXTargetInfo<SparcV8TargetInfo> {
2869 AuroraUXSparcV8TargetInfo(const std::string& triple) :
2870 AuroraUXTargetInfo<SparcV8TargetInfo>(triple) {
2871 SizeType = UnsignedInt;
2872 PtrDiffType = SignedInt;
2875 class SolarisSparcV8TargetInfo : public SolarisTargetInfo<SparcV8TargetInfo> {
2877 SolarisSparcV8TargetInfo(const std::string& triple) :
2878 SolarisTargetInfo<SparcV8TargetInfo>(triple) {
2879 SizeType = UnsignedInt;
2880 PtrDiffType = SignedInt;
2883 } // end anonymous namespace.
2886 class MSP430TargetInfo : public TargetInfo {
2887 static const char * const GCCRegNames[];
2889 MSP430TargetInfo(const std::string& triple) : TargetInfo(triple) {
2890 TLSSupported = false;
2891 IntWidth = 16; IntAlign = 16;
2892 LongWidth = 32; LongLongWidth = 64;
2893 LongAlign = LongLongAlign = 16;
2894 PointerWidth = 16; PointerAlign = 16;
2895 SizeType = UnsignedInt;
2896 IntMaxType = SignedLong;
2897 UIntMaxType = UnsignedLong;
2898 IntPtrType = SignedShort;
2899 PtrDiffType = SignedInt;
2900 SigAtomicType = SignedLong;
2901 DescriptionString = "e-p:16:16:16-i8:8:8-i16:16:16-i32:16:32-n8:16";
2903 virtual void getTargetDefines(const LangOptions &Opts,
2904 MacroBuilder &Builder) const {
2905 Builder.defineMacro("MSP430");
2906 Builder.defineMacro("__MSP430__");
2907 // FIXME: defines for different 'flavours' of MCU
2909 virtual void getTargetBuiltins(const Builtin::Info *&Records,
2910 unsigned &NumRecords) const {
2911 // FIXME: Implement.
2915 virtual void getGCCRegNames(const char * const *&Names,
2916 unsigned &NumNames) const;
2917 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
2918 unsigned &NumAliases) const {
2923 virtual bool validateAsmConstraint(const char *&Name,
2924 TargetInfo::ConstraintInfo &info) const {
2925 // No target constraints for now.
2928 virtual const char *getClobbers() const {
2929 // FIXME: Is this really right?
2932 virtual const char *getVAListDeclaration() const {
2934 return "typedef char* __builtin_va_list;";
2938 const char * const MSP430TargetInfo::GCCRegNames[] = {
2939 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
2940 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
2943 void MSP430TargetInfo::getGCCRegNames(const char * const *&Names,
2944 unsigned &NumNames) const {
2945 Names = GCCRegNames;
2946 NumNames = llvm::array_lengthof(GCCRegNames);
2952 class SystemZTargetInfo : public TargetInfo {
2953 static const char * const GCCRegNames[];
2955 SystemZTargetInfo(const std::string& triple) : TargetInfo(triple) {
2956 TLSSupported = false;
2957 IntWidth = IntAlign = 32;
2958 LongWidth = LongLongWidth = LongAlign = LongLongAlign = 64;
2959 PointerWidth = PointerAlign = 64;
2960 DescriptionString = "E-p:64:64:64-i8:8:16-i16:16:16-i32:32:32-"
2961 "i64:64:64-f32:32:32-f64:64:64-f128:128:128-a0:16:16-n32:64";
2963 virtual void getTargetDefines(const LangOptions &Opts,
2964 MacroBuilder &Builder) const {
2965 Builder.defineMacro("__s390__");
2966 Builder.defineMacro("__s390x__");
2968 virtual void getTargetBuiltins(const Builtin::Info *&Records,
2969 unsigned &NumRecords) const {
2970 // FIXME: Implement.
2975 virtual void getGCCRegNames(const char * const *&Names,
2976 unsigned &NumNames) const;
2977 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
2978 unsigned &NumAliases) const {
2983 virtual bool validateAsmConstraint(const char *&Name,
2984 TargetInfo::ConstraintInfo &info) const {
2988 virtual const char *getClobbers() const {
2989 // FIXME: Is this really right?
2992 virtual const char *getVAListDeclaration() const {
2994 return "typedef char* __builtin_va_list;";
2998 const char * const SystemZTargetInfo::GCCRegNames[] = {
2999 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
3000 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
3003 void SystemZTargetInfo::getGCCRegNames(const char * const *&Names,
3004 unsigned &NumNames) const {
3005 Names = GCCRegNames;
3006 NumNames = llvm::array_lengthof(GCCRegNames);
3011 class BlackfinTargetInfo : public TargetInfo {
3012 static const char * const GCCRegNames[];
3014 BlackfinTargetInfo(const std::string& triple) : TargetInfo(triple) {
3015 TLSSupported = false;
3018 LongDoubleAlign = 32;
3019 DescriptionString = "e-p:32:32-i64:32-f64:32-n32";
3022 virtual void getTargetDefines(const LangOptions &Opts,
3023 MacroBuilder &Builder) const {
3024 DefineStd(Builder, "bfin", Opts);
3025 DefineStd(Builder, "BFIN", Opts);
3026 Builder.defineMacro("__ADSPBLACKFIN__");
3027 // FIXME: This one is really dependent on -mcpu
3028 Builder.defineMacro("__ADSPLPBLACKFIN__");
3029 // FIXME: Add cpu-dependent defines and __SILICON_REVISION__
3032 virtual void getTargetBuiltins(const Builtin::Info *&Records,
3033 unsigned &NumRecords) const {
3034 // FIXME: Implement.
3039 virtual void getGCCRegNames(const char * const *&Names,
3040 unsigned &NumNames) const;
3042 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
3043 unsigned &NumAliases) const {
3049 virtual bool validateAsmConstraint(const char *&Name,
3050 TargetInfo::ConstraintInfo &Info) const {
3051 if (strchr("adzDWeABbvfcCtukxywZY", Name[0])) {
3052 Info.setAllowsRegister();
3058 virtual const char *getClobbers() const {
3062 virtual const char *getVAListDeclaration() const {
3063 return "typedef char* __builtin_va_list;";
3067 const char * const BlackfinTargetInfo::GCCRegNames[] = {
3068 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
3069 "p0", "p1", "p2", "p3", "p4", "p5", "sp", "fp",
3070 "i0", "i1", "i2", "i3", "b0", "b1", "b2", "b3",
3071 "l0", "l1", "l2", "l3", "m0", "m1", "m2", "m3",
3073 "rets", "reti", "retx", "retn", "rete", "astat", "seqstat", "usp",
3074 "argp", "lt0", "lt1", "lc0", "lc1", "lb0", "lb1"
3077 void BlackfinTargetInfo::getGCCRegNames(const char * const *&Names,
3078 unsigned &NumNames) const {
3079 Names = GCCRegNames;
3080 NumNames = llvm::array_lengthof(GCCRegNames);
3086 // LLVM and Clang cannot be used directly to output native binaries for
3087 // target, but is used to compile C code to llvm bitcode with correct
3088 // type and alignment information.
3090 // TCE uses the llvm bitcode as input and uses it for generating customized
3091 // target processor and program binary. TCE co-design environment is
3092 // publicly available in http://tce.cs.tut.fi
3094 static const unsigned TCEOpenCLAddrSpaceMap[] = {
3097 5 // opencl_constant
3100 class TCETargetInfo : public TargetInfo{
3102 TCETargetInfo(const std::string& triple) : TargetInfo(triple) {
3103 TLSSupported = false;
3105 LongWidth = LongLongWidth = 32;
3108 LongAlign = LongLongAlign = 32;
3110 SizeType = UnsignedInt;
3111 IntMaxType = SignedLong;
3112 UIntMaxType = UnsignedLong;
3113 IntPtrType = SignedInt;
3114 PtrDiffType = SignedInt;
3119 LongDoubleWidth = 32;
3120 LongDoubleAlign = 32;
3121 FloatFormat = &llvm::APFloat::IEEEsingle;
3122 DoubleFormat = &llvm::APFloat::IEEEsingle;
3123 LongDoubleFormat = &llvm::APFloat::IEEEsingle;
3124 DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:32-"
3125 "i16:16:32-i32:32:32-i64:32:32-"
3126 "f32:32:32-f64:32:32-v64:32:32-"
3127 "v128:32:32-a0:0:32-n32";
3128 AddrSpaceMap = &TCEOpenCLAddrSpaceMap;
3131 virtual void getTargetDefines(const LangOptions &Opts,
3132 MacroBuilder &Builder) const {
3133 DefineStd(Builder, "tce", Opts);
3134 Builder.defineMacro("__TCE__");
3135 Builder.defineMacro("__TCE_V1__");
3137 virtual void getTargetBuiltins(const Builtin::Info *&Records,
3138 unsigned &NumRecords) const {}
3139 virtual const char *getClobbers() const {
3142 virtual const char *getVAListDeclaration() const {
3143 return "typedef void* __builtin_va_list;";
3145 virtual void getGCCRegNames(const char * const *&Names,
3146 unsigned &NumNames) const {}
3147 virtual bool validateAsmConstraint(const char *&Name,
3148 TargetInfo::ConstraintInfo &info) const {
3151 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
3152 unsigned &NumAliases) const {}
3157 class MipsTargetInfoBase : public TargetInfo {
3162 MipsTargetInfoBase(const std::string& triple, const std::string& ABIStr)
3163 : TargetInfo(triple), ABI(ABIStr) {
3164 SizeType = UnsignedInt;
3165 PtrDiffType = SignedInt;
3167 virtual const char *getABI() const { return ABI.c_str(); }
3168 virtual bool setABI(const std::string &Name) = 0;
3169 virtual bool setCPU(const std::string &Name) {
3173 void getDefaultFeatures(llvm::StringMap<bool> &Features) const {
3174 Features[ABI] = true;
3175 Features[CPU] = true;
3177 virtual void getArchDefines(const LangOptions &Opts,
3178 MacroBuilder &Builder) const = 0;
3179 virtual void getTargetDefines(const LangOptions &Opts,
3180 MacroBuilder &Builder) const = 0;
3181 virtual void getTargetBuiltins(const Builtin::Info *&Records,
3182 unsigned &NumRecords) const {
3183 // FIXME: Implement!
3185 virtual const char *getVAListDeclaration() const {
3186 return "typedef void* __builtin_va_list;";
3188 virtual void getGCCRegNames(const char * const *&Names,
3189 unsigned &NumNames) const {
3190 static const char * const GCCRegNames[] = {
3191 "$0", "$1", "$2", "$3", "$4", "$5", "$6", "$7",
3192 "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15",
3193 "$16", "$17", "$18", "$19", "$20", "$21", "$22", "$23",
3194 "$24", "$25", "$26", "$27", "$28", "$sp", "$fp", "$31",
3195 "$f0", "$f1", "$f2", "$f3", "$f4", "$f5", "$f6", "$f7",
3196 "$f8", "$f9", "$f10", "$f11", "$f12", "$f13", "$f14", "$f15",
3197 "$f16", "$f17", "$f18", "$f19", "$f20", "$f21", "$f22", "$f23",
3198 "$f24", "$f25", "$f26", "$f27", "$f28", "$f29", "$f30", "$f31",
3199 "hi", "lo", "", "$fcc0","$fcc1","$fcc2","$fcc3","$fcc4",
3200 "$fcc5","$fcc6","$fcc7"
3202 Names = GCCRegNames;
3203 NumNames = llvm::array_lengthof(GCCRegNames);
3205 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
3206 unsigned &NumAliases) const = 0;
3207 virtual bool validateAsmConstraint(const char *&Name,
3208 TargetInfo::ConstraintInfo &Info) const {
3211 case 'r': // CPU registers.
3212 case 'd': // Equivalent to "r" unless generating MIPS16 code.
3213 case 'y': // Equivalent to "r", backwards compatibility only.
3214 case 'f': // floating-point registers.
3215 Info.setAllowsRegister();
3221 virtual const char *getClobbers() const {
3222 // FIXME: Implement!
3227 class Mips32TargetInfoBase : public MipsTargetInfoBase {
3229 Mips32TargetInfoBase(const std::string& triple) :
3230 MipsTargetInfoBase(triple, "o32") {}
3231 virtual bool setABI(const std::string &Name) {
3232 if ((Name == "o32") || (Name == "eabi")) {
3238 virtual void getArchDefines(const LangOptions &Opts,
3239 MacroBuilder &Builder) const {
3241 Builder.defineMacro("__mips_o32");
3242 Builder.defineMacro("_ABIO32", "1");
3243 Builder.defineMacro("_MIPS_SIM", "_ABIO32");
3245 else if (ABI == "eabi")
3246 Builder.defineMacro("__mips_eabi");
3248 llvm_unreachable("Invalid ABI for Mips32.");
3250 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
3251 unsigned &NumAliases) const {
3252 static const TargetInfo::GCCRegAlias GCCRegAliases[] = {
3262 { { "t2" }, "$10" },
3263 { { "t3" }, "$11" },
3264 { { "t4" }, "$12" },
3265 { { "t5" }, "$13" },
3266 { { "t6" }, "$14" },
3267 { { "t7" }, "$15" },
3268 { { "s0" }, "$16" },
3269 { { "s1" }, "$17" },
3270 { { "s2" }, "$18" },
3271 { { "s3" }, "$19" },
3272 { { "s4" }, "$20" },
3273 { { "s5" }, "$21" },
3274 { { "s6" }, "$22" },
3275 { { "s7" }, "$23" },
3276 { { "t8" }, "$24" },
3277 { { "t9" }, "$25" },
3278 { { "k0" }, "$26" },
3279 { { "k1" }, "$27" },
3280 { { "gp" }, "$28" },
3281 { { "sp" }, "$29" },
3282 { { "fp" }, "$30" },
3285 Aliases = GCCRegAliases;
3286 NumAliases = llvm::array_lengthof(GCCRegAliases);
3290 class Mips32EBTargetInfo : public Mips32TargetInfoBase {
3292 Mips32EBTargetInfo(const std::string& triple) : Mips32TargetInfoBase(triple) {
3293 DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-"
3294 "i64:64:64-f32:32:32-f64:64:64-v64:64:64-n32";
3296 virtual void getTargetDefines(const LangOptions &Opts,
3297 MacroBuilder &Builder) const {
3298 DefineStd(Builder, "mips", Opts);
3299 Builder.defineMacro("_mips");
3300 DefineStd(Builder, "MIPSEB", Opts);
3301 Builder.defineMacro("_MIPSEB");
3302 Builder.defineMacro("__REGISTER_PREFIX__", "");
3303 getArchDefines(Opts, Builder);
3307 class Mips32ELTargetInfo : public Mips32TargetInfoBase {
3309 Mips32ELTargetInfo(const std::string& triple) : Mips32TargetInfoBase(triple) {
3310 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-"
3311 "i64:64:64-f32:32:32-f64:64:64-v64:64:64-n32";
3313 virtual void getTargetDefines(const LangOptions &Opts,
3314 MacroBuilder &Builder) const {
3315 DefineStd(Builder, "mips", Opts);
3316 Builder.defineMacro("_mips");
3317 DefineStd(Builder, "MIPSEL", Opts);
3318 Builder.defineMacro("_MIPSEL");
3319 Builder.defineMacro("__REGISTER_PREFIX__", "");
3320 getArchDefines(Opts, Builder);
3324 class Mips64TargetInfoBase : public MipsTargetInfoBase {
3325 virtual void SetDescriptionString(const std::string &Name) = 0;
3327 Mips64TargetInfoBase(const std::string& triple) :
3328 MipsTargetInfoBase(triple, "n64") {}
3329 virtual bool setABI(const std::string &Name) {
3330 SetDescriptionString(Name);
3331 if ((Name == "n32") || (Name == "n64")) {
3337 virtual void getArchDefines(const LangOptions &Opts,
3338 MacroBuilder &Builder) const {
3340 Builder.defineMacro("__mips_n32");
3341 Builder.defineMacro("_ABIN32", "2");
3342 Builder.defineMacro("_MIPS_SIM", "_ABIN32");
3344 else if (ABI == "n64") {
3345 Builder.defineMacro("__mips_n64");
3346 Builder.defineMacro("_ABI64", "3");
3347 Builder.defineMacro("_MIPS_SIM", "_ABI64");
3350 llvm_unreachable("Invalid ABI for Mips64.");
3352 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
3353 unsigned &NumAliases) const {
3354 static const TargetInfo::GCCRegAlias GCCRegAliases[] = {
3364 { { "a6" }, "$10" },
3365 { { "a7" }, "$11" },
3366 { { "t0" }, "$12" },
3367 { { "t1" }, "$13" },
3368 { { "t2" }, "$14" },
3369 { { "t3" }, "$15" },
3370 { { "s0" }, "$16" },
3371 { { "s1" }, "$17" },
3372 { { "s2" }, "$18" },
3373 { { "s3" }, "$19" },
3374 { { "s4" }, "$20" },
3375 { { "s5" }, "$21" },
3376 { { "s6" }, "$22" },
3377 { { "s7" }, "$23" },
3378 { { "t8" }, "$24" },
3379 { { "t9" }, "$25" },
3380 { { "k0" }, "$26" },
3381 { { "k1" }, "$27" },
3382 { { "gp" }, "$28" },
3383 { { "sp" }, "$29" },
3384 { { "fp" }, "$30" },
3387 Aliases = GCCRegAliases;
3388 NumAliases = llvm::array_lengthof(GCCRegAliases);
3392 class Mips64EBTargetInfo : public Mips64TargetInfoBase {
3393 virtual void SetDescriptionString(const std::string &Name) {
3394 // Change DescriptionString only if ABI is n32.
3396 DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-"
3397 "i64:64:64-f32:32:32-f64:64:64-v64:64:64-n32";
3400 Mips64EBTargetInfo(const std::string& triple) : Mips64TargetInfoBase(triple) {
3401 // Default ABI is n64.
3402 DescriptionString = "E-p:64:64:64-i1:8:8-i8:8:32-i16:16:32-i32:32:32-"
3403 "i64:64:64-f32:32:32-f64:64:64-v64:64:64-n32";
3405 virtual void getTargetDefines(const LangOptions &Opts,
3406 MacroBuilder &Builder) const {
3407 DefineStd(Builder, "mips", Opts);
3408 Builder.defineMacro("_mips");
3409 DefineStd(Builder, "MIPSEB", Opts);
3410 Builder.defineMacro("_MIPSEB");
3411 Builder.defineMacro("__REGISTER_PREFIX__", "");
3412 getArchDefines(Opts, Builder);
3416 class Mips64ELTargetInfo : public Mips64TargetInfoBase {
3417 virtual void SetDescriptionString(const std::string &Name) {
3418 // Change DescriptionString only if ABI is n32.
3420 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-"
3421 "i64:64:64-f32:32:32-f64:64:64-v64:64:64-n32";
3424 Mips64ELTargetInfo(const std::string& triple) : Mips64TargetInfoBase(triple) {
3425 // Default ABI is n64.
3426 DescriptionString = "e-p:64:64:64-i1:8:8-i8:8:32-i16:16:32-i32:32:32-"
3427 "i64:64:64-f32:32:32-f64:64:64-v64:64:64-n32";
3429 virtual void getTargetDefines(const LangOptions &Opts,
3430 MacroBuilder &Builder) const {
3431 DefineStd(Builder, "mips", Opts);
3432 Builder.defineMacro("_mips");
3433 DefineStd(Builder, "MIPSEL", Opts);
3434 Builder.defineMacro("_MIPSEL");
3435 Builder.defineMacro("__REGISTER_PREFIX__", "");
3436 getArchDefines(Opts, Builder);
3439 } // end anonymous namespace.
3442 class PNaClTargetInfo : public TargetInfo {
3444 PNaClTargetInfo(const std::string& triple) : TargetInfo(triple) {
3445 this->UserLabelPrefix = "";
3446 this->LongAlign = 32;
3447 this->LongWidth = 32;
3448 this->PointerAlign = 32;
3449 this->PointerWidth = 32;
3450 this->IntMaxType = TargetInfo::SignedLongLong;
3451 this->UIntMaxType = TargetInfo::UnsignedLongLong;
3452 this->Int64Type = TargetInfo::SignedLongLong;
3453 this->DoubleAlign = 64;
3454 this->LongDoubleWidth = 64;
3455 this->LongDoubleAlign = 64;
3456 this->SizeType = TargetInfo::UnsignedInt;
3457 this->PtrDiffType = TargetInfo::SignedInt;
3458 this->IntPtrType = TargetInfo::SignedInt;
3459 this->RegParmMax = 2;
3460 DescriptionString = "e-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-"
3461 "f32:32:32-f64:64:64-p:32:32:32-v128:32:32";
3464 void getDefaultFeatures(llvm::StringMap<bool> &Features) const {
3466 virtual void getArchDefines(const LangOptions &Opts,
3467 MacroBuilder &Builder) const {
3468 Builder.defineMacro("__le32__");
3469 Builder.defineMacro("__pnacl__");
3471 virtual void getTargetDefines(const LangOptions &Opts,
3472 MacroBuilder &Builder) const {
3473 DefineStd(Builder, "unix", Opts);
3474 Builder.defineMacro("__ELF__");
3475 if (Opts.POSIXThreads)
3476 Builder.defineMacro("_REENTRANT");
3478 Builder.defineMacro("_GNU_SOURCE");
3480 Builder.defineMacro("__native_client__");
3481 getArchDefines(Opts, Builder);
3483 virtual void getTargetBuiltins(const Builtin::Info *&Records,
3484 unsigned &NumRecords) const {
3486 virtual const char *getVAListDeclaration() const {
3487 return "typedef int __builtin_va_list[4];";
3489 virtual void getGCCRegNames(const char * const *&Names,
3490 unsigned &NumNames) const;
3491 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
3492 unsigned &NumAliases) const;
3493 virtual bool validateAsmConstraint(const char *&Name,
3494 TargetInfo::ConstraintInfo &Info) const {
3498 virtual const char *getClobbers() const {
3503 void PNaClTargetInfo::getGCCRegNames(const char * const *&Names,
3504 unsigned &NumNames) const {
3509 void PNaClTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases,
3510 unsigned &NumAliases) const {
3514 } // end anonymous namespace.
3517 //===----------------------------------------------------------------------===//
3519 //===----------------------------------------------------------------------===//
3521 static TargetInfo *AllocateTarget(const std::string &T) {
3522 llvm::Triple Triple(T);
3523 llvm::Triple::OSType os = Triple.getOS();
3525 switch (Triple.getArch()) {
3529 case llvm::Triple::arm:
3530 case llvm::Triple::thumb:
3531 if (Triple.isOSDarwin())
3532 return new DarwinARMTargetInfo(T);
3535 case llvm::Triple::Linux:
3536 return new LinuxTargetInfo<ARMTargetInfo>(T);
3537 case llvm::Triple::FreeBSD:
3538 return new FreeBSDTargetInfo<ARMTargetInfo>(T);
3539 case llvm::Triple::NetBSD:
3540 return new NetBSDTargetInfo<ARMTargetInfo>(T);
3541 case llvm::Triple::RTEMS:
3542 return new RTEMSTargetInfo<ARMTargetInfo>(T);
3544 return new ARMTargetInfo(T);
3547 case llvm::Triple::bfin:
3548 if ( os == llvm::Triple::RTEMS )
3549 return new RTEMSTargetInfo<BlackfinTargetInfo>(T);
3550 return new BlackfinTargetInfo(T);
3552 case llvm::Triple::msp430:
3553 return new MSP430TargetInfo(T);
3555 case llvm::Triple::mips:
3557 case llvm::Triple::Linux:
3558 return new LinuxTargetInfo<Mips32EBTargetInfo>(T);
3559 case llvm::Triple::RTEMS:
3560 return new RTEMSTargetInfo<Mips32EBTargetInfo>(T);
3561 case llvm::Triple::FreeBSD:
3562 return new FreeBSDTargetInfo<Mips32EBTargetInfo>(T);
3563 case llvm::Triple::NetBSD:
3564 return new NetBSDTargetInfo<Mips32EBTargetInfo>(T);
3566 return new Mips32EBTargetInfo(T);
3569 case llvm::Triple::mipsel:
3571 case llvm::Triple::Linux:
3572 return new LinuxTargetInfo<Mips32ELTargetInfo>(T);
3573 case llvm::Triple::RTEMS:
3574 return new RTEMSTargetInfo<Mips32ELTargetInfo>(T);
3575 case llvm::Triple::FreeBSD:
3576 return new FreeBSDTargetInfo<Mips32ELTargetInfo>(T);
3577 case llvm::Triple::NetBSD:
3578 return new NetBSDTargetInfo<Mips32ELTargetInfo>(T);
3580 return new Mips32ELTargetInfo(T);
3583 case llvm::Triple::mips64:
3585 case llvm::Triple::Linux:
3586 return new LinuxTargetInfo<Mips64EBTargetInfo>(T);
3587 case llvm::Triple::RTEMS:
3588 return new RTEMSTargetInfo<Mips64EBTargetInfo>(T);
3589 case llvm::Triple::FreeBSD:
3590 return new FreeBSDTargetInfo<Mips64EBTargetInfo>(T);
3591 case llvm::Triple::NetBSD:
3592 return new NetBSDTargetInfo<Mips64EBTargetInfo>(T);
3594 return new Mips64EBTargetInfo(T);
3597 case llvm::Triple::mips64el:
3599 case llvm::Triple::Linux:
3600 return new LinuxTargetInfo<Mips64ELTargetInfo>(T);
3601 case llvm::Triple::RTEMS:
3602 return new RTEMSTargetInfo<Mips64ELTargetInfo>(T);
3603 case llvm::Triple::FreeBSD:
3604 return new FreeBSDTargetInfo<Mips64ELTargetInfo>(T);
3605 case llvm::Triple::NetBSD:
3606 return new NetBSDTargetInfo<Mips64ELTargetInfo>(T);
3608 return new Mips64ELTargetInfo(T);
3611 case llvm::Triple::le32:
3613 case llvm::Triple::NativeClient:
3614 return new PNaClTargetInfo(T);
3619 case llvm::Triple::ppc:
3620 if (Triple.isOSDarwin())
3621 return new DarwinPPC32TargetInfo(T);
3623 case llvm::Triple::Linux:
3624 return new LinuxTargetInfo<PPC32TargetInfo>(T);
3625 case llvm::Triple::FreeBSD:
3626 return new FreeBSDTargetInfo<PPC32TargetInfo>(T);
3627 case llvm::Triple::NetBSD:
3628 return new NetBSDTargetInfo<PPC32TargetInfo>(T);
3629 case llvm::Triple::RTEMS:
3630 return new RTEMSTargetInfo<PPC32TargetInfo>(T);
3632 return new PPC32TargetInfo(T);
3635 case llvm::Triple::ppc64:
3636 if (Triple.isOSDarwin())
3637 return new DarwinPPC64TargetInfo(T);
3639 case llvm::Triple::Linux:
3640 return new LinuxTargetInfo<PPC64TargetInfo>(T);
3641 case llvm::Triple::Lv2:
3642 return new PS3PPUTargetInfo<PPC64TargetInfo>(T);
3643 case llvm::Triple::FreeBSD:
3644 return new FreeBSDTargetInfo<PPC64TargetInfo>(T);
3645 case llvm::Triple::NetBSD:
3646 return new NetBSDTargetInfo<PPC64TargetInfo>(T);
3648 return new PPC64TargetInfo(T);
3651 case llvm::Triple::ptx32:
3652 return new PTX32TargetInfo(T);
3653 case llvm::Triple::ptx64:
3654 return new PTX64TargetInfo(T);
3656 case llvm::Triple::mblaze:
3657 return new MBlazeTargetInfo(T);
3659 case llvm::Triple::sparc:
3661 case llvm::Triple::Linux:
3662 return new LinuxTargetInfo<SparcV8TargetInfo>(T);
3663 case llvm::Triple::AuroraUX:
3664 return new AuroraUXSparcV8TargetInfo(T);
3665 case llvm::Triple::Solaris:
3666 return new SolarisSparcV8TargetInfo(T);
3667 case llvm::Triple::NetBSD:
3668 return new NetBSDTargetInfo<SparcV8TargetInfo>(T);
3669 case llvm::Triple::RTEMS:
3670 return new RTEMSTargetInfo<SparcV8TargetInfo>(T);
3672 return new SparcV8TargetInfo(T);
3675 // FIXME: Need a real SPU target.
3676 case llvm::Triple::cellspu:
3677 return new PS3SPUTargetInfo<PPC64TargetInfo>(T);
3679 case llvm::Triple::systemz:
3680 return new SystemZTargetInfo(T);
3682 case llvm::Triple::tce:
3683 return new TCETargetInfo(T);
3685 case llvm::Triple::x86:
3686 if (Triple.isOSDarwin())
3687 return new DarwinI386TargetInfo(T);
3690 case llvm::Triple::AuroraUX:
3691 return new AuroraUXTargetInfo<X86_32TargetInfo>(T);
3692 case llvm::Triple::Linux:
3693 return new LinuxTargetInfo<X86_32TargetInfo>(T);
3694 case llvm::Triple::DragonFly:
3695 return new DragonFlyBSDTargetInfo<X86_32TargetInfo>(T);
3696 case llvm::Triple::NetBSD:
3697 return new NetBSDTargetInfo<X86_32TargetInfo>(T);
3698 case llvm::Triple::OpenBSD:
3699 return new OpenBSDI386TargetInfo(T);
3700 case llvm::Triple::FreeBSD:
3701 return new FreeBSDTargetInfo<X86_32TargetInfo>(T);
3702 case llvm::Triple::Minix:
3703 return new MinixTargetInfo<X86_32TargetInfo>(T);
3704 case llvm::Triple::Solaris:
3705 return new SolarisTargetInfo<X86_32TargetInfo>(T);
3706 case llvm::Triple::Cygwin:
3707 return new CygwinX86_32TargetInfo(T);
3708 case llvm::Triple::MinGW32:
3709 return new MinGWX86_32TargetInfo(T);
3710 case llvm::Triple::Win32:
3711 return new VisualStudioWindowsX86_32TargetInfo(T);
3712 case llvm::Triple::Haiku:
3713 return new HaikuX86_32TargetInfo(T);
3714 case llvm::Triple::RTEMS:
3715 return new RTEMSX86_32TargetInfo(T);
3717 return new X86_32TargetInfo(T);
3720 case llvm::Triple::x86_64:
3721 if (Triple.isOSDarwin() || Triple.getEnvironment() == llvm::Triple::MachO)
3722 return new DarwinX86_64TargetInfo(T);
3725 case llvm::Triple::AuroraUX:
3726 return new AuroraUXTargetInfo<X86_64TargetInfo>(T);
3727 case llvm::Triple::Linux:
3728 return new LinuxTargetInfo<X86_64TargetInfo>(T);
3729 case llvm::Triple::DragonFly:
3730 return new DragonFlyBSDTargetInfo<X86_64TargetInfo>(T);
3731 case llvm::Triple::NetBSD:
3732 return new NetBSDTargetInfo<X86_64TargetInfo>(T);
3733 case llvm::Triple::OpenBSD:
3734 return new OpenBSDX86_64TargetInfo(T);
3735 case llvm::Triple::FreeBSD:
3736 return new FreeBSDTargetInfo<X86_64TargetInfo>(T);
3737 case llvm::Triple::Solaris:
3738 return new SolarisTargetInfo<X86_64TargetInfo>(T);
3739 case llvm::Triple::MinGW32:
3740 return new MinGWX86_64TargetInfo(T);
3741 case llvm::Triple::Win32: // This is what Triple.h supports now.
3742 return new VisualStudioWindowsX86_64TargetInfo(T);
3744 return new X86_64TargetInfo(T);
3749 /// CreateTargetInfo - Return the target info object for the specified target
3751 TargetInfo *TargetInfo::CreateTargetInfo(DiagnosticsEngine &Diags,
3752 TargetOptions &Opts) {
3753 llvm::Triple Triple(Opts.Triple);
3755 // Construct the target
3756 llvm::OwningPtr<TargetInfo> Target(AllocateTarget(Triple.str()));
3758 Diags.Report(diag::err_target_unknown_triple) << Triple.str();
3762 // Set the target CPU if specified.
3763 if (!Opts.CPU.empty() && !Target->setCPU(Opts.CPU)) {
3764 Diags.Report(diag::err_target_unknown_cpu) << Opts.CPU;
3768 // Set the target ABI if specified.
3769 if (!Opts.ABI.empty() && !Target->setABI(Opts.ABI)) {
3770 Diags.Report(diag::err_target_unknown_abi) << Opts.ABI;
3774 // Set the target C++ ABI.
3775 if (!Opts.CXXABI.empty() && !Target->setCXXABI(Opts.CXXABI)) {
3776 Diags.Report(diag::err_target_unknown_cxxabi) << Opts.CXXABI;
3780 // Compute the default target features, we need the target to handle this
3781 // because features may have dependencies on one another.
3782 llvm::StringMap<bool> Features;
3783 Target->getDefaultFeatures(Features);
3785 // Apply the user specified deltas.
3786 // First the enables.
3787 for (std::vector<std::string>::const_iterator it = Opts.Features.begin(),
3788 ie = Opts.Features.end(); it != ie; ++it) {
3789 const char *Name = it->c_str();
3794 // Apply the feature via the target.
3795 if (!Target->setFeatureEnabled(Features, Name + 1, true)) {
3796 Diags.Report(diag::err_target_invalid_feature) << Name;
3801 // Then the disables.
3802 for (std::vector<std::string>::const_iterator it = Opts.Features.begin(),
3803 ie = Opts.Features.end(); it != ie; ++it) {
3804 const char *Name = it->c_str();
3809 // Apply the feature via the target.
3810 if (Name[0] != '-' ||
3811 !Target->setFeatureEnabled(Features, Name + 1, false)) {
3812 Diags.Report(diag::err_target_invalid_feature) << Name;
3817 // Add the features to the compile options.
3819 // FIXME: If we are completely confident that we have the right set, we only
3820 // need to pass the minuses.
3821 Opts.Features.clear();
3822 for (llvm::StringMap<bool>::const_iterator it = Features.begin(),
3823 ie = Features.end(); it != ie; ++it)
3824 Opts.Features.push_back(std::string(it->second ? "+" : "-") +
3826 Target->HandleTargetFeatures(Opts.Features);
3828 return Target.take();