1 //===--- Targets.cpp - Implement -arch option and targets -----------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file implements construction of a TargetInfo object from a
13 //===----------------------------------------------------------------------===//
15 #include "clang/Basic/TargetInfo.h"
16 #include "clang/Basic/Builtins.h"
17 #include "clang/Basic/Diagnostic.h"
18 #include "clang/Basic/LangOptions.h"
19 #include "clang/Basic/MacroBuilder.h"
20 #include "clang/Basic/TargetBuiltins.h"
21 #include "clang/Basic/TargetOptions.h"
22 #include "llvm/ADT/APFloat.h"
23 #include "llvm/ADT/OwningPtr.h"
24 #include "llvm/ADT/STLExtras.h"
25 #include "llvm/ADT/StringRef.h"
26 #include "llvm/ADT/StringSwitch.h"
27 #include "llvm/ADT/Triple.h"
28 #include "llvm/MC/MCSectionMachO.h"
29 #include "llvm/Support/ErrorHandling.h"
30 #include "llvm/Type.h"
32 using namespace clang;
34 //===----------------------------------------------------------------------===//
35 // Common code shared among targets.
36 //===----------------------------------------------------------------------===//
38 /// DefineStd - Define a macro name and standard variants. For example if
39 /// MacroName is "unix", then this will define "__unix", "__unix__", and "unix"
41 static void DefineStd(MacroBuilder &Builder, StringRef MacroName,
42 const LangOptions &Opts) {
43 assert(MacroName[0] != '_' && "Identifier should be in the user's namespace");
45 // If in GNU mode (e.g. -std=gnu99 but not -std=c99) define the raw identifier
46 // in the user's namespace.
48 Builder.defineMacro(MacroName);
51 Builder.defineMacro("__" + MacroName);
54 Builder.defineMacro("__" + MacroName + "__");
57 static void defineCPUMacros(MacroBuilder &Builder, StringRef CPUName,
59 Builder.defineMacro("__" + CPUName);
60 Builder.defineMacro("__" + CPUName + "__");
62 Builder.defineMacro("__tune_" + CPUName + "__");
65 //===----------------------------------------------------------------------===//
66 // Defines specific to certain operating systems.
67 //===----------------------------------------------------------------------===//
70 template<typename TgtInfo>
71 class OSTargetInfo : public TgtInfo {
73 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
74 MacroBuilder &Builder) const=0;
76 OSTargetInfo(const std::string& triple) : TgtInfo(triple) {}
77 virtual void getTargetDefines(const LangOptions &Opts,
78 MacroBuilder &Builder) const {
79 TgtInfo::getTargetDefines(Opts, Builder);
80 getOSDefines(Opts, TgtInfo::getTriple(), Builder);
84 } // end anonymous namespace
87 static void getDarwinDefines(MacroBuilder &Builder, const LangOptions &Opts,
88 const llvm::Triple &Triple,
89 StringRef &PlatformName,
90 VersionTuple &PlatformMinVersion) {
91 Builder.defineMacro("__APPLE_CC__", "5621");
92 Builder.defineMacro("__APPLE__");
93 Builder.defineMacro("__MACH__");
94 Builder.defineMacro("OBJC_NEW_PROPERTIES");
95 // AddressSanitizer doesn't play well with source fortification, which is on
96 // by default on Darwin.
97 if (Opts.SanitizeAddress) Builder.defineMacro("_FORTIFY_SOURCE", "0");
99 if (!Opts.ObjCAutoRefCount) {
100 // __weak is always defined, for use in blocks and with objc pointers.
101 Builder.defineMacro("__weak", "__attribute__((objc_gc(weak)))");
103 // Darwin defines __strong even in C mode (just to nothing).
104 if (Opts.getGC() != LangOptions::NonGC)
105 Builder.defineMacro("__strong", "__attribute__((objc_gc(strong)))");
107 Builder.defineMacro("__strong", "");
109 // __unsafe_unretained is defined to nothing in non-ARC mode. We even
110 // allow this in C, since one might have block pointers in structs that
111 // are used in pure C code and in Objective-C ARC.
112 Builder.defineMacro("__unsafe_unretained", "");
116 Builder.defineMacro("__STATIC__");
118 Builder.defineMacro("__DYNAMIC__");
120 if (Opts.POSIXThreads)
121 Builder.defineMacro("_REENTRANT");
123 // Get the platform type and version number from the triple.
124 unsigned Maj, Min, Rev;
125 if (Triple.isMacOSX()) {
126 Triple.getMacOSXVersion(Maj, Min, Rev);
127 PlatformName = "macosx";
129 Triple.getOSVersion(Maj, Min, Rev);
130 PlatformName = llvm::Triple::getOSTypeName(Triple.getOS());
133 // If -target arch-pc-win32-macho option specified, we're
134 // generating code for Win32 ABI. No need to emit
135 // __ENVIRONMENT_XX_OS_VERSION_MIN_REQUIRED__.
136 if (PlatformName == "win32") {
137 PlatformMinVersion = VersionTuple(Maj, Min, Rev);
141 // Set the appropriate OS version define.
142 if (Triple.getOS() == llvm::Triple::IOS) {
143 assert(Maj < 10 && Min < 100 && Rev < 100 && "Invalid version!");
146 Str[1] = '0' + (Min / 10);
147 Str[2] = '0' + (Min % 10);
148 Str[3] = '0' + (Rev / 10);
149 Str[4] = '0' + (Rev % 10);
151 Builder.defineMacro("__ENVIRONMENT_IPHONE_OS_VERSION_MIN_REQUIRED__", Str);
153 // Note that the Driver allows versions which aren't representable in the
154 // define (because we only get a single digit for the minor and micro
155 // revision numbers). So, we limit them to the maximum representable
157 assert(Triple.getEnvironmentName().empty() && "Invalid environment!");
158 assert(Maj < 100 && Min < 100 && Rev < 100 && "Invalid version!");
160 Str[0] = '0' + (Maj / 10);
161 Str[1] = '0' + (Maj % 10);
162 Str[2] = '0' + std::min(Min, 9U);
163 Str[3] = '0' + std::min(Rev, 9U);
165 Builder.defineMacro("__ENVIRONMENT_MAC_OS_X_VERSION_MIN_REQUIRED__", Str);
168 PlatformMinVersion = VersionTuple(Maj, Min, Rev);
172 template<typename Target>
173 class DarwinTargetInfo : public OSTargetInfo<Target> {
175 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
176 MacroBuilder &Builder) const {
177 getDarwinDefines(Builder, Opts, Triple, this->PlatformName,
178 this->PlatformMinVersion);
182 DarwinTargetInfo(const std::string& triple) :
183 OSTargetInfo<Target>(triple) {
184 llvm::Triple T = llvm::Triple(triple);
185 this->TLSSupported = T.isMacOSX() && !T.isMacOSXVersionLT(10,7);
186 this->MCountName = "\01mcount";
189 virtual std::string isValidSectionSpecifier(StringRef SR) const {
190 // Let MCSectionMachO validate this.
191 StringRef Segment, Section;
192 unsigned TAA, StubSize;
194 return llvm::MCSectionMachO::ParseSectionSpecifier(SR, Segment, Section,
195 TAA, HasTAA, StubSize);
198 virtual const char *getStaticInitSectionSpecifier() const {
199 // FIXME: We should return 0 when building kexts.
200 return "__TEXT,__StaticInit,regular,pure_instructions";
203 /// Darwin does not support protected visibility. Darwin's "default"
204 /// is very similar to ELF's "protected"; Darwin requires a "weak"
205 /// attribute on declarations that can be dynamically replaced.
206 virtual bool hasProtectedVisibility() const {
212 // DragonFlyBSD Target
213 template<typename Target>
214 class DragonFlyBSDTargetInfo : public OSTargetInfo<Target> {
216 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
217 MacroBuilder &Builder) const {
218 // DragonFly defines; list based off of gcc output
219 Builder.defineMacro("__DragonFly__");
220 Builder.defineMacro("__DragonFly_cc_version", "100001");
221 Builder.defineMacro("__ELF__");
222 Builder.defineMacro("__KPRINTF_ATTRIBUTE__");
223 Builder.defineMacro("__tune_i386__");
224 DefineStd(Builder, "unix", Opts);
227 DragonFlyBSDTargetInfo(const std::string &triple)
228 : OSTargetInfo<Target>(triple) {
229 this->UserLabelPrefix = "";
231 llvm::Triple Triple(triple);
232 switch (Triple.getArch()) {
234 case llvm::Triple::x86:
235 case llvm::Triple::x86_64:
236 this->MCountName = ".mcount";
243 template<typename Target>
244 class FreeBSDTargetInfo : public OSTargetInfo<Target> {
246 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
247 MacroBuilder &Builder) const {
248 // FreeBSD defines; list based off of gcc output
250 unsigned Release = Triple.getOSMajorVersion();
254 Builder.defineMacro("__FreeBSD__", llvm::Twine(Release));
255 Builder.defineMacro("__FreeBSD_cc_version",
256 llvm::Twine(Release * 100000U + 1U));
257 Builder.defineMacro("__KPRINTF_ATTRIBUTE__");
258 DefineStd(Builder, "unix", Opts);
259 Builder.defineMacro("__ELF__");
262 FreeBSDTargetInfo(const std::string &triple)
263 : OSTargetInfo<Target>(triple) {
264 this->UserLabelPrefix = "";
266 llvm::Triple Triple(triple);
267 switch (Triple.getArch()) {
269 case llvm::Triple::x86:
270 case llvm::Triple::x86_64:
271 this->MCountName = ".mcount";
273 case llvm::Triple::mips:
274 case llvm::Triple::mipsel:
275 case llvm::Triple::ppc:
276 case llvm::Triple::ppc64:
277 this->MCountName = "_mcount";
279 case llvm::Triple::arm:
280 this->MCountName = "__mcount";
288 template<typename Target>
289 class MinixTargetInfo : public OSTargetInfo<Target> {
291 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
292 MacroBuilder &Builder) const {
295 Builder.defineMacro("__minix", "3");
296 Builder.defineMacro("_EM_WSIZE", "4");
297 Builder.defineMacro("_EM_PSIZE", "4");
298 Builder.defineMacro("_EM_SSIZE", "2");
299 Builder.defineMacro("_EM_LSIZE", "4");
300 Builder.defineMacro("_EM_FSIZE", "4");
301 Builder.defineMacro("_EM_DSIZE", "8");
302 Builder.defineMacro("__ELF__");
303 DefineStd(Builder, "unix", Opts);
306 MinixTargetInfo(const std::string &triple)
307 : OSTargetInfo<Target>(triple) {
308 this->UserLabelPrefix = "";
313 template<typename Target>
314 class LinuxTargetInfo : public OSTargetInfo<Target> {
316 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
317 MacroBuilder &Builder) const {
318 // Linux defines; list based off of gcc output
319 DefineStd(Builder, "unix", Opts);
320 DefineStd(Builder, "linux", Opts);
321 Builder.defineMacro("__gnu_linux__");
322 Builder.defineMacro("__ELF__");
323 if (Triple.getEnvironment() == llvm::Triple::Android)
324 Builder.defineMacro("__ANDROID__", "1");
325 if (Opts.POSIXThreads)
326 Builder.defineMacro("_REENTRANT");
328 Builder.defineMacro("_GNU_SOURCE");
331 LinuxTargetInfo(const std::string& triple)
332 : OSTargetInfo<Target>(triple) {
333 this->UserLabelPrefix = "";
334 this->WIntType = TargetInfo::UnsignedInt;
337 virtual const char *getStaticInitSectionSpecifier() const {
338 return ".text.startup";
343 template<typename Target>
344 class NetBSDTargetInfo : public OSTargetInfo<Target> {
346 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
347 MacroBuilder &Builder) const {
348 // NetBSD defines; list based off of gcc output
349 Builder.defineMacro("__NetBSD__");
350 Builder.defineMacro("__unix__");
351 Builder.defineMacro("__ELF__");
352 if (Opts.POSIXThreads)
353 Builder.defineMacro("_POSIX_THREADS");
356 NetBSDTargetInfo(const std::string &triple)
357 : OSTargetInfo<Target>(triple) {
358 this->UserLabelPrefix = "";
363 template<typename Target>
364 class OpenBSDTargetInfo : public OSTargetInfo<Target> {
366 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
367 MacroBuilder &Builder) const {
368 // OpenBSD defines; list based off of gcc output
370 Builder.defineMacro("__OpenBSD__");
371 DefineStd(Builder, "unix", Opts);
372 Builder.defineMacro("__ELF__");
373 if (Opts.POSIXThreads)
374 Builder.defineMacro("_REENTRANT");
377 OpenBSDTargetInfo(const std::string &triple)
378 : OSTargetInfo<Target>(triple) {
379 this->UserLabelPrefix = "";
380 this->TLSSupported = false;
382 llvm::Triple Triple(triple);
383 switch (Triple.getArch()) {
385 case llvm::Triple::x86:
386 case llvm::Triple::x86_64:
387 case llvm::Triple::arm:
388 case llvm::Triple::sparc:
389 this->MCountName = "__mcount";
391 case llvm::Triple::mips64:
392 case llvm::Triple::mips64el:
393 case llvm::Triple::ppc:
394 case llvm::Triple::sparcv9:
395 this->MCountName = "_mcount";
402 template<typename Target>
403 class BitrigTargetInfo : public OSTargetInfo<Target> {
405 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
406 MacroBuilder &Builder) const {
407 // Bitrig defines; list based off of gcc output
409 Builder.defineMacro("__Bitrig__");
410 DefineStd(Builder, "unix", Opts);
411 Builder.defineMacro("__ELF__");
412 if (Opts.POSIXThreads)
413 Builder.defineMacro("_REENTRANT");
416 BitrigTargetInfo(const std::string &triple)
417 : OSTargetInfo<Target>(triple) {
418 this->UserLabelPrefix = "";
419 this->TLSSupported = false;
420 this->MCountName = "__mcount";
425 template<typename Target>
426 class PSPTargetInfo : public OSTargetInfo<Target> {
428 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
429 MacroBuilder &Builder) const {
430 // PSP defines; list based on the output of the pspdev gcc toolchain.
431 Builder.defineMacro("PSP");
432 Builder.defineMacro("_PSP");
433 Builder.defineMacro("__psp__");
434 Builder.defineMacro("__ELF__");
437 PSPTargetInfo(const std::string& triple)
438 : OSTargetInfo<Target>(triple) {
439 this->UserLabelPrefix = "";
444 template<typename Target>
445 class PS3PPUTargetInfo : public OSTargetInfo<Target> {
447 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
448 MacroBuilder &Builder) const {
450 Builder.defineMacro("__PPC__");
451 Builder.defineMacro("__PPU__");
452 Builder.defineMacro("__CELLOS_LV2__");
453 Builder.defineMacro("__ELF__");
454 Builder.defineMacro("__LP32__");
455 Builder.defineMacro("_ARCH_PPC64");
456 Builder.defineMacro("__powerpc64__");
459 PS3PPUTargetInfo(const std::string& triple)
460 : OSTargetInfo<Target>(triple) {
461 this->UserLabelPrefix = "";
462 this->LongWidth = this->LongAlign = 32;
463 this->PointerWidth = this->PointerAlign = 32;
464 this->IntMaxType = TargetInfo::SignedLongLong;
465 this->UIntMaxType = TargetInfo::UnsignedLongLong;
466 this->Int64Type = TargetInfo::SignedLongLong;
467 this->SizeType = TargetInfo::UnsignedInt;
468 this->DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
469 "i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32";
473 // FIXME: Need a real SPU target.
475 template<typename Target>
476 class PS3SPUTargetInfo : public OSTargetInfo<Target> {
478 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
479 MacroBuilder &Builder) const {
481 Builder.defineMacro("__SPU__");
482 Builder.defineMacro("__ELF__");
485 PS3SPUTargetInfo(const std::string& triple)
486 : OSTargetInfo<Target>(triple) {
487 this->UserLabelPrefix = "";
492 template<typename Target>
493 class AuroraUXTargetInfo : public OSTargetInfo<Target> {
495 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
496 MacroBuilder &Builder) const {
497 DefineStd(Builder, "sun", Opts);
498 DefineStd(Builder, "unix", Opts);
499 Builder.defineMacro("__ELF__");
500 Builder.defineMacro("__svr4__");
501 Builder.defineMacro("__SVR4");
504 AuroraUXTargetInfo(const std::string& triple)
505 : OSTargetInfo<Target>(triple) {
506 this->UserLabelPrefix = "";
507 this->WCharType = this->SignedLong;
508 // FIXME: WIntType should be SignedLong
513 template<typename Target>
514 class SolarisTargetInfo : public OSTargetInfo<Target> {
516 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
517 MacroBuilder &Builder) const {
518 DefineStd(Builder, "sun", Opts);
519 DefineStd(Builder, "unix", Opts);
520 Builder.defineMacro("__ELF__");
521 Builder.defineMacro("__svr4__");
522 Builder.defineMacro("__SVR4");
523 // Solaris headers require _XOPEN_SOURCE to be set to 600 for C99 and
524 // newer, but to 500 for everything else. feature_test.h has a check to
525 // ensure that you are not using C99 with an old version of X/Open or C89
526 // with a new version.
527 if (Opts.C99 || Opts.C11)
528 Builder.defineMacro("_XOPEN_SOURCE", "600");
530 Builder.defineMacro("_XOPEN_SOURCE", "500");
532 Builder.defineMacro("__C99FEATURES__");
533 Builder.defineMacro("_LARGEFILE_SOURCE");
534 Builder.defineMacro("_LARGEFILE64_SOURCE");
535 Builder.defineMacro("__EXTENSIONS__");
536 Builder.defineMacro("_REENTRANT");
539 SolarisTargetInfo(const std::string& triple)
540 : OSTargetInfo<Target>(triple) {
541 this->UserLabelPrefix = "";
542 this->WCharType = this->SignedInt;
543 // FIXME: WIntType should be SignedLong
548 template<typename Target>
549 class WindowsTargetInfo : public OSTargetInfo<Target> {
551 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
552 MacroBuilder &Builder) const {
553 Builder.defineMacro("_WIN32");
555 void getVisualStudioDefines(const LangOptions &Opts,
556 MacroBuilder &Builder) const {
557 if (Opts.CPlusPlus) {
559 Builder.defineMacro("_CPPRTTI");
562 Builder.defineMacro("_CPPUNWIND");
565 if (!Opts.CharIsSigned)
566 Builder.defineMacro("_CHAR_UNSIGNED");
568 // FIXME: POSIXThreads isn't exactly the option this should be defined for,
569 // but it works for now.
570 if (Opts.POSIXThreads)
571 Builder.defineMacro("_MT");
573 if (Opts.MSCVersion != 0)
574 Builder.defineMacro("_MSC_VER", Twine(Opts.MSCVersion));
576 if (Opts.MicrosoftExt) {
577 Builder.defineMacro("_MSC_EXTENSIONS");
579 if (Opts.CPlusPlus0x) {
580 Builder.defineMacro("_RVALUE_REFERENCES_V2_SUPPORTED");
581 Builder.defineMacro("_RVALUE_REFERENCES_SUPPORTED");
582 Builder.defineMacro("_NATIVE_NULLPTR_SUPPORTED");
586 Builder.defineMacro("_INTEGRAL_MAX_BITS", "64");
590 WindowsTargetInfo(const std::string &triple)
591 : OSTargetInfo<Target>(triple) {}
594 template <typename Target>
595 class NaClTargetInfo : public OSTargetInfo<Target> {
597 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
598 MacroBuilder &Builder) const {
599 if (Opts.POSIXThreads)
600 Builder.defineMacro("_REENTRANT");
602 Builder.defineMacro("_GNU_SOURCE");
604 DefineStd(Builder, "unix", Opts);
605 Builder.defineMacro("__ELF__");
606 Builder.defineMacro("__native_client__");
609 NaClTargetInfo(const std::string &triple)
610 : OSTargetInfo<Target>(triple) {
611 this->UserLabelPrefix = "";
612 this->LongAlign = 32;
613 this->LongWidth = 32;
614 this->PointerAlign = 32;
615 this->PointerWidth = 32;
616 this->IntMaxType = TargetInfo::SignedLongLong;
617 this->UIntMaxType = TargetInfo::UnsignedLongLong;
618 this->Int64Type = TargetInfo::SignedLongLong;
619 this->DoubleAlign = 64;
620 this->LongDoubleWidth = 64;
621 this->LongDoubleAlign = 64;
622 this->SizeType = TargetInfo::UnsignedInt;
623 this->PtrDiffType = TargetInfo::SignedInt;
624 this->IntPtrType = TargetInfo::SignedInt;
625 this->RegParmMax = 2;
626 this->LongDoubleFormat = &llvm::APFloat::IEEEdouble;
627 this->DescriptionString = "e-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-"
628 "f32:32:32-f64:64:64-p:32:32:32-v128:32:32";
630 virtual typename Target::CallingConvCheckResult checkCallingConvention(
631 CallingConv CC) const {
632 return CC == CC_PnaclCall ? Target::CCCR_OK :
633 Target::checkCallingConvention(CC);
636 } // end anonymous namespace.
638 //===----------------------------------------------------------------------===//
639 // Specific target implementations.
640 //===----------------------------------------------------------------------===//
643 // PPC abstract base class
644 class PPCTargetInfo : public TargetInfo {
645 static const Builtin::Info BuiltinInfo[];
646 static const char * const GCCRegNames[];
647 static const TargetInfo::GCCRegAlias GCCRegAliases[];
650 PPCTargetInfo(const std::string& triple) : TargetInfo(triple) {
651 LongDoubleWidth = LongDoubleAlign = 128;
652 LongDoubleFormat = &llvm::APFloat::PPCDoubleDouble;
655 /// \brief Flags for architecture specific defines.
658 ArchDefineName = 1 << 0, // <name> is substituted for arch name.
659 ArchDefinePpcgr = 1 << 1,
660 ArchDefinePpcsq = 1 << 2,
661 ArchDefine440 = 1 << 3,
662 ArchDefine603 = 1 << 4,
663 ArchDefine604 = 1 << 5,
664 ArchDefinePwr4 = 1 << 6,
665 ArchDefinePwr6 = 1 << 7
668 virtual bool setCPU(const std::string &Name) {
669 bool CPUKnown = llvm::StringSwitch<bool>(Name)
670 .Case("generic", true)
690 .Case("e500mc", true)
704 virtual void getTargetBuiltins(const Builtin::Info *&Records,
705 unsigned &NumRecords) const {
706 Records = BuiltinInfo;
707 NumRecords = clang::PPC::LastTSBuiltin-Builtin::FirstTSBuiltin;
710 virtual bool isCLZForZeroUndef() const { return false; }
712 virtual void getTargetDefines(const LangOptions &Opts,
713 MacroBuilder &Builder) const;
715 virtual bool hasFeature(StringRef Feature) const;
717 virtual void getGCCRegNames(const char * const *&Names,
718 unsigned &NumNames) const;
719 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
720 unsigned &NumAliases) const;
721 virtual bool validateAsmConstraint(const char *&Name,
722 TargetInfo::ConstraintInfo &Info) const {
724 default: return false;
727 case 'b': // Base register
728 case 'f': // Floating point register
729 Info.setAllowsRegister();
731 // FIXME: The following are added to allow parsing.
732 // I just took a guess at what the actions should be.
733 // Also, is more specific checking needed? I.e. specific registers?
734 case 'd': // Floating point register (containing 64-bit value)
735 case 'v': // Altivec vector register
736 Info.setAllowsRegister();
740 case 'd':// VSX vector register to hold vector double data
741 case 'f':// VSX vector register to hold vector float data
742 case 's':// VSX vector register to hold scalar float data
743 case 'a':// Any VSX register
748 Info.setAllowsRegister();
749 Name++; // Skip over 'w'.
751 case 'h': // `MQ', `CTR', or `LINK' register
752 case 'q': // `MQ' register
753 case 'c': // `CTR' register
754 case 'l': // `LINK' register
755 case 'x': // `CR' register (condition register) number 0
756 case 'y': // `CR' register (condition register)
757 case 'z': // `XER[CA]' carry bit (part of the XER register)
758 Info.setAllowsRegister();
760 case 'I': // Signed 16-bit constant
761 case 'J': // Unsigned 16-bit constant shifted left 16 bits
762 // (use `L' instead for SImode constants)
763 case 'K': // Unsigned 16-bit constant
764 case 'L': // Signed 16-bit constant shifted left 16 bits
765 case 'M': // Constant larger than 31
766 case 'N': // Exact power of 2
767 case 'P': // Constant whose negation is a signed 16-bit constant
768 case 'G': // Floating point constant that can be loaded into a
769 // register with one instruction per word
770 case 'H': // Integer/Floating point constant that can be loaded
771 // into a register using three instructions
773 case 'm': // Memory operand. Note that on PowerPC targets, m can
774 // include addresses that update the base register. It
775 // is therefore only safe to use `m' in an asm statement
776 // if that asm statement accesses the operand exactly once.
777 // The asm statement must also use `%U<opno>' as a
778 // placeholder for the "update" flag in the corresponding
779 // load or store instruction. For example:
780 // asm ("st%U0 %1,%0" : "=m" (mem) : "r" (val));
782 // asm ("st %1,%0" : "=m" (mem) : "r" (val));
783 // is not. Use es rather than m if you don't want the base
784 // register to be updated.
788 // es: A "stable" memory operand; that is, one which does not
789 // include any automodification of the base register. Unlike
790 // `m', this constraint can be used in asm statements that
791 // might access the operand several times, or that might not
793 Info.setAllowsMemory();
794 Name++; // Skip over 'e'.
796 case 'Q': // Memory operand that is an offset from a register (it is
797 // usually better to use `m' or `es' in asm statements)
798 case 'Z': // Memory operand that is an indexed or indirect from a
799 // register (it is usually better to use `m' or `es' in
801 Info.setAllowsMemory();
802 Info.setAllowsRegister();
804 case 'R': // AIX TOC entry
805 case 'a': // Address operand that is an indexed or indirect from a
806 // register (`p' is preferable for asm statements)
807 case 'S': // Constant suitable as a 64-bit mask operand
808 case 'T': // Constant suitable as a 32-bit mask operand
809 case 'U': // System V Release 4 small data area reference
810 case 't': // AND masks that can be performed by two rldic{l, r}
812 case 'W': // Vector constant that does not require memory
813 case 'j': // Vector constant that is all zeros.
819 virtual const char *getClobbers() const {
824 const Builtin::Info PPCTargetInfo::BuiltinInfo[] = {
825 #define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES },
826 #define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\
828 #include "clang/Basic/BuiltinsPPC.def"
832 /// PPCTargetInfo::getTargetDefines - Return a set of the PowerPC-specific
833 /// #defines that are not tied to a specific subtarget.
834 void PPCTargetInfo::getTargetDefines(const LangOptions &Opts,
835 MacroBuilder &Builder) const {
836 // Target identification.
837 Builder.defineMacro("__ppc__");
838 Builder.defineMacro("_ARCH_PPC");
839 Builder.defineMacro("__powerpc__");
840 Builder.defineMacro("__POWERPC__");
841 if (PointerWidth == 64) {
842 Builder.defineMacro("_ARCH_PPC64");
843 Builder.defineMacro("__powerpc64__");
844 Builder.defineMacro("__ppc64__");
846 Builder.defineMacro("__ppc__");
849 // Target properties.
850 if (getTriple().getOS() != llvm::Triple::NetBSD &&
851 getTriple().getOS() != llvm::Triple::OpenBSD)
852 Builder.defineMacro("_BIG_ENDIAN");
853 Builder.defineMacro("__BIG_ENDIAN__");
855 // Subtarget options.
856 Builder.defineMacro("__NATURAL_ALIGNMENT__");
857 Builder.defineMacro("__REGISTER_PREFIX__", "");
859 // FIXME: Should be controlled by command line option.
860 Builder.defineMacro("__LONG_DOUBLE_128__");
863 Builder.defineMacro("__VEC__", "10206");
864 Builder.defineMacro("__ALTIVEC__");
867 // CPU identification.
868 ArchDefineTypes defs = (ArchDefineTypes)llvm::StringSwitch<int>(CPU)
869 .Case("440", ArchDefineName)
870 .Case("450", ArchDefineName | ArchDefine440)
871 .Case("601", ArchDefineName)
872 .Case("602", ArchDefineName | ArchDefinePpcgr)
873 .Case("603", ArchDefineName | ArchDefinePpcgr)
874 .Case("603e", ArchDefineName | ArchDefine603 | ArchDefinePpcgr)
875 .Case("603ev", ArchDefineName | ArchDefine603 | ArchDefinePpcgr)
876 .Case("604", ArchDefineName | ArchDefinePpcgr)
877 .Case("604e", ArchDefineName | ArchDefine604 | ArchDefinePpcgr)
878 .Case("620", ArchDefineName | ArchDefinePpcgr)
879 .Case("7400", ArchDefineName | ArchDefinePpcgr)
880 .Case("7450", ArchDefineName | ArchDefinePpcgr)
881 .Case("750", ArchDefineName | ArchDefinePpcgr)
882 .Case("970", ArchDefineName | ArchDefinePwr4 | ArchDefinePpcgr
884 .Case("pwr6", ArchDefinePwr6 | ArchDefinePpcgr | ArchDefinePpcsq)
885 .Case("pwr7", ArchDefineName | ArchDefinePwr6 | ArchDefinePpcgr
887 .Default(ArchDefineNone);
889 if (defs & ArchDefineName)
890 Builder.defineMacro(Twine("_ARCH_", StringRef(CPU).upper()));
891 if (defs & ArchDefinePpcgr)
892 Builder.defineMacro("_ARCH_PPCGR");
893 if (defs & ArchDefinePpcsq)
894 Builder.defineMacro("_ARCH_PPCSQ");
895 if (defs & ArchDefine440)
896 Builder.defineMacro("_ARCH_440");
897 if (defs & ArchDefine603)
898 Builder.defineMacro("_ARCH_603");
899 if (defs & ArchDefine604)
900 Builder.defineMacro("_ARCH_604");
901 if (defs & (ArchDefinePwr4 | ArchDefinePwr6))
902 Builder.defineMacro("_ARCH_PWR4");
903 if (defs & ArchDefinePwr6) {
904 Builder.defineMacro("_ARCH_PWR5");
905 Builder.defineMacro("_ARCH_PWR6");
909 bool PPCTargetInfo::hasFeature(StringRef Feature) const {
910 return Feature == "powerpc";
914 const char * const PPCTargetInfo::GCCRegNames[] = {
915 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
916 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
917 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
918 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
919 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
920 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
921 "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
922 "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",
923 "mq", "lr", "ctr", "ap",
924 "cr0", "cr1", "cr2", "cr3", "cr4", "cr5", "cr6", "cr7",
926 "v0", "v1", "v2", "v3", "v4", "v5", "v6", "v7",
927 "v8", "v9", "v10", "v11", "v12", "v13", "v14", "v15",
928 "v16", "v17", "v18", "v19", "v20", "v21", "v22", "v23",
929 "v24", "v25", "v26", "v27", "v28", "v29", "v30", "v31",
931 "spe_acc", "spefscr",
935 void PPCTargetInfo::getGCCRegNames(const char * const *&Names,
936 unsigned &NumNames) const {
938 NumNames = llvm::array_lengthof(GCCRegNames);
941 const TargetInfo::GCCRegAlias PPCTargetInfo::GCCRegAliases[] = {
942 // While some of these aliases do map to different registers
943 // they still share the same register name.
986 { { "fr10" }, "f10" },
987 { { "fr11" }, "f11" },
988 { { "fr12" }, "f12" },
989 { { "fr13" }, "f13" },
990 { { "fr14" }, "f14" },
991 { { "fr15" }, "f15" },
992 { { "fr16" }, "f16" },
993 { { "fr17" }, "f17" },
994 { { "fr18" }, "f18" },
995 { { "fr19" }, "f19" },
996 { { "fr20" }, "f20" },
997 { { "fr21" }, "f21" },
998 { { "fr22" }, "f22" },
999 { { "fr23" }, "f23" },
1000 { { "fr24" }, "f24" },
1001 { { "fr25" }, "f25" },
1002 { { "fr26" }, "f26" },
1003 { { "fr27" }, "f27" },
1004 { { "fr28" }, "f28" },
1005 { { "fr29" }, "f29" },
1006 { { "fr30" }, "f30" },
1007 { { "fr31" }, "f31" },
1008 { { "cc" }, "cr0" },
1011 void PPCTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases,
1012 unsigned &NumAliases) const {
1013 Aliases = GCCRegAliases;
1014 NumAliases = llvm::array_lengthof(GCCRegAliases);
1016 } // end anonymous namespace.
1019 class PPC32TargetInfo : public PPCTargetInfo {
1021 PPC32TargetInfo(const std::string &triple) : PPCTargetInfo(triple) {
1022 DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
1023 "i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32";
1025 switch (getTriple().getOS()) {
1026 case llvm::Triple::Linux:
1027 case llvm::Triple::FreeBSD:
1028 case llvm::Triple::NetBSD:
1029 SizeType = UnsignedInt;
1030 PtrDiffType = SignedInt;
1031 IntPtrType = SignedInt;
1037 if (getTriple().getOS() == llvm::Triple::FreeBSD) {
1038 LongDoubleWidth = LongDoubleAlign = 64;
1039 LongDoubleFormat = &llvm::APFloat::IEEEdouble;
1042 // PPC32 supports atomics up to 4 bytes.
1043 MaxAtomicPromoteWidth = MaxAtomicInlineWidth = 32;
1046 virtual BuiltinVaListKind getBuiltinVaListKind() const {
1047 // This is the ELF definition, and is overridden by the Darwin sub-target
1048 return TargetInfo::PowerABIBuiltinVaList;
1051 } // end anonymous namespace.
1054 class PPC64TargetInfo : public PPCTargetInfo {
1056 PPC64TargetInfo(const std::string& triple) : PPCTargetInfo(triple) {
1057 LongWidth = LongAlign = PointerWidth = PointerAlign = 64;
1058 IntMaxType = SignedLong;
1059 UIntMaxType = UnsignedLong;
1060 Int64Type = SignedLong;
1062 if (getTriple().getOS() == llvm::Triple::FreeBSD) {
1063 LongDoubleWidth = LongDoubleAlign = 64;
1064 LongDoubleFormat = &llvm::APFloat::IEEEdouble;
1065 DescriptionString = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
1066 "i64:64:64-f32:32:32-f64:64:64-f128:64:64-"
1067 "v128:128:128-n32:64";
1069 DescriptionString = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
1070 "i64:64:64-f32:32:32-f64:64:64-f128:128:128-"
1071 "v128:128:128-n32:64";
1073 // PPC64 supports atomics up to 8 bytes.
1074 MaxAtomicPromoteWidth = MaxAtomicInlineWidth = 64;
1076 virtual BuiltinVaListKind getBuiltinVaListKind() const {
1077 return TargetInfo::CharPtrBuiltinVaList;
1080 } // end anonymous namespace.
1084 class DarwinPPC32TargetInfo :
1085 public DarwinTargetInfo<PPC32TargetInfo> {
1087 DarwinPPC32TargetInfo(const std::string& triple)
1088 : DarwinTargetInfo<PPC32TargetInfo>(triple) {
1089 HasAlignMac68kSupport = true;
1090 BoolWidth = BoolAlign = 32; //XXX support -mone-byte-bool?
1092 SuitableAlign = 128;
1093 DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
1094 "i64:32:64-f32:32:32-f64:64:64-v128:128:128-n32";
1096 virtual BuiltinVaListKind getBuiltinVaListKind() const {
1097 return TargetInfo::CharPtrBuiltinVaList;
1101 class DarwinPPC64TargetInfo :
1102 public DarwinTargetInfo<PPC64TargetInfo> {
1104 DarwinPPC64TargetInfo(const std::string& triple)
1105 : DarwinTargetInfo<PPC64TargetInfo>(triple) {
1106 HasAlignMac68kSupport = true;
1107 SuitableAlign = 128;
1108 DescriptionString = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
1109 "i64:64:64-f32:32:32-f64:64:64-v128:128:128-n32:64";
1112 } // end anonymous namespace.
1115 static const unsigned NVPTXAddrSpaceMap[] = {
1118 4, // opencl_constant
1123 class NVPTXTargetInfo : public TargetInfo {
1124 static const char * const GCCRegNames[];
1125 static const Builtin::Info BuiltinInfo[];
1126 std::vector<llvm::StringRef> AvailableFeatures;
1128 NVPTXTargetInfo(const std::string& triple) : TargetInfo(triple) {
1130 TLSSupported = false;
1131 LongWidth = LongAlign = 64;
1132 AddrSpaceMap = &NVPTXAddrSpaceMap;
1133 // Define available target features
1134 // These must be defined in sorted order!
1135 NoAsmVariants = true;
1137 virtual void getTargetDefines(const LangOptions &Opts,
1138 MacroBuilder &Builder) const {
1139 Builder.defineMacro("__PTX__");
1140 Builder.defineMacro("__NVPTX__");
1142 virtual void getTargetBuiltins(const Builtin::Info *&Records,
1143 unsigned &NumRecords) const {
1144 Records = BuiltinInfo;
1145 NumRecords = clang::NVPTX::LastTSBuiltin-Builtin::FirstTSBuiltin;
1147 virtual bool hasFeature(StringRef Feature) const {
1148 return Feature == "ptx" || Feature == "nvptx";
1151 virtual void getGCCRegNames(const char * const *&Names,
1152 unsigned &NumNames) const;
1153 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
1154 unsigned &NumAliases) const {
1159 virtual bool validateAsmConstraint(const char *&Name,
1160 TargetInfo::ConstraintInfo &info) const {
1164 virtual const char *getClobbers() const {
1165 // FIXME: Is this really right?
1168 virtual BuiltinVaListKind getBuiltinVaListKind() const {
1170 return TargetInfo::CharPtrBuiltinVaList;
1172 virtual bool setCPU(const std::string &Name) {
1173 return Name == "sm_10" || Name == "sm_13" || Name == "sm_20";
1175 virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features,
1177 bool Enabled) const;
1180 const Builtin::Info NVPTXTargetInfo::BuiltinInfo[] = {
1181 #define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES },
1182 #define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\
1184 #include "clang/Basic/BuiltinsNVPTX.def"
1187 const char * const NVPTXTargetInfo::GCCRegNames[] = {
1191 void NVPTXTargetInfo::getGCCRegNames(const char * const *&Names,
1192 unsigned &NumNames) const {
1193 Names = GCCRegNames;
1194 NumNames = llvm::array_lengthof(GCCRegNames);
1197 bool NVPTXTargetInfo::setFeatureEnabled(llvm::StringMap<bool> &Features,
1199 bool Enabled) const {
1200 if(std::binary_search(AvailableFeatures.begin(), AvailableFeatures.end(),
1202 Features[Name] = Enabled;
1209 class NVPTX32TargetInfo : public NVPTXTargetInfo {
1211 NVPTX32TargetInfo(const std::string& triple) : NVPTXTargetInfo(triple) {
1212 PointerWidth = PointerAlign = 32;
1213 SizeType = PtrDiffType = IntPtrType = TargetInfo::UnsignedInt;
1215 = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-"
1216 "f32:32:32-f64:64:64-v16:16:16-v32:32:32-v64:64:64-v128:128:128-"
1221 class NVPTX64TargetInfo : public NVPTXTargetInfo {
1223 NVPTX64TargetInfo(const std::string& triple) : NVPTXTargetInfo(triple) {
1224 PointerWidth = PointerAlign = 64;
1225 SizeType = PtrDiffType = IntPtrType = TargetInfo::UnsignedLongLong;
1227 = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-"
1228 "f32:32:32-f64:64:64-v16:16:16-v32:32:32-v64:64:64-v128:128:128-"
1236 static const unsigned R600AddrSpaceMap[] = {
1239 2, // opencl_constant
1245 class R600TargetInfo : public TargetInfo {
1247 R600TargetInfo(const std::string& triple) : TargetInfo(triple) {
1249 "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16"
1250 "-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f80:32:32"
1251 "-v16:16:16-v24:32:32-v32:32:32-v48:64:64-v64:64:64"
1252 "-v96:128:128-v128:128:128-v192:256:256-v256:256:256"
1253 "-v512:512:512-v1024:1024:1024-v2048:2048:2048"
1255 AddrSpaceMap = &R600AddrSpaceMap;
1258 virtual const char * getClobbers() const {
1262 virtual void getGCCRegNames(const char * const *&Names,
1263 unsigned &numNames) const {
1268 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
1269 unsigned &NumAliases) const {
1274 virtual bool validateAsmConstraint(const char *&Name,
1275 TargetInfo::ConstraintInfo &info) const {
1279 virtual void getTargetBuiltins(const Builtin::Info *&Records,
1280 unsigned &NumRecords) const {
1286 virtual void getTargetDefines(const LangOptions &Opts,
1287 MacroBuilder &Builder) const {
1288 Builder.defineMacro("__R600__");
1291 virtual BuiltinVaListKind getBuiltinVaListKind() const {
1292 return TargetInfo::CharPtrBuiltinVaList;
1297 } // end anonymous namespace
1300 // MBlaze abstract base class
1301 class MBlazeTargetInfo : public TargetInfo {
1302 static const char * const GCCRegNames[];
1303 static const TargetInfo::GCCRegAlias GCCRegAliases[];
1306 MBlazeTargetInfo(const std::string& triple) : TargetInfo(triple) {
1307 DescriptionString = "E-p:32:32:32-i8:8:8-i16:16:16";
1310 virtual void getTargetBuiltins(const Builtin::Info *&Records,
1311 unsigned &NumRecords) const {
1312 // FIXME: Implement.
1317 virtual void getTargetDefines(const LangOptions &Opts,
1318 MacroBuilder &Builder) const;
1320 virtual bool hasFeature(StringRef Feature) const {
1321 return Feature == "mblaze";
1324 virtual BuiltinVaListKind getBuiltinVaListKind() const {
1325 return TargetInfo::CharPtrBuiltinVaList;
1327 virtual const char *getTargetPrefix() const {
1330 virtual void getGCCRegNames(const char * const *&Names,
1331 unsigned &NumNames) const;
1332 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
1333 unsigned &NumAliases) const;
1334 virtual bool validateAsmConstraint(const char *&Name,
1335 TargetInfo::ConstraintInfo &Info) const {
1337 default: return false;
1340 case 'b': // Base register
1341 case 'f': // Floating point register
1342 Info.setAllowsRegister();
1346 virtual const char *getClobbers() const {
1351 /// MBlazeTargetInfo::getTargetDefines - Return a set of the MBlaze-specific
1352 /// #defines that are not tied to a specific subtarget.
1353 void MBlazeTargetInfo::getTargetDefines(const LangOptions &Opts,
1354 MacroBuilder &Builder) const {
1355 // Target identification.
1356 Builder.defineMacro("__microblaze__");
1357 Builder.defineMacro("_ARCH_MICROBLAZE");
1358 Builder.defineMacro("__MICROBLAZE__");
1360 // Target properties.
1361 Builder.defineMacro("_BIG_ENDIAN");
1362 Builder.defineMacro("__BIG_ENDIAN__");
1364 // Subtarget options.
1365 Builder.defineMacro("__REGISTER_PREFIX__", "");
1369 const char * const MBlazeTargetInfo::GCCRegNames[] = {
1370 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
1371 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
1372 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
1373 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
1374 "$f0", "$f1", "$f2", "$f3", "$f4", "$f5", "$f6", "$f7",
1375 "$f8", "$f9", "$f10", "$f11", "$f12", "$f13", "$f14", "$f15",
1376 "$f16", "$f17", "$f18", "$f19", "$f20", "$f21", "$f22", "$f23",
1377 "$f24", "$f25", "$f26", "$f27", "$f28", "$f29", "$f30", "$f31",
1378 "hi", "lo", "accum","rmsr", "$fcc1","$fcc2","$fcc3","$fcc4",
1379 "$fcc5","$fcc6","$fcc7","$ap", "$rap", "$frp"
1382 void MBlazeTargetInfo::getGCCRegNames(const char * const *&Names,
1383 unsigned &NumNames) const {
1384 Names = GCCRegNames;
1385 NumNames = llvm::array_lengthof(GCCRegNames);
1388 const TargetInfo::GCCRegAlias MBlazeTargetInfo::GCCRegAliases[] = {
1423 void MBlazeTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases,
1424 unsigned &NumAliases) const {
1425 Aliases = GCCRegAliases;
1426 NumAliases = llvm::array_lengthof(GCCRegAliases);
1428 } // end anonymous namespace.
1431 // Namespace for x86 abstract base class
1432 const Builtin::Info BuiltinInfo[] = {
1433 #define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES },
1434 #define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\
1436 #include "clang/Basic/BuiltinsX86.def"
1439 static const char* const GCCRegNames[] = {
1440 "ax", "dx", "cx", "bx", "si", "di", "bp", "sp",
1441 "st", "st(1)", "st(2)", "st(3)", "st(4)", "st(5)", "st(6)", "st(7)",
1442 "argp", "flags", "fpcr", "fpsr", "dirflag", "frame",
1443 "xmm0", "xmm1", "xmm2", "xmm3", "xmm4", "xmm5", "xmm6", "xmm7",
1444 "mm0", "mm1", "mm2", "mm3", "mm4", "mm5", "mm6", "mm7",
1445 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
1446 "xmm8", "xmm9", "xmm10", "xmm11", "xmm12", "xmm13", "xmm14", "xmm15",
1447 "ymm0", "ymm1", "ymm2", "ymm3", "ymm4", "ymm5", "ymm6", "ymm7",
1448 "ymm8", "ymm9", "ymm10", "ymm11", "ymm12", "ymm13", "ymm14", "ymm15",
1451 const TargetInfo::AddlRegName AddlRegNames[] = {
1452 { { "al", "ah", "eax", "rax" }, 0 },
1453 { { "bl", "bh", "ebx", "rbx" }, 3 },
1454 { { "cl", "ch", "ecx", "rcx" }, 2 },
1455 { { "dl", "dh", "edx", "rdx" }, 1 },
1456 { { "esi", "rsi" }, 4 },
1457 { { "edi", "rdi" }, 5 },
1458 { { "esp", "rsp" }, 7 },
1459 { { "ebp", "rbp" }, 6 },
1462 // X86 target abstract base class; x86-32 and x86-64 are very close, so
1463 // most of the implementation can be shared.
1464 class X86TargetInfo : public TargetInfo {
1466 NoSSE, SSE1, SSE2, SSE3, SSSE3, SSE41, SSE42, AVX, AVX2
1469 NoMMX3DNow, MMX, AMD3DNow, AMD3DNowAthlon
1486 /// \brief Enumeration of all of the X86 CPUs supported by Clang.
1488 /// Each enumeration represents a particular CPU supported by Clang. These
1489 /// loosely correspond to the options passed to '-march' or '-mtune' flags.
1494 /// i386-generation processors.
1500 /// i486-generation processors.
1509 /// i586-generation processors, P5 microarchitecture based.
1517 /// i686-generation processors, P6 / Pentium M microarchitecture based.
1527 /// This enumerator is a bit odd, as GCC no longer accepts -march=yonah.
1528 /// Clang however has some logic to suport this.
1529 // FIXME: Warn, deprecate, and potentially remove this.
1534 /// Netburst microarchitecture based processors.
1543 /// Core microarchitecture based processors.
1547 /// This enumerator, like \see CK_Yonah, is a bit odd. It is another
1548 /// codename which GCC no longer accepts as an option to -march, but Clang
1549 /// has some logic for recognizing it.
1550 // FIXME: Warn, deprecate, and potentially remove this.
1561 /// Nehalem microarchitecture based processors.
1570 /// K6 architecture processors.
1578 /// K7 architecture processors.
1581 CK_AthlonThunderbird,
1588 /// K8 architecture processors.
1601 /// Bobcat architecture processors.
1607 /// Bulldozer architecture processors.
1613 /// This specification is deprecated and will be removed in the future.
1614 /// Users should prefer \see CK_K8.
1615 // FIXME: Warn on this when the CPU is set to it.
1620 /// Geode processors.
1627 X86TargetInfo(const std::string& triple)
1628 : TargetInfo(triple), SSELevel(NoSSE), MMX3DNowLevel(NoMMX3DNow),
1629 HasAES(false), HasPCLMUL(false), HasLZCNT(false), HasRDRND(false),
1630 HasBMI(false), HasBMI2(false), HasPOPCNT(false), HasRTM(false),
1631 HasSSE4a(false), HasFMA4(false), HasFMA(false), HasXOP(false),
1632 HasF16C(false), CPU(CK_Generic) {
1634 LongDoubleFormat = &llvm::APFloat::x87DoubleExtended;
1636 virtual unsigned getFloatEvalMethod() const {
1637 // X87 evaluates with 80 bits "long double" precision.
1638 return SSELevel == NoSSE ? 2 : 0;
1640 virtual void getTargetBuiltins(const Builtin::Info *&Records,
1641 unsigned &NumRecords) const {
1642 Records = BuiltinInfo;
1643 NumRecords = clang::X86::LastTSBuiltin-Builtin::FirstTSBuiltin;
1645 virtual void getGCCRegNames(const char * const *&Names,
1646 unsigned &NumNames) const {
1647 Names = GCCRegNames;
1648 NumNames = llvm::array_lengthof(GCCRegNames);
1650 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
1651 unsigned &NumAliases) const {
1655 virtual void getGCCAddlRegNames(const AddlRegName *&Names,
1656 unsigned &NumNames) const {
1657 Names = AddlRegNames;
1658 NumNames = llvm::array_lengthof(AddlRegNames);
1660 virtual bool validateAsmConstraint(const char *&Name,
1661 TargetInfo::ConstraintInfo &info) const;
1662 virtual std::string convertConstraint(const char *&Constraint) const;
1663 virtual const char *getClobbers() const {
1664 return "~{dirflag},~{fpsr},~{flags}";
1666 virtual void getTargetDefines(const LangOptions &Opts,
1667 MacroBuilder &Builder) const;
1668 virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features,
1670 bool Enabled) const;
1671 virtual void getDefaultFeatures(llvm::StringMap<bool> &Features) const;
1672 virtual bool hasFeature(StringRef Feature) const;
1673 virtual void HandleTargetFeatures(std::vector<std::string> &Features);
1674 virtual const char* getABI() const {
1675 if (getTriple().getArch() == llvm::Triple::x86_64 && SSELevel >= AVX)
1677 else if (getTriple().getArch() == llvm::Triple::x86 &&
1678 MMX3DNowLevel == NoMMX3DNow)
1682 virtual bool setCPU(const std::string &Name) {
1683 CPU = llvm::StringSwitch<CPUKind>(Name)
1684 .Case("i386", CK_i386)
1685 .Case("i486", CK_i486)
1686 .Case("winchip-c6", CK_WinChipC6)
1687 .Case("winchip2", CK_WinChip2)
1689 .Case("i586", CK_i586)
1690 .Case("pentium", CK_Pentium)
1691 .Case("pentium-mmx", CK_PentiumMMX)
1692 .Case("i686", CK_i686)
1693 .Case("pentiumpro", CK_PentiumPro)
1694 .Case("pentium2", CK_Pentium2)
1695 .Case("pentium3", CK_Pentium3)
1696 .Case("pentium3m", CK_Pentium3M)
1697 .Case("pentium-m", CK_PentiumM)
1698 .Case("c3-2", CK_C3_2)
1699 .Case("yonah", CK_Yonah)
1700 .Case("pentium4", CK_Pentium4)
1701 .Case("pentium4m", CK_Pentium4M)
1702 .Case("prescott", CK_Prescott)
1703 .Case("nocona", CK_Nocona)
1704 .Case("core2", CK_Core2)
1705 .Case("penryn", CK_Penryn)
1706 .Case("atom", CK_Atom)
1707 .Case("corei7", CK_Corei7)
1708 .Case("corei7-avx", CK_Corei7AVX)
1709 .Case("core-avx-i", CK_CoreAVXi)
1710 .Case("core-avx2", CK_CoreAVX2)
1712 .Case("k6-2", CK_K6_2)
1713 .Case("k6-3", CK_K6_3)
1714 .Case("athlon", CK_Athlon)
1715 .Case("athlon-tbird", CK_AthlonThunderbird)
1716 .Case("athlon-4", CK_Athlon4)
1717 .Case("athlon-xp", CK_AthlonXP)
1718 .Case("athlon-mp", CK_AthlonMP)
1719 .Case("athlon64", CK_Athlon64)
1720 .Case("athlon64-sse3", CK_Athlon64SSE3)
1721 .Case("athlon-fx", CK_AthlonFX)
1723 .Case("k8-sse3", CK_K8SSE3)
1724 .Case("opteron", CK_Opteron)
1725 .Case("opteron-sse3", CK_OpteronSSE3)
1726 .Case("amdfam10", CK_AMDFAM10)
1727 .Case("btver1", CK_BTVER1)
1728 .Case("bdver1", CK_BDVER1)
1729 .Case("bdver2", CK_BDVER2)
1730 .Case("x86-64", CK_x86_64)
1731 .Case("geode", CK_Geode)
1732 .Default(CK_Generic);
1734 // Perform any per-CPU checks necessary to determine if this CPU is
1736 // FIXME: This results in terrible diagnostics. Clang just says the CPU is
1737 // invalid without explaining *why*.
1740 // No processor selected!
1766 case CK_AthlonThunderbird:
1771 // Only accept certain architectures when compiling in 32-bit mode.
1772 if (getTriple().getArch() != llvm::Triple::x86)
1785 case CK_Athlon64SSE3:
1790 case CK_OpteronSSE3:
1798 llvm_unreachable("Unhandled CPU kind");
1801 virtual CallingConvCheckResult checkCallingConvention(CallingConv CC) const {
1802 // We accept all non-ARM calling conventions
1803 return (CC == CC_X86ThisCall ||
1804 CC == CC_X86FastCall ||
1805 CC == CC_X86StdCall ||
1807 CC == CC_X86Pascal) ? CCCR_OK : CCCR_Warning;
1810 virtual CallingConv getDefaultCallingConv() const {
1815 void X86TargetInfo::getDefaultFeatures(llvm::StringMap<bool> &Features) const {
1816 // FIXME: This should not be here.
1817 Features["3dnow"] = false;
1818 Features["3dnowa"] = false;
1819 Features["mmx"] = false;
1820 Features["sse"] = false;
1821 Features["sse2"] = false;
1822 Features["sse3"] = false;
1823 Features["ssse3"] = false;
1824 Features["sse41"] = false;
1825 Features["sse42"] = false;
1826 Features["sse4a"] = false;
1827 Features["aes"] = false;
1828 Features["pclmul"] = false;
1829 Features["avx"] = false;
1830 Features["avx2"] = false;
1831 Features["lzcnt"] = false;
1832 Features["rdrand"] = false;
1833 Features["bmi"] = false;
1834 Features["bmi2"] = false;
1835 Features["popcnt"] = false;
1836 Features["rtm"] = false;
1837 Features["fma4"] = false;
1838 Features["fma"] = false;
1839 Features["xop"] = false;
1840 Features["f16c"] = false;
1842 // FIXME: This *really* should not be here.
1844 // X86_64 always has SSE2.
1845 if (getTriple().getArch() == llvm::Triple::x86_64)
1846 Features["sse2"] = Features["sse"] = Features["mmx"] = true;
1859 setFeatureEnabled(Features, "mmx", true);
1863 setFeatureEnabled(Features, "mmx", true);
1864 setFeatureEnabled(Features, "sse", true);
1870 setFeatureEnabled(Features, "mmx", true);
1871 setFeatureEnabled(Features, "sse2", true);
1876 setFeatureEnabled(Features, "mmx", true);
1877 setFeatureEnabled(Features, "sse3", true);
1880 setFeatureEnabled(Features, "mmx", true);
1881 setFeatureEnabled(Features, "ssse3", true);
1884 setFeatureEnabled(Features, "mmx", true);
1885 setFeatureEnabled(Features, "sse4.1", true);
1888 setFeatureEnabled(Features, "mmx", true);
1889 setFeatureEnabled(Features, "ssse3", true);
1892 setFeatureEnabled(Features, "mmx", true);
1893 setFeatureEnabled(Features, "sse4", true);
1896 setFeatureEnabled(Features, "mmx", true);
1897 setFeatureEnabled(Features, "avx", true);
1898 setFeatureEnabled(Features, "aes", true);
1899 setFeatureEnabled(Features, "pclmul", true);
1902 setFeatureEnabled(Features, "mmx", true);
1903 setFeatureEnabled(Features, "avx", true);
1904 setFeatureEnabled(Features, "aes", true);
1905 setFeatureEnabled(Features, "pclmul", true);
1906 setFeatureEnabled(Features, "rdrnd", true);
1909 setFeatureEnabled(Features, "mmx", true);
1910 setFeatureEnabled(Features, "avx2", true);
1911 setFeatureEnabled(Features, "aes", true);
1912 setFeatureEnabled(Features, "pclmul", true);
1913 setFeatureEnabled(Features, "lzcnt", true);
1914 setFeatureEnabled(Features, "rdrnd", true);
1915 setFeatureEnabled(Features, "bmi", true);
1916 setFeatureEnabled(Features, "bmi2", true);
1917 setFeatureEnabled(Features, "rtm", true);
1918 setFeatureEnabled(Features, "fma", true);
1922 setFeatureEnabled(Features, "mmx", true);
1928 setFeatureEnabled(Features, "3dnow", true);
1931 case CK_AthlonThunderbird:
1933 setFeatureEnabled(Features, "3dnowa", true);
1938 setFeatureEnabled(Features, "sse", true);
1939 setFeatureEnabled(Features, "3dnowa", true);
1945 setFeatureEnabled(Features, "sse2", true);
1946 setFeatureEnabled(Features, "3dnowa", true);
1949 case CK_OpteronSSE3:
1950 case CK_Athlon64SSE3:
1951 setFeatureEnabled(Features, "sse3", true);
1952 setFeatureEnabled(Features, "3dnowa", true);
1955 setFeatureEnabled(Features, "sse3", true);
1956 setFeatureEnabled(Features, "sse4a", true);
1957 setFeatureEnabled(Features, "3dnowa", true);
1960 setFeatureEnabled(Features, "ssse3", true);
1961 setFeatureEnabled(Features, "sse4a", true);
1965 setFeatureEnabled(Features, "avx", true);
1966 setFeatureEnabled(Features, "xop", true);
1967 setFeatureEnabled(Features, "aes", true);
1968 setFeatureEnabled(Features, "pclmul", true);
1971 setFeatureEnabled(Features, "mmx", true);
1972 setFeatureEnabled(Features, "sse", true);
1977 bool X86TargetInfo::setFeatureEnabled(llvm::StringMap<bool> &Features,
1979 bool Enabled) const {
1980 // FIXME: This *really* should not be here. We need some way of translating
1981 // options into llvm subtarget features.
1982 if (!Features.count(Name) &&
1983 (Name != "sse4" && Name != "sse4.2" && Name != "sse4.1" &&
1987 // FIXME: this should probably use a switch with fall through.
1991 Features["mmx"] = true;
1992 else if (Name == "sse")
1993 Features["mmx"] = Features["sse"] = true;
1994 else if (Name == "sse2")
1995 Features["mmx"] = Features["sse"] = Features["sse2"] = true;
1996 else if (Name == "sse3")
1997 Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
1999 else if (Name == "ssse3")
2000 Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
2001 Features["ssse3"] = true;
2002 else if (Name == "sse4" || Name == "sse4.2")
2003 Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
2004 Features["ssse3"] = Features["sse41"] = Features["sse42"] =
2005 Features["popcnt"] = true;
2006 else if (Name == "sse4.1")
2007 Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
2008 Features["ssse3"] = Features["sse41"] = true;
2009 else if (Name == "3dnow")
2010 Features["mmx"] = Features["3dnow"] = true;
2011 else if (Name == "3dnowa")
2012 Features["mmx"] = Features["3dnow"] = Features["3dnowa"] = true;
2013 else if (Name == "aes")
2014 Features["sse"] = Features["sse2"] = Features["aes"] = true;
2015 else if (Name == "pclmul")
2016 Features["sse"] = Features["sse2"] = Features["pclmul"] = true;
2017 else if (Name == "avx")
2018 Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
2019 Features["ssse3"] = Features["sse41"] = Features["sse42"] =
2020 Features["popcnt"] = Features["avx"] = true;
2021 else if (Name == "avx2")
2022 Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
2023 Features["ssse3"] = Features["sse41"] = Features["sse42"] =
2024 Features["popcnt"] = Features["avx"] = Features["avx2"] = true;
2025 else if (Name == "fma")
2026 Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
2027 Features["ssse3"] = Features["sse41"] = Features["sse42"] =
2028 Features["popcnt"] = Features["avx"] = Features["fma"] = true;
2029 else if (Name == "fma4")
2030 Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
2031 Features["ssse3"] = Features["sse41"] = Features["sse42"] =
2032 Features["popcnt"] = Features["avx"] = Features["sse4a"] =
2033 Features["fma4"] = true;
2034 else if (Name == "xop")
2035 Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
2036 Features["ssse3"] = Features["sse41"] = Features["sse42"] =
2037 Features["popcnt"] = Features["avx"] = Features["sse4a"] =
2038 Features["fma4"] = Features["xop"] = true;
2039 else if (Name == "sse4a")
2040 Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
2041 Features["sse4a"] = true;
2042 else if (Name == "lzcnt")
2043 Features["lzcnt"] = true;
2044 else if (Name == "rdrnd")
2045 Features["rdrand"] = true;
2046 else if (Name == "bmi")
2047 Features["bmi"] = true;
2048 else if (Name == "bmi2")
2049 Features["bmi2"] = true;
2050 else if (Name == "popcnt")
2051 Features["popcnt"] = true;
2052 else if (Name == "f16c")
2053 Features["f16c"] = true;
2054 else if (Name == "rtm")
2055 Features["rtm"] = true;
2058 Features["mmx"] = Features["3dnow"] = Features["3dnowa"] = false;
2059 else if (Name == "sse")
2060 Features["sse"] = Features["sse2"] = Features["sse3"] =
2061 Features["ssse3"] = Features["sse41"] = Features["sse42"] =
2062 Features["sse4a"] = Features["avx"] = Features["avx2"] =
2063 Features["fma"] = Features["fma4"] = Features["aes"] =
2064 Features["pclmul"] = Features["xop"] = false;
2065 else if (Name == "sse2")
2066 Features["sse2"] = Features["sse3"] = Features["ssse3"] =
2067 Features["sse41"] = Features["sse42"] = Features["sse4a"] =
2068 Features["avx"] = Features["avx2"] = Features["fma"] =
2069 Features["fma4"] = Features["aes"] = Features["pclmul"] =
2070 Features["xop"] = false;
2071 else if (Name == "sse3")
2072 Features["sse3"] = Features["ssse3"] = Features["sse41"] =
2073 Features["sse42"] = Features["sse4a"] = Features["avx"] =
2074 Features["avx2"] = Features["fma"] = Features["fma4"] =
2075 Features["xop"] = false;
2076 else if (Name == "ssse3")
2077 Features["ssse3"] = Features["sse41"] = Features["sse42"] =
2078 Features["avx"] = Features["avx2"] = Features["fma"] = false;
2079 else if (Name == "sse4" || Name == "sse4.1")
2080 Features["sse41"] = Features["sse42"] = Features["avx"] =
2081 Features["avx2"] = Features["fma"] = false;
2082 else if (Name == "sse4.2")
2083 Features["sse42"] = Features["avx"] = Features["avx2"] =
2084 Features["fma"] = false;
2085 else if (Name == "3dnow")
2086 Features["3dnow"] = Features["3dnowa"] = false;
2087 else if (Name == "3dnowa")
2088 Features["3dnowa"] = false;
2089 else if (Name == "aes")
2090 Features["aes"] = false;
2091 else if (Name == "pclmul")
2092 Features["pclmul"] = false;
2093 else if (Name == "avx")
2094 Features["avx"] = Features["avx2"] = Features["fma"] =
2095 Features["fma4"] = Features["xop"] = false;
2096 else if (Name == "avx2")
2097 Features["avx2"] = false;
2098 else if (Name == "fma")
2099 Features["fma"] = false;
2100 else if (Name == "sse4a")
2101 Features["sse4a"] = Features["fma4"] = Features["xop"] = false;
2102 else if (Name == "lzcnt")
2103 Features["lzcnt"] = false;
2104 else if (Name == "rdrnd")
2105 Features["rdrand"] = false;
2106 else if (Name == "bmi")
2107 Features["bmi"] = false;
2108 else if (Name == "bmi2")
2109 Features["bmi2"] = false;
2110 else if (Name == "popcnt")
2111 Features["popcnt"] = false;
2112 else if (Name == "fma4")
2113 Features["fma4"] = Features["xop"] = false;
2114 else if (Name == "xop")
2115 Features["xop"] = false;
2116 else if (Name == "f16c")
2117 Features["f16c"] = false;
2118 else if (Name == "rtm")
2119 Features["rtm"] = false;
2125 /// HandleTargetOptions - Perform initialization based on the user
2126 /// configured set of features.
2127 void X86TargetInfo::HandleTargetFeatures(std::vector<std::string> &Features) {
2128 // Remember the maximum enabled sselevel.
2129 for (unsigned i = 0, e = Features.size(); i !=e; ++i) {
2130 // Ignore disabled features.
2131 if (Features[i][0] == '-')
2134 StringRef Feature = StringRef(Features[i]).substr(1);
2136 if (Feature == "aes") {
2141 if (Feature == "pclmul") {
2146 if (Feature == "lzcnt") {
2151 if (Feature == "rdrand") {
2156 if (Feature == "bmi") {
2161 if (Feature == "bmi2") {
2166 if (Feature == "popcnt") {
2171 if (Feature == "rtm") {
2176 if (Feature == "sse4a") {
2181 if (Feature == "fma4") {
2186 if (Feature == "fma") {
2191 if (Feature == "xop") {
2196 if (Feature == "f16c") {
2201 assert(Features[i][0] == '+' && "Invalid target feature!");
2202 X86SSEEnum Level = llvm::StringSwitch<X86SSEEnum>(Feature)
2205 .Case("sse42", SSE42)
2206 .Case("sse41", SSE41)
2207 .Case("ssse3", SSSE3)
2212 SSELevel = std::max(SSELevel, Level);
2214 MMX3DNowEnum ThreeDNowLevel =
2215 llvm::StringSwitch<MMX3DNowEnum>(Feature)
2216 .Case("3dnowa", AMD3DNowAthlon)
2217 .Case("3dnow", AMD3DNow)
2219 .Default(NoMMX3DNow);
2221 MMX3DNowLevel = std::max(MMX3DNowLevel, ThreeDNowLevel);
2224 // Don't tell the backend if we're turning off mmx; it will end up disabling
2225 // SSE, which we don't want.
2226 std::vector<std::string>::iterator it;
2227 it = std::find(Features.begin(), Features.end(), "-mmx");
2228 if (it != Features.end())
2232 /// X86TargetInfo::getTargetDefines - Return the set of the X86-specific macro
2233 /// definitions for this particular subtarget.
2234 void X86TargetInfo::getTargetDefines(const LangOptions &Opts,
2235 MacroBuilder &Builder) const {
2236 // Target identification.
2237 if (getTriple().getArch() == llvm::Triple::x86_64) {
2238 Builder.defineMacro("__amd64__");
2239 Builder.defineMacro("__amd64");
2240 Builder.defineMacro("__x86_64");
2241 Builder.defineMacro("__x86_64__");
2243 DefineStd(Builder, "i386", Opts);
2246 // Subtarget options.
2247 // FIXME: We are hard-coding the tune parameters based on the CPU, but they
2248 // truly should be based on -mtune options.
2253 // The rest are coming from the i386 define above.
2254 Builder.defineMacro("__tune_i386__");
2260 defineCPUMacros(Builder, "i486");
2263 Builder.defineMacro("__pentium_mmx__");
2264 Builder.defineMacro("__tune_pentium_mmx__");
2268 defineCPUMacros(Builder, "i586");
2269 defineCPUMacros(Builder, "pentium");
2274 Builder.defineMacro("__tune_pentium3__");
2278 Builder.defineMacro("__tune_pentium2__");
2281 Builder.defineMacro("__tune_i686__");
2282 Builder.defineMacro("__tune_pentiumpro__");
2285 Builder.defineMacro("__i686");
2286 Builder.defineMacro("__i686__");
2287 // Strangely, __tune_i686__ isn't defined by GCC when CPU == i686.
2288 Builder.defineMacro("__pentiumpro");
2289 Builder.defineMacro("__pentiumpro__");
2293 defineCPUMacros(Builder, "pentium4");
2298 defineCPUMacros(Builder, "nocona");
2302 defineCPUMacros(Builder, "core2");
2305 defineCPUMacros(Builder, "atom");
2311 defineCPUMacros(Builder, "corei7");
2314 Builder.defineMacro("__k6_2__");
2315 Builder.defineMacro("__tune_k6_2__");
2318 if (CPU != CK_K6_2) { // In case of fallthrough
2319 // FIXME: GCC may be enabling these in cases where some other k6
2320 // architecture is specified but -m3dnow is explicitly provided. The
2321 // exact semantics need to be determined and emulated here.
2322 Builder.defineMacro("__k6_3__");
2323 Builder.defineMacro("__tune_k6_3__");
2327 defineCPUMacros(Builder, "k6");
2330 case CK_AthlonThunderbird:
2334 defineCPUMacros(Builder, "athlon");
2335 if (SSELevel != NoSSE) {
2336 Builder.defineMacro("__athlon_sse__");
2337 Builder.defineMacro("__tune_athlon_sse__");
2344 case CK_OpteronSSE3:
2346 case CK_Athlon64SSE3:
2348 defineCPUMacros(Builder, "k8");
2351 defineCPUMacros(Builder, "amdfam10");
2354 defineCPUMacros(Builder, "btver1");
2357 defineCPUMacros(Builder, "bdver1");
2360 defineCPUMacros(Builder, "bdver2");
2363 defineCPUMacros(Builder, "geode");
2367 // Target properties.
2368 Builder.defineMacro("__LITTLE_ENDIAN__");
2369 Builder.defineMacro("__REGISTER_PREFIX__", "");
2371 // Define __NO_MATH_INLINES on linux/x86 so that we don't get inline
2372 // functions in glibc header files that use FP Stack inline asm which the
2373 // backend can't deal with (PR879).
2374 Builder.defineMacro("__NO_MATH_INLINES");
2377 Builder.defineMacro("__AES__");
2380 Builder.defineMacro("__PCLMUL__");
2383 Builder.defineMacro("__LZCNT__");
2386 Builder.defineMacro("__RDRND__");
2389 Builder.defineMacro("__BMI__");
2392 Builder.defineMacro("__BMI2__");
2395 Builder.defineMacro("__POPCNT__");
2398 Builder.defineMacro("__RTM__");
2401 Builder.defineMacro("__SSE4A__");
2404 Builder.defineMacro("__FMA4__");
2407 Builder.defineMacro("__FMA__");
2410 Builder.defineMacro("__XOP__");
2413 Builder.defineMacro("__F16C__");
2415 // Each case falls through to the previous one here.
2418 Builder.defineMacro("__AVX2__");
2420 Builder.defineMacro("__AVX__");
2422 Builder.defineMacro("__SSE4_2__");
2424 Builder.defineMacro("__SSE4_1__");
2426 Builder.defineMacro("__SSSE3__");
2428 Builder.defineMacro("__SSE3__");
2430 Builder.defineMacro("__SSE2__");
2431 Builder.defineMacro("__SSE2_MATH__"); // -mfp-math=sse always implied.
2433 Builder.defineMacro("__SSE__");
2434 Builder.defineMacro("__SSE_MATH__"); // -mfp-math=sse always implied.
2439 if (Opts.MicrosoftExt && getTriple().getArch() == llvm::Triple::x86) {
2448 Builder.defineMacro("_M_IX86_FP", Twine(2));
2451 Builder.defineMacro("_M_IX86_FP", Twine(1));
2454 Builder.defineMacro("_M_IX86_FP", Twine(0));
2458 // Each case falls through to the previous one here.
2459 switch (MMX3DNowLevel) {
2460 case AMD3DNowAthlon:
2461 Builder.defineMacro("__3dNOW_A__");
2463 Builder.defineMacro("__3dNOW__");
2465 Builder.defineMacro("__MMX__");
2471 bool X86TargetInfo::hasFeature(StringRef Feature) const {
2472 return llvm::StringSwitch<bool>(Feature)
2473 .Case("aes", HasAES)
2474 .Case("avx", SSELevel >= AVX)
2475 .Case("avx2", SSELevel >= AVX2)
2476 .Case("bmi", HasBMI)
2477 .Case("bmi2", HasBMI2)
2478 .Case("fma", HasFMA)
2479 .Case("fma4", HasFMA4)
2480 .Case("lzcnt", HasLZCNT)
2481 .Case("rdrnd", HasRDRND)
2482 .Case("mm3dnow", MMX3DNowLevel >= AMD3DNow)
2483 .Case("mm3dnowa", MMX3DNowLevel >= AMD3DNowAthlon)
2484 .Case("mmx", MMX3DNowLevel >= MMX)
2485 .Case("pclmul", HasPCLMUL)
2486 .Case("popcnt", HasPOPCNT)
2487 .Case("rtm", HasRTM)
2488 .Case("sse", SSELevel >= SSE1)
2489 .Case("sse2", SSELevel >= SSE2)
2490 .Case("sse3", SSELevel >= SSE3)
2491 .Case("ssse3", SSELevel >= SSSE3)
2492 .Case("sse41", SSELevel >= SSE41)
2493 .Case("sse42", SSELevel >= SSE42)
2494 .Case("sse4a", HasSSE4a)
2496 .Case("x86_32", getTriple().getArch() == llvm::Triple::x86)
2497 .Case("x86_64", getTriple().getArch() == llvm::Triple::x86_64)
2498 .Case("xop", HasXOP)
2499 .Case("f16c", HasF16C)
2504 X86TargetInfo::validateAsmConstraint(const char *&Name,
2505 TargetInfo::ConstraintInfo &Info) const {
2507 default: return false;
2508 case 'Y': // first letter of a pair:
2509 switch (*(Name+1)) {
2510 default: return false;
2511 case '0': // First SSE register.
2512 case 't': // Any SSE register, when SSE2 is enabled.
2513 case 'i': // Any SSE register, when SSE2 and inter-unit moves enabled.
2514 case 'm': // any MMX register, when inter-unit moves enabled.
2515 break; // falls through to setAllowsRegister.
2523 case 'A': // edx:eax.
2524 case 'f': // any x87 floating point stack register.
2525 case 't': // top of floating point stack.
2526 case 'u': // second from top of floating point stack.
2527 case 'q': // Any register accessible as [r]l: a, b, c, and d.
2528 case 'y': // Any MMX register.
2529 case 'x': // Any SSE register.
2530 case 'Q': // Any register accessible as [r]h: a, b, c, and d.
2531 case 'R': // "Legacy" registers: ax, bx, cx, dx, di, si, sp, bp.
2532 case 'l': // "Index" registers: any general register that can be used as an
2533 // index in a base+index memory access.
2534 Info.setAllowsRegister();
2536 case 'C': // SSE floating point constant.
2537 case 'G': // x87 floating point constant.
2538 case 'e': // 32-bit signed integer constant for use with zero-extending
2539 // x86_64 instructions.
2540 case 'Z': // 32-bit unsigned integer constant for use with zero-extending
2541 // x86_64 instructions.
2548 X86TargetInfo::convertConstraint(const char *&Constraint) const {
2549 switch (*Constraint) {
2550 case 'a': return std::string("{ax}");
2551 case 'b': return std::string("{bx}");
2552 case 'c': return std::string("{cx}");
2553 case 'd': return std::string("{dx}");
2554 case 'S': return std::string("{si}");
2555 case 'D': return std::string("{di}");
2556 case 'p': // address
2557 return std::string("im");
2558 case 't': // top of floating point stack.
2559 return std::string("{st}");
2560 case 'u': // second from top of floating point stack.
2561 return std::string("{st(1)}"); // second from top of floating point stack.
2563 return std::string(1, *Constraint);
2566 } // end anonymous namespace
2569 // X86-32 generic target
2570 class X86_32TargetInfo : public X86TargetInfo {
2572 X86_32TargetInfo(const std::string& triple) : X86TargetInfo(triple) {
2573 DoubleAlign = LongLongAlign = 32;
2574 LongDoubleWidth = 96;
2575 LongDoubleAlign = 32;
2576 SuitableAlign = 128;
2577 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
2578 "i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-"
2579 "a0:0:64-f80:32:32-n8:16:32-S128";
2580 SizeType = UnsignedInt;
2581 PtrDiffType = SignedInt;
2582 IntPtrType = SignedInt;
2585 // Use fpret for all types.
2586 RealTypeUsesObjCFPRet = ((1 << TargetInfo::Float) |
2587 (1 << TargetInfo::Double) |
2588 (1 << TargetInfo::LongDouble));
2590 // x86-32 has atomics up to 8 bytes
2591 // FIXME: Check that we actually have cmpxchg8b before setting
2592 // MaxAtomicInlineWidth. (cmpxchg8b is an i586 instruction.)
2593 MaxAtomicPromoteWidth = MaxAtomicInlineWidth = 64;
2595 virtual BuiltinVaListKind getBuiltinVaListKind() const {
2596 return TargetInfo::CharPtrBuiltinVaList;
2599 int getEHDataRegisterNumber(unsigned RegNo) const {
2600 if (RegNo == 0) return 0;
2601 if (RegNo == 1) return 2;
2605 } // end anonymous namespace
2608 class NetBSDI386TargetInfo : public NetBSDTargetInfo<X86_32TargetInfo> {
2610 NetBSDI386TargetInfo(const std::string &triple) :
2611 NetBSDTargetInfo<X86_32TargetInfo>(triple) {
2614 virtual unsigned getFloatEvalMethod() const {
2615 // NetBSD defaults to "double" rounding
2619 } // end anonymous namespace
2622 class OpenBSDI386TargetInfo : public OpenBSDTargetInfo<X86_32TargetInfo> {
2624 OpenBSDI386TargetInfo(const std::string& triple) :
2625 OpenBSDTargetInfo<X86_32TargetInfo>(triple) {
2626 SizeType = UnsignedLong;
2627 IntPtrType = SignedLong;
2628 PtrDiffType = SignedLong;
2631 } // end anonymous namespace
2634 class BitrigI386TargetInfo : public BitrigTargetInfo<X86_32TargetInfo> {
2636 BitrigI386TargetInfo(const std::string& triple) :
2637 BitrigTargetInfo<X86_32TargetInfo>(triple) {
2638 SizeType = UnsignedLong;
2639 IntPtrType = SignedLong;
2640 PtrDiffType = SignedLong;
2643 } // end anonymous namespace
2646 class DarwinI386TargetInfo : public DarwinTargetInfo<X86_32TargetInfo> {
2648 DarwinI386TargetInfo(const std::string& triple) :
2649 DarwinTargetInfo<X86_32TargetInfo>(triple) {
2650 LongDoubleWidth = 128;
2651 LongDoubleAlign = 128;
2652 SuitableAlign = 128;
2653 MaxVectorAlign = 256;
2654 SizeType = UnsignedLong;
2655 IntPtrType = SignedLong;
2656 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
2657 "i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-"
2658 "a0:0:64-f80:128:128-n8:16:32-S128";
2659 HasAlignMac68kSupport = true;
2663 } // end anonymous namespace
2666 // x86-32 Windows target
2667 class WindowsX86_32TargetInfo : public WindowsTargetInfo<X86_32TargetInfo> {
2669 WindowsX86_32TargetInfo(const std::string& triple)
2670 : WindowsTargetInfo<X86_32TargetInfo>(triple) {
2671 TLSSupported = false;
2672 WCharType = UnsignedShort;
2673 DoubleAlign = LongLongAlign = 64;
2674 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
2675 "i64:64:64-f32:32:32-f64:64:64-f80:128:128-v64:64:64-"
2676 "v128:128:128-a0:0:64-f80:32:32-n8:16:32-S32";
2678 virtual void getTargetDefines(const LangOptions &Opts,
2679 MacroBuilder &Builder) const {
2680 WindowsTargetInfo<X86_32TargetInfo>::getTargetDefines(Opts, Builder);
2683 } // end anonymous namespace
2687 // x86-32 Windows Visual Studio target
2688 class VisualStudioWindowsX86_32TargetInfo : public WindowsX86_32TargetInfo {
2690 VisualStudioWindowsX86_32TargetInfo(const std::string& triple)
2691 : WindowsX86_32TargetInfo(triple) {
2692 LongDoubleWidth = LongDoubleAlign = 64;
2693 LongDoubleFormat = &llvm::APFloat::IEEEdouble;
2695 virtual void getTargetDefines(const LangOptions &Opts,
2696 MacroBuilder &Builder) const {
2697 WindowsX86_32TargetInfo::getTargetDefines(Opts, Builder);
2698 WindowsX86_32TargetInfo::getVisualStudioDefines(Opts, Builder);
2699 // The value of the following reflects processor type.
2700 // 300=386, 400=486, 500=Pentium, 600=Blend (default)
2701 // We lost the original triple, so we use the default.
2702 Builder.defineMacro("_M_IX86", "600");
2705 } // end anonymous namespace
2708 // x86-32 MinGW target
2709 class MinGWX86_32TargetInfo : public WindowsX86_32TargetInfo {
2711 MinGWX86_32TargetInfo(const std::string& triple)
2712 : WindowsX86_32TargetInfo(triple) {
2714 virtual void getTargetDefines(const LangOptions &Opts,
2715 MacroBuilder &Builder) const {
2716 WindowsX86_32TargetInfo::getTargetDefines(Opts, Builder);
2717 DefineStd(Builder, "WIN32", Opts);
2718 DefineStd(Builder, "WINNT", Opts);
2719 Builder.defineMacro("_X86_");
2720 Builder.defineMacro("__MSVCRT__");
2721 Builder.defineMacro("__MINGW32__");
2723 // mingw32-gcc provides __declspec(a) as alias of __attribute__((a)).
2724 // In contrast, clang-cc1 provides __declspec(a) with -fms-extensions.
2725 if (Opts.MicrosoftExt)
2726 // Provide "as-is" __declspec.
2727 Builder.defineMacro("__declspec", "__declspec");
2729 // Provide alias of __attribute__ like mingw32-gcc.
2730 Builder.defineMacro("__declspec(a)", "__attribute__((a))");
2733 } // end anonymous namespace
2736 // x86-32 Cygwin target
2737 class CygwinX86_32TargetInfo : public X86_32TargetInfo {
2739 CygwinX86_32TargetInfo(const std::string& triple)
2740 : X86_32TargetInfo(triple) {
2741 TLSSupported = false;
2742 WCharType = UnsignedShort;
2743 DoubleAlign = LongLongAlign = 64;
2744 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
2745 "i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-"
2746 "a0:0:64-f80:32:32-n8:16:32-S32";
2748 virtual void getTargetDefines(const LangOptions &Opts,
2749 MacroBuilder &Builder) const {
2750 X86_32TargetInfo::getTargetDefines(Opts, Builder);
2751 Builder.defineMacro("__CYGWIN__");
2752 Builder.defineMacro("__CYGWIN32__");
2753 DefineStd(Builder, "unix", Opts);
2755 Builder.defineMacro("_GNU_SOURCE");
2758 } // end anonymous namespace
2761 // x86-32 Haiku target
2762 class HaikuX86_32TargetInfo : public X86_32TargetInfo {
2764 HaikuX86_32TargetInfo(const std::string& triple)
2765 : X86_32TargetInfo(triple) {
2766 SizeType = UnsignedLong;
2767 IntPtrType = SignedLong;
2768 PtrDiffType = SignedLong;
2769 ProcessIDType = SignedLong;
2770 this->UserLabelPrefix = "";
2771 this->TLSSupported = false;
2773 virtual void getTargetDefines(const LangOptions &Opts,
2774 MacroBuilder &Builder) const {
2775 X86_32TargetInfo::getTargetDefines(Opts, Builder);
2776 Builder.defineMacro("__INTEL__");
2777 Builder.defineMacro("__HAIKU__");
2780 } // end anonymous namespace
2783 template<typename Target>
2784 class RTEMSTargetInfo : public OSTargetInfo<Target> {
2786 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
2787 MacroBuilder &Builder) const {
2788 // RTEMS defines; list based off of gcc output
2790 Builder.defineMacro("__rtems__");
2791 Builder.defineMacro("__ELF__");
2794 RTEMSTargetInfo(const std::string &triple)
2795 : OSTargetInfo<Target>(triple) {
2796 this->UserLabelPrefix = "";
2798 llvm::Triple Triple(triple);
2799 switch (Triple.getArch()) {
2801 case llvm::Triple::x86:
2802 // this->MCountName = ".mcount";
2804 case llvm::Triple::mips:
2805 case llvm::Triple::mipsel:
2806 case llvm::Triple::ppc:
2807 case llvm::Triple::ppc64:
2808 // this->MCountName = "_mcount";
2810 case llvm::Triple::arm:
2811 // this->MCountName = "__mcount";
2819 // x86-32 RTEMS target
2820 class RTEMSX86_32TargetInfo : public X86_32TargetInfo {
2822 RTEMSX86_32TargetInfo(const std::string& triple)
2823 : X86_32TargetInfo(triple) {
2824 SizeType = UnsignedLong;
2825 IntPtrType = SignedLong;
2826 PtrDiffType = SignedLong;
2827 this->UserLabelPrefix = "";
2829 virtual void getTargetDefines(const LangOptions &Opts,
2830 MacroBuilder &Builder) const {
2831 X86_32TargetInfo::getTargetDefines(Opts, Builder);
2832 Builder.defineMacro("__INTEL__");
2833 Builder.defineMacro("__rtems__");
2836 } // end anonymous namespace
2839 // x86-64 generic target
2840 class X86_64TargetInfo : public X86TargetInfo {
2842 X86_64TargetInfo(const std::string &triple) : X86TargetInfo(triple) {
2843 LongWidth = LongAlign = PointerWidth = PointerAlign = 64;
2844 LongDoubleWidth = 128;
2845 LongDoubleAlign = 128;
2846 LargeArrayMinWidth = 128;
2847 LargeArrayAlign = 128;
2848 SuitableAlign = 128;
2849 IntMaxType = SignedLong;
2850 UIntMaxType = UnsignedLong;
2851 Int64Type = SignedLong;
2854 DescriptionString = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
2855 "i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-"
2856 "a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128";
2858 // Use fpret only for long double.
2859 RealTypeUsesObjCFPRet = (1 << TargetInfo::LongDouble);
2861 // Use fp2ret for _Complex long double.
2862 ComplexLongDoubleUsesFP2Ret = true;
2864 // x86-64 has atomics up to 16 bytes.
2865 // FIXME: Once the backend is fixed, increase MaxAtomicInlineWidth to 128
2866 // on CPUs with cmpxchg16b
2867 MaxAtomicPromoteWidth = 128;
2868 MaxAtomicInlineWidth = 64;
2870 virtual BuiltinVaListKind getBuiltinVaListKind() const {
2871 return TargetInfo::X86_64ABIBuiltinVaList;
2874 int getEHDataRegisterNumber(unsigned RegNo) const {
2875 if (RegNo == 0) return 0;
2876 if (RegNo == 1) return 1;
2880 virtual CallingConvCheckResult checkCallingConvention(CallingConv CC) const {
2881 return TargetInfo::checkCallingConvention(CC);
2884 virtual CallingConv getDefaultCallingConv() const {
2889 } // end anonymous namespace
2892 // x86-64 Windows target
2893 class WindowsX86_64TargetInfo : public WindowsTargetInfo<X86_64TargetInfo> {
2895 WindowsX86_64TargetInfo(const std::string& triple)
2896 : WindowsTargetInfo<X86_64TargetInfo>(triple) {
2897 TLSSupported = false;
2898 WCharType = UnsignedShort;
2899 LongWidth = LongAlign = 32;
2900 DoubleAlign = LongLongAlign = 64;
2901 IntMaxType = SignedLongLong;
2902 UIntMaxType = UnsignedLongLong;
2903 Int64Type = SignedLongLong;
2904 SizeType = UnsignedLongLong;
2905 PtrDiffType = SignedLongLong;
2906 IntPtrType = SignedLongLong;
2907 this->UserLabelPrefix = "";
2909 virtual void getTargetDefines(const LangOptions &Opts,
2910 MacroBuilder &Builder) const {
2911 WindowsTargetInfo<X86_64TargetInfo>::getTargetDefines(Opts, Builder);
2912 Builder.defineMacro("_WIN64");
2914 virtual BuiltinVaListKind getBuiltinVaListKind() const {
2915 return TargetInfo::CharPtrBuiltinVaList;
2918 } // end anonymous namespace
2921 // x86-64 Windows Visual Studio target
2922 class VisualStudioWindowsX86_64TargetInfo : public WindowsX86_64TargetInfo {
2924 VisualStudioWindowsX86_64TargetInfo(const std::string& triple)
2925 : WindowsX86_64TargetInfo(triple) {
2926 LongDoubleWidth = LongDoubleAlign = 64;
2927 LongDoubleFormat = &llvm::APFloat::IEEEdouble;
2929 virtual void getTargetDefines(const LangOptions &Opts,
2930 MacroBuilder &Builder) const {
2931 WindowsX86_64TargetInfo::getTargetDefines(Opts, Builder);
2932 WindowsX86_64TargetInfo::getVisualStudioDefines(Opts, Builder);
2933 Builder.defineMacro("_M_X64");
2934 Builder.defineMacro("_M_AMD64");
2937 } // end anonymous namespace
2940 // x86-64 MinGW target
2941 class MinGWX86_64TargetInfo : public WindowsX86_64TargetInfo {
2943 MinGWX86_64TargetInfo(const std::string& triple)
2944 : WindowsX86_64TargetInfo(triple) {
2946 virtual void getTargetDefines(const LangOptions &Opts,
2947 MacroBuilder &Builder) const {
2948 WindowsX86_64TargetInfo::getTargetDefines(Opts, Builder);
2949 DefineStd(Builder, "WIN64", Opts);
2950 Builder.defineMacro("__MSVCRT__");
2951 Builder.defineMacro("__MINGW32__");
2952 Builder.defineMacro("__MINGW64__");
2954 // mingw32-gcc provides __declspec(a) as alias of __attribute__((a)).
2955 // In contrast, clang-cc1 provides __declspec(a) with -fms-extensions.
2956 if (Opts.MicrosoftExt)
2957 // Provide "as-is" __declspec.
2958 Builder.defineMacro("__declspec", "__declspec");
2960 // Provide alias of __attribute__ like mingw32-gcc.
2961 Builder.defineMacro("__declspec(a)", "__attribute__((a))");
2964 } // end anonymous namespace
2967 class DarwinX86_64TargetInfo : public DarwinTargetInfo<X86_64TargetInfo> {
2969 DarwinX86_64TargetInfo(const std::string& triple)
2970 : DarwinTargetInfo<X86_64TargetInfo>(triple) {
2971 Int64Type = SignedLongLong;
2972 MaxVectorAlign = 256;
2975 } // end anonymous namespace
2978 class OpenBSDX86_64TargetInfo : public OpenBSDTargetInfo<X86_64TargetInfo> {
2980 OpenBSDX86_64TargetInfo(const std::string& triple)
2981 : OpenBSDTargetInfo<X86_64TargetInfo>(triple) {
2982 IntMaxType = SignedLongLong;
2983 UIntMaxType = UnsignedLongLong;
2984 Int64Type = SignedLongLong;
2987 } // end anonymous namespace
2990 class BitrigX86_64TargetInfo : public BitrigTargetInfo<X86_64TargetInfo> {
2992 BitrigX86_64TargetInfo(const std::string& triple)
2993 : BitrigTargetInfo<X86_64TargetInfo>(triple) {
2994 IntMaxType = SignedLongLong;
2995 UIntMaxType = UnsignedLongLong;
2996 Int64Type = SignedLongLong;
2999 } // end anonymous namespace
3002 class ARMTargetInfo : public TargetInfo {
3003 // Possible FPU choices.
3011 static bool FPUModeIsVFP(FPUMode Mode) {
3012 return Mode & (VFP2FPU | VFP3FPU | VFP4FPU | NeonFPU);
3015 static const TargetInfo::GCCRegAlias GCCRegAliases[];
3016 static const char * const GCCRegNames[];
3018 std::string ABI, CPU;
3022 unsigned IsAAPCS : 1;
3023 unsigned IsThumb : 1;
3025 // Initialized via features.
3026 unsigned SoftFloat : 1;
3027 unsigned SoftFloatABI : 1;
3029 static const Builtin::Info BuiltinInfo[];
3032 ARMTargetInfo(const std::string &TripleStr)
3033 : TargetInfo(TripleStr), ABI("aapcs-linux"), CPU("arm1136j-s"), IsAAPCS(true)
3036 SizeType = UnsignedInt;
3037 PtrDiffType = SignedInt;
3038 // AAPCS 7.1.1, ARM-Linux ABI 2.4: type of wchar_t is unsigned int.
3039 WCharType = UnsignedInt;
3041 // {} in inline assembly are neon specifiers, not assembly variant
3043 NoAsmVariants = true;
3045 // FIXME: Should we just treat this as a feature?
3046 IsThumb = getTriple().getArchName().startswith("thumb");
3048 // Thumb1 add sp, #imm requires the immediate value be multiple of 4,
3049 // so set preferred for small types to 32.
3050 DescriptionString = ("e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-"
3051 "i64:64:64-f32:32:32-f64:64:64-"
3052 "v64:64:64-v128:64:128-a0:0:32-n32-S64");
3054 DescriptionString = ("e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
3055 "i64:64:64-f32:32:32-f64:64:64-"
3056 "v64:64:64-v128:64:128-a0:0:64-n32-S64");
3059 // ARM targets default to using the ARM C++ ABI.
3060 CXXABI = CXXABI_ARM;
3062 // ARM has atomics up to 8 bytes
3063 // FIXME: Set MaxAtomicInlineWidth if we have the feature v6e
3064 MaxAtomicPromoteWidth = 64;
3066 // Do force alignment of members that follow zero length bitfields. If
3067 // the alignment of the zero-length bitfield is greater than the member
3068 // that follows it, `bar', `bar' will be aligned as the type of the
3069 // zero length bitfield.
3070 UseZeroLengthBitfieldAlignment = true;
3072 virtual const char *getABI() const { return ABI.c_str(); }
3073 virtual bool setABI(const std::string &Name) {
3076 // The defaults (above) are for AAPCS, check if we need to change them.
3078 // FIXME: We need support for -meabi... we could just mangle it into the
3080 if (Name == "apcs-gnu") {
3081 DoubleAlign = LongLongAlign = LongDoubleAlign = SuitableAlign = 32;
3082 // size_t is unsigned int on FreeBSD.
3083 if (getTriple().getOS() != llvm::Triple::FreeBSD)
3084 SizeType = UnsignedLong;
3086 // Revert to using SignedInt on apcs-gnu to comply with existing behaviour.
3087 WCharType = SignedInt;
3089 // Do not respect the alignment of bit-field types when laying out
3090 // structures. This corresponds to PCC_BITFIELD_TYPE_MATTERS in gcc.
3091 UseBitFieldTypeAlignment = false;
3093 /// gcc forces the alignment to 4 bytes, regardless of the type of the
3094 /// zero length bitfield. This corresponds to EMPTY_FIELD_BOUNDARY in
3096 ZeroLengthBitfieldBoundary = 32;
3101 // Thumb1 add sp, #imm requires the immediate value be multiple of 4,
3102 // so set preferred for small types to 32.
3103 DescriptionString = ("e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-"
3104 "i64:32:64-f32:32:32-f64:32:64-"
3105 "v64:32:64-v128:32:128-a0:0:32-n32-S32");
3107 DescriptionString = ("e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
3108 "i64:32:64-f32:32:32-f64:32:64-"
3109 "v64:32:64-v128:32:128-a0:0:32-n32-S32");
3112 // FIXME: Override "preferred align" for double and long long.
3113 } else if (Name == "aapcs" || Name == "aapcs-vfp") {
3115 // FIXME: Enumerated types are variable width in straight AAPCS.
3116 } else if (Name == "aapcs-linux") {
3124 void getDefaultFeatures(llvm::StringMap<bool> &Features) const {
3125 if (CPU == "arm1136jf-s" || CPU == "arm1176jzf-s" || CPU == "mpcore")
3126 Features["vfp2"] = true;
3127 else if (CPU == "cortex-a8" || CPU == "cortex-a15" ||
3128 CPU == "cortex-a9" || CPU == "cortex-a9-mp")
3129 Features["neon"] = true;
3130 else if (CPU == "swift") {
3131 Features["vfp4"] = true;
3132 Features["neon"] = true;
3136 virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features,
3138 bool Enabled) const {
3139 if (Name == "soft-float" || Name == "soft-float-abi" ||
3140 Name == "vfp2" || Name == "vfp3" || Name == "vfp4" || Name == "neon" ||
3141 Name == "d16" || Name == "neonfp") {
3142 Features[Name] = Enabled;
3149 virtual void HandleTargetFeatures(std::vector<std::string> &Features) {
3151 SoftFloat = SoftFloatABI = false;
3152 for (unsigned i = 0, e = Features.size(); i != e; ++i) {
3153 if (Features[i] == "+soft-float")
3155 else if (Features[i] == "+soft-float-abi")
3156 SoftFloatABI = true;
3157 else if (Features[i] == "+vfp2")
3159 else if (Features[i] == "+vfp3")
3161 else if (Features[i] == "+vfp4")
3163 else if (Features[i] == "+neon")
3167 // Remove front-end specific options which the backend handles differently.
3168 std::vector<std::string>::iterator it;
3169 it = std::find(Features.begin(), Features.end(), "+soft-float");
3170 if (it != Features.end())
3172 it = std::find(Features.begin(), Features.end(), "+soft-float-abi");
3173 if (it != Features.end())
3177 virtual bool hasFeature(StringRef Feature) const {
3178 return llvm::StringSwitch<bool>(Feature)
3180 .Case("softfloat", SoftFloat)
3181 .Case("thumb", IsThumb)
3182 .Case("neon", FPU == NeonFPU && !SoftFloat &&
3183 StringRef(getCPUDefineSuffix(CPU)).startswith("7"))
3186 // FIXME: Should we actually have some table instead of these switches?
3187 static const char *getCPUDefineSuffix(StringRef Name) {
3188 return llvm::StringSwitch<const char*>(Name)
3189 .Cases("arm8", "arm810", "4")
3190 .Cases("strongarm", "strongarm110", "strongarm1100", "strongarm1110", "4")
3191 .Cases("arm7tdmi", "arm7tdmi-s", "arm710t", "arm720t", "arm9", "4T")
3192 .Cases("arm9tdmi", "arm920", "arm920t", "arm922t", "arm940t", "4T")
3193 .Case("ep9312", "4T")
3194 .Cases("arm10tdmi", "arm1020t", "5T")
3195 .Cases("arm9e", "arm946e-s", "arm966e-s", "arm968e-s", "5TE")
3196 .Case("arm926ej-s", "5TEJ")
3197 .Cases("arm10e", "arm1020e", "arm1022e", "5TE")
3198 .Cases("xscale", "iwmmxt", "5TE")
3199 .Case("arm1136j-s", "6J")
3200 .Cases("arm1176jz-s", "arm1176jzf-s", "6ZK")
3201 .Cases("arm1136jf-s", "mpcorenovfp", "mpcore", "6K")
3202 .Cases("arm1156t2-s", "arm1156t2f-s", "6T2")
3203 .Cases("cortex-a8", "cortex-a9", "cortex-a15", "7A")
3204 .Case("cortex-a9-mp", "7F")
3205 .Case("swift", "7S")
3206 .Cases("cortex-m3", "cortex-m4", "7M")
3207 .Case("cortex-m0", "6M")
3210 static const char *getCPUProfile(StringRef Name) {
3211 return llvm::StringSwitch<const char*>(Name)
3212 .Cases("cortex-a8", "cortex-a9", "A")
3213 .Cases("cortex-m3", "cortex-m4", "cortex-m0", "M")
3216 virtual bool setCPU(const std::string &Name) {
3217 if (!getCPUDefineSuffix(Name))
3223 virtual void getTargetDefines(const LangOptions &Opts,
3224 MacroBuilder &Builder) const {
3225 // Target identification.
3226 Builder.defineMacro("__arm");
3227 Builder.defineMacro("__arm__");
3229 // Target properties.
3230 Builder.defineMacro("__ARMEL__");
3231 Builder.defineMacro("__LITTLE_ENDIAN__");
3232 Builder.defineMacro("__REGISTER_PREFIX__", "");
3234 StringRef CPUArch = getCPUDefineSuffix(CPU);
3235 Builder.defineMacro("__ARM_ARCH_" + CPUArch + "__");
3236 Builder.defineMacro("__ARM_ARCH", CPUArch.substr(0, 1));
3237 StringRef CPUProfile = getCPUProfile(CPU);
3238 if (!CPUProfile.empty())
3239 Builder.defineMacro("__ARM_ARCH_PROFILE", CPUProfile);
3241 // Subtarget options.
3243 // FIXME: It's more complicated than this and we don't really support
3245 if ('5' <= CPUArch[0] && CPUArch[0] <= '7')
3246 Builder.defineMacro("__THUMB_INTERWORK__");
3248 if (ABI == "aapcs" || ABI == "aapcs-linux" || ABI == "aapcs-vfp") {
3249 // M-class CPUs on Darwin follow AAPCS, but not EABI.
3250 if (!(getTriple().isOSDarwin() && CPUProfile == "M"))
3251 Builder.defineMacro("__ARM_EABI__");
3252 Builder.defineMacro("__ARM_PCS", "1");
3254 if ((!SoftFloat && !SoftFloatABI) || ABI == "aapcs-vfp")
3255 Builder.defineMacro("__ARM_PCS_VFP", "1");
3259 Builder.defineMacro("__SOFTFP__");
3261 if (CPU == "xscale")
3262 Builder.defineMacro("__XSCALE__");
3264 bool IsARMv7 = CPUArch.startswith("7");
3266 Builder.defineMacro("__THUMBEL__");
3267 Builder.defineMacro("__thumb__");
3268 if (CPUArch == "6T2" || IsARMv7)
3269 Builder.defineMacro("__thumb2__");
3272 // Note, this is always on in gcc, even though it doesn't make sense.
3273 Builder.defineMacro("__APCS_32__");
3275 if (FPUModeIsVFP((FPUMode) FPU)) {
3276 Builder.defineMacro("__VFP_FP__");
3278 Builder.defineMacro("__ARM_VFPV2__");
3280 Builder.defineMacro("__ARM_VFPV3__");
3282 Builder.defineMacro("__ARM_VFPV4__");
3285 // This only gets set when Neon instructions are actually available, unlike
3286 // the VFP define, hence the soft float and arch check. This is subtly
3287 // different from gcc, we follow the intent which was that it should be set
3288 // when Neon instructions are actually available.
3289 if ((FPU & NeonFPU) && !SoftFloat && IsARMv7)
3290 Builder.defineMacro("__ARM_NEON__");
3292 virtual void getTargetBuiltins(const Builtin::Info *&Records,
3293 unsigned &NumRecords) const {
3294 Records = BuiltinInfo;
3295 NumRecords = clang::ARM::LastTSBuiltin-Builtin::FirstTSBuiltin;
3297 virtual bool isCLZForZeroUndef() const { return false; }
3298 virtual BuiltinVaListKind getBuiltinVaListKind() const {
3299 return IsAAPCS ? AAPCSABIBuiltinVaList : TargetInfo::VoidPtrBuiltinVaList;
3301 virtual void getGCCRegNames(const char * const *&Names,
3302 unsigned &NumNames) const;
3303 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
3304 unsigned &NumAliases) const;
3305 virtual bool validateAsmConstraint(const char *&Name,
3306 TargetInfo::ConstraintInfo &Info) const {
3311 case 'w': // VFP Floating point register single precision
3312 case 'P': // VFP Floating point register double precision
3313 Info.setAllowsRegister();
3315 case 'Q': // A memory address that is a single base register.
3316 Info.setAllowsMemory();
3318 case 'U': // a memory reference...
3320 case 'q': // ...ARMV4 ldrsb
3321 case 'v': // ...VFP load/store (reg+constant offset)
3322 case 'y': // ...iWMMXt load/store
3323 case 't': // address valid for load/store opaque types wider
3325 case 'n': // valid address for Neon doubleword vector load/store
3326 case 'm': // valid address for Neon element and structure load/store
3327 case 's': // valid address for non-offset loads/stores of quad-word
3328 // values in four ARM registers
3329 Info.setAllowsMemory();
3336 virtual std::string convertConstraint(const char *&Constraint) const {
3338 switch (*Constraint) {
3339 case 'U': // Two-character constraint; add "^" hint for later parsing.
3340 R = std::string("^") + std::string(Constraint, 2);
3343 case 'p': // 'p' should be translated to 'r' by default.
3344 R = std::string("r");
3347 return std::string(1, *Constraint);
3351 virtual bool validateConstraintModifier(StringRef Constraint,
3352 const char Modifier,
3353 unsigned Size) const {
3354 // Strip off constraint modifiers.
3355 while (Constraint[0] == '=' ||
3356 Constraint[0] == '+' ||
3357 Constraint[0] == '&')
3358 Constraint = Constraint.substr(1);
3360 switch (Constraint[0]) {
3367 // A register of size 32 cannot fit a vector type.
3375 virtual const char *getClobbers() const {
3376 // FIXME: Is this really right?
3380 virtual CallingConvCheckResult checkCallingConvention(CallingConv CC) const {
3381 return (CC == CC_AAPCS || CC == CC_AAPCS_VFP) ? CCCR_OK : CCCR_Warning;
3385 const char * const ARMTargetInfo::GCCRegNames[] = {
3386 // Integer registers
3387 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
3388 "r8", "r9", "r10", "r11", "r12", "sp", "lr", "pc",
3391 "s0", "s1", "s2", "s3", "s4", "s5", "s6", "s7",
3392 "s8", "s9", "s10", "s11", "s12", "s13", "s14", "s15",
3393 "s16", "s17", "s18", "s19", "s20", "s21", "s22", "s23",
3394 "s24", "s25", "s26", "s27", "s28", "s29", "s30", "s31",
3397 "d0", "d1", "d2", "d3", "d4", "d5", "d6", "d7",
3398 "d8", "d9", "d10", "d11", "d12", "d13", "d14", "d15",
3399 "d16", "d17", "d18", "d19", "d20", "d21", "d22", "d23",
3400 "d24", "d25", "d26", "d27", "d28", "d29", "d30", "d31",
3403 "q0", "q1", "q2", "q3", "q4", "q5", "q6", "q7",
3404 "q8", "q9", "q10", "q11", "q12", "q13", "q14", "q15"
3407 void ARMTargetInfo::getGCCRegNames(const char * const *&Names,
3408 unsigned &NumNames) const {
3409 Names = GCCRegNames;
3410 NumNames = llvm::array_lengthof(GCCRegNames);
3413 const TargetInfo::GCCRegAlias ARMTargetInfo::GCCRegAliases[] = {
3423 { { "v6", "rfp" }, "r9" },
3424 { { "sl" }, "r10" },
3425 { { "fp" }, "r11" },
3426 { { "ip" }, "r12" },
3427 { { "r13" }, "sp" },
3428 { { "r14" }, "lr" },
3429 { { "r15" }, "pc" },
3430 // The S, D and Q registers overlap, but aren't really aliases; we
3431 // don't want to substitute one of these for a different-sized one.
3434 void ARMTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases,
3435 unsigned &NumAliases) const {
3436 Aliases = GCCRegAliases;
3437 NumAliases = llvm::array_lengthof(GCCRegAliases);
3440 const Builtin::Info ARMTargetInfo::BuiltinInfo[] = {
3441 #define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES },
3442 #define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\
3444 #include "clang/Basic/BuiltinsARM.def"
3446 } // end anonymous namespace.
3449 class DarwinARMTargetInfo :
3450 public DarwinTargetInfo<ARMTargetInfo> {
3452 virtual void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
3453 MacroBuilder &Builder) const {
3454 getDarwinDefines(Builder, Opts, Triple, PlatformName, PlatformMinVersion);
3458 DarwinARMTargetInfo(const std::string& triple)
3459 : DarwinTargetInfo<ARMTargetInfo>(triple) {
3460 HasAlignMac68kSupport = true;
3461 // iOS always has 64-bit atomic instructions.
3462 // FIXME: This should be based off of the target features in ARMTargetInfo.
3463 MaxAtomicInlineWidth = 64;
3466 } // end anonymous namespace.
3470 // Hexagon abstract base class
3471 class HexagonTargetInfo : public TargetInfo {
3472 static const Builtin::Info BuiltinInfo[];
3473 static const char * const GCCRegNames[];
3474 static const TargetInfo::GCCRegAlias GCCRegAliases[];
3477 HexagonTargetInfo(const std::string& triple) : TargetInfo(triple) {
3479 DescriptionString = ("e-p:32:32:32-"
3480 "i64:64:64-i32:32:32-i16:16:16-i1:32:32"
3481 "f64:64:64-f32:32:32-a0:0-n32");
3483 // {} in inline assembly are packet specifiers, not assembly variant
3485 NoAsmVariants = true;
3488 virtual void getTargetBuiltins(const Builtin::Info *&Records,
3489 unsigned &NumRecords) const {
3490 Records = BuiltinInfo;
3491 NumRecords = clang::Hexagon::LastTSBuiltin-Builtin::FirstTSBuiltin;
3494 virtual bool validateAsmConstraint(const char *&Name,
3495 TargetInfo::ConstraintInfo &Info) const {
3499 virtual void getTargetDefines(const LangOptions &Opts,
3500 MacroBuilder &Builder) const;
3502 virtual bool hasFeature(StringRef Feature) const {
3503 return Feature == "hexagon";
3506 virtual BuiltinVaListKind getBuiltinVaListKind() const {
3507 return TargetInfo::CharPtrBuiltinVaList;
3509 virtual void getGCCRegNames(const char * const *&Names,
3510 unsigned &NumNames) const;
3511 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
3512 unsigned &NumAliases) const;
3513 virtual const char *getClobbers() const {
3517 static const char *getHexagonCPUSuffix(StringRef Name) {
3518 return llvm::StringSwitch<const char*>(Name)
3519 .Case("hexagonv2", "2")
3520 .Case("hexagonv3", "3")
3521 .Case("hexagonv4", "4")
3522 .Case("hexagonv5", "5")
3526 virtual bool setCPU(const std::string &Name) {
3527 if (!getHexagonCPUSuffix(Name))
3535 void HexagonTargetInfo::getTargetDefines(const LangOptions &Opts,
3536 MacroBuilder &Builder) const {
3537 Builder.defineMacro("qdsp6");
3538 Builder.defineMacro("__qdsp6", "1");
3539 Builder.defineMacro("__qdsp6__", "1");
3541 Builder.defineMacro("hexagon");
3542 Builder.defineMacro("__hexagon", "1");
3543 Builder.defineMacro("__hexagon__", "1");
3545 if(CPU == "hexagonv1") {
3546 Builder.defineMacro("__HEXAGON_V1__");
3547 Builder.defineMacro("__HEXAGON_ARCH__", "1");
3548 if(Opts.HexagonQdsp6Compat) {
3549 Builder.defineMacro("__QDSP6_V1__");
3550 Builder.defineMacro("__QDSP6_ARCH__", "1");
3553 else if(CPU == "hexagonv2") {
3554 Builder.defineMacro("__HEXAGON_V2__");
3555 Builder.defineMacro("__HEXAGON_ARCH__", "2");
3556 if(Opts.HexagonQdsp6Compat) {
3557 Builder.defineMacro("__QDSP6_V2__");
3558 Builder.defineMacro("__QDSP6_ARCH__", "2");
3561 else if(CPU == "hexagonv3") {
3562 Builder.defineMacro("__HEXAGON_V3__");
3563 Builder.defineMacro("__HEXAGON_ARCH__", "3");
3564 if(Opts.HexagonQdsp6Compat) {
3565 Builder.defineMacro("__QDSP6_V3__");
3566 Builder.defineMacro("__QDSP6_ARCH__", "3");
3569 else if(CPU == "hexagonv4") {
3570 Builder.defineMacro("__HEXAGON_V4__");
3571 Builder.defineMacro("__HEXAGON_ARCH__", "4");
3572 if(Opts.HexagonQdsp6Compat) {
3573 Builder.defineMacro("__QDSP6_V4__");
3574 Builder.defineMacro("__QDSP6_ARCH__", "4");
3577 else if(CPU == "hexagonv5") {
3578 Builder.defineMacro("__HEXAGON_V5__");
3579 Builder.defineMacro("__HEXAGON_ARCH__", "5");
3580 if(Opts.HexagonQdsp6Compat) {
3581 Builder.defineMacro("__QDSP6_V5__");
3582 Builder.defineMacro("__QDSP6_ARCH__", "5");
3587 const char * const HexagonTargetInfo::GCCRegNames[] = {
3588 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
3589 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
3590 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
3591 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
3592 "p0", "p1", "p2", "p3",
3593 "sa0", "lc0", "sa1", "lc1", "m0", "m1", "usr", "ugp"
3596 void HexagonTargetInfo::getGCCRegNames(const char * const *&Names,
3597 unsigned &NumNames) const {
3598 Names = GCCRegNames;
3599 NumNames = llvm::array_lengthof(GCCRegNames);
3603 const TargetInfo::GCCRegAlias HexagonTargetInfo::GCCRegAliases[] = {
3604 { { "sp" }, "r29" },
3605 { { "fp" }, "r30" },
3606 { { "lr" }, "r31" },
3609 void HexagonTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases,
3610 unsigned &NumAliases) const {
3611 Aliases = GCCRegAliases;
3612 NumAliases = llvm::array_lengthof(GCCRegAliases);
3616 const Builtin::Info HexagonTargetInfo::BuiltinInfo[] = {
3617 #define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES },
3618 #define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\
3620 #include "clang/Basic/BuiltinsHexagon.def"
3626 class SparcV8TargetInfo : public TargetInfo {
3627 static const TargetInfo::GCCRegAlias GCCRegAliases[];
3628 static const char * const GCCRegNames[];
3631 SparcV8TargetInfo(const std::string& triple) : TargetInfo(triple) {
3632 // FIXME: Support Sparc quad-precision long double?
3633 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-"
3634 "i64:64:64-f32:32:32-f64:64:64-v64:64:64-n32";
3636 virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features,
3638 bool Enabled) const {
3639 if (Name == "soft-float")
3640 Features[Name] = Enabled;
3646 virtual void HandleTargetFeatures(std::vector<std::string> &Features) {
3648 for (unsigned i = 0, e = Features.size(); i != e; ++i)
3649 if (Features[i] == "+soft-float")
3652 virtual void getTargetDefines(const LangOptions &Opts,
3653 MacroBuilder &Builder) const {
3654 DefineStd(Builder, "sparc", Opts);
3655 Builder.defineMacro("__sparcv8");
3656 Builder.defineMacro("__REGISTER_PREFIX__", "");
3659 Builder.defineMacro("SOFT_FLOAT", "1");
3662 virtual bool hasFeature(StringRef Feature) const {
3663 return llvm::StringSwitch<bool>(Feature)
3664 .Case("softfloat", SoftFloat)
3665 .Case("sparc", true)
3669 virtual void getTargetBuiltins(const Builtin::Info *&Records,
3670 unsigned &NumRecords) const {
3671 // FIXME: Implement!
3673 virtual BuiltinVaListKind getBuiltinVaListKind() const {
3674 return TargetInfo::VoidPtrBuiltinVaList;
3676 virtual void getGCCRegNames(const char * const *&Names,
3677 unsigned &NumNames) const;
3678 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
3679 unsigned &NumAliases) const;
3680 virtual bool validateAsmConstraint(const char *&Name,
3681 TargetInfo::ConstraintInfo &info) const {
3682 // FIXME: Implement!
3685 virtual const char *getClobbers() const {
3686 // FIXME: Implement!
3691 const char * const SparcV8TargetInfo::GCCRegNames[] = {
3692 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
3693 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
3694 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
3695 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31"
3698 void SparcV8TargetInfo::getGCCRegNames(const char * const *&Names,
3699 unsigned &NumNames) const {
3700 Names = GCCRegNames;
3701 NumNames = llvm::array_lengthof(GCCRegNames);
3704 const TargetInfo::GCCRegAlias SparcV8TargetInfo::GCCRegAliases[] = {
3715 { { "o2" }, "r10" },
3716 { { "o3" }, "r11" },
3717 { { "o4" }, "r12" },
3718 { { "o5" }, "r13" },
3719 { { "o6", "sp" }, "r14" },
3720 { { "o7" }, "r15" },
3721 { { "l0" }, "r16" },
3722 { { "l1" }, "r17" },
3723 { { "l2" }, "r18" },
3724 { { "l3" }, "r19" },
3725 { { "l4" }, "r20" },
3726 { { "l5" }, "r21" },
3727 { { "l6" }, "r22" },
3728 { { "l7" }, "r23" },
3729 { { "i0" }, "r24" },
3730 { { "i1" }, "r25" },
3731 { { "i2" }, "r26" },
3732 { { "i3" }, "r27" },
3733 { { "i4" }, "r28" },
3734 { { "i5" }, "r29" },
3735 { { "i6", "fp" }, "r30" },
3736 { { "i7" }, "r31" },
3739 void SparcV8TargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases,
3740 unsigned &NumAliases) const {
3741 Aliases = GCCRegAliases;
3742 NumAliases = llvm::array_lengthof(GCCRegAliases);
3744 } // end anonymous namespace.
3747 class AuroraUXSparcV8TargetInfo : public AuroraUXTargetInfo<SparcV8TargetInfo> {
3749 AuroraUXSparcV8TargetInfo(const std::string& triple) :
3750 AuroraUXTargetInfo<SparcV8TargetInfo>(triple) {
3751 SizeType = UnsignedInt;
3752 PtrDiffType = SignedInt;
3755 class SolarisSparcV8TargetInfo : public SolarisTargetInfo<SparcV8TargetInfo> {
3757 SolarisSparcV8TargetInfo(const std::string& triple) :
3758 SolarisTargetInfo<SparcV8TargetInfo>(triple) {
3759 SizeType = UnsignedInt;
3760 PtrDiffType = SignedInt;
3763 } // end anonymous namespace.
3766 class MSP430TargetInfo : public TargetInfo {
3767 static const char * const GCCRegNames[];
3769 MSP430TargetInfo(const std::string& triple) : TargetInfo(triple) {
3771 TLSSupported = false;
3772 IntWidth = 16; IntAlign = 16;
3773 LongWidth = 32; LongLongWidth = 64;
3774 LongAlign = LongLongAlign = 16;
3775 PointerWidth = 16; PointerAlign = 16;
3777 SizeType = UnsignedInt;
3778 IntMaxType = SignedLong;
3779 UIntMaxType = UnsignedLong;
3780 IntPtrType = SignedShort;
3781 PtrDiffType = SignedInt;
3782 SigAtomicType = SignedLong;
3783 DescriptionString = "e-p:16:16:16-i8:8:8-i16:16:16-i32:16:32-n8:16";
3785 virtual void getTargetDefines(const LangOptions &Opts,
3786 MacroBuilder &Builder) const {
3787 Builder.defineMacro("MSP430");
3788 Builder.defineMacro("__MSP430__");
3789 // FIXME: defines for different 'flavours' of MCU
3791 virtual void getTargetBuiltins(const Builtin::Info *&Records,
3792 unsigned &NumRecords) const {
3793 // FIXME: Implement.
3797 virtual bool hasFeature(StringRef Feature) const {
3798 return Feature == "msp430";
3800 virtual void getGCCRegNames(const char * const *&Names,
3801 unsigned &NumNames) const;
3802 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
3803 unsigned &NumAliases) const {
3808 virtual bool validateAsmConstraint(const char *&Name,
3809 TargetInfo::ConstraintInfo &info) const {
3810 // No target constraints for now.
3813 virtual const char *getClobbers() const {
3814 // FIXME: Is this really right?
3817 virtual BuiltinVaListKind getBuiltinVaListKind() const {
3819 return TargetInfo::CharPtrBuiltinVaList;
3823 const char * const MSP430TargetInfo::GCCRegNames[] = {
3824 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
3825 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15"
3828 void MSP430TargetInfo::getGCCRegNames(const char * const *&Names,
3829 unsigned &NumNames) const {
3830 Names = GCCRegNames;
3831 NumNames = llvm::array_lengthof(GCCRegNames);
3837 // LLVM and Clang cannot be used directly to output native binaries for
3838 // target, but is used to compile C code to llvm bitcode with correct
3839 // type and alignment information.
3841 // TCE uses the llvm bitcode as input and uses it for generating customized
3842 // target processor and program binary. TCE co-design environment is
3843 // publicly available in http://tce.cs.tut.fi
3845 static const unsigned TCEOpenCLAddrSpaceMap[] = {
3848 5, // opencl_constant
3854 class TCETargetInfo : public TargetInfo{
3856 TCETargetInfo(const std::string& triple) : TargetInfo(triple) {
3857 TLSSupported = false;
3859 LongWidth = LongLongWidth = 32;
3862 LongAlign = LongLongAlign = 32;
3865 SizeType = UnsignedInt;
3866 IntMaxType = SignedLong;
3867 UIntMaxType = UnsignedLong;
3868 IntPtrType = SignedInt;
3869 PtrDiffType = SignedInt;
3874 LongDoubleWidth = 32;
3875 LongDoubleAlign = 32;
3876 FloatFormat = &llvm::APFloat::IEEEsingle;
3877 DoubleFormat = &llvm::APFloat::IEEEsingle;
3878 LongDoubleFormat = &llvm::APFloat::IEEEsingle;
3879 DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:32-"
3880 "i16:16:32-i32:32:32-i64:32:32-"
3881 "f32:32:32-f64:32:32-v64:32:32-"
3882 "v128:32:32-a0:0:32-n32";
3883 AddrSpaceMap = &TCEOpenCLAddrSpaceMap;
3886 virtual void getTargetDefines(const LangOptions &Opts,
3887 MacroBuilder &Builder) const {
3888 DefineStd(Builder, "tce", Opts);
3889 Builder.defineMacro("__TCE__");
3890 Builder.defineMacro("__TCE_V1__");
3892 virtual bool hasFeature(StringRef Feature) const {
3893 return Feature == "tce";
3896 virtual void getTargetBuiltins(const Builtin::Info *&Records,
3897 unsigned &NumRecords) const {}
3898 virtual const char *getClobbers() const {
3901 virtual BuiltinVaListKind getBuiltinVaListKind() const {
3902 return TargetInfo::VoidPtrBuiltinVaList;
3904 virtual void getGCCRegNames(const char * const *&Names,
3905 unsigned &NumNames) const {}
3906 virtual bool validateAsmConstraint(const char *&Name,
3907 TargetInfo::ConstraintInfo &info) const {
3910 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
3911 unsigned &NumAliases) const {}
3916 class MipsTargetInfoBase : public TargetInfo {
3917 static const Builtin::Info BuiltinInfo[];
3921 HardFloat, SingleFloat, SoftFloat
3931 MipsTargetInfoBase(const std::string& triple,
3932 const std::string& ABIStr,
3933 const std::string& CPUStr)
3934 : TargetInfo(triple),
3937 FloatABI(HardFloat),
3942 virtual const char *getABI() const { return ABI.c_str(); }
3943 virtual bool setABI(const std::string &Name) = 0;
3944 virtual bool setCPU(const std::string &Name) {
3948 void getDefaultFeatures(llvm::StringMap<bool> &Features) const {
3949 Features[ABI] = true;
3950 Features[CPU] = true;
3953 virtual void getTargetDefines(const LangOptions &Opts,
3954 MacroBuilder &Builder) const {
3955 DefineStd(Builder, "mips", Opts);
3956 Builder.defineMacro("_mips");
3957 Builder.defineMacro("__REGISTER_PREFIX__", "");
3961 Builder.defineMacro("__mips_hard_float", Twine(1));
3964 Builder.defineMacro("__mips_hard_float", Twine(1));
3965 Builder.defineMacro("__mips_single_float", Twine(1));
3968 Builder.defineMacro("__mips_soft_float", Twine(1));
3973 Builder.defineMacro("__mips16", Twine(1));
3979 Builder.defineMacro("__mips_dsp_rev", Twine(1));
3980 Builder.defineMacro("__mips_dsp", Twine(1));
3983 Builder.defineMacro("__mips_dsp_rev", Twine(2));
3984 Builder.defineMacro("__mips_dspr2", Twine(1));
3985 Builder.defineMacro("__mips_dsp", Twine(1));
3989 Builder.defineMacro("_MIPS_SZPTR", Twine(getPointerWidth(0)));
3990 Builder.defineMacro("_MIPS_SZINT", Twine(getIntWidth()));
3991 Builder.defineMacro("_MIPS_SZLONG", Twine(getLongWidth()));
3993 Builder.defineMacro("_MIPS_ARCH", "\"" + CPU + "\"");
3994 Builder.defineMacro("_MIPS_ARCH_" + StringRef(CPU).upper());
3997 virtual void getTargetBuiltins(const Builtin::Info *&Records,
3998 unsigned &NumRecords) const {
3999 Records = BuiltinInfo;
4000 NumRecords = clang::Mips::LastTSBuiltin - Builtin::FirstTSBuiltin;
4002 virtual bool hasFeature(StringRef Feature) const {
4003 return Feature == "mips";
4005 virtual BuiltinVaListKind getBuiltinVaListKind() const {
4006 return TargetInfo::VoidPtrBuiltinVaList;
4008 virtual void getGCCRegNames(const char * const *&Names,
4009 unsigned &NumNames) const {
4010 static const char * const GCCRegNames[] = {
4011 // CPU register names
4012 // Must match second column of GCCRegAliases
4013 "$0", "$1", "$2", "$3", "$4", "$5", "$6", "$7",
4014 "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15",
4015 "$16", "$17", "$18", "$19", "$20", "$21", "$22", "$23",
4016 "$24", "$25", "$26", "$27", "$28", "$29", "$30", "$31",
4017 // Floating point register names
4018 "$f0", "$f1", "$f2", "$f3", "$f4", "$f5", "$f6", "$f7",
4019 "$f8", "$f9", "$f10", "$f11", "$f12", "$f13", "$f14", "$f15",
4020 "$f16", "$f17", "$f18", "$f19", "$f20", "$f21", "$f22", "$f23",
4021 "$f24", "$f25", "$f26", "$f27", "$f28", "$f29", "$f30", "$f31",
4022 // Hi/lo and condition register names
4023 "hi", "lo", "", "$fcc0","$fcc1","$fcc2","$fcc3","$fcc4",
4024 "$fcc5","$fcc6","$fcc7"
4026 Names = GCCRegNames;
4027 NumNames = llvm::array_lengthof(GCCRegNames);
4029 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
4030 unsigned &NumAliases) const = 0;
4031 virtual bool validateAsmConstraint(const char *&Name,
4032 TargetInfo::ConstraintInfo &Info) const {
4037 case 'r': // CPU registers.
4038 case 'd': // Equivalent to "r" unless generating MIPS16 code.
4039 case 'y': // Equivalent to "r", backwards compatibility only.
4040 case 'f': // floating-point registers.
4041 case 'c': // $25 for indirect jumps
4042 case 'l': // lo register
4043 case 'x': // hilo register pair
4044 Info.setAllowsRegister();
4049 virtual const char *getClobbers() const {
4050 // FIXME: Implement!
4054 virtual bool setFeatureEnabled(llvm::StringMap<bool> &Features,
4056 bool Enabled) const {
4057 if (Name == "soft-float" || Name == "single-float" ||
4058 Name == "o32" || Name == "n32" || Name == "n64" || Name == "eabi" ||
4059 Name == "mips32" || Name == "mips32r2" ||
4060 Name == "mips64" || Name == "mips64r2" ||
4061 Name == "mips16" || Name == "dsp" || Name == "dspr2") {
4062 Features[Name] = Enabled;
4068 virtual void HandleTargetFeatures(std::vector<std::string> &Features) {
4070 FloatABI = HardFloat;
4073 for (std::vector<std::string>::iterator it = Features.begin(),
4074 ie = Features.end(); it != ie; ++it) {
4075 if (*it == "+single-float")
4076 FloatABI = SingleFloat;
4077 else if (*it == "+soft-float")
4078 FloatABI = SoftFloat;
4079 else if (*it == "+mips16")
4081 else if (*it == "+dsp")
4082 DspRev = std::max(DspRev, DSP1);
4083 else if (*it == "+dspr2")
4084 DspRev = std::max(DspRev, DSP2);
4087 // Remove front-end specific option.
4088 std::vector<std::string>::iterator it =
4089 std::find(Features.begin(), Features.end(), "+soft-float");
4090 if (it != Features.end())
4095 const Builtin::Info MipsTargetInfoBase::BuiltinInfo[] = {
4096 #define BUILTIN(ID, TYPE, ATTRS) { #ID, TYPE, ATTRS, 0, ALL_LANGUAGES },
4097 #define LIBBUILTIN(ID, TYPE, ATTRS, HEADER) { #ID, TYPE, ATTRS, HEADER,\
4099 #include "clang/Basic/BuiltinsMips.def"
4102 class Mips32TargetInfoBase : public MipsTargetInfoBase {
4104 Mips32TargetInfoBase(const std::string& triple) :
4105 MipsTargetInfoBase(triple, "o32", "mips32") {
4106 SizeType = UnsignedInt;
4107 PtrDiffType = SignedInt;
4109 virtual bool setABI(const std::string &Name) {
4110 if ((Name == "o32") || (Name == "eabi")) {
4116 virtual void getTargetDefines(const LangOptions &Opts,
4117 MacroBuilder &Builder) const {
4118 MipsTargetInfoBase::getTargetDefines(Opts, Builder);
4121 Builder.defineMacro("__mips_o32");
4122 Builder.defineMacro("_ABIO32", "1");
4123 Builder.defineMacro("_MIPS_SIM", "_ABIO32");
4125 else if (ABI == "eabi")
4126 Builder.defineMacro("__mips_eabi");
4128 llvm_unreachable("Invalid ABI for Mips32.");
4130 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
4131 unsigned &NumAliases) const {
4132 static const TargetInfo::GCCRegAlias GCCRegAliases[] = {
4142 { { "t2" }, "$10" },
4143 { { "t3" }, "$11" },
4144 { { "t4" }, "$12" },
4145 { { "t5" }, "$13" },
4146 { { "t6" }, "$14" },
4147 { { "t7" }, "$15" },
4148 { { "s0" }, "$16" },
4149 { { "s1" }, "$17" },
4150 { { "s2" }, "$18" },
4151 { { "s3" }, "$19" },
4152 { { "s4" }, "$20" },
4153 { { "s5" }, "$21" },
4154 { { "s6" }, "$22" },
4155 { { "s7" }, "$23" },
4156 { { "t8" }, "$24" },
4157 { { "t9" }, "$25" },
4158 { { "k0" }, "$26" },
4159 { { "k1" }, "$27" },
4160 { { "gp" }, "$28" },
4161 { { "sp","$sp" }, "$29" },
4162 { { "fp","$fp" }, "$30" },
4165 Aliases = GCCRegAliases;
4166 NumAliases = llvm::array_lengthof(GCCRegAliases);
4170 class Mips32EBTargetInfo : public Mips32TargetInfoBase {
4172 Mips32EBTargetInfo(const std::string& triple) : Mips32TargetInfoBase(triple) {
4173 DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-"
4174 "i64:64:64-f32:32:32-f64:64:64-v64:64:64-n32";
4176 virtual void getTargetDefines(const LangOptions &Opts,
4177 MacroBuilder &Builder) const {
4178 DefineStd(Builder, "MIPSEB", Opts);
4179 Builder.defineMacro("_MIPSEB");
4180 Mips32TargetInfoBase::getTargetDefines(Opts, Builder);
4184 class Mips32ELTargetInfo : public Mips32TargetInfoBase {
4186 Mips32ELTargetInfo(const std::string& triple) : Mips32TargetInfoBase(triple) {
4188 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-"
4189 "i64:64:64-f32:32:32-f64:64:64-v64:64:64-n32";
4191 virtual void getTargetDefines(const LangOptions &Opts,
4192 MacroBuilder &Builder) const {
4193 DefineStd(Builder, "MIPSEL", Opts);
4194 Builder.defineMacro("_MIPSEL");
4195 Mips32TargetInfoBase::getTargetDefines(Opts, Builder);
4199 class Mips64TargetInfoBase : public MipsTargetInfoBase {
4200 virtual void SetDescriptionString(const std::string &Name) = 0;
4202 Mips64TargetInfoBase(const std::string& triple) :
4203 MipsTargetInfoBase(triple, "n64", "mips64") {
4204 LongWidth = LongAlign = 64;
4205 PointerWidth = PointerAlign = 64;
4206 LongDoubleWidth = LongDoubleAlign = 128;
4207 LongDoubleFormat = &llvm::APFloat::IEEEquad;
4208 SuitableAlign = 128;
4210 virtual bool setABI(const std::string &Name) {
4211 SetDescriptionString(Name);
4213 if (Name != "n32" && Name != "n64")
4218 if (Name == "n32") {
4219 LongWidth = LongAlign = 32;
4220 PointerWidth = PointerAlign = 32;
4225 virtual void getTargetDefines(const LangOptions &Opts,
4226 MacroBuilder &Builder) const {
4227 MipsTargetInfoBase::getTargetDefines(Opts, Builder);
4229 Builder.defineMacro("__mips64");
4230 Builder.defineMacro("__mips64__");
4233 Builder.defineMacro("__mips_n32");
4234 Builder.defineMacro("_ABIN32", "2");
4235 Builder.defineMacro("_MIPS_SIM", "_ABIN32");
4237 else if (ABI == "n64") {
4238 Builder.defineMacro("__mips_n64");
4239 Builder.defineMacro("_ABI64", "3");
4240 Builder.defineMacro("_MIPS_SIM", "_ABI64");
4243 llvm_unreachable("Invalid ABI for Mips64.");
4245 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
4246 unsigned &NumAliases) const {
4247 static const TargetInfo::GCCRegAlias GCCRegAliases[] = {
4257 { { "a6" }, "$10" },
4258 { { "a7" }, "$11" },
4259 { { "t0" }, "$12" },
4260 { { "t1" }, "$13" },
4261 { { "t2" }, "$14" },
4262 { { "t3" }, "$15" },
4263 { { "s0" }, "$16" },
4264 { { "s1" }, "$17" },
4265 { { "s2" }, "$18" },
4266 { { "s3" }, "$19" },
4267 { { "s4" }, "$20" },
4268 { { "s5" }, "$21" },
4269 { { "s6" }, "$22" },
4270 { { "s7" }, "$23" },
4271 { { "t8" }, "$24" },
4272 { { "t9" }, "$25" },
4273 { { "k0" }, "$26" },
4274 { { "k1" }, "$27" },
4275 { { "gp" }, "$28" },
4276 { { "sp","$sp" }, "$29" },
4277 { { "fp","$fp" }, "$30" },
4280 Aliases = GCCRegAliases;
4281 NumAliases = llvm::array_lengthof(GCCRegAliases);
4285 class Mips64EBTargetInfo : public Mips64TargetInfoBase {
4286 virtual void SetDescriptionString(const std::string &Name) {
4287 // Change DescriptionString only if ABI is n32.
4289 DescriptionString = "E-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-"
4290 "i64:64:64-f32:32:32-f64:64:64-f128:128:128-"
4294 Mips64EBTargetInfo(const std::string& triple) : Mips64TargetInfoBase(triple) {
4295 // Default ABI is n64.
4296 DescriptionString = "E-p:64:64:64-i1:8:8-i8:8:32-i16:16:32-i32:32:32-"
4297 "i64:64:64-f32:32:32-f64:64:64-f128:128:128-"
4300 virtual void getTargetDefines(const LangOptions &Opts,
4301 MacroBuilder &Builder) const {
4302 DefineStd(Builder, "MIPSEB", Opts);
4303 Builder.defineMacro("_MIPSEB");
4304 Mips64TargetInfoBase::getTargetDefines(Opts, Builder);
4308 class Mips64ELTargetInfo : public Mips64TargetInfoBase {
4309 virtual void SetDescriptionString(const std::string &Name) {
4310 // Change DescriptionString only if ABI is n32.
4312 DescriptionString = "e-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-"
4313 "i64:64:64-f32:32:32-f64:64:64-f128:128:128"
4317 Mips64ELTargetInfo(const std::string& triple) : Mips64TargetInfoBase(triple) {
4318 // Default ABI is n64.
4320 DescriptionString = "e-p:64:64:64-i1:8:8-i8:8:32-i16:16:32-i32:32:32-"
4321 "i64:64:64-f32:32:32-f64:64:64-f128:128:128-"
4324 virtual void getTargetDefines(const LangOptions &Opts,
4325 MacroBuilder &Builder) const {
4326 DefineStd(Builder, "MIPSEL", Opts);
4327 Builder.defineMacro("_MIPSEL");
4328 Mips64TargetInfoBase::getTargetDefines(Opts, Builder);
4331 } // end anonymous namespace.
4334 class PNaClTargetInfo : public TargetInfo {
4336 PNaClTargetInfo(const std::string& triple) : TargetInfo(triple) {
4338 this->UserLabelPrefix = "";
4339 this->LongAlign = 32;
4340 this->LongWidth = 32;
4341 this->PointerAlign = 32;
4342 this->PointerWidth = 32;
4343 this->IntMaxType = TargetInfo::SignedLongLong;
4344 this->UIntMaxType = TargetInfo::UnsignedLongLong;
4345 this->Int64Type = TargetInfo::SignedLongLong;
4346 this->DoubleAlign = 64;
4347 this->LongDoubleWidth = 64;
4348 this->LongDoubleAlign = 64;
4349 this->SizeType = TargetInfo::UnsignedInt;
4350 this->PtrDiffType = TargetInfo::SignedInt;
4351 this->IntPtrType = TargetInfo::SignedInt;
4352 this->RegParmMax = 2;
4353 DescriptionString = "e-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-"
4354 "f32:32:32-f64:64:64-p:32:32:32-v128:32:32";
4357 void getDefaultFeatures(llvm::StringMap<bool> &Features) const {
4359 virtual void getArchDefines(const LangOptions &Opts,
4360 MacroBuilder &Builder) const {
4361 Builder.defineMacro("__le32__");
4362 Builder.defineMacro("__pnacl__");
4364 virtual void getTargetDefines(const LangOptions &Opts,
4365 MacroBuilder &Builder) const {
4366 Builder.defineMacro("__LITTLE_ENDIAN__");
4367 getArchDefines(Opts, Builder);
4369 virtual bool hasFeature(StringRef Feature) const {
4370 return Feature == "pnacl";
4372 virtual void getTargetBuiltins(const Builtin::Info *&Records,
4373 unsigned &NumRecords) const {
4375 virtual BuiltinVaListKind getBuiltinVaListKind() const {
4376 return TargetInfo::PNaClABIBuiltinVaList;
4378 virtual void getGCCRegNames(const char * const *&Names,
4379 unsigned &NumNames) const;
4380 virtual void getGCCRegAliases(const GCCRegAlias *&Aliases,
4381 unsigned &NumAliases) const;
4382 virtual bool validateAsmConstraint(const char *&Name,
4383 TargetInfo::ConstraintInfo &Info) const {
4387 virtual const char *getClobbers() const {
4392 void PNaClTargetInfo::getGCCRegNames(const char * const *&Names,
4393 unsigned &NumNames) const {
4398 void PNaClTargetInfo::getGCCRegAliases(const GCCRegAlias *&Aliases,
4399 unsigned &NumAliases) const {
4403 } // end anonymous namespace.
4406 //===----------------------------------------------------------------------===//
4408 //===----------------------------------------------------------------------===//
4410 static TargetInfo *AllocateTarget(const std::string &T) {
4411 llvm::Triple Triple(T);
4412 llvm::Triple::OSType os = Triple.getOS();
4414 switch (Triple.getArch()) {
4418 case llvm::Triple::hexagon:
4419 return new HexagonTargetInfo(T);
4421 case llvm::Triple::arm:
4422 case llvm::Triple::thumb:
4423 if (Triple.isOSDarwin())
4424 return new DarwinARMTargetInfo(T);
4427 case llvm::Triple::Linux:
4428 return new LinuxTargetInfo<ARMTargetInfo>(T);
4429 case llvm::Triple::FreeBSD:
4430 return new FreeBSDTargetInfo<ARMTargetInfo>(T);
4431 case llvm::Triple::NetBSD:
4432 return new NetBSDTargetInfo<ARMTargetInfo>(T);
4433 case llvm::Triple::OpenBSD:
4434 return new OpenBSDTargetInfo<ARMTargetInfo>(T);
4435 case llvm::Triple::Bitrig:
4436 return new BitrigTargetInfo<ARMTargetInfo>(T);
4437 case llvm::Triple::RTEMS:
4438 return new RTEMSTargetInfo<ARMTargetInfo>(T);
4439 case llvm::Triple::NativeClient:
4440 return new NaClTargetInfo<ARMTargetInfo>(T);
4442 return new ARMTargetInfo(T);
4445 case llvm::Triple::msp430:
4446 return new MSP430TargetInfo(T);
4448 case llvm::Triple::mips:
4450 case llvm::Triple::Linux:
4451 return new LinuxTargetInfo<Mips32EBTargetInfo>(T);
4452 case llvm::Triple::RTEMS:
4453 return new RTEMSTargetInfo<Mips32EBTargetInfo>(T);
4454 case llvm::Triple::FreeBSD:
4455 return new FreeBSDTargetInfo<Mips32EBTargetInfo>(T);
4456 case llvm::Triple::NetBSD:
4457 return new NetBSDTargetInfo<Mips32EBTargetInfo>(T);
4459 return new Mips32EBTargetInfo(T);
4462 case llvm::Triple::mipsel:
4464 case llvm::Triple::Linux:
4465 return new LinuxTargetInfo<Mips32ELTargetInfo>(T);
4466 case llvm::Triple::RTEMS:
4467 return new RTEMSTargetInfo<Mips32ELTargetInfo>(T);
4468 case llvm::Triple::FreeBSD:
4469 return new FreeBSDTargetInfo<Mips32ELTargetInfo>(T);
4470 case llvm::Triple::NetBSD:
4471 return new NetBSDTargetInfo<Mips32ELTargetInfo>(T);
4473 return new Mips32ELTargetInfo(T);
4476 case llvm::Triple::mips64:
4478 case llvm::Triple::Linux:
4479 return new LinuxTargetInfo<Mips64EBTargetInfo>(T);
4480 case llvm::Triple::RTEMS:
4481 return new RTEMSTargetInfo<Mips64EBTargetInfo>(T);
4482 case llvm::Triple::FreeBSD:
4483 return new FreeBSDTargetInfo<Mips64EBTargetInfo>(T);
4484 case llvm::Triple::NetBSD:
4485 return new NetBSDTargetInfo<Mips64EBTargetInfo>(T);
4486 case llvm::Triple::OpenBSD:
4487 return new OpenBSDTargetInfo<Mips64EBTargetInfo>(T);
4489 return new Mips64EBTargetInfo(T);
4492 case llvm::Triple::mips64el:
4494 case llvm::Triple::Linux:
4495 return new LinuxTargetInfo<Mips64ELTargetInfo>(T);
4496 case llvm::Triple::RTEMS:
4497 return new RTEMSTargetInfo<Mips64ELTargetInfo>(T);
4498 case llvm::Triple::FreeBSD:
4499 return new FreeBSDTargetInfo<Mips64ELTargetInfo>(T);
4500 case llvm::Triple::NetBSD:
4501 return new NetBSDTargetInfo<Mips64ELTargetInfo>(T);
4502 case llvm::Triple::OpenBSD:
4503 return new OpenBSDTargetInfo<Mips64ELTargetInfo>(T);
4505 return new Mips64ELTargetInfo(T);
4508 case llvm::Triple::le32:
4510 case llvm::Triple::NativeClient:
4511 return new NaClTargetInfo<PNaClTargetInfo>(T);
4516 case llvm::Triple::ppc:
4517 if (Triple.isOSDarwin())
4518 return new DarwinPPC32TargetInfo(T);
4520 case llvm::Triple::Linux:
4521 return new LinuxTargetInfo<PPC32TargetInfo>(T);
4522 case llvm::Triple::FreeBSD:
4523 return new FreeBSDTargetInfo<PPC32TargetInfo>(T);
4524 case llvm::Triple::NetBSD:
4525 return new NetBSDTargetInfo<PPC32TargetInfo>(T);
4526 case llvm::Triple::OpenBSD:
4527 return new OpenBSDTargetInfo<PPC32TargetInfo>(T);
4528 case llvm::Triple::RTEMS:
4529 return new RTEMSTargetInfo<PPC32TargetInfo>(T);
4531 return new PPC32TargetInfo(T);
4534 case llvm::Triple::ppc64:
4535 if (Triple.isOSDarwin())
4536 return new DarwinPPC64TargetInfo(T);
4538 case llvm::Triple::Linux:
4539 return new LinuxTargetInfo<PPC64TargetInfo>(T);
4540 case llvm::Triple::Lv2:
4541 return new PS3PPUTargetInfo<PPC64TargetInfo>(T);
4542 case llvm::Triple::FreeBSD:
4543 return new FreeBSDTargetInfo<PPC64TargetInfo>(T);
4544 case llvm::Triple::NetBSD:
4545 return new NetBSDTargetInfo<PPC64TargetInfo>(T);
4547 return new PPC64TargetInfo(T);
4550 case llvm::Triple::nvptx:
4551 return new NVPTX32TargetInfo(T);
4552 case llvm::Triple::nvptx64:
4553 return new NVPTX64TargetInfo(T);
4555 case llvm::Triple::mblaze:
4556 return new MBlazeTargetInfo(T);
4558 case llvm::Triple::r600:
4559 return new R600TargetInfo(T);
4561 case llvm::Triple::sparc:
4563 case llvm::Triple::Linux:
4564 return new LinuxTargetInfo<SparcV8TargetInfo>(T);
4565 case llvm::Triple::AuroraUX:
4566 return new AuroraUXSparcV8TargetInfo(T);
4567 case llvm::Triple::Solaris:
4568 return new SolarisSparcV8TargetInfo(T);
4569 case llvm::Triple::NetBSD:
4570 return new NetBSDTargetInfo<SparcV8TargetInfo>(T);
4571 case llvm::Triple::OpenBSD:
4572 return new OpenBSDTargetInfo<SparcV8TargetInfo>(T);
4573 case llvm::Triple::RTEMS:
4574 return new RTEMSTargetInfo<SparcV8TargetInfo>(T);
4576 return new SparcV8TargetInfo(T);
4579 // FIXME: Need a real SPU target.
4580 case llvm::Triple::cellspu:
4581 return new PS3SPUTargetInfo<PPC64TargetInfo>(T);
4583 case llvm::Triple::tce:
4584 return new TCETargetInfo(T);
4586 case llvm::Triple::x86:
4587 if (Triple.isOSDarwin())
4588 return new DarwinI386TargetInfo(T);
4591 case llvm::Triple::AuroraUX:
4592 return new AuroraUXTargetInfo<X86_32TargetInfo>(T);
4593 case llvm::Triple::Linux:
4594 return new LinuxTargetInfo<X86_32TargetInfo>(T);
4595 case llvm::Triple::DragonFly:
4596 return new DragonFlyBSDTargetInfo<X86_32TargetInfo>(T);
4597 case llvm::Triple::NetBSD:
4598 return new NetBSDI386TargetInfo(T);
4599 case llvm::Triple::OpenBSD:
4600 return new OpenBSDI386TargetInfo(T);
4601 case llvm::Triple::Bitrig:
4602 return new BitrigI386TargetInfo(T);
4603 case llvm::Triple::FreeBSD:
4604 return new FreeBSDTargetInfo<X86_32TargetInfo>(T);
4605 case llvm::Triple::Minix:
4606 return new MinixTargetInfo<X86_32TargetInfo>(T);
4607 case llvm::Triple::Solaris:
4608 return new SolarisTargetInfo<X86_32TargetInfo>(T);
4609 case llvm::Triple::Cygwin:
4610 return new CygwinX86_32TargetInfo(T);
4611 case llvm::Triple::MinGW32:
4612 return new MinGWX86_32TargetInfo(T);
4613 case llvm::Triple::Win32:
4614 return new VisualStudioWindowsX86_32TargetInfo(T);
4615 case llvm::Triple::Haiku:
4616 return new HaikuX86_32TargetInfo(T);
4617 case llvm::Triple::RTEMS:
4618 return new RTEMSX86_32TargetInfo(T);
4619 case llvm::Triple::NativeClient:
4620 return new NaClTargetInfo<X86_32TargetInfo>(T);
4622 return new X86_32TargetInfo(T);
4625 case llvm::Triple::x86_64:
4626 if (Triple.isOSDarwin() || Triple.getEnvironment() == llvm::Triple::MachO)
4627 return new DarwinX86_64TargetInfo(T);
4630 case llvm::Triple::AuroraUX:
4631 return new AuroraUXTargetInfo<X86_64TargetInfo>(T);
4632 case llvm::Triple::Linux:
4633 return new LinuxTargetInfo<X86_64TargetInfo>(T);
4634 case llvm::Triple::DragonFly:
4635 return new DragonFlyBSDTargetInfo<X86_64TargetInfo>(T);
4636 case llvm::Triple::NetBSD:
4637 return new NetBSDTargetInfo<X86_64TargetInfo>(T);
4638 case llvm::Triple::OpenBSD:
4639 return new OpenBSDX86_64TargetInfo(T);
4640 case llvm::Triple::Bitrig:
4641 return new BitrigX86_64TargetInfo(T);
4642 case llvm::Triple::FreeBSD:
4643 return new FreeBSDTargetInfo<X86_64TargetInfo>(T);
4644 case llvm::Triple::Solaris:
4645 return new SolarisTargetInfo<X86_64TargetInfo>(T);
4646 case llvm::Triple::MinGW32:
4647 return new MinGWX86_64TargetInfo(T);
4648 case llvm::Triple::Win32: // This is what Triple.h supports now.
4649 return new VisualStudioWindowsX86_64TargetInfo(T);
4650 case llvm::Triple::NativeClient:
4651 return new NaClTargetInfo<X86_64TargetInfo>(T);
4653 return new X86_64TargetInfo(T);
4658 /// CreateTargetInfo - Return the target info object for the specified target
4660 TargetInfo *TargetInfo::CreateTargetInfo(DiagnosticsEngine &Diags,
4661 TargetOptions &Opts) {
4662 llvm::Triple Triple(Opts.Triple);
4664 // Construct the target
4665 OwningPtr<TargetInfo> Target(AllocateTarget(Triple.str()));
4667 Diags.Report(diag::err_target_unknown_triple) << Triple.str();
4670 Target->setTargetOpts(Opts);
4672 // Set the target CPU if specified.
4673 if (!Opts.CPU.empty() && !Target->setCPU(Opts.CPU)) {
4674 Diags.Report(diag::err_target_unknown_cpu) << Opts.CPU;
4678 // Set the target ABI if specified.
4679 if (!Opts.ABI.empty() && !Target->setABI(Opts.ABI)) {
4680 Diags.Report(diag::err_target_unknown_abi) << Opts.ABI;
4684 // Set the target C++ ABI.
4685 if (!Opts.CXXABI.empty() && !Target->setCXXABI(Opts.CXXABI)) {
4686 Diags.Report(diag::err_target_unknown_cxxabi) << Opts.CXXABI;
4690 // Compute the default target features, we need the target to handle this
4691 // because features may have dependencies on one another.
4692 llvm::StringMap<bool> Features;
4693 Target->getDefaultFeatures(Features);
4695 // Apply the user specified deltas.
4696 // First the enables.
4697 for (std::vector<std::string>::const_iterator
4698 it = Opts.FeaturesAsWritten.begin(),
4699 ie = Opts.FeaturesAsWritten.end();
4701 const char *Name = it->c_str();
4706 // Apply the feature via the target.
4707 if (!Target->setFeatureEnabled(Features, Name + 1, true)) {
4708 Diags.Report(diag::err_target_invalid_feature) << Name;
4713 // Then the disables.
4714 for (std::vector<std::string>::const_iterator
4715 it = Opts.FeaturesAsWritten.begin(),
4716 ie = Opts.FeaturesAsWritten.end();
4718 const char *Name = it->c_str();
4723 // Apply the feature via the target.
4724 if (Name[0] != '-' ||
4725 !Target->setFeatureEnabled(Features, Name + 1, false)) {
4726 Diags.Report(diag::err_target_invalid_feature) << Name;
4731 // Add the features to the compile options.
4733 // FIXME: If we are completely confident that we have the right set, we only
4734 // need to pass the minuses.
4735 Opts.Features.clear();
4736 for (llvm::StringMap<bool>::const_iterator it = Features.begin(),
4737 ie = Features.end(); it != ie; ++it)
4738 Opts.Features.push_back((it->second ? "+" : "-") + it->first().str());
4739 Target->HandleTargetFeatures(Opts.Features);
4741 return Target.take();