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31 .Nd measurement events for
40 AMD K7 PMCs are present in the
42 series of CPUs and are documented in:
44 .%B "AMD Athlon Processor x86 Code Optimization Guide"
45 .%N "Publication No. 22007"
47 .%Q "Advanced Micro Devices, Inc."
50 AMD K7 PMCs are 48 bits wide.
51 Each K7 CPU contains 4 PMCs with the following capabilities:
52 .Bl -column "PMC_CAP_INTERRUPT" "Support"
53 .It Em Capability Ta Em Support
54 .It PMC_CAP_CASCADE Ta \&No
55 .It PMC_CAP_EDGE Ta Yes
56 .It PMC_CAP_INTERRUPT Ta Yes
57 .It PMC_CAP_INVERT Ta Yes
58 .It PMC_CAP_READ Ta Yes
59 .It PMC_CAP_PRECISE Ta \&No
60 .It PMC_CAP_SYSTEM Ta Yes
61 .It PMC_CAP_TAGGING Ta \&No
62 .It PMC_CAP_THRESHOLD Ta Yes
63 .It PMC_CAP_USER Ta Yes
64 .It PMC_CAP_WRITE Ta Yes
67 Event specifiers for AMD K7 PMCs can have the following optional
69 .Bl -tag -width indent
70 .It Li count= Ns Ar value
71 Configure the counter to increment only if the number of configured
72 events measured in a cycle is greater than or equal to
75 Configure the counter to only count negated-to-asserted transitions
76 of the conditions expressed by the other qualifiers.
77 In other words, the counter will increment only once whenever a given
78 condition becomes true, irrespective of the number of clocks during
79 which the condition remains true.
81 Invert the sense of comparison when the
83 qualifier is present, making the counter to increment when the
84 number of events per cycle is less than the value specified by
89 Configure the PMC to count events happening at privilege level 0.
90 .It Li unitmask= Ns Ar mask
91 This qualifier is used to further qualify a select few events,
92 .Dq Li k7-dc-refills-from-l2 ,
93 .Dq Li k7-dc-refills-from-system
95 .Dq Li k7-dc-writebacks .
98 is a string of the following characters optionally separated by
102 .Bl -tag -width indent -compact
104 Count operations for lines in the
108 Count operations for lines in the
112 Count operations for lines in the
116 Count operations for lines in the
120 Count operations for lines in the
127 qualifier is specified, the default is to count events for caches
128 lines in any of the above states.
130 Configure the PMC to count events occurring at privilege levels 1, 2
138 qualifiers were specified, the default is to enable both.
139 .Ss AMD K7 Event Specifiers
140 The event specifiers supported on AMD K7 PMCs are:
141 .Bl -tag -width indent
142 .It Li k7-dc-accesses
144 Count data cache accesses.
147 Count data cache misses.
148 .It Li k7-dc-refills-from-l2 Op Li ,unitmask= Ns Ar mask
150 Count data cache refills from L2 cache.
151 This event may be further qualified using the
154 .It Li k7-dc-refills-from-system Op Li ,unitmask= Ns Ar mask
156 Count data cache refills from system memory.
157 This event may be further qualified using the
160 .It Li k7-dc-writebacks Op Li ,unitmask= Ns Ar mask
162 Count data cache writebacks.
163 This event may be further qualified using the
166 .It Li k7-hardware-interrupts
168 Count the number of taken hardware interrupts.
171 Count instruction cache fetches.
174 Count instruction cache misses.
175 .It Li k7-interrupts-masked-cycles
177 Count the number of cycles when the processor's
180 .It Li k7-interrupts-masked-while-pending-cycles
182 Count the number of cycles interrupts were masked while pending due
186 .It Li k7-l1-and-l2-dtlb-misses
188 Count L1 and L2 DTLB misses.
189 .It Li k7-l1-dtlb-miss-and-l2-dtlb-hits
191 Count L1 DTLB misses and L2 DTLB hits.
192 .It Li k7-l1-itlb-misses
194 Count L1 ITLB misses that are L2 ITLB hits.
195 .It Li k7-l1-l2-itlb-misses
197 Count L1 (and L2) ITLB misses.
198 .It Li k7-misaligned-references
200 Count misaligned data references.
201 .It Li k7-retired-branches
203 Count all retired branches (conditional, unconditional, exceptions
205 .It Li k7-retired-branches-mispredicted
207 Count all mispredicted retired branches.
208 .It Li k7-retired-far-control-transfers
210 Count retired far control transfers.
211 .It Li k7-retired-instructions
213 Count all retired instructions.
214 .It Li k7-retired-ops
217 .It Li k7-retired-resync-branches
219 Count retired resync branches (non control transfer branches).
220 .It Li k7-retired-taken-branches
222 Count retired taken branches.
223 .It Li k7-retired-taken-branches-mispredicted
225 Count mispredicted taken branches that were retired.
227 .Ss Event Name Aliases
228 The following table shows the mapping between the PMC-independent
231 and the underlying hardware events used.
232 .Bl -column "branch-mispredicts" "Description"
233 .It Em Alias Ta Em Event
234 .It Li branches Ta Li k7-retired-branches
235 .It Li branch-mispredicts Ta Li k7-retired-branches-mispredicted
236 .It Li dc-misses Ta Li k7-dc-misses
237 .It Li ic-misses Ta Li k7-ic-misses
238 .It Li instructions Ta Li k7-retired-instructions
239 .It Li interrupts Ta Li k7-hardware-interrupts
240 .It Li unhalted-cycles Ta (unsupported)
259 library first appeared in
264 library was written by
266 .Aq jkoshy@FreeBSD.org .