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33 .Nd driver for Universal Asynchronous Receiver/Transmitter (UART) devices
44 .Pa /boot/device.hints :
45 .Cd hint.uart.0.disabled="1"
46 .Cd hint.uart.0.baud="38400"
47 .Cd hint.uart.0.port="0x3f8"
48 .Cd hint.uart.0.flags="0x10"
53 .Bl -tag -compact -width 0x000000
55 device is potential system console
57 use this port for remote kernel debugging
59 set RX FIFO trigger level to ``low'' (NS8250 only)
61 set RX FIFO trigger level to ``medium low'' (NS8250 only)
63 set RX FIFO trigger level to ``medium high'' (default, NS8250 only)
65 set RX FIFO trigger level to ``high'' (NS8250 only)
71 device driver provides support for various classes of UARTs implementing the
72 EIA RS-232C (CCITT V.24) serial communications interface.
73 Each such interface is controlled by a separate and independent instance of
77 The primary support for devices that contain multiple serial interfaces or
78 that contain other functionality besides one or more serial interfaces is
84 However, the serial interfaces of those devices that are managed by the
88 driver are each independently controlled by the
95 driver provides umbrella functionality for the
97 driver and hides the complexities that are inherent when elementary components
98 are packaged together.
102 driver has a modular design to allow it to be used on differing hardware and
103 for various purposes.
104 In the following sections the components are discussed in detail.
105 Options are described in the section that covers the component to which each
111 driver is the core component.
112 It contains the bus attachments and the low-level interrupt handler.
115 The core component and the kernel interfaces talk to the hardware through the
117 This interface serves as an abstraction of the hardware and allows varying
118 UARTs to be used for serial communications.
121 System devices are UARTs that have a special purpose by way of hardware
122 design or software setup.
123 For example, Sun UltraSparc machines use UARTs as their keyboard interface.
124 Such an UART cannot be used for general purpose communications.
125 Likewise, when the kernel is configured for a serial console, the
126 corresponding UART will in turn be a system device so that the kernel can
127 output boot messages early on in the boot process.
129 .Ss KERNEL INTERFACES
130 The last but not least of the components is the kernel interface.
131 This component ultimately determines how the UART is made visible to the
132 kernel in particular and to users in general.
133 The default kernel interface is the TTY interface.
134 This allows the UART to be used for terminals, modems and serial line IP
136 System devices, with the notable exception of serial consoles, generally
137 have specialized kernel interfaces.
142 driver supports the following classes of UARTs:
146 NS8250: standard hardware based on the 8250, 16450, 16550, 16650, 16750 or
149 SCC: serial communications controllers supported by the
154 .Sh Pulse Per Second (PPS) Timing Interface
157 driver can capture PPS timing information as defined in RFC 2783.
158 The API, accessed via
160 is available on the tty device.
161 To use the PPS capture feature with
163 symlink the tty callout device
170 tunable configures the PPS capture mode for all uart devices;
174 .Va dev.uart.0.pps_mode
175 sysctl configures the PPS capture mode for a specific uart device;
181 The following capture modes are available:
182 .Bl -tag -compact -offset "mmmm" -width "mmmm"
186 Capture pulses on the CTS line.
188 Capture pulses on the DCD line.
191 The following values may be ORed with the capture mode to configure
192 capture processing options:
193 .Bl -tag -compact -offset "mmmm" -width "mmmm"
195 Invert the pulse (RS-232 logic low = ASSERT, high = CLEAR).
197 Attempt to capture narrow pulses.
200 Add the narrow pulse option when the incoming PPS pulse width is small
201 enough to prevent reliable capture in normal mode.
202 In narrow mode the driver uses the hardware's ability to latch a line
203 state change; not all hardware has this capability.
204 The hardware latch provides a reliable indication that a pulse occurred,
205 but prevents distinguishing between the CLEAR and ASSERT edges of the pulse.
206 For each detected pulse, the driver synthesizes both an ASSERT and a CLEAR
207 event, using the same timestamp for each.
208 To prevent spurious events when the hardware is intermittently able to
209 see both edges of a pulse, the driver will not generate a new pair of
210 events within a half second of the prior pair.
211 Both normal and narrow pulse modes work with
214 Add the invert option when the connection to the uart device uses TTL
215 level signals, or when the PPS source emits inverted pulses.
216 RFC 2783 defines an ASSERT event as a higher-voltage line level, and a CLEAR
217 event as a lower-voltage line level, in the context of the RS-232 protocol.
218 The modem control signals on a TTL-level connection are typically
219 inverted from the RS-232 levels.
220 For example, carrier presence is indicated by a high signal on an RS-232
221 DCD line, and by a low signal on a TTL DCD line.
222 This is due to the use of inverting line driver buffers to convert between
223 TTL and RS-232 line levels in most hardware designs.
224 Generally speaking, a connection to a DB-9 style connector is an RS-232
225 level signal at up to 12 volts.
226 A connection to header pins or an edge-connector on an embedded board
227 is typically a TTL signal at 3.3 or 5 volts.
229 .Bl -tag -width ".Pa /dev/ttyu?.init" -compact
232 .It Pa /dev/ttyu?.init
233 .It Pa /dev/ttyu?.lock
234 corresponding callin initial-state and lock-state devices
238 .It Pa /dev/cuau?.init
239 .It Pa /dev/cuau?.lock
240 corresponding callout initial-state and lock-state devices
249 device driver first appeared in
254 device driver and this manual page were written by
255 .An Marcel Moolenaar Aq marcel@xcllnt.net .