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33 .Nd "SMP-friendly kernel counter implementation"
39 .Fn counter_u64_alloc "int wait"
41 .Fn counter_u64_free "counter_u64_t c"
43 .Fn counter_u64_add "counter_u64_t c" "int64_t v"
49 .Fn counter_u64_add_protected "counter_u64_t c" "int64_t v"
51 .Fn counter_u64_fetch "counter_u64_t c"
53 .Fn counter_u64_zero "counter_u64_t c"
55 .Fn SYSCTL_COUNTER_U64 parent nbr name access ptr descr
56 .Fn SYSCTL_ADD_COUNTER_U64 ctx parent nbr name access ptr descr
59 is a generic facility to create counters
60 that can be utilized for any purpose (such as collecting statistical
64 is guaranteed to be lossless when several kernel threads do simultaneous
68 does not block the calling thread,
71 operations are used for the update, therefore the counters
72 can be used in any non-interrupt context.
75 has special optimisations for SMP environments, making
77 update faster than simple arithmetic on the global variable.
80 is considered suitable for accounting in the performance-critical
82 .Bl -tag -width indent
83 .It Fn counter_u64_alloc how
84 Allocate a new 64-bit unsigned counter.
89 wait flag, should be either
95 is specified the operation may fail.
96 .It Fn counter_u64_free c
97 Free the previously allocated counter
99 .It Fn counter_u64_add c v
104 The KPI does not guarantee any protection from wraparound.
106 Enter mode that would allow to safely update several counters via
107 .Fn counter_u64_add_protected .
108 On some machines this expands to
110 section, while on other is a nop.
112 .Sx IMPLEMENTATION DETAILS .
114 Exit mode for updating several counters.
115 .It Fn counter_u64_add_protected c v
117 .Fn counter_u64_add ,
118 but should be preceded by
120 .It Fn counter_u64_fetch c
121 Take a snapshot of counter
123 The data obtained is not guaranteed to reflect the real cumulative
124 value for any moment.
125 .It Fn counter_u64_zero c
129 .It Fn SYSCTL_COUNTER_U64 parent nbr name access ptr descr
132 oid that would represent a
136 argument should be a pointer to allocated
138 A read of the oid returns value obtained through
139 .Fn counter_u64_fetch .
140 Any write to the oid zeroes it.
141 .It Fn SYSCTL_ADD_COUNTER_U64 ctx parent nbr name access ptr descr
144 oid that would represent a
148 argument should be a pointer to allocated
150 A read of the oid returns value obtained through
151 .Fn counter_u64_fetch .
152 Any write to the oid zeroes it.
154 .Sh IMPLEMENTATION DETAILS
157 is implemented using per-CPU data fields that are specially aligned
158 in memory, to avoid inter-CPU bus traffic due to shared use
159 of the variables between CPUs.
160 These are allocated using
164 The update operation only touches the field that is private to current CPU.
165 Fetch operation loops through all per-CPU fields and obtains a snapshot
170 update is implemented as a single instruction without lock semantics,
171 operating on the private data for the current CPU,
172 which is safe against preemption and interrupts.
174 On i386 architecture, when machine supports the cmpxchg8 instruction,
175 this instruction is used.
176 The multi-instruction sequence provides the same guarantees as the
177 amd64 single-instruction implementation.
179 On some architectures updating a counter require a
192 facility first appeared in
198 facility was written by
201 .An Konstantin Belousov .