2 * Mach Operating System
3 * Copyright (c) 1991,1990 Carnegie Mellon University
6 * Permission to use, copy, modify and distribute this software and its
7 * documentation is hereby granted, provided that both the copyright
8 * notice and this permission notice appear in all copies of the
9 * software, derivative works or modified versions, and any portions
10 * thereof, and that both notices appear in supporting documentation.
12 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS
13 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR
14 * ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
16 * Carnegie Mellon requests users of this software to return to
18 * Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU
19 * School of Computer Science
20 * Carnegie Mellon University
21 * Pittsburgh PA 15213-3890
23 * any improvements or extensions that they make and grant Carnegie the
24 * rights to redistribute these changes.
27 #include <sys/cdefs.h>
28 __FBSDID("$FreeBSD$");
30 #include "opt_compat.h"
32 #include <sys/param.h>
33 #include <sys/systm.h>
37 #include <sys/stack.h>
38 #include <sys/sysent.h>
40 #include <machine/cpu.h>
41 #include <machine/md_var.h>
42 #include <machine/pcb.h>
43 #include <machine/reg.h>
44 #include <machine/stack.h>
47 #include <vm/vm_param.h>
51 #include <ddb/db_access.h>
52 #include <ddb/db_sym.h>
53 #include <ddb/db_variables.h>
55 static db_varfcn_t db_dr0;
56 static db_varfcn_t db_dr1;
57 static db_varfcn_t db_dr2;
58 static db_varfcn_t db_dr3;
59 static db_varfcn_t db_dr4;
60 static db_varfcn_t db_dr5;
61 static db_varfcn_t db_dr6;
62 static db_varfcn_t db_dr7;
63 static db_varfcn_t db_frame;
65 CTASSERT(sizeof(struct dbreg) == sizeof(((struct pcpu *)NULL)->pc_dbreg));
68 * Machine register set.
70 #define DB_OFFSET(x) (db_expr_t *)offsetof(struct trapframe, x)
71 struct db_variable db_regs[] = {
72 { "cs", DB_OFFSET(tf_cs), db_frame },
73 { "ds", DB_OFFSET(tf_ds), db_frame },
74 { "es", DB_OFFSET(tf_es), db_frame },
75 { "fs", DB_OFFSET(tf_fs), db_frame },
76 { "gs", DB_OFFSET(tf_gs), db_frame },
77 { "ss", DB_OFFSET(tf_ss), db_frame },
78 { "rax", DB_OFFSET(tf_rax), db_frame },
79 { "rcx", DB_OFFSET(tf_rcx), db_frame },
80 { "rdx", DB_OFFSET(tf_rdx), db_frame },
81 { "rbx", DB_OFFSET(tf_rbx), db_frame },
82 { "rsp", DB_OFFSET(tf_rsp), db_frame },
83 { "rbp", DB_OFFSET(tf_rbp), db_frame },
84 { "rsi", DB_OFFSET(tf_rsi), db_frame },
85 { "rdi", DB_OFFSET(tf_rdi), db_frame },
86 { "r8", DB_OFFSET(tf_r8), db_frame },
87 { "r9", DB_OFFSET(tf_r9), db_frame },
88 { "r10", DB_OFFSET(tf_r10), db_frame },
89 { "r11", DB_OFFSET(tf_r11), db_frame },
90 { "r12", DB_OFFSET(tf_r12), db_frame },
91 { "r13", DB_OFFSET(tf_r13), db_frame },
92 { "r14", DB_OFFSET(tf_r14), db_frame },
93 { "r15", DB_OFFSET(tf_r15), db_frame },
94 { "rip", DB_OFFSET(tf_rip), db_frame },
95 { "rflags", DB_OFFSET(tf_rflags), db_frame },
96 #define DB_N_SHOW_REGS 24 /* Don't show registers after here. */
97 { "dr0", NULL, db_dr0 },
98 { "dr1", NULL, db_dr1 },
99 { "dr2", NULL, db_dr2 },
100 { "dr3", NULL, db_dr3 },
101 { "dr4", NULL, db_dr4 },
102 { "dr5", NULL, db_dr5 },
103 { "dr6", NULL, db_dr6 },
104 { "dr7", NULL, db_dr7 },
106 struct db_variable *db_eregs = db_regs + DB_N_SHOW_REGS;
108 #define DB_DRX_FUNC(reg) \
110 db_ ## reg (vp, valuep, op) \
111 struct db_variable *vp; \
112 db_expr_t * valuep; \
115 if (op == DB_VAR_GET) \
116 *valuep = r ## reg (); \
118 load_ ## reg (*valuep); \
132 db_frame(struct db_variable *vp, db_expr_t *valuep, int op)
136 if (kdb_frame == NULL)
139 reg = (long *)((uintptr_t)kdb_frame + (db_expr_t)vp->valuep);
140 if (op == DB_VAR_GET)
151 #define TRAP_INTERRUPT 5
153 static void db_nextframe(struct amd64_frame **, db_addr_t *, struct thread *);
154 static void db_print_stack_entry(const char *, db_addr_t, void *);
155 static void decode_syscall(int, struct thread *);
157 static const char * watchtype_str(int type);
158 int amd64_set_watch(int watchnum, unsigned long watchaddr, int size,
159 int access, struct dbreg *d);
160 int amd64_clr_watch(int watchnum, struct dbreg *d);
163 db_print_stack_entry(const char *name, db_addr_t callpc, void *frame)
166 db_printf("%s() at ", name != NULL ? name : "??");
167 db_printsym(callpc, DB_STGY_PROC);
169 db_printf("/frame 0x%lx", (register_t)frame);
174 decode_syscall(int number, struct thread *td)
182 db_printf(" (%d", number);
183 p = (td != NULL) ? td->td_proc : NULL;
184 if (p != NULL && 0 <= number && number < p->p_sysent->sv_size) {
185 f = p->p_sysent->sv_table[number].sy_call;
186 sym = db_search_symbol((db_addr_t)f, DB_STGY_ANY, &diff);
187 if (sym != DB_SYM_NULL && diff == 0) {
188 db_symbol_values(sym, &symname, NULL);
189 db_printf(", %s, %s", p->p_sysent->sv_name, symname);
196 * Figure out the next frame up in the call stack.
199 db_nextframe(struct amd64_frame **fp, db_addr_t *ip, struct thread *td)
201 struct trapframe *tf;
208 rip = db_get_value((long) &(*fp)->f_retaddr, 8, FALSE);
209 rbp = db_get_value((long) &(*fp)->f_frame, 8, FALSE);
212 * Figure out frame type. We look at the address just before
213 * the saved instruction pointer as the saved EIP is after the
214 * call function, and if the function being called is marked as
215 * dead (such as panic() at the end of dblfault_handler()), then
216 * the instruction at the saved EIP will be part of a different
217 * function (syscall() in this example) rather than the one that
218 * actually made the call.
221 sym = db_search_symbol(rip - 1, DB_STGY_ANY, &offset);
222 db_symbol_values(sym, &name, NULL);
224 if (strcmp(name, "calltrap") == 0 ||
225 strcmp(name, "fork_trampoline") == 0 ||
226 strcmp(name, "nmi_calltrap") == 0 ||
227 strcmp(name, "Xdblfault") == 0)
229 else if (strncmp(name, "Xatpic_intr", 11) == 0 ||
230 strncmp(name, "Xapic_isr", 9) == 0 ||
231 strcmp(name, "Xtimerint") == 0 ||
232 strcmp(name, "Xipi_intr_bitmap_handler") == 0 ||
233 strcmp(name, "Xcpustop") == 0 ||
234 strcmp(name, "Xcpususpend") == 0 ||
235 strcmp(name, "Xrendezvous") == 0)
236 frame_type = INTERRUPT;
237 else if (strcmp(name, "Xfast_syscall") == 0)
238 frame_type = SYSCALL;
239 #ifdef COMPAT_FREEBSD32
240 else if (strcmp(name, "Xint0x80_syscall") == 0)
241 frame_type = SYSCALL;
243 /* XXX: These are interrupts with trap frames. */
244 else if (strcmp(name, "Xtimerint") == 0 ||
245 strcmp(name, "Xcpustop") == 0 ||
246 strcmp(name, "Xcpususpend") == 0 ||
247 strcmp(name, "Xrendezvous") == 0 ||
248 strcmp(name, "Xipi_intr_bitmap_handler") == 0)
249 frame_type = TRAP_INTERRUPT;
253 * Normal frames need no special processing.
255 if (frame_type == NORMAL) {
256 *ip = (db_addr_t) rip;
257 *fp = (struct amd64_frame *) rbp;
261 db_print_stack_entry(name, rip, &(*fp)->f_frame);
264 * Point to base of trapframe which is just above the
267 tf = (struct trapframe *)((long)*fp + 16);
269 if (INKERNEL((long) tf)) {
273 switch (frame_type) {
275 db_printf("--- trap %#r", tf->tf_trapno);
278 db_printf("--- syscall");
279 decode_syscall(tf->tf_rax, td);
283 db_printf("--- interrupt");
286 panic("The moon has moved again.");
288 db_printf(", rip = %#lr, rsp = %#lr, rbp = %#lr ---\n", rip,
292 *ip = (db_addr_t) rip;
293 *fp = (struct amd64_frame *) rbp;
297 db_backtrace(struct thread *td, struct trapframe *tf, struct amd64_frame *frame,
298 db_addr_t pc, register_t sp, int count)
300 struct amd64_frame *actframe;
310 while (count-- && !db_pager_quit) {
311 sym = db_search_symbol(pc, DB_STGY_ANY, &offset);
312 db_symbol_values(sym, &name, NULL);
315 * Attempt to determine a (possibly fake) frame that gives
316 * the caller's pc. It may differ from `frame' if the
317 * current function never sets up a standard frame or hasn't
318 * set one up yet or has just discarded one. The last two
319 * cases can be guessed fairly reliably for code generated
320 * by gcc. The first case is too much trouble to handle in
321 * general because the amount of junk on the stack depends
322 * on the pc (the special handling of "calltrap", etc. in
323 * db_nextframe() works because the `next' pc is special).
328 if (sym == C_DB_SYM_NULL && sp != 0) {
330 * If a symbol couldn't be found, we've probably
331 * jumped to a bogus location, so try and use
332 * the return address to find our caller.
334 db_print_stack_entry(name, pc, NULL);
335 pc = db_get_value(sp, 8, FALSE);
336 if (db_search_symbol(pc, DB_STGY_PROC,
337 &offset) == C_DB_SYM_NULL)
340 } else if (tf != NULL) {
343 instr = db_get_value(pc, 4, FALSE);
344 if ((instr & 0xffffffff) == 0xe5894855) {
345 /* pushq %rbp; movq %rsp, %rbp */
346 actframe = (void *)(tf->tf_rsp - 8);
347 } else if ((instr & 0xffffff) == 0xe58948) {
348 /* movq %rsp, %rbp */
349 actframe = (void *)tf->tf_rsp;
350 if (tf->tf_rbp == 0) {
351 /* Fake frame better. */
354 } else if ((instr & 0xff) == 0xc3) {
356 actframe = (void *)(tf->tf_rsp - 8);
357 } else if (offset == 0) {
358 /* Probably an assembler symbol. */
359 actframe = (void *)(tf->tf_rsp - 8);
361 } else if (strcmp(name, "fork_trampoline") == 0) {
363 * Don't try to walk back on a stack for a
364 * process that hasn't actually been run yet.
366 db_print_stack_entry(name, pc, actframe);
371 db_print_stack_entry(name, pc, actframe);
373 if (actframe != frame) {
374 /* `frame' belongs to caller. */
376 db_get_value((long)&actframe->f_retaddr, 8, FALSE);
380 db_nextframe(&frame, &pc, td);
382 if (INKERNEL((long)pc) && !INKERNEL((long)frame)) {
383 sym = db_search_symbol(pc, DB_STGY_ANY, &offset);
384 db_symbol_values(sym, &name, NULL);
385 db_print_stack_entry(name, pc, frame);
388 if (!INKERNEL((long) frame)) {
399 struct amd64_frame *frame;
403 __asm __volatile("movq %%rbp,%0" : "=r" (rbp));
404 frame = (struct amd64_frame *)rbp;
405 callpc = (db_addr_t)db_get_value((long)&frame->f_retaddr, 8, FALSE);
406 frame = frame->f_frame;
407 db_backtrace(curthread, NULL, frame, callpc, 0, -1);
411 db_trace_thread(struct thread *thr, int count)
414 struct trapframe *tf;
416 ctx = kdb_thr_ctx(thr);
417 tf = thr == kdb_thread ? kdb_frame : NULL;
418 return (db_backtrace(thr, tf, (struct amd64_frame *)ctx->pcb_rbp,
419 ctx->pcb_rip, ctx->pcb_rsp, count));
423 amd64_set_watch(watchnum, watchaddr, size, access, d)
425 unsigned long watchaddr;
432 if (watchnum == -1) {
433 for (i = 0; i < 4; i++)
434 if (!DBREG_DR7_ENABLED(d->dr[7], i))
444 size = 1; /* size must be 1 for an execution breakpoint */
446 case DBREG_DR7_WRONLY:
454 * we can watch a 1, 2, 4, or 8 byte sized location
458 len = DBREG_DR7_LEN_1;
461 len = DBREG_DR7_LEN_2;
464 len = DBREG_DR7_LEN_4;
467 len = DBREG_DR7_LEN_8;
473 /* clear the bits we are about to affect */
474 d->dr[7] &= ~DBREG_DR7_MASK(watchnum);
476 /* set drN register to the address, N=watchnum */
477 DBREG_DRX(d, watchnum) = watchaddr;
479 /* enable the watchpoint */
480 d->dr[7] |= DBREG_DR7_SET(watchnum, len, access,
481 DBREG_DR7_GLOBAL_ENABLE);
488 amd64_clr_watch(watchnum, d)
493 if (watchnum < 0 || watchnum >= 4)
496 d->dr[7] &= ~DBREG_DR7_MASK(watchnum);
497 DBREG_DRX(d, watchnum) = 0;
504 db_md_set_watchpoint(addr, size)
510 int avail, c, cpu, i, wsize;
512 d = (struct dbreg *)PCPU_PTR(dbreg);
513 cpu = PCPU_GET(cpuid);
514 fill_dbregs(NULL, d);
517 for (i = 0; i < 4; i++) {
518 if (!DBREG_DR7_ENABLED(d->dr[7], i))
522 if (avail * 8 < size)
525 for (i = 0; i < 4 && size > 0; i++) {
526 if (!DBREG_DR7_ENABLED(d->dr[7], i)) {
527 if (size >= 8 || (avail == 1 && size > 4))
533 amd64_set_watch(i, addr, wsize, DBREG_DR7_WRONLY, d);
545 memcpy(pc->pc_dbreg, d, sizeof(*d));
546 pc->pc_dbreg_cmd = PC_DBREG_CMD_LOAD;
553 db_md_clr_watchpoint(addr, size)
561 d = (struct dbreg *)PCPU_PTR(dbreg);
562 cpu = PCPU_GET(cpuid);
563 fill_dbregs(NULL, d);
565 for (i = 0; i < 4; i++) {
566 if (DBREG_DR7_ENABLED(d->dr[7], i)) {
567 if (DBREG_DRX((d), i) >= addr &&
568 DBREG_DRX((d), i) < addr + size)
569 amd64_clr_watch(i, d);
579 memcpy(pc->pc_dbreg, d, sizeof(*d));
580 pc->pc_dbreg_cmd = PC_DBREG_CMD_LOAD;
592 case DBREG_DR7_EXEC : return "execute"; break;
593 case DBREG_DR7_RDWR : return "read/write"; break;
594 case DBREG_DR7_WRONLY : return "write"; break;
595 default : return "invalid"; break;
601 db_md_list_watchpoints()
606 fill_dbregs(NULL, &d);
608 db_printf("\nhardware watchpoints:\n");
609 db_printf(" watch status type len address\n");
610 db_printf(" ----- -------- ---------- --- ------------------\n");
611 for (i = 0; i < 4; i++) {
612 if (DBREG_DR7_ENABLED(d.dr[7], i)) {
613 type = DBREG_DR7_ACCESS(d.dr[7], i);
614 len = DBREG_DR7_LEN(d.dr[7], i);
615 if (len == DBREG_DR7_LEN_8)
619 db_printf(" %-5d %-8s %10s %3d ",
620 i, "enabled", watchtype_str(type), len);
621 db_printsym((db_addr_t)DBREG_DRX((&d), i), DB_STGY_ANY);
624 db_printf(" %-5d disabled\n", i);
628 db_printf("\ndebug register values:\n");
629 for (i = 0; i < 8; i++) {
630 db_printf(" dr%d 0x%016lx\n", i, DBREG_DRX((&d), i));
636 amd64_db_resume_dbreg(void)
640 switch (PCPU_GET(dbreg_cmd)) {
641 case PC_DBREG_CMD_LOAD:
642 d = (struct dbreg *)PCPU_PTR(dbreg);
644 PCPU_SET(dbreg_cmd, PC_DBREG_CMD_NONE);