2 * Copyright (c) 1995 Bruce D. Evans.
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
13 * 3. Neither the name of the author nor the names of contributors
14 * may be used to endorse or promote products derived from this software
15 * without specific prior written permission.
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
18 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
21 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
32 #ifndef _MACHINE_MD_VAR_H_
33 #define _MACHINE_MD_VAR_H_
36 * Miscellaneous machine-dependent declarations.
41 extern int busdma_swi_pending;
42 extern u_int cpu_exthigh;
43 extern u_int cpu_feature;
44 extern u_int cpu_feature2;
45 extern u_int amd_feature;
46 extern u_int amd_feature2;
47 extern u_int amd_pminfo;
48 extern u_int via_feature_rng;
49 extern u_int via_feature_xcrypt;
50 extern u_int cpu_clflush_line_size;
51 extern u_int cpu_stdext_feature;
52 extern u_int cpu_fxsr;
53 extern u_int cpu_high;
55 extern u_int cpu_max_ext_state_size;
56 extern u_int cpu_mxcsr_mask;
57 extern u_int cpu_procinfo;
58 extern u_int cpu_procinfo2;
59 extern char cpu_vendor[];
60 extern u_int cpu_vendor_id;
61 extern char ctx_switch_xsave[];
63 extern char sigcode[];
65 extern uint64_t *vm_page_dump;
66 extern int vm_page_dump_size;
67 extern int workaround_erratum383;
70 extern int _ucode32sel;
74 extern uint64_t xsave_mask;
76 typedef void alias_for_inthand_t(u_int cs, u_int ef, u_int esp, u_int ss);
85 void *alloc_fpusave(int flags);
86 void amd64_syscall(struct thread *td, int traced);
87 void busdma_swi(void);
88 void cpu_setregs(void);
89 void ctx_fpusave(void *);
90 void doreti_iret(void) __asm(__STRING(doreti_iret));
91 void doreti_iret_fault(void) __asm(__STRING(doreti_iret_fault));
92 void ld_ds(void) __asm(__STRING(ld_ds));
93 void ld_es(void) __asm(__STRING(ld_es));
94 void ld_fs(void) __asm(__STRING(ld_fs));
95 void ld_gs(void) __asm(__STRING(ld_gs));
96 void ld_fsbase(void) __asm(__STRING(ld_fsbase));
97 void ld_gsbase(void) __asm(__STRING(ld_gsbase));
98 void ds_load_fault(void) __asm(__STRING(ds_load_fault));
99 void es_load_fault(void) __asm(__STRING(es_load_fault));
100 void fs_load_fault(void) __asm(__STRING(fs_load_fault));
101 void gs_load_fault(void) __asm(__STRING(gs_load_fault));
102 void fsbase_load_fault(void) __asm(__STRING(fsbase_load_fault));
103 void gsbase_load_fault(void) __asm(__STRING(gsbase_load_fault));
104 void dump_add_page(vm_paddr_t);
105 void dump_drop_page(vm_paddr_t);
106 void initializecpu(void);
107 void initializecpucache(void);
108 void fillw(int /*u_short*/ pat, void *base, size_t cnt);
109 void fpstate_drop(struct thread *td);
110 int is_physical_memory(vm_paddr_t addr);
112 void pagecopy(void *from, void *to);
113 void pagezero(void *addr);
114 void setidt(int idx, alias_for_inthand_t *func, int typ, int dpl, int ist);
115 int user_dbreg_trap(void);
116 void minidumpsys(struct dumperinfo *);
117 struct savefpu *get_pcb_user_save_td(struct thread *td);
118 struct savefpu *get_pcb_user_save_pcb(struct pcb *pcb);
119 struct pcb *get_pcb_td(struct thread *td);
120 void amd64_db_resume_dbreg(void);
122 #endif /* !_MACHINE_MD_VAR_H_ */