2 * Copyright (c) 2003-2008 Joseph Koshy
3 * Copyright (c) 2007 The FreeBSD Foundation
6 * Portions of this software were developed by A. Joseph Koshy under
7 * sponsorship from the FreeBSD Foundation and Google, Inc.
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
19 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
33 /* Machine dependent interfaces */
35 #ifndef _MACHINE_PMC_MDEP_H
36 #define _MACHINE_PMC_MDEP_H 1
42 #include <dev/hwpmc/hwpmc_amd.h>
43 #include <dev/hwpmc/hwpmc_core.h>
44 #include <dev/hwpmc/hwpmc_piv.h>
45 #include <dev/hwpmc/hwpmc_tsc.h>
48 * Intel processors implementing V2 and later of the Intel performance
49 * measurement architecture have PMCs of the following classes: TSC,
52 #define PMC_MDEP_CLASS_INDEX_TSC 0
53 #define PMC_MDEP_CLASS_INDEX_K8 1
54 #define PMC_MDEP_CLASS_INDEX_P4 1
55 #define PMC_MDEP_CLASS_INDEX_IAP 1
56 #define PMC_MDEP_CLASS_INDEX_IAF 2
59 * On the amd64 platform we support the following PMCs.
61 * TSC The timestamp counter
62 * K8 AMD Athlon64 and Opteron PMCs in 64 bit mode.
63 * PIV Intel P4/HTT and P4/EMT64
64 * IAP Intel Core/Core2/Atom CPUs in 64 bits mode.
65 * IAF Intel fixed-function PMCs in Core2 and later CPUs.
68 union pmc_md_op_pmcallocate {
69 struct pmc_md_amd_op_pmcallocate pm_amd;
70 struct pmc_md_iaf_op_pmcallocate pm_iaf;
71 struct pmc_md_iap_op_pmcallocate pm_iap;
72 struct pmc_md_p4_op_pmcallocate pm_p4;
77 #define PMCLOG_READADDR PMCLOG_READ64
78 #define PMCLOG_EMITADDR PMCLOG_EMIT64
83 struct pmc_md_amd_pmc pm_amd;
84 struct pmc_md_iaf_pmc pm_iaf;
85 struct pmc_md_iap_pmc pm_iap;
86 struct pmc_md_p4_pmc pm_p4;
89 #define PMC_TRAPFRAME_TO_PC(TF) ((TF)->tf_rip)
90 #define PMC_TRAPFRAME_TO_FP(TF) ((TF)->tf_rbp)
91 #define PMC_TRAPFRAME_TO_USER_SP(TF) ((TF)->tf_rsp)
92 #define PMC_TRAPFRAME_TO_KERNEL_SP(TF) ((TF)->tf_rsp)
94 #define PMC_AT_FUNCTION_PROLOGUE_PUSH_BP(I) \
95 (((I) & 0xffffffff) == 0xe5894855) /* pushq %rbp; movq %rsp,%rbp */
96 #define PMC_AT_FUNCTION_PROLOGUE_MOV_SP_BP(I) \
97 (((I) & 0x00ffffff) == 0x00e58948) /* movq %rsp,%rbp */
98 #define PMC_AT_FUNCTION_EPILOGUE_RET(I) \
99 (((I) & 0xFF) == 0xC3) /* ret */
101 #define PMC_IN_TRAP_HANDLER(PC) \
102 ((PC) >= (uintptr_t) start_exceptions && \
103 (PC) < (uintptr_t) end_exceptions)
105 #define PMC_IN_KERNEL_STACK(S,START,END) \
106 ((S) >= (START) && (S) < (END))
107 #define PMC_IN_KERNEL(va) (((va) >= DMAP_MIN_ADDRESS && \
108 (va) < DMAP_MAX_ADDRESS) || ((va) >= VM_MIN_KERNEL_ADDRESS && \
109 (va) < VM_MAX_KERNEL_ADDRESS))
111 #define PMC_IN_USERSPACE(va) ((va) <= VM_MAXUSER_ADDRESS)
117 void start_exceptions(void), end_exceptions(void);
119 struct pmc_mdep *pmc_amd_initialize(void);
120 void pmc_amd_finalize(struct pmc_mdep *_md);
121 struct pmc_mdep *pmc_intel_initialize(void);
122 void pmc_intel_finalize(struct pmc_mdep *_md);
125 #endif /* _MACHINE_PMC_MDEP_H */