sys/arm/arm/busdma_machdep.c

   1 /*-
   2  * Copyright (c) 2004 Olivier Houchard
   3  * Copyright (c) 2002 Peter Grehan
   4  * Copyright (c) 1997, 1998 Justin T. Gibbs.
   5  * All rights reserved.
   6  *
   7  * Redistribution and use in source and binary forms, with or without
   8  * modification, are permitted provided that the following conditions
   9  * are met:
  10  * 1. Redistributions of source code must retain the above copyright
  11  *    notice, this list of conditions, and the following disclaimer,
  12  *    without modification, immediately at the beginning of the file.
  13  * 2. The name of the author may not be used to endorse or promote products
  14  *    derived from this software without specific prior written permission.
  15  *
  16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
  17  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  18  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  19  * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
  20  * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  21  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  22  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  23  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  24  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  25  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  26  * SUCH DAMAGE.
  27  *
  28  *   From i386/busdma_machdep.c,v 1.26 2002/04/19 22:58:09 alfred
  29  */
  30
  31 #include <sys/cdefs.h>
  32 __FBSDID("$FreeBSD$");
  33
  34 /*
  35  * ARM bus dma support routines
  36  */
  37
  38 #define _ARM32_BUS_DMA_PRIVATE
  39 #include <sys/param.h>
  40 #include <sys/systm.h>
  41 #include <sys/malloc.h>
  42 #include <sys/bus.h>
  43 #include <sys/interrupt.h>
  44 #include <sys/lock.h>
  45 #include <sys/proc.h>
  46 #include <sys/mutex.h>
  47 #include <sys/mbuf.h>
  48 #include <sys/uio.h>
  49 #include <sys/ktr.h>
  50 #include <sys/kernel.h>
  51 #include <sys/sysctl.h>
  52
  53 #include <vm/vm.h>
  54 #include <vm/vm_page.h>
  55 #include <vm/vm_map.h>
  56
  57 #include <machine/atomic.h>
  58 #include <machine/bus.h>
  59 #include <machine/cpufunc.h>
  60 #include <machine/md_var.h>
  61
  62 #define MAX_BPAGES 64
  63 #define BUS_DMA_COULD_BOUNCE    BUS_DMA_BUS3
  64 #define BUS_DMA_MIN_ALLOC_COMP  BUS_DMA_BUS4
  65
  66 struct bounce_zone;
  67
  68 struct bus_dma_tag {
  69         bus_dma_tag_t           parent;
  70         bus_size_t              alignment;
  71         bus_size_t              boundary;
  72         bus_addr_t              lowaddr;
  73         bus_addr_t              highaddr;
  74         bus_dma_filter_t        *filter;
  75         void                    *filterarg;
  76         bus_size_t              maxsize;
  77         u_int                   nsegments;
  78         bus_size_t              maxsegsz;
  79         int                     flags;
  80         int                     ref_count;
  81         int                     map_count;
  82         bus_dma_lock_t          *lockfunc;
  83         void                    *lockfuncarg;
  84         bus_dma_segment_t       *segments;
  85         /*
  86          * DMA range for this tag.  If the page doesn't fall within
  87          * one of these ranges, an error is returned.  The caller
  88          * may then decide what to do with the transfer.  If the
  89          * range pointer is NULL, it is ignored.
  90          */
  91         struct arm32_dma_range  *ranges;
  92         int                     _nranges;
  93         struct bounce_zone *bounce_zone;
  94 };
  95
  96 struct bounce_page {
  97         vm_offset_t     vaddr;          /* kva of bounce buffer */
  98         vm_offset_t     vaddr_nocache;  /* kva of bounce buffer uncached */
  99         bus_addr_t      busaddr;        /* Physical address */
 100         vm_offset_t     datavaddr;      /* kva of client data */
 101         bus_size_t      datacount;      /* client data count */
 102         STAILQ_ENTRY(bounce_page) links;
 103 };
 104
 105 int busdma_swi_pending;
 106
 107 struct bounce_zone {
 108         STAILQ_ENTRY(bounce_zone) links;
 109         STAILQ_HEAD(bp_list, bounce_page) bounce_page_list;
 110         int             total_bpages;
 111         int             free_bpages;
 112         int             reserved_bpages;
 113         int             active_bpages;
 114         int             total_bounced;
 115         int             total_deferred;
 116         int             map_count;
 117         bus_size_t      alignment;
 118         bus_addr_t      lowaddr;
 119         char            zoneid[8];
 120         char            lowaddrid[20];
 121         struct sysctl_ctx_list sysctl_tree;
 122         struct sysctl_oid *sysctl_tree_top;
 123 };
 124
 125 static struct mtx bounce_lock;
 126 static int total_bpages;
 127 static int busdma_zonecount;
 128 static STAILQ_HEAD(, bounce_zone) bounce_zone_list;
 129
 130 static SYSCTL_NODE(_hw, OID_AUTO, busdma, CTLFLAG_RD, 0, "Busdma parameters");
 131 SYSCTL_INT(_hw_busdma, OID_AUTO, total_bpages, CTLFLAG_RD, &total_bpages, 0,
 132            "Total bounce pages");
 133
 134 #define DMAMAP_LINEAR           0x1
 135 #define DMAMAP_MBUF             0x2
 136 #define DMAMAP_UIO              0x4
 137 #define DMAMAP_ALLOCATED        0x10
 138 #define DMAMAP_TYPE_MASK        (DMAMAP_LINEAR|DMAMAP_MBUF|DMAMAP_UIO)
 139 #define DMAMAP_COHERENT         0x8
 140 struct bus_dmamap {
 141         struct bp_list  bpages;
 142         int             pagesneeded;
 143         int             pagesreserved;
 144         bus_dma_tag_t   dmat;
 145         int             flags;
 146         void            *buffer;
 147         void            *origbuffer;
 148         void            *allocbuffer;
 149         TAILQ_ENTRY(bus_dmamap) freelist;
 150         int             len;
 151         STAILQ_ENTRY(bus_dmamap) links;
 152         bus_dmamap_callback_t *callback;
 153         void                  *callback_arg;
 154
 155 };
 156
 157 static STAILQ_HEAD(, bus_dmamap) bounce_map_waitinglist;
 158 static STAILQ_HEAD(, bus_dmamap) bounce_map_callbacklist;
 159
 160 static TAILQ_HEAD(,bus_dmamap) dmamap_freelist =
 161         TAILQ_HEAD_INITIALIZER(dmamap_freelist);
 162
 163 #define BUSDMA_STATIC_MAPS      500
 164 static struct bus_dmamap map_pool[BUSDMA_STATIC_MAPS];
 165
 166 static struct mtx busdma_mtx;
 167
 168 MTX_SYSINIT(busdma_mtx, &busdma_mtx, "busdma lock", MTX_DEF);
 169
 170 static void init_bounce_pages(void *dummy);
 171 static int alloc_bounce_zone(bus_dma_tag_t dmat);
 172 static int alloc_bounce_pages(bus_dma_tag_t dmat, u_int numpages);
 173 static int reserve_bounce_pages(bus_dma_tag_t dmat, bus_dmamap_t map,
 174                                 int commit);
 175 static bus_addr_t add_bounce_page(bus_dma_tag_t dmat, bus_dmamap_t map,
 176                                    vm_offset_t vaddr, bus_size_t size);
 177 static void free_bounce_page(bus_dma_tag_t dmat, struct bounce_page *bpage);
 178
 179 /* Default tag, as most drivers provide no parent tag. */
 180 bus_dma_tag_t arm_root_dma_tag;
 181
 182 /*
 183  * Return true if a match is made.
 184  *
 185  * To find a match walk the chain of bus_dma_tag_t's looking for 'paddr'.
 186  *
 187  * If paddr is within the bounds of the dma tag then call the filter callback
 188  * to check for a match, if there is no filter callback then assume a match.
 189  */
 190 static int
 191 run_filter(bus_dma_tag_t dmat, bus_addr_t paddr)
 192 {
 193         int retval;
 194
 195         retval = 0;
 196
 197         do {
 198                 if (((paddr > dmat->lowaddr && paddr <= dmat->highaddr)
 199                  || ((paddr & (dmat->alignment - 1)) != 0))
 200                  && (dmat->filter == NULL
 201                   || (*dmat->filter)(dmat->filterarg, paddr) != 0))
 202                         retval = 1;
 203
 204                 dmat = dmat->parent;
 205         } while (retval == 0 && dmat != NULL);
 206         return (retval);
 207 }
 208
 209 static void
 210 arm_dmamap_freelist_init(void *dummy)
 211 {
 212         int i;
 213
 214         for (i = 0; i < BUSDMA_STATIC_MAPS; i++)
 215                 TAILQ_INSERT_HEAD(&dmamap_freelist, &map_pool[i], freelist);
 216 }
 217
 218 SYSINIT(busdma, SI_SUB_VM, SI_ORDER_ANY, arm_dmamap_freelist_init, NULL);
 219
 220 /*
 221  * Check to see if the specified page is in an allowed DMA range.
 222  */
 223
 224 static __inline int
 225 bus_dmamap_load_buffer(bus_dma_tag_t dmat, bus_dma_segment_t *segs,
 226     bus_dmamap_t map, void *buf, bus_size_t buflen, struct pmap *pmap,
 227     int flags, vm_offset_t *lastaddrp, int *segp);
 228
 229 static __inline int
 230 _bus_dma_can_bounce(vm_offset_t lowaddr, vm_offset_t highaddr)
 231 {
 232         int i;
 233         for (i = 0; phys_avail[i] && phys_avail[i + 1]; i += 2) {
 234                 if ((lowaddr >= phys_avail[i] && lowaddr <= phys_avail[i + 1])
 235                     || (lowaddr < phys_avail[i] &&
 236                     highaddr > phys_avail[i]))
 237                         return (1);
 238         }
 239         return (0);
 240 }
 241
 242 static __inline struct arm32_dma_range *
 243 _bus_dma_inrange(struct arm32_dma_range *ranges, int nranges,
 244     bus_addr_t curaddr)
 245 {
 246         struct arm32_dma_range *dr;
 247         int i;
 248
 249         for (i = 0, dr = ranges; i < nranges; i++, dr++) {
 250                 if (curaddr >= dr->dr_sysbase &&
 251                     round_page(curaddr) <= (dr->dr_sysbase + dr->dr_len))
 252                         return (dr);
 253         }
 254
 255         return (NULL);
 256 }
 257 /*
 258  * Convenience function for manipulating driver locks from busdma (during
 259  * busdma_swi, for example).  Drivers that don't provide their own locks
 260  * should specify &Giant to dmat->lockfuncarg.  Drivers that use their own
 261  * non-mutex locking scheme don't have to use this at all.
 262  */
 263 void
 264 busdma_lock_mutex(void *arg, bus_dma_lock_op_t op)
 265 {
 266         struct mtx *dmtx;
 267
 268         dmtx = (struct mtx *)arg;
 269         switch (op) {
 270         case BUS_DMA_LOCK:
 271                 mtx_lock(dmtx);
 272                 break;
 273         case BUS_DMA_UNLOCK:
 274                 mtx_unlock(dmtx);
 275                 break;
 276         default:
 277                 panic("Unknown operation 0x%x for busdma_lock_mutex!", op);
 278         }
 279 }
 280
 281 /*
 282  * dflt_lock should never get called.  It gets put into the dma tag when
 283  * lockfunc == NULL, which is only valid if the maps that are associated
 284  * with the tag are meant to never be defered.
 285  * XXX Should have a way to identify which driver is responsible here.
 286  */
 287 static void
 288 dflt_lock(void *arg, bus_dma_lock_op_t op)
 289 {
 290 #ifdef INVARIANTS
 291         panic("driver error: busdma dflt_lock called");
 292 #else
 293         printf("DRIVER_ERROR: busdma dflt_lock called\n");
 294 #endif
 295 }
 296
 297 static __inline bus_dmamap_t
 298 _busdma_alloc_dmamap(void)
 299 {
 300         bus_dmamap_t map;
 301
 302         mtx_lock(&busdma_mtx);
 303         map = TAILQ_FIRST(&dmamap_freelist);
 304         if (map)
 305                 TAILQ_REMOVE(&dmamap_freelist, map, freelist);
 306         mtx_unlock(&busdma_mtx);
 307         if (!map) {
 308                 map = malloc(sizeof(*map), M_DEVBUF, M_NOWAIT | M_ZERO);
 309                 if (map)
 310                         map->flags = DMAMAP_ALLOCATED;
 311         } else
 312                 map->flags = 0;
 313         STAILQ_INIT(&map->bpages);
 314         return (map);
 315 }
 316
 317 static __inline void
 318 _busdma_free_dmamap(bus_dmamap_t map)
 319 {
 320         if (map->flags & DMAMAP_ALLOCATED)
 321                 free(map, M_DEVBUF);
 322         else {
 323                 mtx_lock(&busdma_mtx);
 324                 TAILQ_INSERT_HEAD(&dmamap_freelist, map, freelist);
 325                 mtx_unlock(&busdma_mtx);
 326         }
 327 }
 328
 329 /*
 330  * Allocate a device specific dma_tag.
 331  */
 332 #define SEG_NB 1024
 333
 334 int
 335 bus_dma_tag_create(bus_dma_tag_t parent, bus_size_t alignment,
 336                    bus_size_t boundary, bus_addr_t lowaddr,
 337                    bus_addr_t highaddr, bus_dma_filter_t *filter,
 338                    void *filterarg, bus_size_t maxsize, int nsegments,
 339                    bus_size_t maxsegsz, int flags, bus_dma_lock_t *lockfunc,
 340                    void *lockfuncarg, bus_dma_tag_t *dmat)
 341 {
 342         bus_dma_tag_t newtag;
 343         int error = 0;
 344         /* Return a NULL tag on failure */
 345         *dmat = NULL;
 346         if (!parent)
 347                 parent = arm_root_dma_tag;
 348
 349         newtag = (bus_dma_tag_t)malloc(sizeof(*newtag), M_DEVBUF, M_NOWAIT);
 350         if (newtag == NULL) {
 351                 CTR4(KTR_BUSDMA, "%s returned tag %p tag flags 0x%x error %d",
 352                     __func__, newtag, 0, error);
 353                 return (ENOMEM);
 354         }
 355
 356         newtag->parent = parent;
 357         newtag->alignment = alignment;
 358         newtag->boundary = boundary;
 359         newtag->lowaddr = trunc_page((vm_offset_t)lowaddr) + (PAGE_SIZE - 1);
 360         newtag->highaddr = trunc_page((vm_offset_t)highaddr) + (PAGE_SIZE - 1);
 361         newtag->filter = filter;
 362         newtag->filterarg = filterarg;
 363         newtag->maxsize = maxsize;
 364         newtag->nsegments = nsegments;
 365         newtag->maxsegsz = maxsegsz;
 366         newtag->flags = flags;
 367         newtag->ref_count = 1; /* Count ourself */
 368         newtag->map_count = 0;
 369         newtag->ranges = bus_dma_get_range();
 370         newtag->_nranges = bus_dma_get_range_nb();
 371         if (lockfunc != NULL) {
 372                 newtag->lockfunc = lockfunc;
 373                 newtag->lockfuncarg = lockfuncarg;
 374         } else {
 375                 newtag->lockfunc = dflt_lock;
 376                 newtag->lockfuncarg = NULL;
 377         }
 378         newtag->segments = NULL;
 379
 380         /*
 381          * Take into account any restrictions imposed by our parent tag
 382          */
 383         if (parent != NULL) {
 384                 newtag->lowaddr = min(parent->lowaddr, newtag->lowaddr);
 385                 newtag->highaddr = max(parent->highaddr, newtag->highaddr);
 386                 if (newtag->boundary == 0)
 387                         newtag->boundary = parent->boundary;
 388                 else if (parent->boundary != 0)
 389                         newtag->boundary = min(parent->boundary,
 390                                                newtag->boundary);
 391                 if ((newtag->filter != NULL) ||
 392                     ((parent->flags & BUS_DMA_COULD_BOUNCE) != 0))
 393                         newtag->flags |= BUS_DMA_COULD_BOUNCE;
 394                 if (newtag->filter == NULL) {
 395                         /*
 396                          * Short circuit looking at our parent directly
 397                          * since we have encapsulated all of its information
 398                          */
 399                         newtag->filter = parent->filter;
 400                         newtag->filterarg = parent->filterarg;
 401                         newtag->parent = parent->parent;
 402                 }
 403                 if (newtag->parent != NULL)
 404                         atomic_add_int(&parent->ref_count, 1);
 405         }
 406         if (_bus_dma_can_bounce(newtag->lowaddr, newtag->highaddr)
 407          || newtag->alignment > 1)
 408                 newtag->flags |= BUS_DMA_COULD_BOUNCE;
 409
 410         if (((newtag->flags & BUS_DMA_COULD_BOUNCE) != 0) &&
 411             (flags & BUS_DMA_ALLOCNOW) != 0) {
 412                 struct bounce_zone *bz;
 413
 414                 /* Must bounce */
 415
 416                 if ((error = alloc_bounce_zone(newtag)) != 0) {
 417                         free(newtag, M_DEVBUF);
 418                         return (error);
 419                 }
 420                 bz = newtag->bounce_zone;
 421
 422                 if (ptoa(bz->total_bpages) < maxsize) {
 423                         int pages;
 424
 425                         pages = atop(maxsize) - bz->total_bpages;
 426
 427                         /* Add pages to our bounce pool */
 428                         if (alloc_bounce_pages(newtag, pages) < pages)
 429                                 error = ENOMEM;
 430                 }
 431                 /* Performed initial allocation */
 432                 newtag->flags |= BUS_DMA_MIN_ALLOC_COMP;
 433         } else
 434                 newtag->bounce_zone = NULL;
 435         if (error != 0)
 436                 free(newtag, M_DEVBUF);
 437         else
 438                 *dmat = newtag;
 439         CTR4(KTR_BUSDMA, "%s returned tag %p tag flags 0x%x error %d",
 440             __func__, newtag, (newtag != NULL ? newtag->flags : 0), error);
 441
 442         return (error);
 443 }
 444
 445 int
 446 bus_dma_tag_destroy(bus_dma_tag_t dmat)
 447 {
 448 #ifdef KTR
 449         bus_dma_tag_t dmat_copy = dmat;
 450 #endif
 451
 452         if (dmat != NULL) {
 453                 if (dmat->map_count != 0)
 454                         return (EBUSY);
 455
 456                 while (dmat != NULL) {
 457                         bus_dma_tag_t parent;
 458
 459                         parent = dmat->parent;
 460                         atomic_subtract_int(&dmat->ref_count, 1);
 461                         if (dmat->ref_count == 0) {
 462                                 if (dmat->segments != NULL)
 463                                         free(dmat->segments, M_DEVBUF);
 464                                 free(dmat, M_DEVBUF);
 465                                 /*
 466                                  * Last reference count, so
 467                                  * release our reference
 468                                  * count on our parent.
 469                                  */
 470                                 dmat = parent;
 471                         } else
 472                                 dmat = NULL;
 473                 }
 474         }
 475         CTR2(KTR_BUSDMA, "%s tag %p", __func__, dmat_copy);
 476
 477         return (0);
 478 }
 479
 480 #include <sys/kdb.h>
 481 /*
 482  * Allocate a handle for mapping from kva/uva/physical
 483  * address space into bus device space.
 484  */
 485 int
 486 bus_dmamap_create(bus_dma_tag_t dmat, int flags, bus_dmamap_t *mapp)
 487 {
 488         bus_dmamap_t newmap;
 489         int error = 0;
 490
 491         if (dmat->segments == NULL) {
 492                 dmat->segments = (bus_dma_segment_t *)malloc(
 493                     sizeof(bus_dma_segment_t) * dmat->nsegments, M_DEVBUF,
 494                     M_NOWAIT);
 495                 if (dmat->segments == NULL) {
 496                         CTR3(KTR_BUSDMA, "%s: tag %p error %d",
 497                             __func__, dmat, ENOMEM);
 498                         return (ENOMEM);
 499                 }
 500         }
 501
 502         newmap = _busdma_alloc_dmamap();
 503         if (newmap == NULL) {
 504                 CTR3(KTR_BUSDMA, "%s: tag %p error %d", __func__, dmat, ENOMEM);
 505                 return (ENOMEM);
 506         }
 507         *mapp = newmap;
 508         newmap->dmat = dmat;
 509         newmap->allocbuffer = NULL;
 510         dmat->map_count++;
 511
 512         /*
 513          * Bouncing might be required if the driver asks for an active
 514          * exclusion region, a data alignment that is stricter than 1, and/or
 515          * an active address boundary.
 516          */
 517         if (dmat->flags & BUS_DMA_COULD_BOUNCE) {
 518
 519                 /* Must bounce */
 520                 struct bounce_zone *bz;
 521                 int maxpages;
 522
 523                 if (dmat->bounce_zone == NULL) {
 524                         if ((error = alloc_bounce_zone(dmat)) != 0) {
 525                                 _busdma_free_dmamap(newmap);
 526                                 *mapp = NULL;
 527                                 return (error);
 528                         }
 529                 }
 530                 bz = dmat->bounce_zone;
 531
 532                 /* Initialize the new map */
 533                 STAILQ_INIT(&((*mapp)->bpages));
 534
 535                 /*
 536                  * Attempt to add pages to our pool on a per-instance
 537                  * basis up to a sane limit.
 538                  */
 539                 maxpages = MAX_BPAGES;
 540                 if ((dmat->flags & BUS_DMA_MIN_ALLOC_COMP) == 0
 541                  || (bz->map_count > 0 && bz->total_bpages < maxpages)) {
 542                         int pages;
 543
 544                         pages = MAX(atop(dmat->maxsize), 1);
 545                         pages = MIN(maxpages - bz->total_bpages, pages);
 546                         pages = MAX(pages, 1);
 547                         if (alloc_bounce_pages(dmat, pages) < pages)
 548                                 error = ENOMEM;
 549
 550                         if ((dmat->flags & BUS_DMA_MIN_ALLOC_COMP) == 0) {
 551                                 if (error == 0)
 552                                         dmat->flags |= BUS_DMA_MIN_ALLOC_COMP;
 553                         } else {
 554                                 error = 0;
 555                         }
 556                 }
 557                 bz->map_count++;
 558         }
 559         CTR4(KTR_BUSDMA, "%s: tag %p tag flags 0x%x error %d",
 560             __func__, dmat, dmat->flags, error);
 561
 562         return (0);
 563 }
 564
 565 /*
 566  * Destroy a handle for mapping from kva/uva/physical
 567  * address space into bus device space.
 568  */
 569 int
 570 bus_dmamap_destroy(bus_dma_tag_t dmat, bus_dmamap_t map)
 571 {
 572
 573         if (STAILQ_FIRST(&map->bpages) != NULL) {
 574                 CTR3(KTR_BUSDMA, "%s: tag %p error %d",
 575                     __func__, dmat, EBUSY);
 576                 return (EBUSY);
 577         }
 578         _busdma_free_dmamap(map);
 579         if (dmat->bounce_zone)
 580                 dmat->bounce_zone->map_count--;
 581         dmat->map_count--;
 582         CTR2(KTR_BUSDMA, "%s: tag %p error 0", __func__, dmat);
 583         return (0);
 584 }
 585
 586 /*
 587  * Allocate a piece of memory that can be efficiently mapped into
 588  * bus device space based on the constraints lited in the dma tag.
 589  * A dmamap to for use with dmamap_load is also allocated.
 590  */
 591 int
 592 bus_dmamem_alloc(bus_dma_tag_t dmat, void** vaddr, int flags,
 593                  bus_dmamap_t *mapp)
 594 {
 595         bus_dmamap_t newmap = NULL;
 596
 597         int mflags;
 598
 599         if (flags & BUS_DMA_NOWAIT)
 600                 mflags = M_NOWAIT;
 601         else
 602                 mflags = M_WAITOK;
 603         if (dmat->segments == NULL) {
 604                 dmat->segments = (bus_dma_segment_t *)malloc(
 605                     sizeof(bus_dma_segment_t) * dmat->nsegments, M_DEVBUF,
 606                     mflags);
 607                 if (dmat->segments == NULL) {
 608                         CTR4(KTR_BUSDMA, "%s: tag %p tag flags 0x%x error %d",
 609                             __func__, dmat, dmat->flags, ENOMEM);
 610                         return (ENOMEM);
 611                 }
 612         }
 613         if (flags & BUS_DMA_ZERO)
 614                 mflags |= M_ZERO;
 615
 616         newmap = _busdma_alloc_dmamap();
 617         if (newmap == NULL) {
 618                 CTR4(KTR_BUSDMA, "%s: tag %p tag flags 0x%x error %d",
 619                     __func__, dmat, dmat->flags, ENOMEM);
 620                 return (ENOMEM);
 621         }
 622         dmat->map_count++;
 623         *mapp = newmap;
 624         newmap->dmat = dmat;
 625
 626         if (dmat->maxsize <= PAGE_SIZE &&
 627            (dmat->alignment < dmat->maxsize) &&
 628            !_bus_dma_can_bounce(dmat->lowaddr, dmat->highaddr)) {
 629                 *vaddr = malloc(dmat->maxsize, M_DEVBUF, mflags);
 630         } else {
 631                 /*
 632                  * XXX Use Contigmalloc until it is merged into this facility
 633                  *     and handles multi-seg allocations.  Nobody is doing
 634                  *     multi-seg allocations yet though.
 635                  */
 636                 *vaddr = contigmalloc(dmat->maxsize, M_DEVBUF, mflags,
 637                     0ul, dmat->lowaddr, dmat->alignment? dmat->alignment : 1ul,
 638                     dmat->boundary);
 639         }
 640         if (*vaddr == NULL) {
 641                 if (newmap != NULL) {
 642                         _busdma_free_dmamap(newmap);
 643                         dmat->map_count--;
 644                 }
 645                 *mapp = NULL;
 646                 return (ENOMEM);
 647         }
 648         if (flags & BUS_DMA_COHERENT) {
 649                 void *tmpaddr = arm_remap_nocache(
 650                     (void *)((vm_offset_t)*vaddr &~ PAGE_MASK),
 651                     dmat->maxsize + ((vm_offset_t)*vaddr & PAGE_MASK));
 652
 653                 if (tmpaddr) {
 654                         tmpaddr = (void *)((vm_offset_t)(tmpaddr) +
 655                             ((vm_offset_t)*vaddr & PAGE_MASK));
 656                         newmap->origbuffer = *vaddr;
 657                         newmap->allocbuffer = tmpaddr;
 658                         *vaddr = tmpaddr;
 659                 } else
 660                         newmap->origbuffer = newmap->allocbuffer = NULL;
 661         } else
 662                 newmap->origbuffer = newmap->allocbuffer = NULL;
 663         return (0);
 664 }
 665
 666 /*
 667  * Free a piece of memory and it's allocated dmamap, that was allocated
 668  * via bus_dmamem_alloc.  Make the same choice for free/contigfree.
 669  */
 670 void
 671 bus_dmamem_free(bus_dma_tag_t dmat, void *vaddr, bus_dmamap_t map)
 672 {
 673         if (map->allocbuffer) {
 674                 KASSERT(map->allocbuffer == vaddr,
 675                     ("Trying to freeing the wrong DMA buffer"));
 676                 vaddr = map->origbuffer;
 677                 arm_unmap_nocache(map->allocbuffer,
 678                     dmat->maxsize + ((vm_offset_t)vaddr & PAGE_MASK));
 679         }
 680         if (dmat->maxsize <= PAGE_SIZE &&
 681            dmat->alignment < dmat->maxsize &&
 682             !_bus_dma_can_bounce(dmat->lowaddr, dmat->highaddr))
 683                 free(vaddr, M_DEVBUF);
 684         else {
 685                 contigfree(vaddr, dmat->maxsize, M_DEVBUF);
 686         }
 687         dmat->map_count--;
 688         _busdma_free_dmamap(map);
 689         CTR3(KTR_BUSDMA, "%s: tag %p flags 0x%x", __func__, dmat, dmat->flags);
 690 }
 691
 692 static int
 693 _bus_dmamap_count_pages(bus_dma_tag_t dmat, bus_dmamap_t map, pmap_t pmap,
 694     void *buf, bus_size_t buflen, int flags)
 695 {
 696         vm_offset_t vaddr;
 697         vm_offset_t vendaddr;
 698         bus_addr_t paddr;
 699
 700         if ((map->pagesneeded == 0)) {
 701                 CTR3(KTR_BUSDMA, "lowaddr= %d, boundary= %d, alignment= %d",
 702                     dmat->lowaddr, dmat->boundary, dmat->alignment);
 703                 CTR2(KTR_BUSDMA, "map= %p, pagesneeded= %d",
 704                     map, map->pagesneeded);
 705                 /*
 706                  * Count the number of bounce pages
 707                  * needed in order to complete this transfer
 708                  */
 709                 vaddr = trunc_page((vm_offset_t)buf);
 710                 vendaddr = (vm_offset_t)buf + buflen;
 711
 712                 while (vaddr < vendaddr) {
 713                         if (__predict_true(pmap == pmap_kernel()))
 714                                 paddr = pmap_kextract(vaddr);
 715                         else
 716                                 paddr = pmap_extract(pmap, vaddr);
 717                         if (((dmat->flags & BUS_DMA_COULD_BOUNCE) != 0) &&
 718                             run_filter(dmat, paddr) != 0)
 719                                 map->pagesneeded++;
 720                         vaddr += PAGE_SIZE;
 721                 }
 722                 CTR1(KTR_BUSDMA, "pagesneeded= %d\n", map->pagesneeded);
 723         }
 724
 725         /* Reserve Necessary Bounce Pages */
 726         if (map->pagesneeded != 0) {
 727                 mtx_lock(&bounce_lock);
 728                 if (flags & BUS_DMA_NOWAIT) {
 729                         if (reserve_bounce_pages(dmat, map, 0) != 0) {
 730                                 mtx_unlock(&bounce_lock);
 731                                 return (ENOMEM);
 732                         }
 733                 } else {
 734                         if (reserve_bounce_pages(dmat, map, 1) != 0) {
 735                                 /* Queue us for resources */
 736                                 STAILQ_INSERT_TAIL(&bounce_map_waitinglist,
 737                                     map, links);
 738                                 mtx_unlock(&bounce_lock);
 739                                 return (EINPROGRESS);
 740                         }
 741                 }
 742                 mtx_unlock(&bounce_lock);
 743         }
 744
 745         return (0);
 746 }
 747
 748 /*
 749  * Utility function to load a linear buffer.  lastaddrp holds state
 750  * between invocations (for multiple-buffer loads).  segp contains
 751  * the starting segment on entrance, and the ending segment on exit.
 752  * first indicates if this is the first invocation of this function.
 753  */
 754 static __inline int
 755 bus_dmamap_load_buffer(bus_dma_tag_t dmat, bus_dma_segment_t *segs,
 756     bus_dmamap_t map, void *buf, bus_size_t buflen, struct pmap *pmap,
 757     int flags, vm_offset_t *lastaddrp, int *segp)
 758 {
 759         bus_size_t sgsize;
 760         bus_addr_t curaddr, lastaddr, baddr, bmask;
 761         vm_offset_t vaddr = (vm_offset_t)buf;
 762         int seg;
 763         int error = 0;
 764         pd_entry_t *pde;
 765         pt_entry_t pte;
 766         pt_entry_t *ptep;
 767
 768         lastaddr = *lastaddrp;
 769         bmask = ~(dmat->boundary - 1);
 770
 771         if ((dmat->flags & BUS_DMA_COULD_BOUNCE) != 0) {
 772                 error = _bus_dmamap_count_pages(dmat, map, pmap, buf, buflen,
 773                     flags);
 774                 if (error)
 775                         return (error);
 776         }
 777         CTR3(KTR_BUSDMA, "lowaddr= %d boundary= %d, "
 778             "alignment= %d", dmat->lowaddr, dmat->boundary, dmat->alignment);
 779
 780         for (seg = *segp; buflen > 0 ; ) {
 781                 /*
 782                  * Get the physical address for this segment.
 783                  *
 784                  * XXX Don't support checking for coherent mappings
 785                  * XXX in user address space.
 786                  */
 787                 if (__predict_true(pmap == pmap_kernel())) {
 788                         if (pmap_get_pde_pte(pmap, vaddr, &pde, &ptep) == FALSE)
 789                                 return (EFAULT);
 790
 791                         if (__predict_false(pmap_pde_section(pde))) {
 792                                 if (*pde & L1_S_SUPERSEC)
 793                                         curaddr = (*pde & L1_SUP_FRAME) |
 794                                             (vaddr & L1_SUP_OFFSET);
 795                                 else
 796                                         curaddr = (*pde & L1_S_FRAME) |
 797                                             (vaddr & L1_S_OFFSET);
 798                                 if (*pde & L1_S_CACHE_MASK) {
 799                                         map->flags &=
 800                                             ~DMAMAP_COHERENT;
 801                                 }
 802                         } else {
 803                                 pte = *ptep;
 804                                 KASSERT((pte & L2_TYPE_MASK) != L2_TYPE_INV,
 805                                     ("INV type"));
 806                                 if (__predict_false((pte & L2_TYPE_MASK)
 807                                                     == L2_TYPE_L)) {
 808                                         curaddr = (pte & L2_L_FRAME) |
 809                                             (vaddr & L2_L_OFFSET);
 810                                         if (pte & L2_L_CACHE_MASK) {
 811                                                 map->flags &=
 812                                                     ~DMAMAP_COHERENT;
 813
 814                                         }
 815                                 } else {
 816                                         curaddr = (pte & L2_S_FRAME) |
 817                                             (vaddr & L2_S_OFFSET);
 818                                         if (pte & L2_S_CACHE_MASK) {
 819                                                 map->flags &=
 820                                                     ~DMAMAP_COHERENT;
 821                                         }
 822                                 }
 823                         }
 824                 } else {
 825                         curaddr = pmap_extract(pmap, vaddr);
 826                         map->flags &= ~DMAMAP_COHERENT;
 827                 }
 828
 829                 /*
 830                  * Compute the segment size, and adjust counts.
 831                  */
 832                 sgsize = PAGE_SIZE - ((u_long)curaddr & PAGE_MASK);
 833                 if (sgsize > dmat->maxsegsz)
 834                         sgsize = dmat->maxsegsz;
 835                 if (buflen < sgsize)
 836                         sgsize = buflen;
 837
 838                 /*
 839                  * Make sure we don't cross any boundaries.
 840                  */
 841                 if (dmat->boundary > 0) {
 842                         baddr = (curaddr + dmat->boundary) & bmask;
 843                         if (sgsize > (baddr - curaddr))
 844                                 sgsize = (baddr - curaddr);
 845                 }
 846                 if (((dmat->flags & BUS_DMA_COULD_BOUNCE) != 0) &&
 847                     map->pagesneeded != 0 && run_filter(dmat, curaddr))
 848                         curaddr = add_bounce_page(dmat, map, vaddr, sgsize);
 849
 850                 if (dmat->ranges) {
 851                         struct arm32_dma_range *dr;
 852
 853                         dr = _bus_dma_inrange(dmat->ranges, dmat->_nranges,
 854                             curaddr);
 855                         if (dr == NULL)
 856                                 return (EINVAL);
 857                         /*
 858                          * In a valid DMA range.  Translate the physical
 859                          * memory address to an address in the DMA window.
 860                          */
 861                         curaddr = (curaddr - dr->dr_sysbase) + dr->dr_busbase;
 862
 863                 }
 864
 865                 /*
 866                  * Insert chunk into a segment, coalescing with
 867                  * the previous segment if possible.
 868                  */
 869                 if (seg >= 0 && curaddr == lastaddr &&
 870                     (segs[seg].ds_len + sgsize) <= dmat->maxsegsz &&
 871                     (dmat->boundary == 0 ||
 872                      (segs[seg].ds_addr & bmask) ==
 873                      (curaddr & bmask))) {
 874                         segs[seg].ds_len += sgsize;
 875                         goto segdone;
 876                 } else {
 877                         if (++seg >= dmat->nsegments)
 878                                 break;
 879                         segs[seg].ds_addr = curaddr;
 880                         segs[seg].ds_len = sgsize;
 881                 }
 882                 if (error)
 883                         break;
 884 segdone:
 885                 lastaddr = curaddr + sgsize;
 886                 vaddr += sgsize;
 887                 buflen -= sgsize;
 888         }
 889
 890         *segp = seg;
 891         *lastaddrp = lastaddr;
 892
 893         /*
 894          * Did we fit?
 895          */
 896         if (buflen != 0)
 897                 error = EFBIG; /* XXX better return value here? */
 898         return (error);
 899 }
 900
 901 /*
 902  * Map the buffer buf into bus space using the dmamap map.
 903  */
 904 int
 905 bus_dmamap_load(bus_dma_tag_t dmat, bus_dmamap_t map, void *buf,
 906                 bus_size_t buflen, bus_dmamap_callback_t *callback,
 907                 void *callback_arg, int flags)
 908 {
 909         vm_offset_t     lastaddr = 0;
 910         int             error, nsegs = -1;
 911
 912         KASSERT(dmat != NULL, ("dmatag is NULL"));
 913         KASSERT(map != NULL, ("dmamap is NULL"));
 914         map->callback = callback;
 915         map->callback_arg = callback_arg;
 916         map->flags &= ~DMAMAP_TYPE_MASK;
 917         map->flags |= DMAMAP_LINEAR|DMAMAP_COHERENT;
 918         map->buffer = buf;
 919         map->len = buflen;
 920         error = bus_dmamap_load_buffer(dmat,
 921             dmat->segments, map, buf, buflen, kernel_pmap,
 922             flags, &lastaddr, &nsegs);
 923         if (error == EINPROGRESS)
 924                 return (error);
 925         if (error)
 926                 (*callback)(callback_arg, NULL, 0, error);
 927         else
 928                 (*callback)(callback_arg, dmat->segments, nsegs + 1, error);
 929
 930         CTR5(KTR_BUSDMA, "%s: tag %p tag flags 0x%x error %d nsegs %d",
 931             __func__, dmat, dmat->flags, nsegs + 1, error);
 932
 933         return (error);
 934 }
 935
 936 /*
 937  * Like bus_dmamap_load(), but for mbufs.
 938  */
 939 int
 940 bus_dmamap_load_mbuf(bus_dma_tag_t dmat, bus_dmamap_t map, struct mbuf *m0,
 941                      bus_dmamap_callback2_t *callback, void *callback_arg,
 942                      int flags)
 943 {
 944         int nsegs = -1, error = 0;
 945
 946         M_ASSERTPKTHDR(m0);
 947
 948         map->flags &= ~DMAMAP_TYPE_MASK;
 949         map->flags |= DMAMAP_MBUF | DMAMAP_COHERENT;
 950         map->buffer = m0;
 951         map->len = 0;
 952         if (m0->m_pkthdr.len <= dmat->maxsize) {
 953                 vm_offset_t lastaddr = 0;
 954                 struct mbuf *m;
 955
 956                 for (m = m0; m != NULL && error == 0; m = m->m_next) {
 957                         if (m->m_len > 0) {
 958                                 error = bus_dmamap_load_buffer(dmat,
 959                                     dmat->segments, map, m->m_data, m->m_len,
 960                                     pmap_kernel(), flags, &lastaddr, &nsegs);
 961                                 map->len += m->m_len;
 962                         }
 963                 }
 964         } else {
 965                 error = EINVAL;
 966         }
 967
 968         if (error) {
 969                 /*
 970                  * force "no valid mappings" on error in callback.
 971                  */
 972                 (*callback)(callback_arg, dmat->segments, 0, 0, error);
 973         } else {
 974                 (*callback)(callback_arg, dmat->segments, nsegs + 1,
 975                     m0->m_pkthdr.len, error);
 976         }
 977         CTR5(KTR_BUSDMA, "%s: tag %p tag flags 0x%x error %d nsegs %d",
 978             __func__, dmat, dmat->flags, error, nsegs + 1);
 979
 980         return (error);
 981 }
 982
 983 int
 984 bus_dmamap_load_mbuf_sg(bus_dma_tag_t dmat, bus_dmamap_t map,
 985                         struct mbuf *m0, bus_dma_segment_t *segs, int *nsegs,
 986                         int flags)
 987 {
 988         int error = 0;
 989         M_ASSERTPKTHDR(m0);
 990
 991         flags |= BUS_DMA_NOWAIT;
 992         *nsegs = -1;
 993         map->flags &= ~DMAMAP_TYPE_MASK;
 994         map->flags |= DMAMAP_MBUF | DMAMAP_COHERENT;
 995         map->buffer = m0;
 996         map->len = 0;
 997         if (m0->m_pkthdr.len <= dmat->maxsize) {
 998                 vm_offset_t lastaddr = 0;
 999                 struct mbuf *m;
1000
1001                 for (m = m0; m != NULL && error == 0; m = m->m_next) {
1002                         if (m->m_len > 0) {
1003                                 error = bus_dmamap_load_buffer(dmat, segs, map,
1004                                                 m->m_data, m->m_len,
1005                                                 pmap_kernel(), flags, &lastaddr,
1006                                                 nsegs);
1007                                 map->len += m->m_len;
1008                         }
1009                 }
1010         } else {
1011                 error = EINVAL;
1012         }
1013
1014         /* XXX FIXME: Having to increment nsegs is really annoying */
1015         ++*nsegs;
1016         CTR5(KTR_BUSDMA, "%s: tag %p tag flags 0x%x error %d nsegs %d",
1017             __func__, dmat, dmat->flags, error, *nsegs);
1018         return (error);
1019 }
1020
1021 /*
1022  * Like bus_dmamap_load(), but for uios.
1023  */
1024 int
1025 bus_dmamap_load_uio(bus_dma_tag_t dmat, bus_dmamap_t map, struct uio *uio,
1026     bus_dmamap_callback2_t *callback, void *callback_arg,
1027     int flags)
1028 {
1029         vm_offset_t lastaddr = 0;
1030         int nsegs, i, error;
1031         bus_size_t resid;
1032         struct iovec *iov;
1033         struct pmap *pmap;
1034
1035         resid = uio->uio_resid;
1036         iov = uio->uio_iov;
1037         map->flags &= ~DMAMAP_TYPE_MASK;
1038         map->flags |= DMAMAP_UIO|DMAMAP_COHERENT;
1039         map->buffer = uio;
1040         map->len = 0;
1041
1042         if (uio->uio_segflg == UIO_USERSPACE) {
1043                 KASSERT(uio->uio_td != NULL,
1044                     ("bus_dmamap_load_uio: USERSPACE but no proc"));
1045                 pmap = vmspace_pmap(uio->uio_td->td_proc->p_vmspace);
1046         } else
1047                 pmap = kernel_pmap;
1048
1049         error = 0;
1050         nsegs = -1;
1051         for (i = 0; i < uio->uio_iovcnt && resid != 0 && !error; i++) {
1052                 /*
1053                  * Now at the first iovec to load.  Load each iovec
1054                  * until we have exhausted the residual count.
1055                  */
1056                 bus_size_t minlen =
1057                     resid < iov[i].iov_len ? resid : iov[i].iov_len;
1058                 caddr_t addr = (caddr_t) iov[i].iov_base;
1059
1060                 if (minlen > 0) {
1061                         error = bus_dmamap_load_buffer(dmat, dmat->segments,
1062                             map, addr, minlen, pmap, flags, &lastaddr, &nsegs);
1063
1064                         map->len += minlen;
1065                         resid -= minlen;
1066                 }
1067         }
1068
1069         if (error) {
1070                 /*
1071                  * force "no valid mappings" on error in callback.
1072                  */
1073                 (*callback)(callback_arg, dmat->segments, 0, 0, error);
1074         } else {
1075                 (*callback)(callback_arg, dmat->segments, nsegs+1,
1076                     uio->uio_resid, error);
1077         }
1078
1079         CTR5(KTR_BUSDMA, "%s: tag %p tag flags 0x%x error %d nsegs %d",
1080             __func__, dmat, dmat->flags, error, nsegs + 1);
1081         return (error);
1082 }
1083
1084 /*
1085  * Release the mapping held by map.
1086  */
1087 void
1088 _bus_dmamap_unload(bus_dma_tag_t dmat, bus_dmamap_t map)
1089 {
1090         struct bounce_page *bpage;
1091
1092         map->flags &= ~DMAMAP_TYPE_MASK;
1093         while ((bpage = STAILQ_FIRST(&map->bpages)) != NULL) {
1094                 STAILQ_REMOVE_HEAD(&map->bpages, links);
1095                 free_bounce_page(dmat, bpage);
1096         }
1097         return;
1098 }
1099
1100 static void
1101 bus_dmamap_sync_buf(void *buf, int len, bus_dmasync_op_t op)
1102 {
1103         char _tmp_cl[arm_dcache_align], _tmp_clend[arm_dcache_align];
1104         register_t s;
1105         int partial;
1106
1107         if ((op & BUS_DMASYNC_PREWRITE) && !(op & BUS_DMASYNC_PREREAD)) {
1108                 cpu_dcache_wb_range((vm_offset_t)buf, len);
1109                 cpu_l2cache_wb_range((vm_offset_t)buf, len);
1110         }
1111         partial = (((vm_offset_t)buf) | len) & arm_dcache_align_mask;
1112         if (op & BUS_DMASYNC_PREREAD) {
1113                 if (!(op & BUS_DMASYNC_PREWRITE) && !partial) {
1114                         cpu_dcache_inv_range((vm_offset_t)buf, len);
1115                         cpu_l2cache_inv_range((vm_offset_t)buf, len);
1116                 } else {
1117                         cpu_dcache_wbinv_range((vm_offset_t)buf, len);
1118                         cpu_l2cache_wbinv_range((vm_offset_t)buf, len);
1119                 }
1120         }
1121         if (op & BUS_DMASYNC_POSTREAD) {
1122                 if (partial) {
1123                         s = intr_disable();
1124                         if ((vm_offset_t)buf & arm_dcache_align_mask)
1125                                 memcpy(_tmp_cl, (void *)((vm_offset_t)buf &
1126                                     ~arm_dcache_align_mask),
1127                                     (vm_offset_t)buf & arm_dcache_align_mask);
1128                         if (((vm_offset_t)buf + len) & arm_dcache_align_mask)
1129                                 memcpy(_tmp_clend,
1130                                     (void *)((vm_offset_t)buf + len),
1131                                     arm_dcache_align - (((vm_offset_t)(buf) +
1132                                     len) & arm_dcache_align_mask));
1133                 }
1134                 cpu_dcache_inv_range((vm_offset_t)buf, len);
1135                 cpu_l2cache_inv_range((vm_offset_t)buf, len);
1136                 if (partial) {
1137                         if ((vm_offset_t)buf & arm_dcache_align_mask)
1138                                 memcpy((void *)((vm_offset_t)buf &
1139                                     ~arm_dcache_align_mask), _tmp_cl,
1140                                     (vm_offset_t)buf & arm_dcache_align_mask);
1141                         if (((vm_offset_t)buf + len) & arm_dcache_align_mask)
1142                                 memcpy((void *)((vm_offset_t)buf + len),
1143                                     _tmp_clend, arm_dcache_align -
1144                                     (((vm_offset_t)(buf) + len) &
1145                                     arm_dcache_align_mask));
1146                         intr_restore(s);
1147                 }
1148         }
1149 }
1150
1151 static void
1152 _bus_dmamap_sync_bp(bus_dma_tag_t dmat, bus_dmamap_t map, bus_dmasync_op_t op)
1153 {
1154         struct bounce_page *bpage;
1155
1156         STAILQ_FOREACH(bpage, &map->bpages, links) {
1157                 if (op & BUS_DMASYNC_PREWRITE) {
1158                         bcopy((void *)bpage->datavaddr,
1159                             (void *)(bpage->vaddr_nocache != 0 ?
1160                                      bpage->vaddr_nocache : bpage->vaddr),
1161                             bpage->datacount);
1162                         if (bpage->vaddr_nocache == 0) {
1163                                 cpu_dcache_wb_range(bpage->vaddr,
1164                                     bpage->datacount);
1165                                 cpu_l2cache_wb_range(bpage->vaddr,
1166                                     bpage->datacount);
1167                         }
1168                         dmat->bounce_zone->total_bounced++;
1169                 }
1170                 if (op & BUS_DMASYNC_POSTREAD) {
1171                         if (bpage->vaddr_nocache == 0) {
1172                                 cpu_dcache_inv_range(bpage->vaddr,
1173                                     bpage->datacount);
1174                                 cpu_l2cache_inv_range(bpage->vaddr,
1175                                     bpage->datacount);
1176                         }
1177                         bcopy((void *)(bpage->vaddr_nocache != 0 ?
1178                             bpage->vaddr_nocache : bpage->vaddr),
1179                             (void *)bpage->datavaddr, bpage->datacount);
1180                         dmat->bounce_zone->total_bounced++;
1181                 }
1182         }
1183 }
1184
1185 static __inline int
1186 _bus_dma_buf_is_in_bp(bus_dmamap_t map, void *buf, int len)
1187 {
1188         struct bounce_page *bpage;
1189
1190         STAILQ_FOREACH(bpage, &map->bpages, links) {
1191                 if ((vm_offset_t)buf >= bpage->datavaddr &&
1192                     (vm_offset_t)buf + len <= bpage->datavaddr +
1193                     bpage->datacount)
1194                         return (1);
1195         }
1196         return (0);
1197
1198 }
1199
1200 void
1201 _bus_dmamap_sync(bus_dma_tag_t dmat, bus_dmamap_t map, bus_dmasync_op_t op)
1202 {
1203         struct mbuf *m;
1204         struct uio *uio;
1205         int resid;
1206         struct iovec *iov;
1207
1208         if (op == BUS_DMASYNC_POSTWRITE)
1209                 return;
1210         if (STAILQ_FIRST(&map->bpages))
1211                 _bus_dmamap_sync_bp(dmat, map, op);
1212         if (map->flags & DMAMAP_COHERENT)
1213                 return;
1214         CTR3(KTR_BUSDMA, "%s: op %x flags %x", __func__, op, map->flags);
1215         switch(map->flags & DMAMAP_TYPE_MASK) {
1216         case DMAMAP_LINEAR:
1217                 if (!(_bus_dma_buf_is_in_bp(map, map->buffer, map->len)))
1218                         bus_dmamap_sync_buf(map->buffer, map->len, op);
1219                 break;
1220         case DMAMAP_MBUF:
1221                 m = map->buffer;
1222                 while (m) {
1223                         if (m->m_len > 0 &&
1224                             !(_bus_dma_buf_is_in_bp(map, m->m_data, m->m_len)))
1225                                 bus_dmamap_sync_buf(m->m_data, m->m_len, op);
1226                         m = m->m_next;
1227                 }
1228                 break;
1229         case DMAMAP_UIO:
1230                 uio = map->buffer;
1231                 iov = uio->uio_iov;
1232                 resid = uio->uio_resid;
1233                 for (int i = 0; i < uio->uio_iovcnt && resid != 0; i++) {
1234                         bus_size_t minlen = resid < iov[i].iov_len ? resid :
1235                             iov[i].iov_len;
1236                         if (minlen > 0) {
1237                                 if (!_bus_dma_buf_is_in_bp(map, iov[i].iov_base,
1238                                     minlen))
1239                                         bus_dmamap_sync_buf(iov[i].iov_base,
1240                                             minlen, op);
1241                                 resid -= minlen;
1242                         }
1243                 }
1244                 break;
1245         default:
1246                 break;
1247         }
1248         cpu_drain_writebuf();
1249 }
1250
1251 static void
1252 init_bounce_pages(void *dummy __unused)
1253 {
1254
1255         total_bpages = 0;
1256         STAILQ_INIT(&bounce_zone_list);
1257         STAILQ_INIT(&bounce_map_waitinglist);
1258         STAILQ_INIT(&bounce_map_callbacklist);
1259         mtx_init(&bounce_lock, "bounce pages lock", NULL, MTX_DEF);
1260 }
1261 SYSINIT(bpages, SI_SUB_LOCK, SI_ORDER_ANY, init_bounce_pages, NULL);
1262
1263 static struct sysctl_ctx_list *
1264 busdma_sysctl_tree(struct bounce_zone *bz)
1265 {
1266         return (&bz->sysctl_tree);
1267 }
1268
1269 static struct sysctl_oid *
1270 busdma_sysctl_tree_top(struct bounce_zone *bz)
1271 {
1272         return (bz->sysctl_tree_top);
1273 }
1274
1275 static int
1276 alloc_bounce_zone(bus_dma_tag_t dmat)
1277 {
1278         struct bounce_zone *bz;
1279
1280         /* Check to see if we already have a suitable zone */
1281         STAILQ_FOREACH(bz, &bounce_zone_list, links) {
1282                 if ((dmat->alignment <= bz->alignment)
1283                  && (dmat->lowaddr >= bz->lowaddr)) {
1284                         dmat->bounce_zone = bz;
1285                         return (0);
1286                 }
1287         }
1288
1289         if ((bz = (struct bounce_zone *)malloc(sizeof(*bz), M_DEVBUF,
1290             M_NOWAIT | M_ZERO)) == NULL)
1291                 return (ENOMEM);
1292
1293         STAILQ_INIT(&bz->bounce_page_list);
1294         bz->free_bpages = 0;
1295         bz->reserved_bpages = 0;
1296         bz->active_bpages = 0;
1297         bz->lowaddr = dmat->lowaddr;
1298         bz->alignment = MAX(dmat->alignment, PAGE_SIZE);
1299         bz->map_count = 0;
1300         snprintf(bz->zoneid, 8, "zone%d", busdma_zonecount);
1301         busdma_zonecount++;
1302         snprintf(bz->lowaddrid, 18, "%#jx", (uintmax_t)bz->lowaddr);
1303         STAILQ_INSERT_TAIL(&bounce_zone_list, bz, links);
1304         dmat->bounce_zone = bz;
1305
1306         sysctl_ctx_init(&bz->sysctl_tree);
1307         bz->sysctl_tree_top = SYSCTL_ADD_NODE(&bz->sysctl_tree,
1308             SYSCTL_STATIC_CHILDREN(_hw_busdma), OID_AUTO, bz->zoneid,
1309             CTLFLAG_RD, 0, "");
1310         if (bz->sysctl_tree_top == NULL) {
1311                 sysctl_ctx_free(&bz->sysctl_tree);
1312                 return (0);     /* XXX error code? */
1313         }
1314
1315         SYSCTL_ADD_INT(busdma_sysctl_tree(bz),
1316             SYSCTL_CHILDREN(busdma_sysctl_tree_top(bz)), OID_AUTO,
1317             "total_bpages", CTLFLAG_RD, &bz->total_bpages, 0,
1318             "Total bounce pages");
1319         SYSCTL_ADD_INT(busdma_sysctl_tree(bz),
1320             SYSCTL_CHILDREN(busdma_sysctl_tree_top(bz)), OID_AUTO,
1321             "free_bpages", CTLFLAG_RD, &bz->free_bpages, 0,
1322             "Free bounce pages");
1323         SYSCTL_ADD_INT(busdma_sysctl_tree(bz),
1324             SYSCTL_CHILDREN(busdma_sysctl_tree_top(bz)), OID_AUTO,
1325             "reserved_bpages", CTLFLAG_RD, &bz->reserved_bpages, 0,
1326             "Reserved bounce pages");
1327         SYSCTL_ADD_INT(busdma_sysctl_tree(bz),
1328             SYSCTL_CHILDREN(busdma_sysctl_tree_top(bz)), OID_AUTO,
1329             "active_bpages", CTLFLAG_RD, &bz->active_bpages, 0,
1330             "Active bounce pages");
1331         SYSCTL_ADD_INT(busdma_sysctl_tree(bz),
1332             SYSCTL_CHILDREN(busdma_sysctl_tree_top(bz)), OID_AUTO,
1333             "total_bounced", CTLFLAG_RD, &bz->total_bounced, 0,
1334             "Total bounce requests");
1335         SYSCTL_ADD_INT(busdma_sysctl_tree(bz),
1336             SYSCTL_CHILDREN(busdma_sysctl_tree_top(bz)), OID_AUTO,
1337             "total_deferred", CTLFLAG_RD, &bz->total_deferred, 0,
1338             "Total bounce requests that were deferred");
1339         SYSCTL_ADD_STRING(busdma_sysctl_tree(bz),
1340             SYSCTL_CHILDREN(busdma_sysctl_tree_top(bz)), OID_AUTO,
1341             "lowaddr", CTLFLAG_RD, bz->lowaddrid, 0, "");
1342         SYSCTL_ADD_INT(busdma_sysctl_tree(bz),
1343             SYSCTL_CHILDREN(busdma_sysctl_tree_top(bz)), OID_AUTO,
1344             "alignment", CTLFLAG_RD, &bz->alignment, 0, "");
1345
1346         return (0);
1347 }
1348
1349 static int
1350 alloc_bounce_pages(bus_dma_tag_t dmat, u_int numpages)
1351 {
1352         struct bounce_zone *bz;
1353         int count;
1354
1355         bz = dmat->bounce_zone;
1356         count = 0;
1357         while (numpages > 0) {
1358                 struct bounce_page *bpage;
1359
1360                 bpage = (struct bounce_page *)malloc(sizeof(*bpage), M_DEVBUF,
1361                                                      M_NOWAIT | M_ZERO);
1362
1363                 if (bpage == NULL)
1364                         break;
1365                 bpage->vaddr = (vm_offset_t)contigmalloc(PAGE_SIZE, M_DEVBUF,
1366                                                          M_NOWAIT, 0ul,
1367                                                          bz->lowaddr,
1368                                                          PAGE_SIZE,
1369                                                          0);
1370                 if (bpage->vaddr == 0) {
1371                         free(bpage, M_DEVBUF);
1372                         break;
1373                 }
1374                 bpage->busaddr = pmap_kextract(bpage->vaddr);
1375                 bpage->vaddr_nocache = (vm_offset_t)arm_remap_nocache(
1376                     (void *)bpage->vaddr, PAGE_SIZE);
1377                 mtx_lock(&bounce_lock);
1378                 STAILQ_INSERT_TAIL(&bz->bounce_page_list, bpage, links);
1379                 total_bpages++;
1380                 bz->total_bpages++;
1381                 bz->free_bpages++;
1382                 mtx_unlock(&bounce_lock);
1383                 count++;
1384                 numpages--;
1385         }
1386         return (count);
1387 }
1388
1389 static int
1390 reserve_bounce_pages(bus_dma_tag_t dmat, bus_dmamap_t map, int commit)
1391 {
1392         struct bounce_zone *bz;
1393         int pages;
1394
1395         mtx_assert(&bounce_lock, MA_OWNED);
1396         bz = dmat->bounce_zone;
1397         pages = MIN(bz->free_bpages, map->pagesneeded - map->pagesreserved);
1398         if (commit == 0 && map->pagesneeded > (map->pagesreserved + pages))
1399                 return (map->pagesneeded - (map->pagesreserved + pages));
1400         bz->free_bpages -= pages;
1401         bz->reserved_bpages += pages;
1402         map->pagesreserved += pages;
1403         pages = map->pagesneeded - map->pagesreserved;
1404
1405         return (pages);
1406 }
1407
1408 static bus_addr_t
1409 add_bounce_page(bus_dma_tag_t dmat, bus_dmamap_t map, vm_offset_t vaddr,
1410                 bus_size_t size)
1411 {
1412         struct bounce_zone *bz;
1413         struct bounce_page *bpage;
1414
1415         KASSERT(dmat->bounce_zone != NULL, ("no bounce zone in dma tag"));
1416         KASSERT(map != NULL, ("add_bounce_page: bad map %p", map));
1417
1418         bz = dmat->bounce_zone;
1419         if (map->pagesneeded == 0)
1420                 panic("add_bounce_page: map doesn't need any pages");
1421         map->pagesneeded--;
1422
1423         if (map->pagesreserved == 0)
1424                 panic("add_bounce_page: map doesn't need any pages");
1425         map->pagesreserved--;
1426
1427         mtx_lock(&bounce_lock);
1428         bpage = STAILQ_FIRST(&bz->bounce_page_list);
1429         if (bpage == NULL)
1430                 panic("add_bounce_page: free page list is empty");
1431
1432         STAILQ_REMOVE_HEAD(&bz->bounce_page_list, links);
1433         bz->reserved_bpages--;
1434         bz->active_bpages++;
1435         mtx_unlock(&bounce_lock);
1436
1437         if (dmat->flags & BUS_DMA_KEEP_PG_OFFSET) {
1438                 /* Page offset needs to be preserved. */
1439                 bpage->vaddr |= vaddr & PAGE_MASK;
1440                 bpage->busaddr |= vaddr & PAGE_MASK;
1441         }
1442         bpage->datavaddr = vaddr;
1443         bpage->datacount = size;
1444         STAILQ_INSERT_TAIL(&(map->bpages), bpage, links);
1445         return (bpage->busaddr);
1446 }
1447
1448 static void
1449 free_bounce_page(bus_dma_tag_t dmat, struct bounce_page *bpage)
1450 {
1451         struct bus_dmamap *map;
1452         struct bounce_zone *bz;
1453
1454         bz = dmat->bounce_zone;
1455         bpage->datavaddr = 0;
1456         bpage->datacount = 0;
1457         if (dmat->flags & BUS_DMA_KEEP_PG_OFFSET) {
1458                 /*
1459                  * Reset the bounce page to start at offset 0.  Other uses
1460                  * of this bounce page may need to store a full page of
1461                  * data and/or assume it starts on a page boundary.
1462                  */
1463                 bpage->vaddr &= ~PAGE_MASK;
1464                 bpage->busaddr &= ~PAGE_MASK;
1465         }
1466
1467         mtx_lock(&bounce_lock);
1468         STAILQ_INSERT_HEAD(&bz->bounce_page_list, bpage, links);
1469         bz->free_bpages++;
1470         bz->active_bpages--;
1471         if ((map = STAILQ_FIRST(&bounce_map_waitinglist)) != NULL) {
1472                 if (reserve_bounce_pages(map->dmat, map, 1) == 0) {
1473                         STAILQ_REMOVE_HEAD(&bounce_map_waitinglist, links);
1474                         STAILQ_INSERT_TAIL(&bounce_map_callbacklist,
1475                                            map, links);
1476                         busdma_swi_pending = 1;
1477                         bz->total_deferred++;
1478                         swi_sched(vm_ih, 0);
1479                 }
1480         }
1481         mtx_unlock(&bounce_lock);
1482 }
1483
1484 void
1485 busdma_swi(void)
1486 {
1487         bus_dma_tag_t dmat;
1488         struct bus_dmamap *map;
1489
1490         mtx_lock(&bounce_lock);
1491         while ((map = STAILQ_FIRST(&bounce_map_callbacklist)) != NULL) {
1492                 STAILQ_REMOVE_HEAD(&bounce_map_callbacklist, links);
1493                 mtx_unlock(&bounce_lock);
1494                 dmat = map->dmat;
1495                 (dmat->lockfunc)(dmat->lockfuncarg, BUS_DMA_LOCK);
1496                 bus_dmamap_load(map->dmat, map, map->buffer, map->len,
1497                     map->callback, map->callback_arg, /*flags*/0);
1498                 (dmat->lockfunc)(dmat->lockfuncarg, BUS_DMA_UNLOCK);
1499                 mtx_lock(&bounce_lock);
1500         }
1501         mtx_unlock(&bounce_lock);
1502 }