1 /* $NetBSD: arm32_machdep.c,v 1.44 2004/03/24 15:34:47 atatat Exp $ */
4 * Copyright (c) 2004 Olivier Houchard
5 * Copyright (c) 1994-1998 Mark Brinicombe.
6 * Copyright (c) 1994 Brini.
9 * This code is derived from software written for Brini by Mark Brinicombe
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
14 * 1. Redistributions of source code must retain the above copyright
15 * notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 * notice, this list of conditions and the following disclaimer in the
18 * documentation and/or other materials provided with the distribution.
19 * 3. All advertising materials mentioning features or use of this software
20 * must display the following acknowledgement:
21 * This product includes software developed by Mark Brinicombe
22 * for the NetBSD Project.
23 * 4. The name of the company nor the name of the author may be used to
24 * endorse or promote products derived from this software without specific
25 * prior written permission.
27 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
28 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
29 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
30 * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
31 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
32 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
33 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
34 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
35 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
36 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
39 * Machine dependant functions for kernel setup
42 * Updated : 18/04/01 updated for new wscons
45 #include "opt_compat.h"
47 #include "opt_platform.h"
48 #include "opt_sched.h"
49 #include "opt_timer.h"
51 #include <sys/cdefs.h>
52 __FBSDID("$FreeBSD$");
54 #include <sys/param.h>
56 #include <sys/systm.h>
63 #include <sys/imgact.h>
65 #include <sys/kernel.h>
67 #include <sys/linker.h>
69 #include <sys/malloc.h>
70 #include <sys/msgbuf.h>
71 #include <sys/mutex.h>
73 #include <sys/ptrace.h>
74 #include <sys/rwlock.h>
75 #include <sys/sched.h>
76 #include <sys/signalvar.h>
77 #include <sys/syscallsubr.h>
78 #include <sys/sysctl.h>
79 #include <sys/sysent.h>
80 #include <sys/sysproto.h>
85 #include <vm/vm_map.h>
86 #include <vm/vm_object.h>
87 #include <vm/vm_page.h>
88 #include <vm/vm_pager.h>
90 #include <machine/armreg.h>
91 #include <machine/atags.h>
92 #include <machine/cpu.h>
93 #include <machine/devmap.h>
94 #include <machine/frame.h>
95 #include <machine/machdep.h>
96 #include <machine/md_var.h>
97 #include <machine/metadata.h>
98 #include <machine/pcb.h>
99 #include <machine/reg.h>
100 #include <machine/trap.h>
101 #include <machine/undefined.h>
102 #include <machine/vmparam.h>
103 #include <machine/sysarch.h>
106 #include <dev/fdt/fdt_common.h>
107 #include <dev/ofw/openfirm.h>
111 #define debugf(fmt, args...) printf(fmt, ##args)
113 #define debugf(fmt, args...)
116 struct pcpu __pcpu[MAXCPU];
117 struct pcpu *pcpup = &__pcpu[0];
119 static struct trapframe proc0_tf;
120 uint32_t cpu_reset_address = 0;
122 vm_offset_t vector_page;
126 int (*_arm_memcpy)(void *, void *, int, int) = NULL;
127 int (*_arm_bzero)(void *, int, int) = NULL;
128 int _min_memcpy_size = 0;
129 int _min_bzero_size = 0;
133 extern vm_offset_t ksym_start, ksym_end;
138 * This is the number of L2 page tables required for covering max
139 * (hypothetical) memsize of 4GB and all kernel mappings (vectors, msgbuf,
140 * stacks etc.), uprounded to be divisible by 4.
142 #define KERNEL_PT_MAX 78
144 static struct pv_addr kernel_pt_table[KERNEL_PT_MAX];
146 vm_paddr_t phys_avail[10];
147 vm_paddr_t dump_avail[4];
149 extern u_int data_abort_handler_address;
150 extern u_int prefetch_abort_handler_address;
151 extern u_int undefined_handler_address;
155 struct pv_addr systempage;
156 static struct pv_addr msgbufpv;
157 struct pv_addr irqstack;
158 struct pv_addr undstack;
159 struct pv_addr abtstack;
160 static struct pv_addr kernelstack;
164 #if defined(LINUX_BOOT_ABI)
165 #define LBABI_MAX_BANKS 10
168 struct arm_lbabi_tag *atag_list;
169 char linux_command_line[LBABI_MAX_COMMAND_LINE + 1];
170 char atags[LBABI_MAX_COMMAND_LINE * 2];
171 uint32_t memstart[LBABI_MAX_BANKS];
172 uint32_t memsize[LBABI_MAX_BANKS];
176 static uint32_t board_revision;
177 /* hex representation of uint64_t */
178 static char board_serial[32];
180 SYSCTL_NODE(_hw, OID_AUTO, board, CTLFLAG_RD, 0, "Board attributes");
181 SYSCTL_UINT(_hw_board, OID_AUTO, revision, CTLFLAG_RD,
182 &board_revision, 0, "Board revision");
183 SYSCTL_STRING(_hw_board, OID_AUTO, serial, CTLFLAG_RD,
184 board_serial, 0, "Board serial");
187 SYSCTL_INT(_hw, HW_FLOATINGPT, floatingpoint, CTLFLAG_RD,
188 &vfp_exists, 0, "Floating point support enabled");
191 board_set_serial(uint64_t serial)
194 snprintf(board_serial, sizeof(board_serial)-1,
199 board_set_revision(uint32_t revision)
202 board_revision = revision;
206 sendsig(catcher, ksi, mask)
213 struct trapframe *tf;
214 struct sigframe *fp, frame;
222 PROC_LOCK_ASSERT(p, MA_OWNED);
223 sig = ksi->ksi_signo;
224 code = ksi->ksi_code;
226 mtx_assert(&psp->ps_mtx, MA_OWNED);
228 onstack = sigonstack(tf->tf_usr_sp);
230 CTR4(KTR_SIG, "sendsig: td=%p (%s) catcher=%p sig=%d", td, p->p_comm,
233 /* Allocate and validate space for the signal handler context. */
234 if ((td->td_pflags & TDP_ALTSTACK) != 0 && !(onstack) &&
235 SIGISMEMBER(psp->ps_sigonstack, sig)) {
236 fp = (struct sigframe *)(td->td_sigstk.ss_sp +
237 td->td_sigstk.ss_size);
238 #if defined(COMPAT_43)
239 td->td_sigstk.ss_flags |= SS_ONSTACK;
242 fp = (struct sigframe *)td->td_frame->tf_usr_sp;
244 /* make room on the stack */
247 /* make the stack aligned */
248 fp = (struct sigframe *)STACKALIGN(fp);
249 /* Populate the siginfo frame. */
250 get_mcontext(td, &frame.sf_uc.uc_mcontext, 0);
251 frame.sf_si = ksi->ksi_info;
252 frame.sf_uc.uc_sigmask = *mask;
253 frame.sf_uc.uc_stack.ss_flags = (td->td_pflags & TDP_ALTSTACK )
254 ? ((onstack) ? SS_ONSTACK : 0) : SS_DISABLE;
255 frame.sf_uc.uc_stack = td->td_sigstk;
256 mtx_unlock(&psp->ps_mtx);
257 PROC_UNLOCK(td->td_proc);
259 /* Copy the sigframe out to the user's stack. */
260 if (copyout(&frame, fp, sizeof(*fp)) != 0) {
261 /* Process has trashed its stack. Kill it. */
262 CTR2(KTR_SIG, "sendsig: sigexit td=%p fp=%p", td, fp);
267 /* Translate the signal if appropriate. */
268 if (p->p_sysent->sv_sigtbl && sig <= p->p_sysent->sv_sigsize)
269 sig = p->p_sysent->sv_sigtbl[_SIG_IDX(sig)];
272 * Build context to run handler in. We invoke the handler
273 * directly, only returning via the trampoline. Note the
274 * trampoline version numbers are coordinated with machine-
275 * dependent code in libc.
279 tf->tf_r1 = (register_t)&fp->sf_si;
280 tf->tf_r2 = (register_t)&fp->sf_uc;
282 /* the trampoline uses r5 as the uc address */
283 tf->tf_r5 = (register_t)&fp->sf_uc;
284 tf->tf_pc = (register_t)catcher;
285 tf->tf_usr_sp = (register_t)fp;
286 tf->tf_usr_lr = (register_t)(PS_STRINGS - *(p->p_sysent->sv_szsigcode));
288 CTR3(KTR_SIG, "sendsig: return td=%p pc=%#x sp=%#x", td, tf->tf_usr_lr,
292 mtx_lock(&psp->ps_mtx);
295 struct kva_md_info kmi;
300 * Initialize the vector page, and select whether or not to
301 * relocate the vectors.
303 * NOTE: We expect the vector page to be mapped at its expected
307 extern unsigned int page0[], page0_data[];
309 arm_vector_init(vm_offset_t va, int which)
311 unsigned int *vectors = (int *) va;
312 unsigned int *vectors_data = vectors + (page0_data - page0);
316 * Loop through the vectors we're taking over, and copy the
317 * vector's insn and data word.
319 for (vec = 0; vec < ARM_NVEC; vec++) {
320 if ((which & (1 << vec)) == 0) {
321 /* Don't want to take over this vector. */
324 vectors[vec] = page0[vec];
325 vectors_data[vec] = page0_data[vec];
328 /* Now sync the vectors. */
329 cpu_icache_sync_range(va, (ARM_NVEC * 2) * sizeof(u_int));
333 if (va == ARM_VECTORS_HIGH) {
335 * Assume the MD caller knows what it's doing here, and
336 * really does want the vector page relocated.
338 * Note: This has to be done here (and not just in
339 * cpu_setup()) because the vector page needs to be
340 * accessible *before* cpu_startup() is called.
343 * NOTE: If the CPU control register is not readable,
344 * this will totally fail! We'll just assume that
345 * any system that has high vector support has a
346 * readable CPU control register, for now. If we
347 * ever encounter one that does not, we'll have to
350 cpu_control(CPU_CONTROL_VECRELOC, CPU_CONTROL_VECRELOC);
355 cpu_startup(void *dummy)
357 struct pcb *pcb = thread0.td_pcb;
358 #ifdef ARM_TP_ADDRESS
359 #ifndef ARM_CACHE_LOCK_ENABLE
366 printf("real memory = %ju (%ju MB)\n", (uintmax_t)ptoa(physmem),
367 (uintmax_t)ptoa(physmem) / 1048576);
371 * Display the RAM layout.
376 printf("Physical memory chunk(s):\n");
377 for (indx = 0; phys_avail[indx + 1] != 0; indx += 2) {
380 size = phys_avail[indx + 1] - phys_avail[indx];
381 printf("%#08jx - %#08jx, %ju bytes (%ju pages)\n",
382 (uintmax_t)phys_avail[indx],
383 (uintmax_t)phys_avail[indx + 1] - 1,
384 (uintmax_t)size, (uintmax_t)size / PAGE_SIZE);
388 vm_ksubmap_init(&kmi);
390 printf("avail memory = %ju (%ju MB)\n",
391 (uintmax_t)ptoa(cnt.v_free_count),
392 (uintmax_t)ptoa(cnt.v_free_count) / 1048576);
395 vm_pager_bufferinit();
396 pcb->un_32.pcb32_und_sp = (u_int)thread0.td_kstack +
397 USPACE_UNDEF_STACK_TOP;
398 pcb->un_32.pcb32_sp = (u_int)thread0.td_kstack +
399 USPACE_SVC_STACK_TOP;
400 vector_page_setprot(VM_PROT_READ);
401 pmap_set_pcb_pagedir(pmap_kernel(), pcb);
403 #ifdef ARM_TP_ADDRESS
404 #ifdef ARM_CACHE_LOCK_ENABLE
405 pmap_kenter_user(ARM_TP_ADDRESS, ARM_TP_ADDRESS);
406 arm_lock_cache_line(ARM_TP_ADDRESS);
408 m = vm_page_alloc(NULL, 0, VM_ALLOC_NOOBJ | VM_ALLOC_ZERO);
409 pmap_kenter_user(ARM_TP_ADDRESS, VM_PAGE_TO_PHYS(m));
411 *(uint32_t *)ARM_RAS_START = 0;
412 *(uint32_t *)ARM_RAS_END = 0xffffffff;
416 SYSINIT(cpu, SI_SUB_CPU, SI_ORDER_FIRST, cpu_startup, NULL);
419 * Flush the D-cache for non-DMA I/O so that the I-cache can
420 * be made coherent later.
423 cpu_flush_dcache(void *ptr, size_t len)
426 cpu_dcache_wb_range((uintptr_t)ptr, len);
427 cpu_l2cache_wb_range((uintptr_t)ptr, len);
430 /* Get current clock frequency for the given cpu id. */
432 cpu_est_clockrate(int cpu_id, uint64_t *rate)
442 CTR2(KTR_SPARE2, "cpu_idle(%d) at %d",
444 #ifndef NO_EVENTTIMERS
450 if (!sched_runnable())
452 #ifndef NO_EVENTTIMERS
458 CTR2(KTR_SPARE2, "cpu_idle(%d) at %d done",
463 cpu_idle_wakeup(int cpu)
470 fill_regs(struct thread *td, struct reg *regs)
472 struct trapframe *tf = td->td_frame;
473 bcopy(&tf->tf_r0, regs->r, sizeof(regs->r));
474 regs->r_sp = tf->tf_usr_sp;
475 regs->r_lr = tf->tf_usr_lr;
476 regs->r_pc = tf->tf_pc;
477 regs->r_cpsr = tf->tf_spsr;
481 fill_fpregs(struct thread *td, struct fpreg *regs)
483 bzero(regs, sizeof(*regs));
488 set_regs(struct thread *td, struct reg *regs)
490 struct trapframe *tf = td->td_frame;
492 bcopy(regs->r, &tf->tf_r0, sizeof(regs->r));
493 tf->tf_usr_sp = regs->r_sp;
494 tf->tf_usr_lr = regs->r_lr;
495 tf->tf_pc = regs->r_pc;
496 tf->tf_spsr &= ~PSR_FLAGS;
497 tf->tf_spsr |= regs->r_cpsr & PSR_FLAGS;
502 set_fpregs(struct thread *td, struct fpreg *regs)
508 fill_dbregs(struct thread *td, struct dbreg *regs)
513 set_dbregs(struct thread *td, struct dbreg *regs)
520 ptrace_read_int(struct thread *td, vm_offset_t addr, u_int32_t *v)
525 PROC_LOCK_ASSERT(td->td_proc, MA_NOTOWNED);
526 iov.iov_base = (caddr_t) v;
527 iov.iov_len = sizeof(u_int32_t);
530 uio.uio_offset = (off_t)addr;
531 uio.uio_resid = sizeof(u_int32_t);
532 uio.uio_segflg = UIO_SYSSPACE;
533 uio.uio_rw = UIO_READ;
535 return proc_rwmem(td->td_proc, &uio);
539 ptrace_write_int(struct thread *td, vm_offset_t addr, u_int32_t v)
544 PROC_LOCK_ASSERT(td->td_proc, MA_NOTOWNED);
545 iov.iov_base = (caddr_t) &v;
546 iov.iov_len = sizeof(u_int32_t);
549 uio.uio_offset = (off_t)addr;
550 uio.uio_resid = sizeof(u_int32_t);
551 uio.uio_segflg = UIO_SYSSPACE;
552 uio.uio_rw = UIO_WRITE;
554 return proc_rwmem(td->td_proc, &uio);
558 ptrace_single_step(struct thread *td)
563 KASSERT(td->td_md.md_ptrace_instr == 0,
564 ("Didn't clear single step"));
567 error = ptrace_read_int(td, td->td_frame->tf_pc + 4,
568 &td->td_md.md_ptrace_instr);
571 error = ptrace_write_int(td, td->td_frame->tf_pc + 4,
574 td->td_md.md_ptrace_instr = 0;
575 td->td_md.md_ptrace_addr = td->td_frame->tf_pc + 4;
582 ptrace_clear_single_step(struct thread *td)
586 if (td->td_md.md_ptrace_instr) {
589 ptrace_write_int(td, td->td_md.md_ptrace_addr,
590 td->td_md.md_ptrace_instr);
592 td->td_md.md_ptrace_instr = 0;
598 ptrace_set_pc(struct thread *td, unsigned long addr)
600 td->td_frame->tf_pc = addr;
605 cpu_pcpu_init(struct pcpu *pcpu, int cpuid, size_t size)
616 if (td->td_md.md_spinlock_count == 0) {
617 cspr = disable_interrupts(I32_bit | F32_bit);
618 td->td_md.md_spinlock_count = 1;
619 td->td_md.md_saved_cspr = cspr;
621 td->td_md.md_spinlock_count++;
633 cspr = td->td_md.md_saved_cspr;
634 td->td_md.md_spinlock_count--;
635 if (td->td_md.md_spinlock_count == 0)
636 restore_interrupts(cspr);
640 * Clear registers on exec
643 exec_setregs(struct thread *td, struct image_params *imgp, u_long stack)
645 struct trapframe *tf = td->td_frame;
647 memset(tf, 0, sizeof(*tf));
648 tf->tf_usr_sp = stack;
649 tf->tf_usr_lr = imgp->entry_addr;
650 tf->tf_svc_lr = 0x77777777;
651 tf->tf_pc = imgp->entry_addr;
652 tf->tf_spsr = PSR_USR32_MODE;
656 * Get machine context.
659 get_mcontext(struct thread *td, mcontext_t *mcp, int clear_ret)
661 struct trapframe *tf = td->td_frame;
662 __greg_t *gr = mcp->__gregs;
664 if (clear_ret & GET_MC_CLEAR_RET)
667 gr[_REG_R0] = tf->tf_r0;
668 gr[_REG_R1] = tf->tf_r1;
669 gr[_REG_R2] = tf->tf_r2;
670 gr[_REG_R3] = tf->tf_r3;
671 gr[_REG_R4] = tf->tf_r4;
672 gr[_REG_R5] = tf->tf_r5;
673 gr[_REG_R6] = tf->tf_r6;
674 gr[_REG_R7] = tf->tf_r7;
675 gr[_REG_R8] = tf->tf_r8;
676 gr[_REG_R9] = tf->tf_r9;
677 gr[_REG_R10] = tf->tf_r10;
678 gr[_REG_R11] = tf->tf_r11;
679 gr[_REG_R12] = tf->tf_r12;
680 gr[_REG_SP] = tf->tf_usr_sp;
681 gr[_REG_LR] = tf->tf_usr_lr;
682 gr[_REG_PC] = tf->tf_pc;
683 gr[_REG_CPSR] = tf->tf_spsr;
689 * Set machine context.
691 * However, we don't set any but the user modifiable flags, and we won't
692 * touch the cs selector.
695 set_mcontext(struct thread *td, const mcontext_t *mcp)
697 struct trapframe *tf = td->td_frame;
698 const __greg_t *gr = mcp->__gregs;
700 tf->tf_r0 = gr[_REG_R0];
701 tf->tf_r1 = gr[_REG_R1];
702 tf->tf_r2 = gr[_REG_R2];
703 tf->tf_r3 = gr[_REG_R3];
704 tf->tf_r4 = gr[_REG_R4];
705 tf->tf_r5 = gr[_REG_R5];
706 tf->tf_r6 = gr[_REG_R6];
707 tf->tf_r7 = gr[_REG_R7];
708 tf->tf_r8 = gr[_REG_R8];
709 tf->tf_r9 = gr[_REG_R9];
710 tf->tf_r10 = gr[_REG_R10];
711 tf->tf_r11 = gr[_REG_R11];
712 tf->tf_r12 = gr[_REG_R12];
713 tf->tf_usr_sp = gr[_REG_SP];
714 tf->tf_usr_lr = gr[_REG_LR];
715 tf->tf_pc = gr[_REG_PC];
716 tf->tf_spsr = gr[_REG_CPSR];
725 sys_sigreturn(td, uap)
727 struct sigreturn_args /* {
728 const struct __ucontext *sigcntxp;
732 struct trapframe *tf;
737 if (copyin(uap->sigcntxp, &sf, sizeof(sf)))
740 * Make sure the processor mode has not been tampered with and
741 * interrupts have not been disabled.
743 spsr = sf.sf_uc.uc_mcontext.__gregs[_REG_CPSR];
744 if ((spsr & PSR_MODE) != PSR_USR32_MODE ||
745 (spsr & (I32_bit | F32_bit)) != 0)
747 /* Restore register context. */
749 set_mcontext(td, &sf.sf_uc.uc_mcontext);
751 /* Restore signal mask. */
752 kern_sigprocmask(td, SIG_SETMASK, &sf.sf_uc.uc_sigmask, NULL, 0);
754 return (EJUSTRETURN);
759 * Construct a PCB from a trapframe. This is called from kdb_trap() where
760 * we want to start a backtrace from the function that caused us to enter
761 * the debugger. We have the context in the trapframe, but base the trace
762 * on the PCB. The PCB doesn't have to be perfect, as long as it contains
763 * enough for a backtrace.
766 makectx(struct trapframe *tf, struct pcb *pcb)
768 pcb->un_32.pcb32_r8 = tf->tf_r8;
769 pcb->un_32.pcb32_r9 = tf->tf_r9;
770 pcb->un_32.pcb32_r10 = tf->tf_r10;
771 pcb->un_32.pcb32_r11 = tf->tf_r11;
772 pcb->un_32.pcb32_r12 = tf->tf_r12;
773 pcb->un_32.pcb32_pc = tf->tf_pc;
774 pcb->un_32.pcb32_lr = tf->tf_usr_lr;
775 pcb->un_32.pcb32_sp = tf->tf_usr_sp;
779 * Make a standard dump_avail array. Can't make the phys_avail
780 * since we need to do that after we call pmap_bootstrap, but this
781 * is needed before pmap_boostrap.
783 * ARM_USE_SMALL_ALLOC uses dump_avail, so it must be filled before
784 * calling pmap_bootstrap.
787 arm_dump_avail_init(vm_offset_t ramsize, size_t max)
789 #ifdef LINUX_BOOT_ABI
791 * Linux boot loader passes us the actual banks of memory, so use them
792 * to construct the dump_avail array.
798 if (max < (membanks + 1) * 2)
799 panic("dump_avail[%d] too small for %d banks\n",
801 for (j = 0, i = 0; i < membanks; i++) {
802 dump_avail[j++] = round_page(memstart[i]);
803 dump_avail[j++] = trunc_page(memstart[i] + memsize[i]);
811 panic("dump_avail too small\n");
813 dump_avail[0] = round_page(PHYSADDR);
814 dump_avail[1] = trunc_page(PHYSADDR + ramsize);
820 * Fake up a boot descriptor table
823 fake_preload_metadata(struct arm_boot_params *abp __unused)
826 vm_offset_t zstart = 0, zend = 0;
828 vm_offset_t lastaddr;
830 static uint32_t fake_preload[35];
832 fake_preload[i++] = MODINFO_NAME;
833 fake_preload[i++] = strlen("kernel") + 1;
834 strcpy((char*)&fake_preload[i++], "kernel");
836 fake_preload[i++] = MODINFO_TYPE;
837 fake_preload[i++] = strlen("elf kernel") + 1;
838 strcpy((char*)&fake_preload[i++], "elf kernel");
840 fake_preload[i++] = MODINFO_ADDR;
841 fake_preload[i++] = sizeof(vm_offset_t);
842 fake_preload[i++] = KERNVIRTADDR;
843 fake_preload[i++] = MODINFO_SIZE;
844 fake_preload[i++] = sizeof(uint32_t);
845 fake_preload[i++] = (uint32_t)&end - KERNVIRTADDR;
847 if (*(uint32_t *)KERNVIRTADDR == MAGIC_TRAMP_NUMBER) {
848 fake_preload[i++] = MODINFO_METADATA|MODINFOMD_SSYM;
849 fake_preload[i++] = sizeof(vm_offset_t);
850 fake_preload[i++] = *(uint32_t *)(KERNVIRTADDR + 4);
851 fake_preload[i++] = MODINFO_METADATA|MODINFOMD_ESYM;
852 fake_preload[i++] = sizeof(vm_offset_t);
853 fake_preload[i++] = *(uint32_t *)(KERNVIRTADDR + 8);
854 lastaddr = *(uint32_t *)(KERNVIRTADDR + 8);
856 zstart = *(uint32_t *)(KERNVIRTADDR + 4);
861 lastaddr = (vm_offset_t)&end;
862 fake_preload[i++] = 0;
864 preload_metadata = (void *)fake_preload;
872 #if ARM_ARCH_6 || ARM_ARCH_7A || defined(CPU_MV_PJ4B)
875 pcpu_init(pcpup, 0, sizeof(struct pcpu));
876 PCPU_SET(curthread, &thread0);
882 #if defined(LINUX_BOOT_ABI)
884 linux_parse_boot_param(struct arm_boot_params *abp)
886 struct arm_lbabi_tag *walker;
891 * Linux boot ABI: r0 = 0, r1 is the board type (!= 0) and r2
892 * is atags or dtb pointer. If all of these aren't satisfied,
895 if (!(abp->abp_r0 == 0 && abp->abp_r1 != 0 && abp->abp_r2 != 0))
898 board_id = abp->abp_r1;
899 walker = (struct arm_lbabi_tag *)
900 (abp->abp_r2 + KERNVIRTADDR - KERNPHYSADDR);
902 /* xxx - Need to also look for binary device tree */
903 if (ATAG_TAG(walker) != ATAG_CORE)
907 while (ATAG_TAG(walker) != ATAG_NONE) {
908 switch (ATAG_TAG(walker)) {
912 if (membanks < LBABI_MAX_BANKS) {
913 memstart[membanks] = walker->u.tag_mem.start;
914 memsize[membanks] = walker->u.tag_mem.size;
921 serial = walker->u.tag_sn.low |
922 ((uint64_t)walker->u.tag_sn.high << 32);
923 board_set_serial(serial);
926 revision = walker->u.tag_rev.rev;
927 board_set_revision(revision);
930 /* XXX open question: Parse this for boothowto? */
931 bcopy(walker->u.tag_cmd.command, linux_command_line,
937 walker = ATAG_NEXT(walker);
940 /* Save a copy for later */
941 bcopy(atag_list, atags,
942 (char *)walker - (char *)atag_list + ATAG_SIZE(walker));
944 return fake_preload_metadata(abp);
948 #if defined(FREEBSD_BOOT_LOADER)
950 freebsd_parse_boot_param(struct arm_boot_params *abp)
952 vm_offset_t lastaddr = 0;
957 * Mask metadata pointer: it is supposed to be on page boundary. If
958 * the first argument (mdp) doesn't point to a valid address the
959 * bootloader must have passed us something else than the metadata
960 * ptr, so we give up. Also give up if we cannot find metadta section
961 * the loader creates that we get all this data out of.
964 if ((mdp = (void *)(abp->abp_r0 & ~PAGE_MASK)) == NULL)
966 preload_metadata = mdp;
967 kmdp = preload_search_by_type("elf kernel");
971 boothowto = MD_FETCH(kmdp, MODINFOMD_HOWTO, int);
972 kern_envp = MD_FETCH(kmdp, MODINFOMD_ENVP, char *);
973 lastaddr = MD_FETCH(kmdp, MODINFOMD_KERNEND, vm_offset_t);
975 ksym_start = MD_FETCH(kmdp, MODINFOMD_SSYM, uintptr_t);
976 ksym_end = MD_FETCH(kmdp, MODINFOMD_ESYM, uintptr_t);
978 preload_addr_relocate = KERNVIRTADDR - KERNPHYSADDR;
984 default_parse_boot_param(struct arm_boot_params *abp)
986 vm_offset_t lastaddr;
988 #if defined(LINUX_BOOT_ABI)
989 if ((lastaddr = linux_parse_boot_param(abp)) != 0)
992 #if defined(FREEBSD_BOOT_LOADER)
993 if ((lastaddr = freebsd_parse_boot_param(abp)) != 0)
996 /* Fall back to hardcoded metadata. */
997 lastaddr = fake_preload_metadata(abp);
1003 * Stub version of the boot parameter parsing routine. We are
1004 * called early in initarm, before even VM has been initialized.
1005 * This routine needs to preserve any data that the boot loader
1006 * has passed in before the kernel starts to grow past the end
1007 * of the BSS, traditionally the place boot-loaders put this data.
1009 * Since this is called so early, things that depend on the vm system
1010 * being setup (including access to some SoC's serial ports), about
1011 * all that can be done in this routine is to copy the arguments.
1013 * This is the default boot parameter parsing routine. Individual
1014 * kernels/boards can override this weak function with one of their
1015 * own. We just fake metadata...
1017 __weak_reference(default_parse_boot_param, parse_boot_param);
1023 init_proc0(vm_offset_t kstack)
1025 proc_linkup0(&proc0, &thread0);
1026 thread0.td_kstack = kstack;
1027 thread0.td_pcb = (struct pcb *)
1028 (thread0.td_kstack + KSTACK_PAGES * PAGE_SIZE) - 1;
1029 thread0.td_pcb->pcb_flags = 0;
1030 thread0.td_frame = &proc0_tf;
1031 pcpup->pc_curpcb = thread0.td_pcb;
1035 set_stackptrs(int cpu)
1038 set_stackptr(PSR_IRQ32_MODE,
1039 irqstack.pv_va + ((IRQ_STACK_SIZE * PAGE_SIZE) * (cpu + 1)));
1040 set_stackptr(PSR_ABT32_MODE,
1041 abtstack.pv_va + ((ABT_STACK_SIZE * PAGE_SIZE) * (cpu + 1)));
1042 set_stackptr(PSR_UND32_MODE,
1043 undstack.pv_va + ((UND_STACK_SIZE * PAGE_SIZE) * (cpu + 1)));
1067 debugf("loader passed (static) kenv:\n");
1068 if (kern_envp == NULL) {
1069 debugf(" no env, null ptr\n");
1072 debugf(" kern_envp = 0x%08x\n", (uint32_t)kern_envp);
1075 for (cp = kern_envp; cp != NULL; cp = kenv_next(cp))
1076 debugf(" %x %s\n", (uint32_t)cp, cp);
1080 physmap_init(struct mem_region *availmem_regions, int availmem_regions_sz)
1083 vm_offset_t phys_kernelend, kernload;
1085 struct mem_region *mp, *mp1;
1087 phys_kernelend = KERNPHYSADDR + (virtual_avail - KERNVIRTADDR);
1088 kernload = KERNPHYSADDR;
1091 * Remove kernel physical address range from avail
1092 * regions list. Page align all regions.
1093 * Non-page aligned memory isn't very interesting to us.
1094 * Also, sort the entries for ascending addresses.
1097 cnt = availmem_regions_sz;
1098 debugf("processing avail regions:\n");
1099 for (mp = availmem_regions; mp->mr_size; mp++) {
1101 e = mp->mr_start + mp->mr_size;
1102 debugf(" %08x-%08x -> ", s, e);
1103 /* Check whether this region holds all of the kernel. */
1104 if (s < kernload && e > phys_kernelend) {
1105 availmem_regions[cnt].mr_start = phys_kernelend;
1106 availmem_regions[cnt++].mr_size = e - phys_kernelend;
1109 /* Look whether this regions starts within the kernel. */
1110 if (s >= kernload && s < phys_kernelend) {
1111 if (e <= phys_kernelend)
1115 /* Now look whether this region ends within the kernel. */
1116 if (e > kernload && e <= phys_kernelend) {
1117 if (s >= kernload) {
1122 /* Now page align the start and size of the region. */
1128 debugf("%08x-%08x = %x\n", s, e, sz);
1130 /* Check whether some memory is left here. */
1133 printf("skipping\n");
1135 (cnt - (mp - availmem_regions)) * sizeof(*mp));
1141 /* Do an insertion sort. */
1142 for (mp1 = availmem_regions; mp1 < mp; mp1++)
1143 if (s < mp1->mr_start)
1146 bcopy(mp1, mp1 + 1, (char *)mp - (char *)mp1);
1154 availmem_regions_sz = cnt;
1156 /* Fill in phys_avail table, based on availmem_regions */
1157 debugf("fill in phys_avail:\n");
1158 for (i = 0, j = 0; i < availmem_regions_sz; i++, j += 2) {
1160 debugf(" region: 0x%08x - 0x%08x (0x%08x)\n",
1161 availmem_regions[i].mr_start,
1162 availmem_regions[i].mr_start + availmem_regions[i].mr_size,
1163 availmem_regions[i].mr_size);
1166 * We should not map the page at PA 0x0000000, the VM can't
1167 * handle it, as pmap_extract() == 0 means failure.
1169 if (availmem_regions[i].mr_start > 0 ||
1170 availmem_regions[i].mr_size > PAGE_SIZE) {
1171 phys_avail[j] = availmem_regions[i].mr_start;
1172 if (phys_avail[j] == 0)
1173 phys_avail[j] += PAGE_SIZE;
1174 phys_avail[j + 1] = availmem_regions[i].mr_start +
1175 availmem_regions[i].mr_size;
1180 phys_avail[j + 1] = 0;
1184 initarm(struct arm_boot_params *abp)
1186 struct mem_region memory_regions[FDT_MEM_REGIONS];
1187 struct mem_region availmem_regions[FDT_MEM_REGIONS];
1188 struct mem_region reserved_regions[FDT_MEM_REGIONS];
1189 struct pv_addr kernel_l1pt;
1190 struct pv_addr dpcpu;
1191 vm_offset_t dtbp, freemempos, l2_start, lastaddr;
1192 uint32_t memsize, l2size;
1196 int i = 0, j = 0, err_devmap = 0;
1197 int memory_regions_sz;
1198 int availmem_regions_sz;
1199 int reserved_regions_sz;
1200 vm_offset_t start, end;
1201 vm_offset_t rstart, rend;
1204 lastaddr = parse_boot_param(abp);
1209 * Find the dtb passed in by the boot loader.
1211 kmdp = preload_search_by_type("elf kernel");
1213 dtbp = MD_FETCH(kmdp, MODINFOMD_DTBP, vm_offset_t);
1215 dtbp = (vm_offset_t)NULL;
1217 #if defined(FDT_DTB_STATIC)
1219 * In case the device tree blob was not retrieved (from metadata) try
1220 * to use the statically embedded one.
1222 if (dtbp == (vm_offset_t)NULL)
1223 dtbp = (vm_offset_t)&fdt_static_dtb;
1226 if (OF_install(OFW_FDT, 0) == FALSE)
1229 if (OF_init((void *)dtbp) != 0)
1232 /* Grab physical memory regions information from device tree. */
1233 if (fdt_get_mem_regions(memory_regions, &memory_regions_sz,
1237 /* Grab physical memory regions information from device tree. */
1238 if (fdt_get_reserved_regions(reserved_regions, &reserved_regions_sz) != 0)
1239 reserved_regions_sz = 0;
1242 * Now exclude all the reserved regions
1245 for (i = 0; i < memory_regions_sz; i++) {
1246 start = memory_regions[i].mr_start;
1247 end = start + memory_regions[i].mr_size;
1248 for (j = 0; j < reserved_regions_sz; j++) {
1249 rstart = reserved_regions[j].mr_start;
1250 rend = rstart + reserved_regions[j].mr_size;
1252 * Restricted region is before available
1253 * Skip restricted region
1258 * Restricted region is behind available
1259 * No further processing required
1264 * Restricted region includes memory region
1265 * skip available region
1267 if ((start >= rstart) && (rend >= end)) {
1273 * Memory region includes restricted region
1275 if ((rstart > start) && (end > rend)) {
1276 availmem_regions[curr].mr_start = start;
1277 availmem_regions[curr++].mr_size = rstart - start;
1282 * Memory region partially overlaps with restricted
1284 if ((rstart >= start) && (rstart <= end)) {
1287 else if ((rend >= start) && (rend <= end)) {
1293 availmem_regions[curr].mr_start = start;
1294 availmem_regions[curr++].mr_size = end - start;
1298 availmem_regions_sz = curr;
1300 /* Platform-specific initialisation */
1301 initarm_early_init();
1305 /* Do basic tuning, hz etc */
1308 /* Calculate number of L2 tables needed for mapping vm_page_array */
1309 l2size = (memsize / PAGE_SIZE) * sizeof(struct vm_page);
1310 l2size = (l2size >> L1_S_SHIFT) + 1;
1313 * Add one table for end of kernel map, one for stacks, msgbuf and
1314 * L1 and L2 tables map and one for vectors map.
1318 /* Make it divisible by 4 */
1319 l2size = (l2size + 3) & ~3;
1321 freemempos = (lastaddr + PAGE_MASK) & ~PAGE_MASK;
1323 /* Define a macro to simplify memory allocation */
1324 #define valloc_pages(var, np) \
1325 alloc_pages((var).pv_va, (np)); \
1326 (var).pv_pa = (var).pv_va + (KERNPHYSADDR - KERNVIRTADDR);
1328 #define alloc_pages(var, np) \
1329 (var) = freemempos; \
1330 freemempos += (np * PAGE_SIZE); \
1331 memset((char *)(var), 0, ((np) * PAGE_SIZE));
1333 while (((freemempos - L1_TABLE_SIZE) & (L1_TABLE_SIZE - 1)) != 0)
1334 freemempos += PAGE_SIZE;
1335 valloc_pages(kernel_l1pt, L1_TABLE_SIZE / PAGE_SIZE);
1337 for (i = 0; i < l2size; ++i) {
1338 if (!(i % (PAGE_SIZE / L2_TABLE_SIZE_REAL))) {
1339 valloc_pages(kernel_pt_table[i],
1340 L2_TABLE_SIZE / PAGE_SIZE);
1343 kernel_pt_table[i].pv_va = kernel_pt_table[j].pv_va +
1344 L2_TABLE_SIZE_REAL * (i - j);
1345 kernel_pt_table[i].pv_pa =
1346 kernel_pt_table[i].pv_va - KERNVIRTADDR +
1352 * Allocate a page for the system page mapped to 0x00000000
1353 * or 0xffff0000. This page will just contain the system vectors
1354 * and can be shared by all processes.
1356 valloc_pages(systempage, 1);
1358 /* Allocate dynamic per-cpu area. */
1359 valloc_pages(dpcpu, DPCPU_SIZE / PAGE_SIZE);
1360 dpcpu_init((void *)dpcpu.pv_va, 0);
1362 /* Allocate stacks for all modes */
1363 valloc_pages(irqstack, IRQ_STACK_SIZE * MAXCPU);
1364 valloc_pages(abtstack, ABT_STACK_SIZE * MAXCPU);
1365 valloc_pages(undstack, UND_STACK_SIZE * MAXCPU);
1366 valloc_pages(kernelstack, KSTACK_PAGES * MAXCPU);
1367 valloc_pages(msgbufpv, round_page(msgbufsize) / PAGE_SIZE);
1370 * Now we start construction of the L1 page table
1371 * We start by mapping the L2 page tables into the L1.
1372 * This means that we can replace L1 mappings later on if necessary
1374 l1pagetable = kernel_l1pt.pv_va;
1377 * Try to map as much as possible of kernel text and data using
1378 * 1MB section mapping and for the rest of initial kernel address
1379 * space use L2 coarse tables.
1381 * Link L2 tables for mapping remainder of kernel (modulo 1MB)
1382 * and kernel structures
1384 l2_start = lastaddr & ~(L1_S_OFFSET);
1385 for (i = 0 ; i < l2size - 1; i++)
1386 pmap_link_l2pt(l1pagetable, l2_start + i * L1_S_SIZE,
1387 &kernel_pt_table[i]);
1389 pmap_curmaxkvaddr = l2_start + (l2size - 1) * L1_S_SIZE;
1391 /* Map kernel code and data */
1392 pmap_map_chunk(l1pagetable, KERNVIRTADDR, KERNPHYSADDR,
1393 (((uint32_t)(lastaddr) - KERNVIRTADDR) + PAGE_MASK) & ~PAGE_MASK,
1394 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
1397 /* Map L1 directory and allocated L2 page tables */
1398 pmap_map_chunk(l1pagetable, kernel_l1pt.pv_va, kernel_l1pt.pv_pa,
1399 L1_TABLE_SIZE, VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE);
1401 pmap_map_chunk(l1pagetable, kernel_pt_table[0].pv_va,
1402 kernel_pt_table[0].pv_pa,
1403 L2_TABLE_SIZE_REAL * l2size,
1404 VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE);
1406 /* Map allocated DPCPU, stacks and msgbuf */
1407 pmap_map_chunk(l1pagetable, dpcpu.pv_va, dpcpu.pv_pa,
1408 freemempos - dpcpu.pv_va,
1409 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
1411 /* Link and map the vector page */
1412 pmap_link_l2pt(l1pagetable, ARM_VECTORS_HIGH,
1413 &kernel_pt_table[l2size - 1]);
1414 pmap_map_entry(l1pagetable, ARM_VECTORS_HIGH, systempage.pv_pa,
1415 VM_PROT_READ|VM_PROT_WRITE|VM_PROT_EXECUTE, PTE_CACHE);
1417 /* Establish static device mappings. */
1418 err_devmap = initarm_devmap_init();
1419 arm_devmap_bootstrap(l1pagetable, NULL);
1420 vm_max_kernel_address = initarm_lastaddr();
1422 cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL * 2)) | DOMAIN_CLIENT);
1423 pmap_pa = kernel_l1pt.pv_pa;
1424 setttb(kernel_l1pt.pv_pa);
1426 cpu_domains(DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL * 2));
1429 * Now that proper page tables are installed, call cpu_setup() to enable
1430 * instruction and data caches and other chip-specific features.
1435 * Only after the SOC registers block is mapped we can perform device
1436 * tree fixups, as they may attempt to read parameters from hardware.
1438 OF_interpret("perform-fixup", 0);
1440 initarm_gpio_init();
1444 physmem = memsize / PAGE_SIZE;
1446 debugf("initarm: console initialized\n");
1447 debugf(" arg1 kmdp = 0x%08x\n", (uint32_t)kmdp);
1448 debugf(" boothowto = 0x%08x\n", boothowto);
1449 debugf(" dtbp = 0x%08x\n", (uint32_t)dtbp);
1452 env = getenv("kernelname");
1454 strlcpy(kernelname, env, sizeof(kernelname));
1456 if (err_devmap != 0)
1457 printf("WARNING: could not fully configure devmap, error=%d\n",
1460 initarm_late_init();
1463 * Pages were allocated during the secondary bootstrap for the
1464 * stacks for different CPU modes.
1465 * We must now set the r13 registers in the different CPU modes to
1466 * point to these stacks.
1467 * Since the ARM stacks use STMFD etc. we must set r13 to the top end
1468 * of the stack memory.
1470 cpu_control(CPU_CONTROL_MMU_ENABLE, CPU_CONTROL_MMU_ENABLE);
1475 * We must now clean the cache again....
1476 * Cleaning may be done by reading new data to displace any
1477 * dirty data in the cache. This will have happened in setttb()
1478 * but since we are boot strapping the addresses used for the read
1479 * may have just been remapped and thus the cache could be out
1480 * of sync. A re-clean after the switch will cure this.
1481 * After booting there are no gross relocations of the kernel thus
1482 * this problem will not occur after initarm().
1484 cpu_idcache_wbinv_all();
1486 /* Set stack for exception handlers */
1487 data_abort_handler_address = (u_int)data_abort_handler;
1488 prefetch_abort_handler_address = (u_int)prefetch_abort_handler;
1489 undefined_handler_address = (u_int)undefinedinstruction_bounce;
1492 init_proc0(kernelstack.pv_va);
1494 arm_intrnames_init();
1495 arm_vector_init(ARM_VECTORS_HIGH, ARM_VEC_ALL);
1496 arm_dump_avail_init(memsize, sizeof(dump_avail) / sizeof(dump_avail[0]));
1497 pmap_bootstrap(freemempos, &kernel_l1pt);
1498 msgbufp = (void *)msgbufpv.pv_va;
1499 msgbufinit(msgbufp, msgbufsize);
1503 * Prepare map of physical memory regions available to vm subsystem.
1505 physmap_init(availmem_regions, availmem_regions_sz);
1507 init_param2(physmem);
1510 return ((void *)(kernelstack.pv_va + USPACE_SVC_STACK_TOP -
1511 sizeof(struct pcb)));