1 /* From: $NetBSD: pmap.c,v 1.148 2004/04/03 04:35:48 bsh Exp $ */
3 * Copyright 2011 Semihalf
4 * Copyright 2004 Olivier Houchard.
5 * Copyright 2003 Wasabi Systems, Inc.
8 * Written by Steve C. Woodford for Wasabi Systems, Inc.
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 * 3. All advertising materials mentioning features or use of this software
19 * must display the following acknowledgement:
20 * This product includes software developed for the NetBSD Project by
21 * Wasabi Systems, Inc.
22 * 4. The name of Wasabi Systems, Inc. may not be used to endorse
23 * or promote products derived from this software without specific prior
26 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
27 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36 * POSSIBILITY OF SUCH DAMAGE.
38 * From: FreeBSD: src/sys/arm/arm/pmap.c,v 1.113 2009/07/24 13:50:29
42 * Copyright (c) 2002-2003 Wasabi Systems, Inc.
43 * Copyright (c) 2001 Richard Earnshaw
44 * Copyright (c) 2001-2002 Christopher Gilbert
45 * All rights reserved.
47 * 1. Redistributions of source code must retain the above copyright
48 * notice, this list of conditions and the following disclaimer.
49 * 2. Redistributions in binary form must reproduce the above copyright
50 * notice, this list of conditions and the following disclaimer in the
51 * documentation and/or other materials provided with the distribution.
52 * 3. The name of the company nor the name of the author may be used to
53 * endorse or promote products derived from this software without specific
54 * prior written permission.
56 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
57 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
58 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
59 * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
60 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
61 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
62 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
63 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
64 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
65 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
69 * Copyright (c) 1999 The NetBSD Foundation, Inc.
70 * All rights reserved.
72 * This code is derived from software contributed to The NetBSD Foundation
73 * by Charles M. Hannum.
75 * Redistribution and use in source and binary forms, with or without
76 * modification, are permitted provided that the following conditions
78 * 1. Redistributions of source code must retain the above copyright
79 * notice, this list of conditions and the following disclaimer.
80 * 2. Redistributions in binary form must reproduce the above copyright
81 * notice, this list of conditions and the following disclaimer in the
82 * documentation and/or other materials provided with the distribution.
84 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
85 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
86 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
87 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
88 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
89 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
90 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
91 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
92 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
93 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
94 * POSSIBILITY OF SUCH DAMAGE.
98 * Copyright (c) 1994-1998 Mark Brinicombe.
99 * Copyright (c) 1994 Brini.
100 * All rights reserved.
102 * This code is derived from software written for Brini by Mark Brinicombe
104 * Redistribution and use in source and binary forms, with or without
105 * modification, are permitted provided that the following conditions
107 * 1. Redistributions of source code must retain the above copyright
108 * notice, this list of conditions and the following disclaimer.
109 * 2. Redistributions in binary form must reproduce the above copyright
110 * notice, this list of conditions and the following disclaimer in the
111 * documentation and/or other materials provided with the distribution.
112 * 3. All advertising materials mentioning features or use of this software
113 * must display the following acknowledgement:
114 * This product includes software developed by Mark Brinicombe.
115 * 4. The name of the author may not be used to endorse or promote products
116 * derived from this software without specific prior written permission.
118 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
119 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
120 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
121 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
122 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
123 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
124 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
125 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
126 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
128 * RiscBSD kernel project
132 * Machine dependant vm stuff
138 * Special compilation symbols
139 * PMAP_DEBUG - Build in pmap_debug_level code
141 * Note that pmap_mapdev() and pmap_unmapdev() are implemented in arm/devmap.c
143 /* Include header files */
146 #include "opt_pmap.h"
148 #include <sys/cdefs.h>
149 __FBSDID("$FreeBSD$");
150 #include <sys/param.h>
151 #include <sys/systm.h>
152 #include <sys/kernel.h>
154 #include <sys/lock.h>
155 #include <sys/proc.h>
156 #include <sys/malloc.h>
157 #include <sys/msgbuf.h>
158 #include <sys/mutex.h>
159 #include <sys/vmmeter.h>
160 #include <sys/mman.h>
161 #include <sys/rwlock.h>
163 #include <sys/sched.h>
164 #include <sys/sysctl.h>
167 #include <vm/vm_param.h>
170 #include <vm/vm_kern.h>
171 #include <vm/vm_object.h>
172 #include <vm/vm_map.h>
173 #include <vm/vm_page.h>
174 #include <vm/vm_pageout.h>
175 #include <vm/vm_extern.h>
176 #include <vm/vm_reserv.h>
178 #include <machine/md_var.h>
179 #include <machine/cpu.h>
180 #include <machine/cpufunc.h>
181 #include <machine/pcb.h>
184 extern int last_fault_code;
188 #define PDEBUG(_lev_,_stat_) \
189 if (pmap_debug_level >= (_lev_)) \
191 #define dprintf printf
193 int pmap_debug_level = 0;
195 #else /* PMAP_DEBUG */
196 #define PDEBUG(_lev_,_stat_) /* Nothing */
197 #define dprintf(x, arg...)
198 #define PMAP_INLINE __inline
199 #endif /* PMAP_DEBUG */
202 #define PV_STAT(x) do { x ; } while (0)
204 #define PV_STAT(x) do { } while (0)
207 #define pa_to_pvh(pa) (&pv_table[pa_index(pa)])
210 #define pmap_l2cache_wbinv_range(va, pa, size) cpu_l2cache_wbinv_range((pa), (size))
211 #define pmap_l2cache_inv_range(va, pa, size) cpu_l2cache_inv_range((pa), (size))
213 #define pmap_l2cache_wbinv_range(va, pa, size) cpu_l2cache_wbinv_range((va), (size))
214 #define pmap_l2cache_inv_range(va, pa, size) cpu_l2cache_inv_range((va), (size))
217 extern struct pv_addr systempage;
220 * Internal function prototypes
224 struct pv_entry *pmap_find_pv(struct md_page *, pmap_t, vm_offset_t);
225 static void pmap_free_pv_chunk(struct pv_chunk *pc);
226 static void pmap_free_pv_entry(pmap_t pmap, pv_entry_t pv);
227 static pv_entry_t pmap_get_pv_entry(pmap_t pmap, boolean_t try);
228 static vm_page_t pmap_pv_reclaim(pmap_t locked_pmap);
229 static boolean_t pmap_pv_insert_section(pmap_t, vm_offset_t,
231 static struct pv_entry *pmap_remove_pv(struct vm_page *, pmap_t, vm_offset_t);
232 static int pmap_pvh_wired_mappings(struct md_page *, int);
234 static void pmap_enter_locked(pmap_t, vm_offset_t, vm_prot_t,
235 vm_page_t, vm_prot_t, boolean_t, int);
236 static vm_paddr_t pmap_extract_locked(pmap_t pmap, vm_offset_t va);
237 static void pmap_alloc_l1(pmap_t);
238 static void pmap_free_l1(pmap_t);
240 static void pmap_map_section(pmap_t, vm_offset_t, vm_offset_t,
241 vm_prot_t, boolean_t);
242 static void pmap_promote_section(pmap_t, vm_offset_t);
243 static boolean_t pmap_demote_section(pmap_t, vm_offset_t);
244 static boolean_t pmap_enter_section(pmap_t, vm_offset_t, vm_page_t,
246 static void pmap_remove_section(pmap_t, vm_offset_t);
248 static int pmap_clearbit(struct vm_page *, u_int);
250 static struct l2_bucket *pmap_get_l2_bucket(pmap_t, vm_offset_t);
251 static struct l2_bucket *pmap_alloc_l2_bucket(pmap_t, vm_offset_t);
252 static void pmap_free_l2_bucket(pmap_t, struct l2_bucket *, u_int);
253 static vm_offset_t kernel_pt_lookup(vm_paddr_t);
255 static MALLOC_DEFINE(M_VMPMAP, "pmap", "PMAP L1");
257 vm_offset_t virtual_avail; /* VA of first avail page (after kernel bss) */
258 vm_offset_t virtual_end; /* VA of last avail page (end of kernel AS) */
259 vm_offset_t pmap_curmaxkvaddr;
260 vm_paddr_t kernel_l1pa;
262 vm_offset_t kernel_vm_end = 0;
264 vm_offset_t vm_max_kernel_address;
266 struct pmap kernel_pmap_store;
269 * Resources for quickly copying and zeroing pages using virtual address space
270 * and page table entries that are pre-allocated per-CPU by pmap_init().
279 static struct czpages cpu_czpages[MAXCPU];
281 static void pmap_init_l1(struct l1_ttable *, pd_entry_t *);
283 * These routines are called when the CPU type is identified to set up
284 * the PTE prototypes, cache modes, etc.
286 * The variables are always here, just in case LKMs need to reference
287 * them (though, they shouldn't).
289 static void pmap_set_prot(pt_entry_t *pte, vm_prot_t prot, uint8_t user);
290 pt_entry_t pte_l1_s_cache_mode;
291 pt_entry_t pte_l1_s_cache_mode_pt;
293 pt_entry_t pte_l2_l_cache_mode;
294 pt_entry_t pte_l2_l_cache_mode_pt;
296 pt_entry_t pte_l2_s_cache_mode;
297 pt_entry_t pte_l2_s_cache_mode_pt;
299 struct msgbuf *msgbufp = 0;
304 static caddr_t crashdumpmap;
306 extern void bcopy_page(vm_offset_t, vm_offset_t);
307 extern void bzero_page(vm_offset_t);
312 * Metadata for L1 translation tables.
315 /* Entry on the L1 Table list */
316 SLIST_ENTRY(l1_ttable) l1_link;
318 /* Entry on the L1 Least Recently Used list */
319 TAILQ_ENTRY(l1_ttable) l1_lru;
321 /* Track how many domains are allocated from this L1 */
322 volatile u_int l1_domain_use_count;
325 * A free-list of domain numbers for this L1.
326 * We avoid using ffs() and a bitmap to track domains since ffs()
329 u_int8_t l1_domain_first;
330 u_int8_t l1_domain_free[PMAP_DOMAINS];
332 /* Physical address of this L1 page table */
333 vm_paddr_t l1_physaddr;
335 /* KVA of this L1 page table */
340 * Convert a virtual address into its L1 table index. That is, the
341 * index used to locate the L2 descriptor table pointer in an L1 table.
342 * This is basically used to index l1->l1_kva[].
344 * Each L2 descriptor table represents 1MB of VA space.
346 #define L1_IDX(va) (((vm_offset_t)(va)) >> L1_S_SHIFT)
349 * L1 Page Tables are tracked using a Least Recently Used list.
350 * - New L1s are allocated from the HEAD.
351 * - Freed L1s are added to the TAIl.
352 * - Recently accessed L1s (where an 'access' is some change to one of
353 * the userland pmaps which owns this L1) are moved to the TAIL.
355 static TAILQ_HEAD(, l1_ttable) l1_lru_list;
357 * A list of all L1 tables
359 static SLIST_HEAD(, l1_ttable) l1_list;
360 static struct mtx l1_lru_lock;
363 * The l2_dtable tracks L2_BUCKET_SIZE worth of L1 slots.
365 * This is normally 16MB worth L2 page descriptors for any given pmap.
366 * Reference counts are maintained for L2 descriptors so they can be
370 /* The number of L2 page descriptors allocated to this l2_dtable */
373 /* List of L2 page descriptors */
375 pt_entry_t *l2b_kva; /* KVA of L2 Descriptor Table */
376 vm_paddr_t l2b_phys; /* Physical address of same */
377 u_short l2b_l1idx; /* This L2 table's L1 index */
378 u_short l2b_occupancy; /* How many active descriptors */
379 } l2_bucket[L2_BUCKET_SIZE];
382 /* pmap_kenter_internal flags */
383 #define KENTER_CACHE 0x1
384 #define KENTER_USER 0x2
387 * Given an L1 table index, calculate the corresponding l2_dtable index
388 * and bucket index within the l2_dtable.
390 #define L2_IDX(l1idx) (((l1idx) >> L2_BUCKET_LOG2) & \
392 #define L2_BUCKET(l1idx) ((l1idx) & (L2_BUCKET_SIZE - 1))
395 * Given a virtual address, this macro returns the
396 * virtual address required to drop into the next L2 bucket.
398 #define L2_NEXT_BUCKET(va) (((va) & L1_S_FRAME) + L1_S_SIZE)
401 * We try to map the page tables write-through, if possible. However, not
402 * all CPUs have a write-through cache mode, so on those we have to sync
403 * the cache when we frob page tables.
405 * We try to evaluate this at compile time, if possible. However, it's
406 * not always possible to do that, hence this run-time var.
408 int pmap_needs_pte_sync;
411 * Macro to determine if a mapping might be resident in the
412 * instruction cache and/or TLB
414 #define PTE_BEEN_EXECD(pte) (L2_S_EXECUTABLE(pte) && L2_S_REFERENCED(pte))
417 * Macro to determine if a mapping might be resident in the
418 * data cache and/or TLB
420 #define PTE_BEEN_REFD(pte) (L2_S_REFERENCED(pte))
422 #ifndef PMAP_SHPGPERPROC
423 #define PMAP_SHPGPERPROC 200
426 #define pmap_is_current(pm) ((pm) == pmap_kernel() || \
427 curproc->p_vmspace->vm_map.pmap == (pm))
430 * Data for the pv entry allocation mechanism
432 static TAILQ_HEAD(pch, pv_chunk) pv_chunks = TAILQ_HEAD_INITIALIZER(pv_chunks);
433 static int pv_entry_count, pv_entry_max, pv_entry_high_water;
434 static struct md_page *pv_table;
435 static int shpgperproc = PMAP_SHPGPERPROC;
437 struct pv_chunk *pv_chunkbase; /* KVA block for pv_chunks */
438 int pv_maxchunks; /* How many chunks we have KVA for */
439 vm_offset_t pv_vafree; /* Freelist stored in the PTE */
441 static __inline struct pv_chunk *
442 pv_to_chunk(pv_entry_t pv)
445 return ((struct pv_chunk *)((uintptr_t)pv & ~(uintptr_t)PAGE_MASK));
448 #define PV_PMAP(pv) (pv_to_chunk(pv)->pc_pmap)
450 CTASSERT(sizeof(struct pv_chunk) == PAGE_SIZE);
451 CTASSERT(_NPCM == 8);
452 CTASSERT(_NPCPV == 252);
454 #define PC_FREE0_6 0xfffffffful /* Free values for index 0 through 6 */
455 #define PC_FREE7 0x0ffffffful /* Free values for index 7 */
457 static const uint32_t pc_freemask[_NPCM] = {
458 PC_FREE0_6, PC_FREE0_6, PC_FREE0_6,
459 PC_FREE0_6, PC_FREE0_6, PC_FREE0_6,
463 static SYSCTL_NODE(_vm, OID_AUTO, pmap, CTLFLAG_RD, 0, "VM/pmap parameters");
465 /* Superpages utilization enabled = 1 / disabled = 0 */
466 static int sp_enabled = 0;
467 SYSCTL_INT(_vm_pmap, OID_AUTO, sp_enabled, CTLFLAG_RDTUN, &sp_enabled, 0,
468 "Are large page mappings enabled?");
470 SYSCTL_INT(_vm_pmap, OID_AUTO, pv_entry_count, CTLFLAG_RD, &pv_entry_count, 0,
471 "Current number of pv entries");
474 static int pc_chunk_count, pc_chunk_allocs, pc_chunk_frees, pc_chunk_tryfail;
476 SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_count, CTLFLAG_RD, &pc_chunk_count, 0,
477 "Current number of pv entry chunks");
478 SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_allocs, CTLFLAG_RD, &pc_chunk_allocs, 0,
479 "Current number of pv entry chunks allocated");
480 SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_frees, CTLFLAG_RD, &pc_chunk_frees, 0,
481 "Current number of pv entry chunks frees");
482 SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_tryfail, CTLFLAG_RD, &pc_chunk_tryfail, 0,
483 "Number of times tried to get a chunk page but failed.");
485 static long pv_entry_frees, pv_entry_allocs;
486 static int pv_entry_spare;
488 SYSCTL_LONG(_vm_pmap, OID_AUTO, pv_entry_frees, CTLFLAG_RD, &pv_entry_frees, 0,
489 "Current number of pv entry frees");
490 SYSCTL_LONG(_vm_pmap, OID_AUTO, pv_entry_allocs, CTLFLAG_RD, &pv_entry_allocs, 0,
491 "Current number of pv entry allocs");
492 SYSCTL_INT(_vm_pmap, OID_AUTO, pv_entry_spare, CTLFLAG_RD, &pv_entry_spare, 0,
493 "Current number of spare pv entries");
497 static uma_zone_t l2table_zone;
498 static vm_offset_t pmap_kernel_l2dtable_kva;
499 static vm_offset_t pmap_kernel_l2ptp_kva;
500 static vm_paddr_t pmap_kernel_l2ptp_phys;
501 static struct rwlock pvh_global_lock;
503 int l1_mem_types[] = {
505 ARM_L1S_DEVICE_NOSHARE,
506 ARM_L1S_DEVICE_SHARE,
507 ARM_L1S_NRML_NOCACHE,
508 ARM_L1S_NRML_IWT_OWT,
509 ARM_L1S_NRML_IWB_OWB,
510 ARM_L1S_NRML_IWBA_OWBA
513 int l2l_mem_types[] = {
515 ARM_L2L_DEVICE_NOSHARE,
516 ARM_L2L_DEVICE_SHARE,
517 ARM_L2L_NRML_NOCACHE,
518 ARM_L2L_NRML_IWT_OWT,
519 ARM_L2L_NRML_IWB_OWB,
520 ARM_L2L_NRML_IWBA_OWBA
523 int l2s_mem_types[] = {
525 ARM_L2S_DEVICE_NOSHARE,
526 ARM_L2S_DEVICE_SHARE,
527 ARM_L2S_NRML_NOCACHE,
528 ARM_L2S_NRML_IWT_OWT,
529 ARM_L2S_NRML_IWB_OWB,
530 ARM_L2S_NRML_IWBA_OWBA
534 * This list exists for the benefit of pmap_map_chunk(). It keeps track
535 * of the kernel L2 tables during bootstrap, so that pmap_map_chunk() can
536 * find them as necessary.
538 * Note that the data on this list MUST remain valid after initarm() returns,
539 * as pmap_bootstrap() uses it to contruct L2 table metadata.
541 SLIST_HEAD(, pv_addr) kernel_pt_list = SLIST_HEAD_INITIALIZER(kernel_pt_list);
544 pmap_init_l1(struct l1_ttable *l1, pd_entry_t *l1pt)
549 l1->l1_domain_use_count = 0;
550 l1->l1_domain_first = 0;
552 for (i = 0; i < PMAP_DOMAINS; i++)
553 l1->l1_domain_free[i] = i + 1;
556 * Copy the kernel's L1 entries to each new L1.
558 if (l1pt != pmap_kernel()->pm_l1->l1_kva)
559 memcpy(l1pt, pmap_kernel()->pm_l1->l1_kva, L1_TABLE_SIZE);
561 if ((l1->l1_physaddr = pmap_extract(pmap_kernel(), (vm_offset_t)l1pt)) == 0)
562 panic("pmap_init_l1: can't get PA of L1 at %p", l1pt);
563 SLIST_INSERT_HEAD(&l1_list, l1, l1_link);
564 TAILQ_INSERT_TAIL(&l1_lru_list, l1, l1_lru);
568 kernel_pt_lookup(vm_paddr_t pa)
572 SLIST_FOREACH(pv, &kernel_pt_list, pv_list) {
580 pmap_pte_init_mmu_v6(void)
583 if (PTE_PAGETABLE >= 3)
584 pmap_needs_pte_sync = 1;
585 pte_l1_s_cache_mode = l1_mem_types[PTE_CACHE];
586 pte_l2_l_cache_mode = l2l_mem_types[PTE_CACHE];
587 pte_l2_s_cache_mode = l2s_mem_types[PTE_CACHE];
589 pte_l1_s_cache_mode_pt = l1_mem_types[PTE_PAGETABLE];
590 pte_l2_l_cache_mode_pt = l2l_mem_types[PTE_PAGETABLE];
591 pte_l2_s_cache_mode_pt = l2s_mem_types[PTE_PAGETABLE];
596 * Allocate an L1 translation table for the specified pmap.
597 * This is called at pmap creation time.
600 pmap_alloc_l1(pmap_t pmap)
602 struct l1_ttable *l1;
606 * Remove the L1 at the head of the LRU list
608 mtx_lock(&l1_lru_lock);
609 l1 = TAILQ_FIRST(&l1_lru_list);
610 TAILQ_REMOVE(&l1_lru_list, l1, l1_lru);
613 * Pick the first available domain number, and update
614 * the link to the next number.
616 domain = l1->l1_domain_first;
617 l1->l1_domain_first = l1->l1_domain_free[domain];
620 * If there are still free domain numbers in this L1,
621 * put it back on the TAIL of the LRU list.
623 if (++l1->l1_domain_use_count < PMAP_DOMAINS)
624 TAILQ_INSERT_TAIL(&l1_lru_list, l1, l1_lru);
626 mtx_unlock(&l1_lru_lock);
629 * Fix up the relevant bits in the pmap structure
632 pmap->pm_domain = domain + 1;
636 * Free an L1 translation table.
637 * This is called at pmap destruction time.
640 pmap_free_l1(pmap_t pmap)
642 struct l1_ttable *l1 = pmap->pm_l1;
644 mtx_lock(&l1_lru_lock);
647 * If this L1 is currently on the LRU list, remove it.
649 if (l1->l1_domain_use_count < PMAP_DOMAINS)
650 TAILQ_REMOVE(&l1_lru_list, l1, l1_lru);
653 * Free up the domain number which was allocated to the pmap
655 l1->l1_domain_free[pmap->pm_domain - 1] = l1->l1_domain_first;
656 l1->l1_domain_first = pmap->pm_domain - 1;
657 l1->l1_domain_use_count--;
660 * The L1 now must have at least 1 free domain, so add
661 * it back to the LRU list. If the use count is zero,
662 * put it at the head of the list, otherwise it goes
665 if (l1->l1_domain_use_count == 0) {
666 TAILQ_INSERT_HEAD(&l1_lru_list, l1, l1_lru);
668 TAILQ_INSERT_TAIL(&l1_lru_list, l1, l1_lru);
670 mtx_unlock(&l1_lru_lock);
674 * Returns a pointer to the L2 bucket associated with the specified pmap
675 * and VA, or NULL if no L2 bucket exists for the address.
677 static PMAP_INLINE struct l2_bucket *
678 pmap_get_l2_bucket(pmap_t pmap, vm_offset_t va)
680 struct l2_dtable *l2;
681 struct l2_bucket *l2b;
686 if ((l2 = pmap->pm_l2[L2_IDX(l1idx)]) == NULL ||
687 (l2b = &l2->l2_bucket[L2_BUCKET(l1idx)])->l2b_kva == NULL)
694 * Returns a pointer to the L2 bucket associated with the specified pmap
697 * If no L2 bucket exists, perform the necessary allocations to put an L2
698 * bucket/page table in place.
700 * Note that if a new L2 bucket/page was allocated, the caller *must*
701 * increment the bucket occupancy counter appropriately *before*
702 * releasing the pmap's lock to ensure no other thread or cpu deallocates
703 * the bucket/page in the meantime.
705 static struct l2_bucket *
706 pmap_alloc_l2_bucket(pmap_t pmap, vm_offset_t va)
708 struct l2_dtable *l2;
709 struct l2_bucket *l2b;
714 PMAP_ASSERT_LOCKED(pmap);
715 rw_assert(&pvh_global_lock, RA_WLOCKED);
716 if ((l2 = pmap->pm_l2[L2_IDX(l1idx)]) == NULL) {
718 * No mapping at this address, as there is
719 * no entry in the L1 table.
720 * Need to allocate a new l2_dtable.
723 rw_wunlock(&pvh_global_lock);
724 if ((l2 = uma_zalloc(l2table_zone, M_NOWAIT)) == NULL) {
725 rw_wlock(&pvh_global_lock);
729 rw_wlock(&pvh_global_lock);
731 if (pmap->pm_l2[L2_IDX(l1idx)] != NULL) {
733 * Someone already allocated the l2_dtable while
734 * we were doing the same.
736 uma_zfree(l2table_zone, l2);
737 l2 = pmap->pm_l2[L2_IDX(l1idx)];
739 bzero(l2, sizeof(*l2));
741 * Link it into the parent pmap
743 pmap->pm_l2[L2_IDX(l1idx)] = l2;
747 l2b = &l2->l2_bucket[L2_BUCKET(l1idx)];
750 * Fetch pointer to the L2 page table associated with the address.
752 if (l2b->l2b_kva == NULL) {
756 * No L2 page table has been allocated. Chances are, this
757 * is because we just allocated the l2_dtable, above.
760 rw_wunlock(&pvh_global_lock);
761 ptep = uma_zalloc(l2zone, M_NOWAIT);
762 rw_wlock(&pvh_global_lock);
764 if (l2b->l2b_kva != 0) {
765 /* We lost the race. */
766 uma_zfree(l2zone, ptep);
769 l2b->l2b_phys = vtophys(ptep);
772 * Oops, no more L2 page tables available at this
773 * time. We may need to deallocate the l2_dtable
774 * if we allocated a new one above.
776 if (l2->l2_occupancy == 0) {
777 pmap->pm_l2[L2_IDX(l1idx)] = NULL;
778 uma_zfree(l2table_zone, l2);
785 l2b->l2b_l1idx = l1idx;
791 static PMAP_INLINE void
792 pmap_free_l2_ptp(pt_entry_t *l2)
794 uma_zfree(l2zone, l2);
797 * One or more mappings in the specified L2 descriptor table have just been
800 * Garbage collect the metadata and descriptor table itself if necessary.
802 * The pmap lock must be acquired when this is called (not necessary
803 * for the kernel pmap).
806 pmap_free_l2_bucket(pmap_t pmap, struct l2_bucket *l2b, u_int count)
808 struct l2_dtable *l2;
809 pd_entry_t *pl1pd, l1pd;
815 * Update the bucket's reference count according to how many
816 * PTEs the caller has just invalidated.
818 l2b->l2b_occupancy -= count;
823 * Level 2 page tables allocated to the kernel pmap are never freed
824 * as that would require checking all Level 1 page tables and
825 * removing any references to the Level 2 page table. See also the
826 * comment elsewhere about never freeing bootstrap L2 descriptors.
828 * We make do with just invalidating the mapping in the L2 table.
830 * This isn't really a big deal in practice and, in fact, leads
831 * to a performance win over time as we don't need to continually
834 if (l2b->l2b_occupancy > 0 || pmap == pmap_kernel())
838 * There are no more valid mappings in this level 2 page table.
839 * Go ahead and NULL-out the pointer in the bucket, then
840 * free the page table.
842 l1idx = l2b->l2b_l1idx;
846 pl1pd = &pmap->pm_l1->l1_kva[l1idx];
849 * If the L1 slot matches the pmap's domain
850 * number, then invalidate it.
852 l1pd = *pl1pd & (L1_TYPE_MASK | L1_C_DOM_MASK);
853 if (l1pd == (L1_C_DOM(pmap->pm_domain) | L1_TYPE_C)) {
856 cpu_tlb_flushD_SE((vm_offset_t)ptep);
861 * Release the L2 descriptor table back to the pool cache.
863 pmap_free_l2_ptp(ptep);
866 * Update the reference count in the associated l2_dtable
868 l2 = pmap->pm_l2[L2_IDX(l1idx)];
869 if (--l2->l2_occupancy > 0)
873 * There are no more valid mappings in any of the Level 1
874 * slots managed by this l2_dtable. Go ahead and NULL-out
875 * the pointer in the parent pmap and free the l2_dtable.
877 pmap->pm_l2[L2_IDX(l1idx)] = NULL;
878 uma_zfree(l2table_zone, l2);
882 * Pool cache constructors for L2 descriptor tables, metadata and pmap
886 pmap_l2ptp_ctor(void *mem, int size, void *arg, int flags)
888 struct l2_bucket *l2b;
889 pt_entry_t *ptep, pte;
890 vm_offset_t va = (vm_offset_t)mem & ~PAGE_MASK;
893 * The mappings for these page tables were initially made using
894 * pmap_kenter() by the pool subsystem. Therefore, the cache-
895 * mode will not be right for page table mappings. To avoid
896 * polluting the pmap_kenter() code with a special case for
897 * page tables, we simply fix up the cache-mode here if it's not
900 l2b = pmap_get_l2_bucket(pmap_kernel(), va);
901 ptep = &l2b->l2b_kva[l2pte_index(va)];
904 cpu_idcache_wbinv_range(va, PAGE_SIZE);
905 pmap_l2cache_wbinv_range(va, pte & L2_S_FRAME, PAGE_SIZE);
906 if ((pte & L2_S_CACHE_MASK) != pte_l2_s_cache_mode_pt) {
908 * Page tables must have the cache-mode set to
911 *ptep = (pte & ~L2_S_CACHE_MASK) | pte_l2_s_cache_mode_pt;
913 cpu_tlb_flushD_SE(va);
917 memset(mem, 0, L2_TABLE_SIZE_REAL);
922 * Modify pte bits for all ptes corresponding to the given physical address.
923 * We use `maskbits' rather than `clearbits' because we're always passing
924 * constants and the latter would require an extra inversion at run-time.
927 pmap_clearbit(struct vm_page *m, u_int maskbits)
929 struct l2_bucket *l2b;
930 struct pv_entry *pv, *pve, *next_pv;
933 pt_entry_t *ptep, npte, opte;
939 rw_wlock(&pvh_global_lock);
940 if ((m->flags & PG_FICTITIOUS) != 0)
943 pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m));
944 TAILQ_FOREACH_SAFE(pv, &pvh->pv_list, pv_list, next_pv) {
948 pl1pd = &pmap->pm_l1->l1_kva[L1_IDX(va)];
949 KASSERT((*pl1pd & L1_TYPE_MASK) == L1_S_PROTO,
950 ("pmap_clearbit: valid section mapping expected"));
951 if ((maskbits & PVF_WRITE) && (pv->pv_flags & PVF_WRITE))
952 (void)pmap_demote_section(pmap, va);
953 else if ((maskbits & PVF_REF) && L1_S_REFERENCED(*pl1pd)) {
954 if (pmap_demote_section(pmap, va)) {
955 if ((pv->pv_flags & PVF_WIRED) == 0) {
957 * Remove the mapping to a single page
958 * so that a subsequent access may
959 * repromote. Since the underlying
960 * l2_bucket is fully populated, this
961 * removal never frees an entire
964 va += (VM_PAGE_TO_PHYS(m) &
966 l2b = pmap_get_l2_bucket(pmap, va);
968 ("pmap_clearbit: no l2 bucket for "
969 "va 0x%#x, pmap 0x%p", va, pmap));
970 ptep = &l2b->l2b_kva[l2pte_index(va)];
973 pmap_free_l2_bucket(pmap, l2b, 1);
974 pve = pmap_remove_pv(m, pmap, va);
975 KASSERT(pve != NULL, ("pmap_clearbit: "
976 "no PV entry for managed mapping"));
977 pmap_free_pv_entry(pmap, pve);
981 } else if ((maskbits & PVF_MOD) && L1_S_WRITABLE(*pl1pd)) {
982 if (pmap_demote_section(pmap, va)) {
983 if ((pv->pv_flags & PVF_WIRED) == 0) {
985 * Write protect the mapping to a
986 * single page so that a subsequent
987 * write access may repromote.
989 va += (VM_PAGE_TO_PHYS(m) &
991 l2b = pmap_get_l2_bucket(pmap, va);
993 ("pmap_clearbit: no l2 bucket for "
994 "va 0x%#x, pmap 0x%p", va, pmap));
995 ptep = &l2b->l2b_kva[l2pte_index(va)];
996 if ((*ptep & L2_S_PROTO) != 0) {
997 pve = pmap_find_pv(&m->md,
1000 ("pmap_clearbit: no PV "
1001 "entry for managed mapping"));
1002 pve->pv_flags &= ~PVF_WRITE;
1013 if (TAILQ_EMPTY(&m->md.pv_list)) {
1014 rw_wunlock(&pvh_global_lock);
1019 * Loop over all current mappings setting/clearing as appropos
1021 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) {
1024 oflags = pv->pv_flags;
1025 pv->pv_flags &= ~maskbits;
1029 l2b = pmap_get_l2_bucket(pmap, va);
1030 KASSERT(l2b != NULL, ("pmap_clearbit: no l2 bucket for "
1031 "va 0x%#x, pmap 0x%p", va, pmap));
1033 ptep = &l2b->l2b_kva[l2pte_index(va)];
1034 npte = opte = *ptep;
1036 if (maskbits & (PVF_WRITE | PVF_MOD)) {
1037 /* make the pte read only */
1041 if (maskbits & PVF_REF) {
1043 * Clear referenced flag in PTE so that we
1044 * will take a flag fault the next time the mapping
1050 CTR4(KTR_PMAP,"clearbit: pmap:%p bits:%x pte:%x->%x",
1051 pmap, maskbits, opte, npte);
1056 /* Flush the TLB entry if a current pmap. */
1057 if (PTE_BEEN_EXECD(opte))
1058 cpu_tlb_flushID_SE(pv->pv_va);
1059 else if (PTE_BEEN_REFD(opte))
1060 cpu_tlb_flushD_SE(pv->pv_va);
1068 if (maskbits & PVF_WRITE)
1069 vm_page_aflag_clear(m, PGA_WRITEABLE);
1070 rw_wunlock(&pvh_global_lock);
1075 * main pv_entry manipulation functions:
1076 * pmap_enter_pv: enter a mapping onto a vm_page list
1077 * pmap_remove_pv: remove a mappiing from a vm_page list
1079 * NOTE: pmap_enter_pv expects to lock the pvh itself
1080 * pmap_remove_pv expects the caller to lock the pvh before calling
1084 * pmap_enter_pv: enter a mapping onto a vm_page's PV list
1086 * => caller should hold the proper lock on pvh_global_lock
1087 * => caller should have pmap locked
1088 * => we will (someday) gain the lock on the vm_page's PV list
1089 * => caller should adjust ptp's wire_count before calling
1090 * => caller should not adjust pmap's wire_count
1093 pmap_enter_pv(struct vm_page *m, struct pv_entry *pve, pmap_t pmap,
1094 vm_offset_t va, u_int flags)
1097 rw_assert(&pvh_global_lock, RA_WLOCKED);
1099 PMAP_ASSERT_LOCKED(pmap);
1101 pve->pv_flags = flags;
1103 TAILQ_INSERT_HEAD(&m->md.pv_list, pve, pv_list);
1104 if (pve->pv_flags & PVF_WIRED)
1105 ++pmap->pm_stats.wired_count;
1110 * pmap_find_pv: Find a pv entry
1112 * => caller should hold lock on vm_page
1114 static PMAP_INLINE struct pv_entry *
1115 pmap_find_pv(struct md_page *md, pmap_t pmap, vm_offset_t va)
1117 struct pv_entry *pv;
1119 rw_assert(&pvh_global_lock, RA_WLOCKED);
1120 TAILQ_FOREACH(pv, &md->pv_list, pv_list)
1121 if (pmap == PV_PMAP(pv) && va == pv->pv_va)
1128 * vector_page_setprot:
1130 * Manipulate the protection of the vector page.
1133 vector_page_setprot(int prot)
1135 struct l2_bucket *l2b;
1138 l2b = pmap_get_l2_bucket(pmap_kernel(), vector_page);
1140 ptep = &l2b->l2b_kva[l2pte_index(vector_page)];
1142 * Set referenced flag.
1143 * Vectors' page is always desired
1144 * to be allowed to reside in TLB.
1148 pmap_set_prot(ptep, prot|VM_PROT_EXECUTE, 0);
1150 cpu_tlb_flushID_SE(vector_page);
1155 pmap_set_prot(pt_entry_t *ptep, vm_prot_t prot, uint8_t user)
1158 *ptep &= ~(L2_S_PROT_MASK | L2_XN);
1160 if (!(prot & VM_PROT_EXECUTE))
1163 /* Set defaults first - kernel read access */
1165 *ptep |= L2_S_PROT_R;
1166 /* Now tune APs as desired */
1168 *ptep |= L2_S_PROT_U;
1170 if (prot & VM_PROT_WRITE)
1175 * pmap_remove_pv: try to remove a mapping from a pv_list
1177 * => caller should hold proper lock on pmap_main_lock
1178 * => pmap should be locked
1179 * => caller should hold lock on vm_page [so that attrs can be adjusted]
1180 * => caller should adjust ptp's wire_count and free PTP if needed
1181 * => caller should NOT adjust pmap's wire_count
1182 * => we return the removed pve
1184 static struct pv_entry *
1185 pmap_remove_pv(struct vm_page *m, pmap_t pmap, vm_offset_t va)
1187 struct pv_entry *pve;
1189 rw_assert(&pvh_global_lock, RA_WLOCKED);
1190 PMAP_ASSERT_LOCKED(pmap);
1192 pve = pmap_find_pv(&m->md, pmap, va); /* find corresponding pve */
1194 TAILQ_REMOVE(&m->md.pv_list, pve, pv_list);
1195 if (pve->pv_flags & PVF_WIRED)
1196 --pmap->pm_stats.wired_count;
1198 if (TAILQ_EMPTY(&m->md.pv_list))
1199 vm_page_aflag_clear(m, PGA_WRITEABLE);
1201 return(pve); /* return removed pve */
1206 * pmap_modify_pv: Update pv flags
1208 * => caller should hold lock on vm_page [so that attrs can be adjusted]
1209 * => caller should NOT adjust pmap's wire_count
1210 * => we return the old flags
1212 * Modify a physical-virtual mapping in the pv table
1215 pmap_modify_pv(struct vm_page *m, pmap_t pmap, vm_offset_t va,
1216 u_int clr_mask, u_int set_mask)
1218 struct pv_entry *npv;
1219 u_int flags, oflags;
1221 PMAP_ASSERT_LOCKED(pmap);
1222 rw_assert(&pvh_global_lock, RA_WLOCKED);
1223 if ((npv = pmap_find_pv(&m->md, pmap, va)) == NULL)
1227 * There is at least one VA mapping this page.
1229 oflags = npv->pv_flags;
1230 npv->pv_flags = flags = (oflags & ~clr_mask) | set_mask;
1232 if ((flags ^ oflags) & PVF_WIRED) {
1233 if (flags & PVF_WIRED)
1234 ++pmap->pm_stats.wired_count;
1236 --pmap->pm_stats.wired_count;
1242 /* Function to set the debug level of the pmap code */
1245 pmap_debug(int level)
1247 pmap_debug_level = level;
1248 dprintf("pmap_debug: level=%d\n", pmap_debug_level);
1250 #endif /* PMAP_DEBUG */
1253 pmap_pinit0(struct pmap *pmap)
1255 PDEBUG(1, printf("pmap_pinit0: pmap = %08x\n", (u_int32_t) pmap));
1257 bcopy(kernel_pmap, pmap, sizeof(*pmap));
1258 bzero(&pmap->pm_mtx, sizeof(pmap->pm_mtx));
1259 PMAP_LOCK_INIT(pmap);
1260 TAILQ_INIT(&pmap->pm_pvchunk);
1264 * Initialize a vm_page's machine-dependent fields.
1267 pmap_page_init(vm_page_t m)
1270 TAILQ_INIT(&m->md.pv_list);
1271 m->md.pv_memattr = VM_MEMATTR_DEFAULT;
1275 pmap_ptelist_alloc(vm_offset_t *head)
1282 return (va); /* Out of memory */
1285 if ((*head & L2_TYPE_MASK) != L2_TYPE_INV)
1286 panic("%s: va is not L2_TYPE_INV!", __func__);
1292 pmap_ptelist_free(vm_offset_t *head, vm_offset_t va)
1296 if ((va & L2_TYPE_MASK) != L2_TYPE_INV)
1297 panic("%s: freeing va that is not L2_TYPE INV!", __func__);
1299 *pte = *head; /* virtual! L2_TYPE is L2_TYPE_INV though */
1304 pmap_ptelist_init(vm_offset_t *head, void *base, int npages)
1310 for (i = npages - 1; i >= 0; i--) {
1311 va = (vm_offset_t)base + i * PAGE_SIZE;
1312 pmap_ptelist_free(head, va);
1317 * Initialize the pmap module.
1318 * Called by vm_init, to initialize any structures that the pmap
1319 * system needs to map virtual memory.
1327 l2zone = uma_zcreate("L2 Table", L2_TABLE_SIZE_REAL, pmap_l2ptp_ctor,
1328 NULL, NULL, NULL, UMA_ALIGN_PTR, UMA_ZONE_VM | UMA_ZONE_NOFREE);
1329 l2table_zone = uma_zcreate("L2 Table", sizeof(struct l2_dtable), NULL,
1330 NULL, NULL, NULL, UMA_ALIGN_PTR, UMA_ZONE_VM | UMA_ZONE_NOFREE);
1333 * Are large page mappings supported and enabled?
1335 TUNABLE_INT_FETCH("vm.pmap.sp_enabled", &sp_enabled);
1337 KASSERT(MAXPAGESIZES > 1 && pagesizes[1] == 0,
1338 ("pmap_init: can't assign to pagesizes[1]"));
1339 pagesizes[1] = NBPDR;
1343 * Calculate the size of the pv head table for superpages.
1345 for (i = 0; phys_avail[i + 1]; i += 2);
1346 pv_npg = round_1mpage(phys_avail[(i - 2) + 1]) / NBPDR;
1349 * Allocate memory for the pv head table for superpages.
1351 s = (vm_size_t)(pv_npg * sizeof(struct md_page));
1353 pv_table = (struct md_page *)kmem_malloc(kernel_arena, s,
1355 for (i = 0; i < pv_npg; i++)
1356 TAILQ_INIT(&pv_table[i].pv_list);
1359 * Initialize the address space for the pv chunks.
1362 TUNABLE_INT_FETCH("vm.pmap.shpgperproc", &shpgperproc);
1363 pv_entry_max = shpgperproc * maxproc + cnt.v_page_count;
1364 TUNABLE_INT_FETCH("vm.pmap.pv_entries", &pv_entry_max);
1365 pv_entry_max = roundup(pv_entry_max, _NPCPV);
1366 pv_entry_high_water = 9 * (pv_entry_max / 10);
1368 pv_maxchunks = MAX(pv_entry_max / _NPCPV, maxproc);
1369 pv_chunkbase = (struct pv_chunk *)kva_alloc(PAGE_SIZE * pv_maxchunks);
1371 if (pv_chunkbase == NULL)
1372 panic("pmap_init: not enough kvm for pv chunks");
1374 pmap_ptelist_init(&pv_vafree, pv_chunkbase, pv_maxchunks);
1377 * Now it is safe to enable pv_table recording.
1379 PDEBUG(1, printf("pmap_init: done!\n"));
1382 SYSCTL_INT(_vm_pmap, OID_AUTO, pv_entry_max, CTLFLAG_RD, &pv_entry_max, 0,
1383 "Max number of PV entries");
1384 SYSCTL_INT(_vm_pmap, OID_AUTO, shpgperproc, CTLFLAG_RD, &shpgperproc, 0,
1385 "Page share factor per proc");
1387 static SYSCTL_NODE(_vm_pmap, OID_AUTO, section, CTLFLAG_RD, 0,
1388 "1MB page mapping counters");
1390 static u_long pmap_section_demotions;
1391 SYSCTL_ULONG(_vm_pmap_section, OID_AUTO, demotions, CTLFLAG_RD,
1392 &pmap_section_demotions, 0, "1MB page demotions");
1394 static u_long pmap_section_mappings;
1395 SYSCTL_ULONG(_vm_pmap_section, OID_AUTO, mappings, CTLFLAG_RD,
1396 &pmap_section_mappings, 0, "1MB page mappings");
1398 static u_long pmap_section_p_failures;
1399 SYSCTL_ULONG(_vm_pmap_section, OID_AUTO, p_failures, CTLFLAG_RD,
1400 &pmap_section_p_failures, 0, "1MB page promotion failures");
1402 static u_long pmap_section_promotions;
1403 SYSCTL_ULONG(_vm_pmap_section, OID_AUTO, promotions, CTLFLAG_RD,
1404 &pmap_section_promotions, 0, "1MB page promotions");
1407 pmap_fault_fixup(pmap_t pmap, vm_offset_t va, vm_prot_t ftype, int user)
1409 struct l2_dtable *l2;
1410 struct l2_bucket *l2b;
1411 pd_entry_t *pl1pd, l1pd;
1412 pt_entry_t *ptep, pte;
1418 rw_wlock(&pvh_global_lock);
1421 * Check and possibly fix-up L1 section mapping
1422 * only when superpage mappings are enabled to speed up.
1425 pl1pd = &pmap->pm_l1->l1_kva[l1idx];
1427 if ((l1pd & L1_TYPE_MASK) == L1_S_PROTO) {
1428 /* Catch an access to the vectors section */
1429 if (l1idx == L1_IDX(vector_page))
1432 * Stay away from the kernel mappings.
1433 * None of them should fault from L1 entry.
1435 if (pmap == pmap_kernel())
1438 * Catch a forbidden userland access
1440 if (user && !(l1pd & L1_S_PROT_U))
1443 * Superpage is always either mapped read only
1444 * or it is modified and permitted to be written
1445 * by default. Therefore, process only reference
1446 * flag fault and demote page in case of write fault.
1448 if ((ftype & VM_PROT_WRITE) && !L1_S_WRITABLE(l1pd) &&
1449 L1_S_REFERENCED(l1pd)) {
1450 (void)pmap_demote_section(pmap, va);
1452 } else if (!L1_S_REFERENCED(l1pd)) {
1453 /* Mark the page "referenced" */
1454 *pl1pd = l1pd | L1_S_REF;
1456 goto l1_section_out;
1462 * If there is no l2_dtable for this address, then the process
1463 * has no business accessing it.
1465 * Note: This will catch userland processes trying to access
1468 l2 = pmap->pm_l2[L2_IDX(l1idx)];
1473 * Likewise if there is no L2 descriptor table
1475 l2b = &l2->l2_bucket[L2_BUCKET(l1idx)];
1476 if (l2b->l2b_kva == NULL)
1480 * Check the PTE itself.
1482 ptep = &l2b->l2b_kva[l2pte_index(va)];
1488 * Catch a userland access to the vector page mapped at 0x0
1490 if (user && !(pte & L2_S_PROT_U))
1492 if (va == vector_page)
1496 CTR5(KTR_PMAP, "pmap_fault_fix: pmap:%p va:%x pte:0x%x ftype:%x user:%x",
1497 pmap, va, pte, ftype, user);
1498 if ((ftype & VM_PROT_WRITE) && !(L2_S_WRITABLE(pte)) &&
1499 L2_S_REFERENCED(pte)) {
1501 * This looks like a good candidate for "page modified"
1504 struct pv_entry *pv;
1507 /* Extract the physical address of the page */
1508 if ((m = PHYS_TO_VM_PAGE(pa)) == NULL) {
1511 /* Get the current flags for this page. */
1513 pv = pmap_find_pv(&m->md, pmap, va);
1519 * Do the flags say this page is writable? If not then it
1520 * is a genuine write fault. If yes then the write fault is
1521 * our fault as we did not reflect the write access in the
1522 * PTE. Now we know a write has occurred we can correct this
1523 * and also set the modified bit
1525 if ((pv->pv_flags & PVF_WRITE) == 0) {
1531 /* Re-enable write permissions for the page */
1532 *ptep = (pte & ~L2_APX);
1535 CTR1(KTR_PMAP, "pmap_fault_fix: new pte:0x%x", *ptep);
1536 } else if (!L2_S_REFERENCED(pte)) {
1538 * This looks like a good candidate for "page referenced"
1541 struct pv_entry *pv;
1544 /* Extract the physical address of the page */
1545 if ((m = PHYS_TO_VM_PAGE(pa)) == NULL)
1547 /* Get the current flags for this page. */
1548 pv = pmap_find_pv(&m->md, pmap, va);
1552 vm_page_aflag_set(m, PGA_REFERENCED);
1554 /* Mark the page "referenced" */
1555 *ptep = pte | L2_S_REF;
1558 CTR1(KTR_PMAP, "pmap_fault_fix: new pte:0x%x", *ptep);
1562 * We know there is a valid mapping here, so simply
1563 * fix up the L1 if necessary.
1565 pl1pd = &pmap->pm_l1->l1_kva[l1idx];
1566 l1pd = l2b->l2b_phys | L1_C_DOM(pmap->pm_domain) | L1_C_PROTO;
1567 if (*pl1pd != l1pd) {
1575 * If 'rv == 0' at this point, it generally indicates that there is a
1576 * stale TLB entry for the faulting address. This happens when two or
1577 * more processes are sharing an L1. Since we don't flush the TLB on
1578 * a context switch between such processes, we can take domain faults
1579 * for mappings which exist at the same VA in both processes. EVEN IF
1580 * WE'VE RECENTLY FIXED UP THE CORRESPONDING L1 in pmap_enter(), for
1583 * This is extremely likely to happen if pmap_enter() updated the L1
1584 * entry for a recently entered mapping. In this case, the TLB is
1585 * flushed for the new mapping, but there may still be TLB entries for
1586 * other mappings belonging to other processes in the 1MB range
1587 * covered by the L1 entry.
1589 * Since 'rv == 0', we know that the L1 already contains the correct
1590 * value, so the fault must be due to a stale TLB entry.
1592 * Since we always need to flush the TLB anyway in the case where we
1593 * fixed up the L1, or frobbed the L2 PTE, we effectively deal with
1594 * stale TLB entries dynamically.
1596 * However, the above condition can ONLY happen if the current L1 is
1597 * being shared. If it happens when the L1 is unshared, it indicates
1598 * that other parts of the pmap are not doing their job WRT managing
1601 if (rv == 0 && pmap->pm_l1->l1_domain_use_count == 1) {
1602 printf("fixup: pmap %p, va 0x%08x, ftype %d - nothing to do!\n",
1604 printf("fixup: l2 %p, l2b %p, ptep %p, pl1pd %p\n",
1605 l2, l2b, ptep, pl1pd);
1606 printf("fixup: pte 0x%x, l1pd 0x%x, last code 0x%x\n",
1607 pte, l1pd, last_fault_code);
1615 cpu_tlb_flushID_SE(va);
1621 rw_wunlock(&pvh_global_lock);
1629 struct l2_bucket *l2b;
1630 struct l1_ttable *l1;
1632 pt_entry_t *ptep, pte;
1633 vm_offset_t va, eva;
1636 needed = (maxproc / PMAP_DOMAINS) + ((maxproc % PMAP_DOMAINS) ? 1 : 0);
1638 l1 = malloc(sizeof(*l1) * needed, M_VMPMAP, M_WAITOK);
1640 for (loop = 0; loop < needed; loop++, l1++) {
1641 /* Allocate a L1 page table */
1642 va = (vm_offset_t)contigmalloc(L1_TABLE_SIZE, M_VMPMAP, 0, 0x0,
1643 0xffffffff, L1_TABLE_SIZE, 0);
1646 panic("Cannot allocate L1 KVM");
1648 eva = va + L1_TABLE_SIZE;
1649 pl1pt = (pd_entry_t *)va;
1652 l2b = pmap_get_l2_bucket(pmap_kernel(), va);
1653 ptep = &l2b->l2b_kva[l2pte_index(va)];
1655 pte = (pte & ~L2_S_CACHE_MASK) | pte_l2_s_cache_mode_pt;
1658 cpu_tlb_flushID_SE(va);
1662 pmap_init_l1(l1, pl1pt);
1665 printf("pmap_postinit: Allocated %d static L1 descriptor tables\n",
1671 * This is used to stuff certain critical values into the PCB where they
1672 * can be accessed quickly from cpu_switch() et al.
1675 pmap_set_pcb_pagedir(pmap_t pmap, struct pcb *pcb)
1677 struct l2_bucket *l2b;
1679 pcb->pcb_pagedir = pmap->pm_l1->l1_physaddr;
1680 pcb->pcb_dacr = (DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL * 2)) |
1681 (DOMAIN_CLIENT << (pmap->pm_domain * 2));
1683 if (vector_page < KERNBASE) {
1684 pcb->pcb_pl1vec = &pmap->pm_l1->l1_kva[L1_IDX(vector_page)];
1685 l2b = pmap_get_l2_bucket(pmap, vector_page);
1686 pcb->pcb_l1vec = l2b->l2b_phys | L1_C_PROTO |
1687 L1_C_DOM(pmap->pm_domain) | L1_C_DOM(PMAP_DOMAIN_KERNEL);
1689 pcb->pcb_pl1vec = NULL;
1693 pmap_activate(struct thread *td)
1698 pmap = vmspace_pmap(td->td_proc->p_vmspace);
1702 pmap_set_pcb_pagedir(pmap, pcb);
1704 if (td == curthread) {
1705 u_int cur_dacr, cur_ttb;
1707 __asm __volatile("mrc p15, 0, %0, c2, c0, 0" : "=r"(cur_ttb));
1708 __asm __volatile("mrc p15, 0, %0, c3, c0, 0" : "=r"(cur_dacr));
1710 cur_ttb &= ~(L1_TABLE_SIZE - 1);
1712 if (cur_ttb == (u_int)pcb->pcb_pagedir &&
1713 cur_dacr == pcb->pcb_dacr) {
1715 * No need to switch address spaces.
1723 * We MUST, I repeat, MUST fix up the L1 entry corresponding
1724 * to 'vector_page' in the incoming L1 table before switching
1725 * to it otherwise subsequent interrupts/exceptions (including
1726 * domain faults!) will jump into hyperspace.
1728 if (pcb->pcb_pl1vec) {
1729 *pcb->pcb_pl1vec = pcb->pcb_l1vec;
1732 cpu_domains(pcb->pcb_dacr);
1733 cpu_setttb(pcb->pcb_pagedir);
1739 pmap_set_pt_cache_mode(pd_entry_t *kl1, vm_offset_t va)
1741 pd_entry_t *pdep, pde;
1742 pt_entry_t *ptep, pte;
1747 * Make sure the descriptor itself has the correct cache mode
1749 pdep = &kl1[L1_IDX(va)];
1752 if (l1pte_section_p(pde)) {
1753 if ((pde & L1_S_CACHE_MASK) != pte_l1_s_cache_mode_pt) {
1754 *pdep = (pde & ~L1_S_CACHE_MASK) |
1755 pte_l1_s_cache_mode_pt;
1760 pa = (vm_paddr_t)(pde & L1_C_ADDR_MASK);
1761 ptep = (pt_entry_t *)kernel_pt_lookup(pa);
1763 panic("pmap_bootstrap: No L2 for L2 @ va %p\n", ptep);
1765 ptep = &ptep[l2pte_index(va)];
1767 if ((pte & L2_S_CACHE_MASK) != pte_l2_s_cache_mode_pt) {
1768 *ptep = (pte & ~L2_S_CACHE_MASK) |
1769 pte_l2_s_cache_mode_pt;
1779 pmap_alloc_specials(vm_offset_t *availp, int pages, vm_offset_t *vap,
1782 vm_offset_t va = *availp;
1783 struct l2_bucket *l2b;
1786 l2b = pmap_get_l2_bucket(pmap_kernel(), va);
1788 panic("pmap_alloc_specials: no l2b for 0x%x", va);
1790 *ptep = &l2b->l2b_kva[l2pte_index(va)];
1794 *availp = va + (PAGE_SIZE * pages);
1798 * Bootstrap the system enough to run with virtual memory.
1800 * On the arm this is called after mapping has already been enabled
1801 * and just syncs the pmap module with what has already been done.
1802 * [We can't call it easily with mapping off since the kernel is not
1803 * mapped with PA == VA, hence we would have to relocate every address
1804 * from the linked base (virtual) address "KERNBASE" to the actual
1805 * (physical) address starting relative to 0]
1807 #define PMAP_STATIC_L2_SIZE 16
1810 pmap_bootstrap(vm_offset_t firstaddr, struct pv_addr *l1pt)
1812 static struct l1_ttable static_l1;
1813 static struct l2_dtable static_l2[PMAP_STATIC_L2_SIZE];
1814 struct l1_ttable *l1 = &static_l1;
1815 struct l2_dtable *l2;
1816 struct l2_bucket *l2b;
1817 struct czpages *czp;
1819 pd_entry_t *kernel_l1pt = (pd_entry_t *)l1pt->pv_va;
1824 int i, l1idx, l2idx, l2next = 0;
1826 PDEBUG(1, printf("firstaddr = %08x, lastaddr = %08x\n",
1827 firstaddr, vm_max_kernel_address));
1829 virtual_avail = firstaddr;
1830 kernel_pmap->pm_l1 = l1;
1831 kernel_l1pa = l1pt->pv_pa;
1834 * Scan the L1 translation table created by initarm() and create
1835 * the required metadata for all valid mappings found in it.
1837 for (l1idx = 0; l1idx < (L1_TABLE_SIZE / sizeof(pd_entry_t)); l1idx++) {
1838 pde = kernel_l1pt[l1idx];
1841 * We're only interested in Coarse mappings.
1842 * pmap_extract() can deal with section mappings without
1843 * recourse to checking L2 metadata.
1845 if ((pde & L1_TYPE_MASK) != L1_TYPE_C)
1849 * Lookup the KVA of this L2 descriptor table
1851 pa = (vm_paddr_t)(pde & L1_C_ADDR_MASK);
1852 ptep = (pt_entry_t *)kernel_pt_lookup(pa);
1855 panic("pmap_bootstrap: No L2 for va 0x%x, pa 0x%lx",
1856 (u_int)l1idx << L1_S_SHIFT, (long unsigned int)pa);
1860 * Fetch the associated L2 metadata structure.
1861 * Allocate a new one if necessary.
1863 if ((l2 = kernel_pmap->pm_l2[L2_IDX(l1idx)]) == NULL) {
1864 if (l2next == PMAP_STATIC_L2_SIZE)
1865 panic("pmap_bootstrap: out of static L2s");
1866 kernel_pmap->pm_l2[L2_IDX(l1idx)] = l2 =
1867 &static_l2[l2next++];
1871 * One more L1 slot tracked...
1876 * Fill in the details of the L2 descriptor in the
1877 * appropriate bucket.
1879 l2b = &l2->l2_bucket[L2_BUCKET(l1idx)];
1880 l2b->l2b_kva = ptep;
1882 l2b->l2b_l1idx = l1idx;
1885 * Establish an initial occupancy count for this descriptor
1888 l2idx < (L2_TABLE_SIZE_REAL / sizeof(pt_entry_t));
1890 if ((ptep[l2idx] & L2_TYPE_MASK) != L2_TYPE_INV) {
1891 l2b->l2b_occupancy++;
1896 * Make sure the descriptor itself has the correct cache mode.
1897 * If not, fix it, but whine about the problem. Port-meisters
1898 * should consider this a clue to fix up their initarm()
1901 if (pmap_set_pt_cache_mode(kernel_l1pt, (vm_offset_t)ptep)) {
1902 printf("pmap_bootstrap: WARNING! wrong cache mode for "
1903 "L2 pte @ %p\n", ptep);
1909 * Ensure the primary (kernel) L1 has the correct cache mode for
1910 * a page table. Bitch if it is not correctly set.
1912 for (va = (vm_offset_t)kernel_l1pt;
1913 va < ((vm_offset_t)kernel_l1pt + L1_TABLE_SIZE); va += PAGE_SIZE) {
1914 if (pmap_set_pt_cache_mode(kernel_l1pt, va))
1915 printf("pmap_bootstrap: WARNING! wrong cache mode for "
1916 "primary L1 @ 0x%x\n", va);
1919 cpu_dcache_wbinv_all();
1920 cpu_l2cache_wbinv_all();
1924 PMAP_LOCK_INIT(kernel_pmap);
1925 CPU_FILL(&kernel_pmap->pm_active);
1926 kernel_pmap->pm_domain = PMAP_DOMAIN_KERNEL;
1927 TAILQ_INIT(&kernel_pmap->pm_pvchunk);
1930 * Initialize the global pv list lock.
1932 rw_init(&pvh_global_lock, "pmap pv global");
1935 * Reserve some special page table entries/VA space for temporary
1936 * mapping of pages that are being copied or zeroed.
1938 for (czp = cpu_czpages, i = 0; i < MAXCPU; ++i, ++czp) {
1939 mtx_init(&czp->lock, "czpages", NULL, MTX_DEF);
1940 pmap_alloc_specials(&virtual_avail, 1, &czp->srcva, &czp->srcptep);
1941 pmap_set_pt_cache_mode(kernel_l1pt, (vm_offset_t)czp->srcptep);
1942 pmap_alloc_specials(&virtual_avail, 1, &czp->dstva, &czp->dstptep);
1943 pmap_set_pt_cache_mode(kernel_l1pt, (vm_offset_t)czp->dstptep);
1946 size = ((vm_max_kernel_address - pmap_curmaxkvaddr) + L1_S_OFFSET) /
1948 pmap_alloc_specials(&virtual_avail,
1949 round_page(size * L2_TABLE_SIZE_REAL) / PAGE_SIZE,
1950 &pmap_kernel_l2ptp_kva, NULL);
1952 size = (size + (L2_BUCKET_SIZE - 1)) / L2_BUCKET_SIZE;
1953 pmap_alloc_specials(&virtual_avail,
1954 round_page(size * sizeof(struct l2_dtable)) / PAGE_SIZE,
1955 &pmap_kernel_l2dtable_kva, NULL);
1957 pmap_alloc_specials(&virtual_avail,
1958 1, (vm_offset_t*)&_tmppt, NULL);
1959 pmap_alloc_specials(&virtual_avail,
1960 MAXDUMPPGS, (vm_offset_t *)&crashdumpmap, NULL);
1961 SLIST_INIT(&l1_list);
1962 TAILQ_INIT(&l1_lru_list);
1963 mtx_init(&l1_lru_lock, "l1 list lock", NULL, MTX_DEF);
1964 pmap_init_l1(l1, kernel_l1pt);
1965 cpu_dcache_wbinv_all();
1966 cpu_l2cache_wbinv_all();
1970 virtual_avail = round_page(virtual_avail);
1971 virtual_end = vm_max_kernel_address;
1972 kernel_vm_end = pmap_curmaxkvaddr;
1974 pmap_set_pcb_pagedir(kernel_pmap, thread0.td_pcb);
1977 /***************************************************
1978 * Pmap allocation/deallocation routines.
1979 ***************************************************/
1982 * Release any resources held by the given physical map.
1983 * Called when a pmap initialized by pmap_pinit is being released.
1984 * Should only be called if the map contains no valid mappings.
1987 pmap_release(pmap_t pmap)
1993 if (vector_page < KERNBASE) {
1994 struct pcb *curpcb = PCPU_GET(curpcb);
1995 pcb = thread0.td_pcb;
1996 if (pmap_is_current(pmap)) {
1998 * Frob the L1 entry corresponding to the vector
1999 * page so that it contains the kernel pmap's domain
2000 * number. This will ensure pmap_remove() does not
2001 * pull the current vector page out from under us.
2004 *pcb->pcb_pl1vec = pcb->pcb_l1vec;
2005 cpu_domains(pcb->pcb_dacr);
2006 cpu_setttb(pcb->pcb_pagedir);
2009 pmap_remove(pmap, vector_page, vector_page + PAGE_SIZE);
2011 * Make sure cpu_switch(), et al, DTRT. This is safe to do
2012 * since this process has no remaining mappings of its own.
2014 curpcb->pcb_pl1vec = pcb->pcb_pl1vec;
2015 curpcb->pcb_l1vec = pcb->pcb_l1vec;
2016 curpcb->pcb_dacr = pcb->pcb_dacr;
2017 curpcb->pcb_pagedir = pcb->pcb_pagedir;
2022 dprintf("pmap_release()\n");
2028 * Helper function for pmap_grow_l2_bucket()
2031 pmap_grow_map(vm_offset_t va, pt_entry_t cache_mode, vm_paddr_t *pap)
2033 struct l2_bucket *l2b;
2038 m = vm_page_alloc(NULL, 0, VM_ALLOC_NOOBJ | VM_ALLOC_WIRED);
2041 pa = VM_PAGE_TO_PHYS(m);
2046 l2b = pmap_get_l2_bucket(pmap_kernel(), va);
2048 ptep = &l2b->l2b_kva[l2pte_index(va)];
2049 *ptep = L2_S_PROTO | pa | cache_mode | L2_S_REF;
2050 pmap_set_prot(ptep, VM_PROT_READ | VM_PROT_WRITE, 0);
2052 cpu_tlb_flushD_SE(va);
2059 * This is the same as pmap_alloc_l2_bucket(), except that it is only
2060 * used by pmap_growkernel().
2062 static __inline struct l2_bucket *
2063 pmap_grow_l2_bucket(pmap_t pmap, vm_offset_t va)
2065 struct l2_dtable *l2;
2066 struct l2_bucket *l2b;
2067 struct l1_ttable *l1;
2074 if ((l2 = pmap->pm_l2[L2_IDX(l1idx)]) == NULL) {
2076 * No mapping at this address, as there is
2077 * no entry in the L1 table.
2078 * Need to allocate a new l2_dtable.
2080 nva = pmap_kernel_l2dtable_kva;
2081 if ((nva & PAGE_MASK) == 0) {
2083 * Need to allocate a backing page
2085 if (pmap_grow_map(nva, pte_l2_s_cache_mode, NULL))
2089 l2 = (struct l2_dtable *)nva;
2090 nva += sizeof(struct l2_dtable);
2092 if ((nva & PAGE_MASK) < (pmap_kernel_l2dtable_kva &
2095 * The new l2_dtable straddles a page boundary.
2096 * Map in another page to cover it.
2098 if (pmap_grow_map(nva, pte_l2_s_cache_mode, NULL))
2102 pmap_kernel_l2dtable_kva = nva;
2105 * Link it into the parent pmap
2107 pmap->pm_l2[L2_IDX(l1idx)] = l2;
2108 memset(l2, 0, sizeof(*l2));
2111 l2b = &l2->l2_bucket[L2_BUCKET(l1idx)];
2114 * Fetch pointer to the L2 page table associated with the address.
2116 if (l2b->l2b_kva == NULL) {
2120 * No L2 page table has been allocated. Chances are, this
2121 * is because we just allocated the l2_dtable, above.
2123 nva = pmap_kernel_l2ptp_kva;
2124 ptep = (pt_entry_t *)nva;
2125 if ((nva & PAGE_MASK) == 0) {
2127 * Need to allocate a backing page
2129 if (pmap_grow_map(nva, pte_l2_s_cache_mode_pt,
2130 &pmap_kernel_l2ptp_phys))
2133 memset(ptep, 0, L2_TABLE_SIZE_REAL);
2135 l2b->l2b_kva = ptep;
2136 l2b->l2b_l1idx = l1idx;
2137 l2b->l2b_phys = pmap_kernel_l2ptp_phys;
2139 pmap_kernel_l2ptp_kva += L2_TABLE_SIZE_REAL;
2140 pmap_kernel_l2ptp_phys += L2_TABLE_SIZE_REAL;
2143 /* Distribute new L1 entry to all other L1s */
2144 SLIST_FOREACH(l1, &l1_list, l1_link) {
2145 pl1pd = &l1->l1_kva[L1_IDX(va)];
2146 *pl1pd = l2b->l2b_phys | L1_C_DOM(PMAP_DOMAIN_KERNEL) |
2150 cpu_tlb_flushID_SE(va);
2158 * grow the number of kernel page table entries, if needed
2161 pmap_growkernel(vm_offset_t addr)
2163 pmap_t kpmap = pmap_kernel();
2165 if (addr <= pmap_curmaxkvaddr)
2166 return; /* we are OK */
2169 * whoops! we need to add kernel PTPs
2172 /* Map 1MB at a time */
2173 for (; pmap_curmaxkvaddr < addr; pmap_curmaxkvaddr += L1_S_SIZE)
2174 pmap_grow_l2_bucket(kpmap, pmap_curmaxkvaddr);
2176 kernel_vm_end = pmap_curmaxkvaddr;
2180 * Returns TRUE if the given page is mapped individually or as part of
2181 * a 1MB section. Otherwise, returns FALSE.
2184 pmap_page_is_mapped(vm_page_t m)
2188 if ((m->oflags & VPO_UNMANAGED) != 0)
2190 rw_wlock(&pvh_global_lock);
2191 rv = !TAILQ_EMPTY(&m->md.pv_list) ||
2192 ((m->flags & PG_FICTITIOUS) == 0 &&
2193 !TAILQ_EMPTY(&pa_to_pvh(VM_PAGE_TO_PHYS(m))->pv_list));
2194 rw_wunlock(&pvh_global_lock);
2199 * Remove all pages from specified address space
2200 * this aids process exit speeds. Also, this code
2201 * is special cased for current process only, but
2202 * can have the more generic (and slightly slower)
2203 * mode enabled. This is much faster than pmap_remove
2204 * in the case of running down an entire address space.
2207 pmap_remove_pages(pmap_t pmap)
2209 struct pv_entry *pv;
2210 struct l2_bucket *l2b = NULL;
2211 struct pv_chunk *pc, *npc;
2212 struct md_page *pvh;
2213 pd_entry_t *pl1pd, l1pd;
2217 uint32_t inuse, bitmask;
2218 int allfree, bit, field, idx;
2220 rw_wlock(&pvh_global_lock);
2223 TAILQ_FOREACH_SAFE(pc, &pmap->pm_pvchunk, pc_list, npc) {
2225 for (field = 0; field < _NPCM; field++) {
2226 inuse = ~pc->pc_map[field] & pc_freemask[field];
2227 while (inuse != 0) {
2228 bit = ffs(inuse) - 1;
2229 bitmask = 1ul << bit;
2230 idx = field * sizeof(inuse) * NBBY + bit;
2231 pv = &pc->pc_pventry[idx];
2234 if (pv->pv_flags & PVF_WIRED) {
2235 /* Cannot remove wired pages now. */
2239 pl1pd = &pmap->pm_l1->l1_kva[L1_IDX(va)];
2241 l2b = pmap_get_l2_bucket(pmap, va);
2242 if ((l1pd & L1_TYPE_MASK) == L1_S_PROTO) {
2243 pvh = pa_to_pvh(l1pd & L1_S_FRAME);
2244 TAILQ_REMOVE(&pvh->pv_list, pv, pv_list);
2245 if (TAILQ_EMPTY(&pvh->pv_list)) {
2246 m = PHYS_TO_VM_PAGE(l1pd & L1_S_FRAME);
2247 KASSERT((vm_offset_t)m >= KERNBASE,
2248 ("Trying to access non-existent page "
2249 "va %x l1pd %x", trunc_1mpage(va), l1pd));
2250 for (mt = m; mt < &m[L2_PTE_NUM_TOTAL]; mt++) {
2251 if (TAILQ_EMPTY(&mt->md.pv_list))
2252 vm_page_aflag_clear(mt, PGA_WRITEABLE);
2256 KASSERT(l2b->l2b_occupancy == L2_PTE_NUM_TOTAL,
2257 ("pmap_remove_pages: l2_bucket occupancy error"));
2258 pmap_free_l2_bucket(pmap, l2b, L2_PTE_NUM_TOTAL);
2260 pmap->pm_stats.resident_count -= L2_PTE_NUM_TOTAL;
2264 KASSERT(l2b != NULL,
2265 ("No L2 bucket in pmap_remove_pages"));
2266 ptep = &l2b->l2b_kva[l2pte_index(va)];
2267 m = PHYS_TO_VM_PAGE(l2pte_pa(*ptep));
2268 KASSERT((vm_offset_t)m >= KERNBASE,
2269 ("Trying to access non-existent page "
2270 "va %x pte %x", va, *ptep));
2271 TAILQ_REMOVE(&m->md.pv_list, pv, pv_list);
2272 if (TAILQ_EMPTY(&m->md.pv_list) &&
2273 (m->flags & PG_FICTITIOUS) == 0) {
2274 pvh = pa_to_pvh(l2pte_pa(*ptep));
2275 if (TAILQ_EMPTY(&pvh->pv_list))
2276 vm_page_aflag_clear(m, PGA_WRITEABLE);
2280 pmap_free_l2_bucket(pmap, l2b, 1);
2281 pmap->pm_stats.resident_count--;
2285 PV_STAT(pv_entry_frees++);
2286 PV_STAT(pv_entry_spare++);
2288 pc->pc_map[field] |= bitmask;
2292 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
2293 pmap_free_pv_chunk(pc);
2298 rw_wunlock(&pvh_global_lock);
2305 /***************************************************
2306 * Low level mapping routines.....
2307 ***************************************************/
2309 #ifdef ARM_HAVE_SUPERSECTIONS
2310 /* Map a super section into the KVA. */
2313 pmap_kenter_supersection(vm_offset_t va, uint64_t pa, int flags)
2315 pd_entry_t pd = L1_S_PROTO | L1_S_SUPERSEC | (pa & L1_SUP_FRAME) |
2316 (((pa >> 32) & 0xf) << 20) | L1_S_PROT(PTE_KERNEL,
2317 VM_PROT_READ|VM_PROT_WRITE|VM_PROT_EXECUTE) |
2318 L1_S_DOM(PMAP_DOMAIN_KERNEL);
2319 struct l1_ttable *l1;
2320 vm_offset_t va0, va_end;
2322 KASSERT(((va | pa) & L1_SUP_OFFSET) == 0,
2323 ("Not a valid super section mapping"));
2324 if (flags & SECTION_CACHE)
2325 pd |= pte_l1_s_cache_mode;
2326 else if (flags & SECTION_PT)
2327 pd |= pte_l1_s_cache_mode_pt;
2329 va0 = va & L1_SUP_FRAME;
2330 va_end = va + L1_SUP_SIZE;
2331 SLIST_FOREACH(l1, &l1_list, l1_link) {
2333 for (; va < va_end; va += L1_S_SIZE) {
2334 l1->l1_kva[L1_IDX(va)] = pd;
2335 PTE_SYNC(&l1->l1_kva[L1_IDX(va)]);
2341 /* Map a section into the KVA. */
2344 pmap_kenter_section(vm_offset_t va, vm_offset_t pa, int flags)
2346 pd_entry_t pd = L1_S_PROTO | pa | L1_S_PROT(PTE_KERNEL,
2347 VM_PROT_READ|VM_PROT_WRITE|VM_PROT_EXECUTE) | L1_S_REF |
2348 L1_S_DOM(PMAP_DOMAIN_KERNEL);
2349 struct l1_ttable *l1;
2351 KASSERT(((va | pa) & L1_S_OFFSET) == 0,
2352 ("Not a valid section mapping"));
2353 if (flags & SECTION_CACHE)
2354 pd |= pte_l1_s_cache_mode;
2355 else if (flags & SECTION_PT)
2356 pd |= pte_l1_s_cache_mode_pt;
2358 SLIST_FOREACH(l1, &l1_list, l1_link) {
2359 l1->l1_kva[L1_IDX(va)] = pd;
2360 PTE_SYNC(&l1->l1_kva[L1_IDX(va)]);
2362 cpu_tlb_flushID_SE(va);
2367 * Make a temporary mapping for a physical address. This is only intended
2368 * to be used for panic dumps.
2371 pmap_kenter_temp(vm_paddr_t pa, int i)
2375 va = (vm_offset_t)crashdumpmap + (i * PAGE_SIZE);
2376 pmap_kenter(va, pa);
2377 return ((void *)crashdumpmap);
2381 * add a wired page to the kva
2382 * note that in order for the mapping to take effect -- you
2383 * should do a invltlb after doing the pmap_kenter...
2385 static PMAP_INLINE void
2386 pmap_kenter_internal(vm_offset_t va, vm_offset_t pa, int flags)
2388 struct l2_bucket *l2b;
2392 PDEBUG(1, printf("pmap_kenter: va = %08x, pa = %08x\n",
2393 (uint32_t) va, (uint32_t) pa));
2396 l2b = pmap_get_l2_bucket(pmap_kernel(), va);
2398 l2b = pmap_grow_l2_bucket(pmap_kernel(), va);
2399 KASSERT(l2b != NULL, ("No L2 Bucket"));
2401 ptep = &l2b->l2b_kva[l2pte_index(va)];
2404 if (flags & KENTER_CACHE) {
2405 *ptep = L2_S_PROTO | pa | pte_l2_s_cache_mode | L2_S_REF;
2406 pmap_set_prot(ptep, VM_PROT_READ | VM_PROT_WRITE,
2407 flags & KENTER_USER);
2409 *ptep = L2_S_PROTO | pa | L2_S_REF;
2410 pmap_set_prot(ptep, VM_PROT_READ|VM_PROT_WRITE|VM_PROT_EXECUTE,
2415 if (l2pte_valid(opte)) {
2416 if (L2_S_EXECUTABLE(opte) || L2_S_EXECUTABLE(*ptep))
2417 cpu_tlb_flushID_SE(va);
2419 cpu_tlb_flushD_SE(va);
2422 l2b->l2b_occupancy++;
2426 PDEBUG(1, printf("pmap_kenter: pte = %08x, opte = %08x, npte = %08x\n",
2427 (uint32_t) ptep, opte, *ptep));
2431 pmap_kenter(vm_offset_t va, vm_paddr_t pa)
2433 pmap_kenter_internal(va, pa, KENTER_CACHE);
2437 pmap_kenter_nocache(vm_offset_t va, vm_paddr_t pa)
2440 pmap_kenter_internal(va, pa, 0);
2444 pmap_kenter_device(vm_offset_t va, vm_paddr_t pa)
2448 * XXX - Need a way for kenter_internal to handle PTE_DEVICE mapping as
2449 * a potentially different thing than PTE_NOCACHE.
2451 pmap_kenter_internal(va, pa, 0);
2455 pmap_kenter_user(vm_offset_t va, vm_paddr_t pa)
2458 pmap_kenter_internal(va, pa, KENTER_CACHE|KENTER_USER);
2460 * Call pmap_fault_fixup now, to make sure we'll have no exception
2461 * at the first use of the new address, or bad things will happen,
2462 * as we use one of these addresses in the exception handlers.
2464 pmap_fault_fixup(pmap_kernel(), va, VM_PROT_READ|VM_PROT_WRITE, 1);
2468 pmap_kextract(vm_offset_t va)
2471 if (kernel_vm_end == 0)
2473 return (pmap_extract_locked(kernel_pmap, va));
2477 * remove a page from the kernel pagetables
2480 pmap_kremove(vm_offset_t va)
2482 struct l2_bucket *l2b;
2483 pt_entry_t *ptep, opte;
2485 l2b = pmap_get_l2_bucket(pmap_kernel(), va);
2488 KASSERT(l2b != NULL, ("No L2 Bucket"));
2489 ptep = &l2b->l2b_kva[l2pte_index(va)];
2491 if (l2pte_valid(opte)) {
2492 va = va & ~PAGE_MASK;
2495 if (L2_S_EXECUTABLE(opte))
2496 cpu_tlb_flushID_SE(va);
2498 cpu_tlb_flushD_SE(va);
2505 * Used to map a range of physical addresses into kernel
2506 * virtual address space.
2508 * The value passed in '*virt' is a suggested virtual address for
2509 * the mapping. Architectures which can support a direct-mapped
2510 * physical to virtual region can return the appropriate address
2511 * within that region, leaving '*virt' unchanged. Other
2512 * architectures should map the pages starting at '*virt' and
2513 * update '*virt' with the first usable address after the mapped
2517 pmap_map(vm_offset_t *virt, vm_offset_t start, vm_offset_t end, int prot)
2519 vm_offset_t sva = *virt;
2520 vm_offset_t va = sva;
2522 PDEBUG(1, printf("pmap_map: virt = %08x, start = %08x, end = %08x, "
2523 "prot = %d\n", (uint32_t) *virt, (uint32_t) start, (uint32_t) end,
2526 while (start < end) {
2527 pmap_kenter(va, start);
2536 * Add a list of wired pages to the kva
2537 * this routine is only used for temporary
2538 * kernel mappings that do not need to have
2539 * page modification or references recorded.
2540 * Note that old mappings are simply written
2541 * over. The page *must* be wired.
2544 pmap_qenter(vm_offset_t va, vm_page_t *m, int count)
2548 for (i = 0; i < count; i++) {
2549 pmap_kenter_internal(va, VM_PAGE_TO_PHYS(m[i]),
2557 * this routine jerks page mappings from the
2558 * kernel -- it is meant only for temporary mappings.
2561 pmap_qremove(vm_offset_t va, int count)
2565 for (i = 0; i < count; i++) {
2575 * pmap_object_init_pt preloads the ptes for a given object
2576 * into the specified pmap. This eliminates the blast of soft
2577 * faults on process startup and immediately after an mmap.
2580 pmap_object_init_pt(pmap_t pmap, vm_offset_t addr, vm_object_t object,
2581 vm_pindex_t pindex, vm_size_t size)
2584 VM_OBJECT_ASSERT_WLOCKED(object);
2585 KASSERT(object->type == OBJT_DEVICE || object->type == OBJT_SG,
2586 ("pmap_object_init_pt: non-device object"));
2591 * pmap_is_prefaultable:
2593 * Return whether or not the specified virtual address is elgible
2597 pmap_is_prefaultable(pmap_t pmap, vm_offset_t addr)
2602 if (!pmap_get_pde_pte(pmap, addr, &pdep, &ptep))
2604 KASSERT((pdep != NULL && (l1pte_section_p(*pdep) || ptep != NULL)),
2605 ("Valid mapping but no pte ?"));
2606 if (*pdep != 0 && !l1pte_section_p(*pdep))
2613 * Fetch pointers to the PDE/PTE for the given pmap/VA pair.
2614 * Returns TRUE if the mapping exists, else FALSE.
2616 * NOTE: This function is only used by a couple of arm-specific modules.
2617 * It is not safe to take any pmap locks here, since we could be right
2618 * in the middle of debugging the pmap anyway...
2620 * It is possible for this routine to return FALSE even though a valid
2621 * mapping does exist. This is because we don't lock, so the metadata
2622 * state may be inconsistent.
2624 * NOTE: We can return a NULL *ptp in the case where the L1 pde is
2625 * a "section" mapping.
2628 pmap_get_pde_pte(pmap_t pmap, vm_offset_t va, pd_entry_t **pdp,
2631 struct l2_dtable *l2;
2632 pd_entry_t *pl1pd, l1pd;
2636 if (pmap->pm_l1 == NULL)
2640 *pdp = pl1pd = &pmap->pm_l1->l1_kva[l1idx];
2643 if (l1pte_section_p(l1pd)) {
2648 if (pmap->pm_l2 == NULL)
2651 l2 = pmap->pm_l2[L2_IDX(l1idx)];
2654 (ptep = l2->l2_bucket[L2_BUCKET(l1idx)].l2b_kva) == NULL) {
2658 *ptp = &ptep[l2pte_index(va)];
2663 * Routine: pmap_remove_all
2665 * Removes this physical page from
2666 * all physical maps in which it resides.
2667 * Reflects back modify bits to the pager.
2670 * Original versions of this routine were very
2671 * inefficient because they iteratively called
2672 * pmap_remove (slow...)
2675 pmap_remove_all(vm_page_t m)
2677 struct md_page *pvh;
2681 struct l2_bucket *l2b;
2682 boolean_t flush = FALSE;
2686 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
2687 ("pmap_remove_all: page %p is not managed", m));
2688 rw_wlock(&pvh_global_lock);
2689 if ((m->flags & PG_FICTITIOUS) != 0)
2690 goto small_mappings;
2691 pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m));
2692 while ((pv = TAILQ_FIRST(&pvh->pv_list)) != NULL) {
2696 pl1pd = &pmap->pm_l1->l1_kva[L1_IDX(pv->pv_va)];
2697 KASSERT((*pl1pd & L1_TYPE_MASK) == L1_S_PROTO,
2698 ("pmap_remove_all: valid section mapping expected"));
2699 (void)pmap_demote_section(pmap, pv->pv_va);
2703 curpmap = vmspace_pmap(curproc->p_vmspace);
2704 while ((pv = TAILQ_FIRST(&m->md.pv_list)) != NULL) {
2706 if (flush == FALSE && (pmap == curpmap ||
2707 pmap == pmap_kernel()))
2711 l2b = pmap_get_l2_bucket(pmap, pv->pv_va);
2712 KASSERT(l2b != NULL, ("No l2 bucket"));
2713 ptep = &l2b->l2b_kva[l2pte_index(pv->pv_va)];
2714 is_exec |= PTE_BEEN_EXECD(*ptep);
2716 if (pmap_is_current(pmap))
2718 pmap_free_l2_bucket(pmap, l2b, 1);
2719 pmap->pm_stats.resident_count--;
2720 TAILQ_REMOVE(&m->md.pv_list, pv, pv_list);
2721 if (pv->pv_flags & PVF_WIRED)
2722 pmap->pm_stats.wired_count--;
2723 pmap_free_pv_entry(pmap, pv);
2734 vm_page_aflag_clear(m, PGA_WRITEABLE);
2735 rw_wunlock(&pvh_global_lock);
2739 pmap_change_attr(vm_offset_t sva, vm_size_t len, int mode)
2741 vm_offset_t base, offset, tmpva;
2743 struct l2_bucket *l2b;
2744 pt_entry_t *ptep, pte;
2745 vm_offset_t next_bucket;
2747 PMAP_LOCK(kernel_pmap);
2749 base = trunc_page(sva);
2750 offset = sva & PAGE_MASK;
2751 size = roundup(offset + len, PAGE_SIZE);
2755 * Only supported on kernel virtual addresses, including the direct
2756 * map but excluding the recursive map.
2758 if (base < DMAP_MIN_ADDRESS) {
2759 PMAP_UNLOCK(kernel_pmap);
2763 for (tmpva = base; tmpva < base + size; ) {
2764 next_bucket = L2_NEXT_BUCKET(tmpva);
2765 if (next_bucket > base + size)
2766 next_bucket = base + size;
2768 l2b = pmap_get_l2_bucket(kernel_pmap, tmpva);
2770 tmpva = next_bucket;
2774 ptep = &l2b->l2b_kva[l2pte_index(tmpva)];
2777 PMAP_UNLOCK(kernel_pmap);
2781 pte = *ptep &~ L2_S_CACHE_MASK;
2782 cpu_idcache_wbinv_range(tmpva, PAGE_SIZE);
2783 pmap_l2cache_wbinv_range(tmpva, pte & L2_S_FRAME, PAGE_SIZE);
2785 cpu_tlb_flushID_SE(tmpva);
2788 dprintf("%s: for va:%x ptep:%x pte:%x\n",
2789 __func__, tmpva, (uint32_t)ptep, pte);
2793 PMAP_UNLOCK(kernel_pmap);
2799 * Set the physical protection on the
2800 * specified range of this map as requested.
2803 pmap_protect(pmap_t pmap, vm_offset_t sva, vm_offset_t eva, vm_prot_t prot)
2805 struct l2_bucket *l2b;
2806 struct md_page *pvh;
2807 struct pv_entry *pve;
2808 pd_entry_t *pl1pd, l1pd;
2809 pt_entry_t *ptep, pte;
2810 vm_offset_t next_bucket;
2811 u_int is_exec, is_refd;
2814 if ((prot & VM_PROT_READ) == 0) {
2815 pmap_remove(pmap, sva, eva);
2819 if (prot & VM_PROT_WRITE) {
2821 * If this is a read->write transition, just ignore it and let
2822 * vm_fault() take care of it later.
2827 rw_wlock(&pvh_global_lock);
2831 * OK, at this point, we know we're doing write-protect operation.
2832 * If the pmap is active, write-back the range.
2835 flush = ((eva - sva) >= (PAGE_SIZE * 4)) ? 0 : -1;
2836 is_exec = is_refd = 0;
2839 next_bucket = L2_NEXT_BUCKET(sva);
2841 * Check for large page.
2843 pl1pd = &pmap->pm_l1->l1_kva[L1_IDX(sva)];
2845 if ((l1pd & L1_TYPE_MASK) == L1_S_PROTO) {
2846 KASSERT(pmap != pmap_kernel(),
2847 ("pmap_protect: trying to modify "
2848 "kernel section protections"));
2850 * Are we protecting the entire large page? If not,
2851 * demote the mapping and fall through.
2853 if (sva + L1_S_SIZE == L2_NEXT_BUCKET(sva) &&
2854 eva >= L2_NEXT_BUCKET(sva)) {
2855 l1pd &= ~(L1_S_PROT_MASK | L1_S_XN);
2856 if (!(prot & VM_PROT_EXECUTE))
2859 * At this point we are always setting
2860 * write-protect bit.
2863 /* All managed superpages are user pages. */
2864 l1pd |= L1_S_PROT_U;
2867 pvh = pa_to_pvh(l1pd & L1_S_FRAME);
2868 pve = pmap_find_pv(pvh, pmap,
2870 pve->pv_flags &= ~PVF_WRITE;
2873 } else if (!pmap_demote_section(pmap, sva)) {
2874 /* The large page mapping was destroyed. */
2879 if (next_bucket > eva)
2881 l2b = pmap_get_l2_bucket(pmap, sva);
2887 ptep = &l2b->l2b_kva[l2pte_index(sva)];
2889 while (sva < next_bucket) {
2890 if ((pte = *ptep) != 0 && L2_S_WRITABLE(pte)) {
2893 m = PHYS_TO_VM_PAGE(l2pte_pa(pte));
2894 pmap_set_prot(ptep, prot,
2895 !(pmap == pmap_kernel()));
2898 pmap_modify_pv(m, pmap, sva, PVF_WRITE, 0);
2902 is_exec |= PTE_BEEN_EXECD(pte);
2903 is_refd |= PTE_BEEN_REFD(pte);
2905 if (PTE_BEEN_EXECD(pte))
2906 cpu_tlb_flushID_SE(sva);
2907 else if (PTE_BEEN_REFD(pte))
2908 cpu_tlb_flushD_SE(sva);
2926 rw_wunlock(&pvh_global_lock);
2933 * Insert the given physical page (p) at
2934 * the specified virtual address (v) in the
2935 * target physical map with the protection requested.
2937 * If specified, the page will be wired down, meaning
2938 * that the related pte can not be reclaimed.
2940 * NB: This is the only routine which MAY NOT lazy-evaluate
2941 * or lose information. That is, this routine must actually
2942 * insert this page into the given map NOW.
2946 pmap_enter(pmap_t pmap, vm_offset_t va, vm_prot_t access, vm_page_t m,
2947 vm_prot_t prot, boolean_t wired)
2949 struct l2_bucket *l2b;
2951 rw_wlock(&pvh_global_lock);
2953 pmap_enter_locked(pmap, va, access, m, prot, wired, M_WAITOK);
2955 * If both the l2b_occupancy and the reservation are fully
2956 * populated, then attempt promotion.
2958 l2b = pmap_get_l2_bucket(pmap, va);
2959 if ((l2b != NULL) && (l2b->l2b_occupancy == L2_PTE_NUM_TOTAL) &&
2960 sp_enabled && (m->flags & PG_FICTITIOUS) == 0 &&
2961 vm_reserv_level_iffullpop(m) == 0)
2962 pmap_promote_section(pmap, va);
2965 rw_wunlock(&pvh_global_lock);
2969 * The pvh global and pmap locks must be held.
2972 pmap_enter_locked(pmap_t pmap, vm_offset_t va, vm_prot_t access, vm_page_t m,
2973 vm_prot_t prot, boolean_t wired, int flags)
2975 struct l2_bucket *l2b = NULL;
2977 struct pv_entry *pve = NULL;
2978 pd_entry_t *pl1pd, l1pd;
2979 pt_entry_t *ptep, npte, opte;
2981 u_int is_exec, is_refd;
2985 PMAP_ASSERT_LOCKED(pmap);
2986 rw_assert(&pvh_global_lock, RA_WLOCKED);
2987 if (va == vector_page) {
2988 pa = systempage.pv_pa;
2991 KASSERT((m->oflags & VPO_UNMANAGED) != 0 ||
2992 vm_page_xbusied(m) || (flags & M_NOWAIT) != 0,
2993 ("pmap_enter_locked: page %p is not busy", m));
2994 pa = VM_PAGE_TO_PHYS(m);
2997 pl1pd = &pmap->pm_l1->l1_kva[L1_IDX(va)];
2998 if ((va < VM_MAXUSER_ADDRESS) &&
2999 (*pl1pd & L1_TYPE_MASK) == L1_S_PROTO) {
3000 (void)pmap_demote_section(pmap, va);
3005 * Make sure userland mappings get the right permissions
3007 if (pmap != pmap_kernel() && va != vector_page)
3012 if (prot & VM_PROT_WRITE)
3013 nflags |= PVF_WRITE;
3015 nflags |= PVF_WIRED;
3017 PDEBUG(1, printf("pmap_enter: pmap = %08x, va = %08x, m = %08x, "
3018 "prot = %x, wired = %x\n", (uint32_t) pmap, va, (uint32_t) m,
3021 if (pmap == pmap_kernel()) {
3022 l2b = pmap_get_l2_bucket(pmap, va);
3024 l2b = pmap_grow_l2_bucket(pmap, va);
3027 l2b = pmap_alloc_l2_bucket(pmap, va);
3029 if (flags & M_WAITOK) {
3031 rw_wunlock(&pvh_global_lock);
3033 rw_wlock(&pvh_global_lock);
3041 pl1pd = &pmap->pm_l1->l1_kva[L1_IDX(va)];
3042 if ((*pl1pd & L1_TYPE_MASK) == L1_S_PROTO)
3043 panic("pmap_enter: attempt to enter on 1MB page, va: %#x", va);
3045 ptep = &l2b->l2b_kva[l2pte_index(va)];
3049 is_exec = is_refd = 0;
3052 if (l2pte_pa(opte) == pa) {
3054 * We're changing the attrs of an existing mapping.
3057 pmap_modify_pv(m, pmap, va,
3058 PVF_WRITE | PVF_WIRED, nflags);
3059 is_exec |= PTE_BEEN_EXECD(opte);
3060 is_refd |= PTE_BEEN_REFD(opte);
3063 if ((om = PHYS_TO_VM_PAGE(l2pte_pa(opte)))) {
3065 * Replacing an existing mapping with a new one.
3066 * It is part of our managed memory so we
3067 * must remove it from the PV list
3069 if ((pve = pmap_remove_pv(om, pmap, va))) {
3070 is_exec |= PTE_BEEN_EXECD(opte);
3071 is_refd |= PTE_BEEN_REFD(opte);
3073 if (m && ((m->oflags & VPO_UNMANAGED)))
3074 pmap_free_pv_entry(pmap, pve);
3080 * Keep the stats up to date
3082 l2b->l2b_occupancy++;
3083 pmap->pm_stats.resident_count++;
3087 * Enter on the PV list if part of our managed memory.
3089 if ((m && !(m->oflags & VPO_UNMANAGED))) {
3090 if ((!pve) && (pve = pmap_get_pv_entry(pmap, FALSE)) == NULL)
3091 panic("pmap_enter: no pv entries");
3093 KASSERT(va < kmi.clean_sva || va >= kmi.clean_eva,
3094 ("pmap_enter: managed mapping within the clean submap"));
3095 KASSERT(pve != NULL, ("No pv"));
3096 pmap_enter_pv(m, pve, pmap, va, nflags);
3100 /* Make the new PTE valid */
3105 /* Set defaults first - kernel read access */
3107 npte |= L2_S_PROT_R;
3108 /* Set "referenced" flag */
3111 /* Now tune APs as desired */
3113 npte |= L2_S_PROT_U;
3115 * If this is not a vector_page
3116 * then continue setting mapping parameters
3119 if ((m->oflags & VPO_UNMANAGED) == 0) {
3120 if (prot & (VM_PROT_ALL)) {
3121 vm_page_aflag_set(m, PGA_REFERENCED);
3124 * Need to do page referenced emulation.
3130 if (prot & VM_PROT_WRITE) {
3131 if ((m->oflags & VPO_UNMANAGED) == 0) {
3132 vm_page_aflag_set(m, PGA_WRITEABLE);
3134 * XXX: Skip modified bit emulation for now.
3135 * The emulation reveals problems
3136 * that result in random failures
3137 * during memory allocation on some
3139 * Therefore, the page is marked RW
3147 if (!(prot & VM_PROT_EXECUTE))
3150 if (m->md.pv_memattr != VM_MEMATTR_UNCACHEABLE)
3151 npte |= pte_l2_s_cache_mode;
3154 CTR5(KTR_PMAP,"enter: pmap:%p va:%x prot:%x pte:%x->%x",
3155 pmap, va, prot, opte, npte);
3157 * If this is just a wiring change, the two PTEs will be
3158 * identical, so there's no need to update the page table.
3161 boolean_t is_cached = pmap_is_current(pmap);
3167 * We only need to frob the cache/tlb if this pmap
3170 if (L1_IDX(va) != L1_IDX(vector_page) &&
3171 l2pte_valid(npte)) {
3173 * This mapping is likely to be accessed as
3174 * soon as we return to userland. Fix up the
3175 * L1 entry to avoid taking another
3176 * page/domain fault.
3178 l1pd = l2b->l2b_phys |
3179 L1_C_DOM(pmap->pm_domain) | L1_C_PROTO;
3180 if (*pl1pd != l1pd) {
3188 cpu_tlb_flushID_SE(va);
3190 cpu_tlb_flushD_SE(va);
3194 if ((pmap != pmap_kernel()) && (pmap == &curproc->p_vmspace->vm_pmap))
3195 cpu_icache_sync_range(va, PAGE_SIZE);
3199 * Maps a sequence of resident pages belonging to the same object.
3200 * The sequence begins with the given page m_start. This page is
3201 * mapped at the given virtual address start. Each subsequent page is
3202 * mapped at a virtual address that is offset from start by the same
3203 * amount as the page is offset from m_start within the object. The
3204 * last page in the sequence is the page with the largest offset from
3205 * m_start that can be mapped at a virtual address less than the given
3206 * virtual address end. Not every virtual page between start and end
3207 * is mapped; only those for which a resident page exists with the
3208 * corresponding offset from m_start are mapped.
3211 pmap_enter_object(pmap_t pmap, vm_offset_t start, vm_offset_t end,
3212 vm_page_t m_start, vm_prot_t prot)
3216 vm_pindex_t diff, psize;
3219 VM_OBJECT_ASSERT_LOCKED(m_start->object);
3221 psize = atop(end - start);
3223 access = prot = prot & (VM_PROT_READ | VM_PROT_EXECUTE);
3224 rw_wlock(&pvh_global_lock);
3226 while (m != NULL && (diff = m->pindex - m_start->pindex) < psize) {
3227 va = start + ptoa(diff);
3228 if ((va & L1_S_OFFSET) == 0 && L2_NEXT_BUCKET(va) <= end &&
3229 (VM_PAGE_TO_PHYS(m) & L1_S_OFFSET) == 0 &&
3230 sp_enabled && vm_reserv_level_iffullpop(m) == 0 &&
3231 pmap_enter_section(pmap, va, m, prot))
3232 m = &m[L1_S_SIZE / PAGE_SIZE - 1];
3234 pmap_enter_locked(pmap, va, access, m, prot,
3236 m = TAILQ_NEXT(m, listq);
3239 rw_wunlock(&pvh_global_lock);
3243 * this code makes some *MAJOR* assumptions:
3244 * 1. Current pmap & pmap exists.
3247 * 4. No page table pages.
3248 * but is *MUCH* faster than pmap_enter...
3252 pmap_enter_quick(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot)
3256 access = prot = prot & (VM_PROT_READ | VM_PROT_EXECUTE);
3257 rw_wlock(&pvh_global_lock);
3259 pmap_enter_locked(pmap, va, access, m, prot, FALSE, M_NOWAIT);
3261 rw_wunlock(&pvh_global_lock);
3265 * Routine: pmap_change_wiring
3266 * Function: Change the wiring attribute for a map/virtual-address
3268 * In/out conditions:
3269 * The mapping must already exist in the pmap.
3272 pmap_change_wiring(pmap_t pmap, vm_offset_t va, boolean_t wired)
3274 struct l2_bucket *l2b;
3275 struct md_page *pvh;
3276 struct pv_entry *pve;
3277 pd_entry_t *pl1pd, l1pd;
3278 pt_entry_t *ptep, pte;
3281 rw_wlock(&pvh_global_lock);
3283 pl1pd = &pmap->pm_l1->l1_kva[L1_IDX(va)];
3285 if ((l1pd & L1_TYPE_MASK) == L1_S_PROTO) {
3286 m = PHYS_TO_VM_PAGE(l1pd & L1_S_FRAME);
3287 KASSERT((m != NULL) && ((m->oflags & VPO_UNMANAGED) == 0),
3288 ("pmap_change_wiring: unmanaged superpage should not "
3290 KASSERT(pmap != pmap_kernel(),
3291 ("pmap_change_wiring: managed kernel superpage "
3292 "should not exist"));
3293 pvh = pa_to_pvh(l1pd & L1_S_FRAME);
3294 pve = pmap_find_pv(pvh, pmap, trunc_1mpage(va));
3295 if (!wired != ((pve->pv_flags & PVF_WIRED) == 0)) {
3296 if (!pmap_demote_section(pmap, va))
3297 panic("pmap_change_wiring: demotion failed");
3301 l2b = pmap_get_l2_bucket(pmap, va);
3302 KASSERT(l2b, ("No l2b bucket in pmap_change_wiring"));
3303 ptep = &l2b->l2b_kva[l2pte_index(va)];
3305 m = PHYS_TO_VM_PAGE(l2pte_pa(pte));
3307 pmap_modify_pv(m, pmap, va, PVF_WIRED,
3308 wired == TRUE ? PVF_WIRED : 0);
3310 rw_wunlock(&pvh_global_lock);
3316 * Copy the range specified by src_addr/len
3317 * from the source map to the range dst_addr/len
3318 * in the destination map.
3320 * This routine is only advisory and need not do anything.
3323 pmap_copy(pmap_t dst_pmap, pmap_t src_pmap, vm_offset_t dst_addr,
3324 vm_size_t len, vm_offset_t src_addr)
3330 * Routine: pmap_extract
3332 * Extract the physical page address associated
3333 * with the given map/virtual_address pair.
3336 pmap_extract(pmap_t pmap, vm_offset_t va)
3340 if (kernel_vm_end != 0)
3342 pa = pmap_extract_locked(pmap, va);
3343 if (kernel_vm_end != 0)
3349 pmap_extract_locked(pmap_t pmap, vm_offset_t va)
3351 struct l2_dtable *l2;
3353 pt_entry_t *ptep, pte;
3357 if (kernel_vm_end != 0 && pmap != kernel_pmap)
3358 PMAP_ASSERT_LOCKED(pmap);
3360 l1pd = pmap->pm_l1->l1_kva[l1idx];
3361 if (l1pte_section_p(l1pd)) {
3362 /* XXX: what to do about the bits > 32 ? */
3363 if (l1pd & L1_S_SUPERSEC)
3364 pa = (l1pd & L1_SUP_FRAME) | (va & L1_SUP_OFFSET);
3366 pa = (l1pd & L1_S_FRAME) | (va & L1_S_OFFSET);
3369 * Note that we can't rely on the validity of the L1
3370 * descriptor as an indication that a mapping exists.
3371 * We have to look it up in the L2 dtable.
3373 l2 = pmap->pm_l2[L2_IDX(l1idx)];
3375 (ptep = l2->l2_bucket[L2_BUCKET(l1idx)].l2b_kva) == NULL)
3377 pte = ptep[l2pte_index(va)];
3380 switch (pte & L2_TYPE_MASK) {
3382 pa = (pte & L2_L_FRAME) | (va & L2_L_OFFSET);
3385 pa = (pte & L2_S_FRAME) | (va & L2_S_OFFSET);
3393 * Atomically extract and hold the physical page with the given
3394 * pmap and virtual address pair if that mapping permits the given
3399 pmap_extract_and_hold(pmap_t pmap, vm_offset_t va, vm_prot_t prot)
3401 struct l2_dtable *l2;
3403 pt_entry_t *ptep, pte;
3404 vm_paddr_t pa, paddr;
3412 l1pd = pmap->pm_l1->l1_kva[l1idx];
3413 if (l1pte_section_p(l1pd)) {
3414 /* XXX: what to do about the bits > 32 ? */
3415 if (l1pd & L1_S_SUPERSEC)
3416 pa = (l1pd & L1_SUP_FRAME) | (va & L1_SUP_OFFSET);
3418 pa = (l1pd & L1_S_FRAME) | (va & L1_S_OFFSET);
3419 if (vm_page_pa_tryrelock(pmap, pa & PG_FRAME, &paddr))
3421 if (L1_S_WRITABLE(l1pd) || (prot & VM_PROT_WRITE) == 0) {
3422 m = PHYS_TO_VM_PAGE(pa);
3427 * Note that we can't rely on the validity of the L1
3428 * descriptor as an indication that a mapping exists.
3429 * We have to look it up in the L2 dtable.
3431 l2 = pmap->pm_l2[L2_IDX(l1idx)];
3434 (ptep = l2->l2_bucket[L2_BUCKET(l1idx)].l2b_kva) == NULL) {
3439 ptep = &ptep[l2pte_index(va)];
3445 } else if ((prot & VM_PROT_WRITE) && (pte & L2_APX)) {
3449 switch (pte & L2_TYPE_MASK) {
3451 panic("extract and hold section mapping");
3454 pa = (pte & L2_S_FRAME) | (va & L2_S_OFFSET);
3457 if (vm_page_pa_tryrelock(pmap, pa & PG_FRAME, &paddr))
3459 m = PHYS_TO_VM_PAGE(pa);
3466 PA_UNLOCK_COND(paddr);
3471 * Initialize a preallocated and zeroed pmap structure,
3472 * such as one in a vmspace structure.
3476 pmap_pinit(pmap_t pmap)
3478 PDEBUG(1, printf("pmap_pinit: pmap = %08x\n", (uint32_t) pmap));
3480 pmap_alloc_l1(pmap);
3481 bzero(pmap->pm_l2, sizeof(pmap->pm_l2));
3483 CPU_ZERO(&pmap->pm_active);
3485 TAILQ_INIT(&pmap->pm_pvchunk);
3486 bzero(&pmap->pm_stats, sizeof pmap->pm_stats);
3487 pmap->pm_stats.resident_count = 1;
3488 if (vector_page < KERNBASE) {
3489 pmap_enter(pmap, vector_page,
3490 VM_PROT_READ, PHYS_TO_VM_PAGE(systempage.pv_pa),
3497 /***************************************************
3498 * Superpage management routines.
3499 ***************************************************/
3501 static PMAP_INLINE struct pv_entry *
3502 pmap_pvh_remove(struct md_page *pvh, pmap_t pmap, vm_offset_t va)
3506 rw_assert(&pvh_global_lock, RA_WLOCKED);
3508 pv = pmap_find_pv(pvh, pmap, va);
3510 TAILQ_REMOVE(&pvh->pv_list, pv, pv_list);
3516 pmap_pvh_free(struct md_page *pvh, pmap_t pmap, vm_offset_t va)
3520 pv = pmap_pvh_remove(pvh, pmap, va);
3521 KASSERT(pv != NULL, ("pmap_pvh_free: pv not found"));
3522 pmap_free_pv_entry(pmap, pv);
3526 pmap_pv_insert_section(pmap_t pmap, vm_offset_t va, vm_paddr_t pa)
3528 struct md_page *pvh;
3531 rw_assert(&pvh_global_lock, RA_WLOCKED);
3532 if (pv_entry_count < pv_entry_high_water &&
3533 (pv = pmap_get_pv_entry(pmap, TRUE)) != NULL) {
3535 pvh = pa_to_pvh(pa);
3536 TAILQ_INSERT_TAIL(&pvh->pv_list, pv, pv_list);
3543 * Create the pv entries for each of the pages within a superpage.
3546 pmap_pv_demote_section(pmap_t pmap, vm_offset_t va, vm_paddr_t pa)
3548 struct md_page *pvh;
3550 vm_offset_t va_last;
3553 rw_assert(&pvh_global_lock, RA_WLOCKED);
3554 KASSERT((pa & L1_S_OFFSET) == 0,
3555 ("pmap_pv_demote_section: pa is not 1mpage aligned"));
3558 * Transfer the 1mpage's pv entry for this mapping to the first
3561 pvh = pa_to_pvh(pa);
3562 va = trunc_1mpage(va);
3563 pv = pmap_pvh_remove(pvh, pmap, va);
3564 KASSERT(pv != NULL, ("pmap_pv_demote_section: pv not found"));
3565 m = PHYS_TO_VM_PAGE(pa);
3566 TAILQ_INSERT_HEAD(&m->md.pv_list, pv, pv_list);
3567 /* Instantiate the remaining pv entries. */
3568 va_last = L2_NEXT_BUCKET(va) - PAGE_SIZE;
3571 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
3572 ("pmap_pv_demote_section: page %p is not managed", m));
3574 pve = pmap_get_pv_entry(pmap, FALSE);
3575 pmap_enter_pv(m, pve, pmap, va, pv->pv_flags);
3576 } while (va < va_last);
3580 pmap_pv_promote_section(pmap_t pmap, vm_offset_t va, vm_paddr_t pa)
3582 struct md_page *pvh;
3584 vm_offset_t va_last;
3587 rw_assert(&pvh_global_lock, RA_WLOCKED);
3588 KASSERT((pa & L1_S_OFFSET) == 0,
3589 ("pmap_pv_promote_section: pa is not 1mpage aligned"));
3592 * Transfer the first page's pv entry for this mapping to the
3593 * 1mpage's pv list. Aside from avoiding the cost of a call
3594 * to get_pv_entry(), a transfer avoids the possibility that
3595 * get_pv_entry() calls pmap_pv_reclaim() and that pmap_pv_reclaim()
3596 * removes one of the mappings that is being promoted.
3598 m = PHYS_TO_VM_PAGE(pa);
3599 va = trunc_1mpage(va);
3600 pv = pmap_pvh_remove(&m->md, pmap, va);
3601 KASSERT(pv != NULL, ("pmap_pv_promote_section: pv not found"));
3602 pvh = pa_to_pvh(pa);
3603 TAILQ_INSERT_TAIL(&pvh->pv_list, pv, pv_list);
3604 /* Free the remaining pv entries in the newly mapped section pages */
3605 va_last = L2_NEXT_BUCKET(va) - PAGE_SIZE;
3610 * Don't care the flags, first pv contains sufficient
3611 * information for all of the pages so nothing is really lost.
3613 pmap_pvh_free(&m->md, pmap, va);
3614 } while (va < va_last);
3618 * Tries to create a 1MB page mapping. Returns TRUE if successful and
3619 * FALSE otherwise. Fails if (1) page is unmanageg, kernel pmap or vectors
3620 * page, (2) a mapping already exists at the specified virtual address, or
3621 * (3) a pv entry cannot be allocated without reclaiming another pv entry.
3624 pmap_enter_section(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot)
3628 struct l2_bucket *l2b;
3630 rw_assert(&pvh_global_lock, RA_WLOCKED);
3631 PMAP_ASSERT_LOCKED(pmap);
3633 /* Skip kernel, vectors page and unmanaged mappings */
3634 if ((pmap == pmap_kernel()) || (L1_IDX(va) == L1_IDX(vector_page)) ||
3635 ((m->oflags & VPO_UNMANAGED) != 0)) {
3636 CTR2(KTR_PMAP, "pmap_enter_section: failure for va %#lx"
3637 " in pmap %p", va, pmap);
3641 * Check whether this is a valid section superpage entry or
3642 * there is a l2_bucket associated with that L1 page directory.
3644 va = trunc_1mpage(va);
3645 pl1pd = &pmap->pm_l1->l1_kva[L1_IDX(va)];
3646 l2b = pmap_get_l2_bucket(pmap, va);
3647 if ((*pl1pd & L1_S_PROTO) || (l2b != NULL)) {
3648 CTR2(KTR_PMAP, "pmap_enter_section: failure for va %#lx"
3649 " in pmap %p", va, pmap);
3652 pa = VM_PAGE_TO_PHYS(m);
3654 * Abort this mapping if its PV entry could not be created.
3656 if (!pmap_pv_insert_section(pmap, va, VM_PAGE_TO_PHYS(m))) {
3657 CTR2(KTR_PMAP, "pmap_enter_section: failure for va %#lx"
3658 " in pmap %p", va, pmap);
3662 * Increment counters.
3664 pmap->pm_stats.resident_count += L2_PTE_NUM_TOTAL;
3666 * Despite permissions, mark the superpage read-only.
3668 prot &= ~VM_PROT_WRITE;
3670 * Map the superpage.
3672 pmap_map_section(pmap, va, pa, prot, FALSE);
3674 pmap_section_mappings++;
3675 CTR2(KTR_PMAP, "pmap_enter_section: success for va %#lx"
3676 " in pmap %p", va, pmap);
3681 * pmap_remove_section: do the things to unmap a superpage in a process
3684 pmap_remove_section(pmap_t pmap, vm_offset_t sva)
3686 struct md_page *pvh;
3687 struct l2_bucket *l2b;
3688 pd_entry_t *pl1pd, l1pd;
3689 vm_offset_t eva, va;
3692 PMAP_ASSERT_LOCKED(pmap);
3693 if ((pmap == pmap_kernel()) || (L1_IDX(sva) == L1_IDX(vector_page)))
3696 KASSERT((sva & L1_S_OFFSET) == 0,
3697 ("pmap_remove_section: sva is not 1mpage aligned"));
3699 pl1pd = &pmap->pm_l1->l1_kva[L1_IDX(sva)];
3702 m = PHYS_TO_VM_PAGE(l1pd & L1_S_FRAME);
3703 KASSERT((m != NULL && ((m->oflags & VPO_UNMANAGED) == 0)),
3704 ("pmap_remove_section: no corresponding vm_page or "
3707 pmap->pm_stats.resident_count -= L2_PTE_NUM_TOTAL;
3708 pvh = pa_to_pvh(l1pd & L1_S_FRAME);
3709 pmap_pvh_free(pvh, pmap, sva);
3710 eva = L2_NEXT_BUCKET(sva);
3711 for (va = sva, m = PHYS_TO_VM_PAGE(l1pd & L1_S_FRAME);
3712 va < eva; va += PAGE_SIZE, m++) {
3714 * Mark base pages referenced but skip marking them dirty.
3715 * If the superpage is writeable, hence all base pages were
3716 * already marked as dirty in pmap_fault_fixup() before
3717 * promotion. Reference bit however, might not have been set
3718 * for each base page when the superpage was created at once,
3719 * not as a result of promotion.
3721 if (L1_S_REFERENCED(l1pd))
3722 vm_page_aflag_set(m, PGA_REFERENCED);
3723 if (TAILQ_EMPTY(&m->md.pv_list) &&
3724 TAILQ_EMPTY(&pvh->pv_list))
3725 vm_page_aflag_clear(m, PGA_WRITEABLE);
3728 l2b = pmap_get_l2_bucket(pmap, sva);
3730 KASSERT(l2b->l2b_occupancy == L2_PTE_NUM_TOTAL,
3731 ("pmap_remove_section: l2_bucket occupancy error"));
3732 pmap_free_l2_bucket(pmap, l2b, L2_PTE_NUM_TOTAL);
3734 /* Now invalidate L1 slot */
3737 if (L1_S_EXECUTABLE(l1pd))
3738 cpu_tlb_flushID_SE(sva);
3740 cpu_tlb_flushD_SE(sva);
3745 * Tries to promote the 256, contiguous 4KB page mappings that are
3746 * within a single l2_bucket to a single 1MB section mapping.
3747 * For promotion to occur, two conditions must be met: (1) the 4KB page
3748 * mappings must map aligned, contiguous physical memory and (2) the 4KB page
3749 * mappings must have identical characteristics.
3752 pmap_promote_section(pmap_t pmap, vm_offset_t va)
3754 pt_entry_t *firstptep, firstpte, oldpte, pa, *pte;
3756 vm_offset_t first_va, old_va;
3757 struct l2_bucket *l2b = NULL;
3759 struct pv_entry *pve, *first_pve;
3761 PMAP_ASSERT_LOCKED(pmap);
3765 * Skip promoting kernel pages. This is justified by following:
3766 * 1. Kernel is already mapped using section mappings in each pmap
3767 * 2. Managed mappings within the kernel are not to be promoted anyway
3769 if (pmap == pmap_kernel()) {
3770 pmap_section_p_failures++;
3771 CTR2(KTR_PMAP, "pmap_promote_section: failure for va %#x"
3772 " in pmap %p", va, pmap);
3775 /* Do not attemp to promote vectors pages */
3776 if (L1_IDX(va) == L1_IDX(vector_page)) {
3777 pmap_section_p_failures++;
3778 CTR2(KTR_PMAP, "pmap_promote_section: failure for va %#x"
3779 " in pmap %p", va, pmap);
3783 * Examine the first PTE in the specified l2_bucket. Abort if this PTE
3784 * is either invalid, unused, or does not map the first 4KB physical
3785 * page within 1MB page.
3787 first_va = trunc_1mpage(va);
3788 l2b = pmap_get_l2_bucket(pmap, first_va);
3789 KASSERT(l2b != NULL, ("pmap_promote_section: trying to promote "
3790 "not existing l2 bucket"));
3791 firstptep = &l2b->l2b_kva[0];
3793 firstpte = *firstptep;
3794 if ((l2pte_pa(firstpte) & L1_S_OFFSET) != 0) {
3795 pmap_section_p_failures++;
3796 CTR2(KTR_PMAP, "pmap_promote_section: failure for va %#x"
3797 " in pmap %p", va, pmap);
3801 if ((firstpte & (L2_S_PROTO | L2_S_REF)) != (L2_S_PROTO | L2_S_REF)) {
3802 pmap_section_p_failures++;
3803 CTR2(KTR_PMAP, "pmap_promote_section: failure for va %#x"
3804 " in pmap %p", va, pmap);
3808 * ARM uses pv_entry to mark particular mapping WIRED so don't promote
3809 * unmanaged pages since it is impossible to determine, whether the
3810 * page is wired or not if there is no corresponding pv_entry.
3812 m = PHYS_TO_VM_PAGE(l2pte_pa(firstpte));
3813 if (m && ((m->oflags & VPO_UNMANAGED) != 0)) {
3814 pmap_section_p_failures++;
3815 CTR2(KTR_PMAP, "pmap_promote_section: failure for va %#x"
3816 " in pmap %p", va, pmap);
3819 first_pve = pmap_find_pv(&m->md, pmap, first_va);
3821 * PTE is modified only on write due to modified bit
3822 * emulation. If the entry is referenced and writable
3823 * then it is modified and we don't clear write enable.
3824 * Otherwise, writing is disabled in PTE anyway and
3825 * we just configure protections for the section mapping
3826 * that is going to be created.
3828 if ((first_pve->pv_flags & PVF_WRITE) != 0) {
3829 if (!L2_S_WRITABLE(firstpte)) {
3830 first_pve->pv_flags &= ~PVF_WRITE;
3831 prot &= ~VM_PROT_WRITE;
3834 prot &= ~VM_PROT_WRITE;
3836 if (!L2_S_EXECUTABLE(firstpte))
3837 prot &= ~VM_PROT_EXECUTE;
3840 * Examine each of the other PTEs in the specified l2_bucket.
3841 * Abort if this PTE maps an unexpected 4KB physical page or
3842 * does not have identical characteristics to the first PTE.
3844 pa = l2pte_pa(firstpte) + ((L2_PTE_NUM_TOTAL - 1) * PAGE_SIZE);
3845 old_va = L2_NEXT_BUCKET(first_va) - PAGE_SIZE;
3847 for (pte = (firstptep + L2_PTE_NUM_TOTAL - 1); pte > firstptep; pte--) {
3849 if (l2pte_pa(oldpte) != pa) {
3850 pmap_section_p_failures++;
3851 CTR2(KTR_PMAP, "pmap_promote_section: failure for "
3852 "va %#x in pmap %p", va, pmap);
3855 if ((oldpte & L2_S_PROMOTE) != (firstpte & L2_S_PROMOTE)) {
3856 pmap_section_p_failures++;
3857 CTR2(KTR_PMAP, "pmap_promote_section: failure for "
3858 "va %#x in pmap %p", va, pmap);
3861 oldm = PHYS_TO_VM_PAGE(l2pte_pa(oldpte));
3862 if (oldm && ((oldm->oflags & VPO_UNMANAGED) != 0)) {
3863 pmap_section_p_failures++;
3864 CTR2(KTR_PMAP, "pmap_promote_section: failure for "
3865 "va %#x in pmap %p", va, pmap);
3869 pve = pmap_find_pv(&oldm->md, pmap, old_va);
3871 pmap_section_p_failures++;
3872 CTR2(KTR_PMAP, "pmap_promote_section: failure for "
3873 "va %#x old_va %x - no pve", va, old_va);
3877 if (!L2_S_WRITABLE(oldpte) && (pve->pv_flags & PVF_WRITE))
3878 pve->pv_flags &= ~PVF_WRITE;
3879 if (pve->pv_flags != first_pve->pv_flags) {
3880 pmap_section_p_failures++;
3881 CTR2(KTR_PMAP, "pmap_promote_section: failure for "
3882 "va %#x in pmap %p", va, pmap);
3886 old_va -= PAGE_SIZE;
3890 * Promote the pv entries.
3892 pmap_pv_promote_section(pmap, first_va, l2pte_pa(firstpte));
3894 * Map the superpage.
3896 pmap_map_section(pmap, first_va, l2pte_pa(firstpte), prot, TRUE);
3898 * Invalidate all possible TLB mappings for small
3899 * pages within the newly created superpage.
3900 * Rely on the first PTE's attributes since they
3901 * have to be consistent across all of the base pages
3902 * within the superpage. If page is not executable it
3903 * is at least referenced.
3904 * The fastest way to do that is to invalidate whole
3905 * TLB at once instead of executing 256 CP15 TLB
3906 * invalidations by single entry. TLBs usually maintain
3907 * several dozen entries so loss of unrelated entries is
3908 * still a less agresive approach.
3910 if (L2_S_EXECUTABLE(firstpte))
3916 pmap_section_promotions++;
3917 CTR2(KTR_PMAP, "pmap_promote_section: success for va %#x"
3918 " in pmap %p", first_va, pmap);
3922 * Fills a l2_bucket with mappings to consecutive physical pages.
3925 pmap_fill_l2b(struct l2_bucket *l2b, pt_entry_t newpte)
3930 for (i = 0; i < L2_PTE_NUM_TOTAL; i++) {
3931 ptep = &l2b->l2b_kva[i];
3935 newpte += PAGE_SIZE;
3938 l2b->l2b_occupancy = L2_PTE_NUM_TOTAL;
3942 * Tries to demote a 1MB section mapping. If demotion fails, the
3943 * 1MB section mapping is invalidated.
3946 pmap_demote_section(pmap_t pmap, vm_offset_t va)
3948 struct l2_bucket *l2b;
3949 struct pv_entry *l1pdpve;
3950 struct md_page *pvh;
3951 pd_entry_t *pl1pd, l1pd, newl1pd;
3952 pt_entry_t *firstptep, newpte;
3956 PMAP_ASSERT_LOCKED(pmap);
3958 * According to assumptions described in pmap_promote_section,
3959 * kernel is and always should be mapped using 1MB section mappings.
3960 * What more, managed kernel pages were not to be promoted.
3962 KASSERT(pmap != pmap_kernel() && L1_IDX(va) != L1_IDX(vector_page),
3963 ("pmap_demote_section: forbidden section mapping"));
3965 va = trunc_1mpage(va);
3966 pl1pd = &pmap->pm_l1->l1_kva[L1_IDX(va)];
3968 KASSERT((l1pd & L1_TYPE_MASK) == L1_S_PROTO,
3969 ("pmap_demote_section: not section or invalid section"));
3971 pa = l1pd & L1_S_FRAME;
3972 m = PHYS_TO_VM_PAGE(pa);
3973 KASSERT((m != NULL && (m->oflags & VPO_UNMANAGED) == 0),
3974 ("pmap_demote_section: no vm_page for selected superpage or"
3977 pvh = pa_to_pvh(pa);
3978 l1pdpve = pmap_find_pv(pvh, pmap, va);
3979 KASSERT(l1pdpve != NULL, ("pmap_demote_section: no pv entry for "
3982 l2b = pmap_get_l2_bucket(pmap, va);
3984 KASSERT((l1pdpve->pv_flags & PVF_WIRED) == 0,
3985 ("pmap_demote_section: No l2_bucket for wired mapping"));
3987 * Invalidate the 1MB section mapping and return
3988 * "failure" if the mapping was never accessed or the
3989 * allocation of the new l2_bucket fails.
3991 if (!L1_S_REFERENCED(l1pd) ||
3992 (l2b = pmap_alloc_l2_bucket(pmap, va)) == NULL) {
3993 /* Unmap and invalidate superpage. */
3994 pmap_remove_section(pmap, trunc_1mpage(va));
3995 CTR2(KTR_PMAP, "pmap_demote_section: failure for "
3996 "va %#x in pmap %p", va, pmap);
4002 * Now we should have corresponding l2_bucket available.
4003 * Let's process it to recreate 256 PTEs for each base page
4006 newpte = pa | L1_S_DEMOTE(l1pd);
4007 if (m->md.pv_memattr != VM_MEMATTR_UNCACHEABLE)
4008 newpte |= pte_l2_s_cache_mode;
4011 * If the l2_bucket is new, initialize it.
4013 if (l2b->l2b_occupancy == 0)
4014 pmap_fill_l2b(l2b, newpte);
4016 firstptep = &l2b->l2b_kva[0];
4017 KASSERT(l2pte_pa(*firstptep) == (pa),
4018 ("pmap_demote_section: firstpte and newpte map different "
4019 "physical addresses"));
4021 * If the mapping has changed attributes, update the page table
4024 if ((*firstptep & L2_S_PROMOTE) != (L1_S_DEMOTE(l1pd)))
4025 pmap_fill_l2b(l2b, newpte);
4027 /* Demote PV entry */
4028 pmap_pv_demote_section(pmap, va, pa);
4031 newl1pd = l2b->l2b_phys | L1_C_DOM(pmap->pm_domain) | L1_C_PROTO;
4034 /* Invalidate old TLB mapping */
4035 if (L1_S_EXECUTABLE(l1pd))
4036 cpu_tlb_flushID_SE(va);
4037 else if (L1_S_REFERENCED(l1pd))
4038 cpu_tlb_flushD_SE(va);
4041 pmap_section_demotions++;
4042 CTR2(KTR_PMAP, "pmap_demote_section: success for va %#x"
4043 " in pmap %p", va, pmap);
4047 /***************************************************
4048 * page management routines.
4049 ***************************************************/
4052 * We are in a serious low memory condition. Resort to
4053 * drastic measures to free some pages so we can allocate
4054 * another pv entry chunk.
4057 pmap_pv_reclaim(pmap_t locked_pmap)
4060 struct pv_chunk *pc;
4061 struct l2_bucket *l2b = NULL;
4067 vm_page_t free, m, m_pc;
4069 int bit, field, freed, idx;
4071 PMAP_ASSERT_LOCKED(locked_pmap);
4074 TAILQ_INIT(&newtail);
4075 while ((pc = TAILQ_FIRST(&pv_chunks)) != NULL && (pv_vafree == 0 ||
4077 TAILQ_REMOVE(&pv_chunks, pc, pc_lru);
4078 if (pmap != pc->pc_pmap) {
4082 if (pmap != locked_pmap)
4086 /* Avoid deadlock and lock recursion. */
4087 if (pmap > locked_pmap)
4089 else if (pmap != locked_pmap && !PMAP_TRYLOCK(pmap)) {
4091 TAILQ_INSERT_TAIL(&newtail, pc, pc_lru);
4097 * Destroy every non-wired, 4 KB page mapping in the chunk.
4100 for (field = 0; field < _NPCM; field++) {
4101 for (inuse = ~pc->pc_map[field] & pc_freemask[field];
4102 inuse != 0; inuse &= ~(1UL << bit)) {
4103 bit = ffs(inuse) - 1;
4104 idx = field * sizeof(inuse) * NBBY + bit;
4105 pv = &pc->pc_pventry[idx];
4108 pl1pd = &pmap->pm_l1->l1_kva[L1_IDX(va)];
4109 if ((*pl1pd & L1_TYPE_MASK) == L1_S_PROTO)
4111 if (pv->pv_flags & PVF_WIRED)
4114 l2b = pmap_get_l2_bucket(pmap, va);
4115 KASSERT(l2b != NULL, ("No l2 bucket"));
4116 ptep = &l2b->l2b_kva[l2pte_index(va)];
4117 m = PHYS_TO_VM_PAGE(l2pte_pa(*ptep));
4118 KASSERT((vm_offset_t)m >= KERNBASE,
4119 ("Trying to access non-existent page "
4120 "va %x pte %x", va, *ptep));
4123 TAILQ_REMOVE(&m->md.pv_list, pv, pv_list);
4124 if (TAILQ_EMPTY(&m->md.pv_list))
4125 vm_page_aflag_clear(m, PGA_WRITEABLE);
4126 pc->pc_map[field] |= 1UL << bit;
4132 TAILQ_INSERT_TAIL(&newtail, pc, pc_lru);
4135 /* Every freed mapping is for a 4 KB page. */
4136 pmap->pm_stats.resident_count -= freed;
4137 PV_STAT(pv_entry_frees += freed);
4138 PV_STAT(pv_entry_spare += freed);
4139 pv_entry_count -= freed;
4140 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
4141 for (field = 0; field < _NPCM; field++)
4142 if (pc->pc_map[field] != pc_freemask[field]) {
4143 TAILQ_INSERT_HEAD(&pmap->pm_pvchunk, pc,
4145 TAILQ_INSERT_TAIL(&newtail, pc, pc_lru);
4148 * One freed pv entry in locked_pmap is
4151 if (pmap == locked_pmap)
4155 if (field == _NPCM) {
4156 PV_STAT(pv_entry_spare -= _NPCPV);
4157 PV_STAT(pc_chunk_count--);
4158 PV_STAT(pc_chunk_frees++);
4159 /* Entire chunk is free; return it. */
4160 m_pc = PHYS_TO_VM_PAGE(pmap_kextract((vm_offset_t)pc));
4161 pmap_qremove((vm_offset_t)pc, 1);
4162 pmap_ptelist_free(&pv_vafree, (vm_offset_t)pc);
4167 TAILQ_CONCAT(&pv_chunks, &newtail, pc_lru);
4171 if (pmap != locked_pmap)
4178 * free the pv_entry back to the free list
4181 pmap_free_pv_entry(pmap_t pmap, pv_entry_t pv)
4183 struct pv_chunk *pc;
4184 int bit, field, idx;
4186 rw_assert(&pvh_global_lock, RA_WLOCKED);
4187 PMAP_ASSERT_LOCKED(pmap);
4188 PV_STAT(pv_entry_frees++);
4189 PV_STAT(pv_entry_spare++);
4191 pc = pv_to_chunk(pv);
4192 idx = pv - &pc->pc_pventry[0];
4193 field = idx / (sizeof(u_long) * NBBY);
4194 bit = idx % (sizeof(u_long) * NBBY);
4195 pc->pc_map[field] |= 1ul << bit;
4196 for (idx = 0; idx < _NPCM; idx++)
4197 if (pc->pc_map[idx] != pc_freemask[idx]) {
4199 * 98% of the time, pc is already at the head of the
4200 * list. If it isn't already, move it to the head.
4202 if (__predict_false(TAILQ_FIRST(&pmap->pm_pvchunk) !=
4204 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
4205 TAILQ_INSERT_HEAD(&pmap->pm_pvchunk, pc,
4210 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
4211 pmap_free_pv_chunk(pc);
4215 pmap_free_pv_chunk(struct pv_chunk *pc)
4219 TAILQ_REMOVE(&pv_chunks, pc, pc_lru);
4220 PV_STAT(pv_entry_spare -= _NPCPV);
4221 PV_STAT(pc_chunk_count--);
4222 PV_STAT(pc_chunk_frees++);
4223 /* entire chunk is free, return it */
4224 m = PHYS_TO_VM_PAGE(pmap_kextract((vm_offset_t)pc));
4225 pmap_qremove((vm_offset_t)pc, 1);
4226 vm_page_unwire(m, 0);
4228 pmap_ptelist_free(&pv_vafree, (vm_offset_t)pc);
4233 pmap_get_pv_entry(pmap_t pmap, boolean_t try)
4235 static const struct timeval printinterval = { 60, 0 };
4236 static struct timeval lastprint;
4237 struct pv_chunk *pc;
4240 int bit, field, idx;
4242 rw_assert(&pvh_global_lock, RA_WLOCKED);
4243 PMAP_ASSERT_LOCKED(pmap);
4244 PV_STAT(pv_entry_allocs++);
4247 if (pv_entry_count > pv_entry_high_water)
4248 if (ratecheck(&lastprint, &printinterval))
4249 printf("%s: Approaching the limit on PV entries.\n",
4252 pc = TAILQ_FIRST(&pmap->pm_pvchunk);
4254 for (field = 0; field < _NPCM; field++) {
4255 if (pc->pc_map[field]) {
4256 bit = ffs(pc->pc_map[field]) - 1;
4260 if (field < _NPCM) {
4261 idx = field * sizeof(pc->pc_map[field]) * NBBY + bit;
4262 pv = &pc->pc_pventry[idx];
4263 pc->pc_map[field] &= ~(1ul << bit);
4264 /* If this was the last item, move it to tail */
4265 for (field = 0; field < _NPCM; field++)
4266 if (pc->pc_map[field] != 0) {
4267 PV_STAT(pv_entry_spare--);
4268 return (pv); /* not full, return */
4270 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
4271 TAILQ_INSERT_TAIL(&pmap->pm_pvchunk, pc, pc_list);
4272 PV_STAT(pv_entry_spare--);
4277 * Access to the ptelist "pv_vafree" is synchronized by the pvh
4278 * global lock. If "pv_vafree" is currently non-empty, it will
4279 * remain non-empty until pmap_ptelist_alloc() completes.
4281 if (pv_vafree == 0 || (m = vm_page_alloc(NULL, 0, VM_ALLOC_NORMAL |
4282 VM_ALLOC_NOOBJ | VM_ALLOC_WIRED)) == NULL) {
4285 PV_STAT(pc_chunk_tryfail++);
4288 m = pmap_pv_reclaim(pmap);
4292 PV_STAT(pc_chunk_count++);
4293 PV_STAT(pc_chunk_allocs++);
4294 pc = (struct pv_chunk *)pmap_ptelist_alloc(&pv_vafree);
4295 pmap_qenter((vm_offset_t)pc, &m, 1);
4297 pc->pc_map[0] = pc_freemask[0] & ~1ul; /* preallocated bit 0 */
4298 for (field = 1; field < _NPCM; field++)
4299 pc->pc_map[field] = pc_freemask[field];
4300 TAILQ_INSERT_TAIL(&pv_chunks, pc, pc_lru);
4301 pv = &pc->pc_pventry[0];
4302 TAILQ_INSERT_HEAD(&pmap->pm_pvchunk, pc, pc_list);
4303 PV_STAT(pv_entry_spare += _NPCPV - 1);
4308 * Remove the given range of addresses from the specified map.
4310 * It is assumed that the start and end are properly
4311 * rounded to the page size.
4313 #define PMAP_REMOVE_CLEAN_LIST_SIZE 3
4315 pmap_remove(pmap_t pmap, vm_offset_t sva, vm_offset_t eva)
4317 struct l2_bucket *l2b;
4318 vm_offset_t next_bucket;
4319 pd_entry_t *pl1pd, l1pd;
4322 u_int mappings, is_exec, is_refd;
4327 * we lock in the pmap => pv_head direction
4330 rw_wlock(&pvh_global_lock);
4335 * Check for large page.
4337 pl1pd = &pmap->pm_l1->l1_kva[L1_IDX(sva)];
4339 if ((l1pd & L1_TYPE_MASK) == L1_S_PROTO) {
4340 KASSERT((l1pd & L1_S_DOM_MASK) !=
4341 L1_S_DOM(PMAP_DOMAIN_KERNEL), ("pmap_remove: "
4342 "Trying to remove kernel section mapping"));
4344 * Are we removing the entire large page? If not,
4345 * demote the mapping and fall through.
4347 if (sva + L1_S_SIZE == L2_NEXT_BUCKET(sva) &&
4348 eva >= L2_NEXT_BUCKET(sva)) {
4349 pmap_remove_section(pmap, sva);
4350 sva = L2_NEXT_BUCKET(sva);
4352 } else if (!pmap_demote_section(pmap, sva)) {
4353 /* The large page mapping was destroyed. */
4354 sva = L2_NEXT_BUCKET(sva);
4359 * Do one L2 bucket's worth at a time.
4361 next_bucket = L2_NEXT_BUCKET(sva);
4362 if (next_bucket > eva)
4365 l2b = pmap_get_l2_bucket(pmap, sva);
4371 ptep = &l2b->l2b_kva[l2pte_index(sva)];
4374 while (sva < next_bucket) {
4383 * Nothing here, move along
4390 pmap->pm_stats.resident_count--;
4396 * Update flags. In a number of circumstances,
4397 * we could cluster a lot of these and do a
4398 * number of sequential pages in one go.
4400 if ((m = PHYS_TO_VM_PAGE(pa)) != NULL) {
4401 struct pv_entry *pve;
4403 pve = pmap_remove_pv(m, pmap, sva);
4405 is_exec = PTE_BEEN_EXECD(pte);
4406 is_refd = PTE_BEEN_REFD(pte);
4407 pmap_free_pv_entry(pmap, pve);
4413 if (pmap_is_current(pmap)) {
4415 if (total < PMAP_REMOVE_CLEAN_LIST_SIZE) {
4417 cpu_tlb_flushID_SE(sva);
4419 cpu_tlb_flushD_SE(sva);
4420 } else if (total == PMAP_REMOVE_CLEAN_LIST_SIZE)
4429 pmap_free_l2_bucket(pmap, l2b, mappings);
4432 rw_wunlock(&pvh_global_lock);
4443 * Zero a given physical page by mapping it at a page hook point.
4444 * In doing the zero page op, the page we zero is mapped cachable, as with
4445 * StrongARM accesses to non-cached pages are non-burst making writing
4446 * _any_ bulk data very slow.
4449 pmap_zero_page_gen(vm_page_t m, int off, int size)
4451 struct czpages *czp;
4453 KASSERT(TAILQ_EMPTY(&m->md.pv_list),
4454 ("pmap_zero_page_gen: page has mappings"));
4456 vm_paddr_t phys = VM_PAGE_TO_PHYS(m);
4459 czp = &cpu_czpages[PCPU_GET(cpuid)];
4460 mtx_lock(&czp->lock);
4463 * Hook in the page, zero it.
4465 *czp->dstptep = L2_S_PROTO | phys | pte_l2_s_cache_mode | L2_S_REF;
4466 pmap_set_prot(czp->dstptep, VM_PROT_WRITE, 0);
4467 PTE_SYNC(czp->dstptep);
4468 cpu_tlb_flushD_SE(czp->dstva);
4471 if (off || size != PAGE_SIZE)
4472 bzero((void *)(czp->dstva + off), size);
4474 bzero_page(czp->dstva);
4477 * Although aliasing is not possible, if we use temporary mappings with
4478 * memory that will be mapped later as non-cached or with write-through
4479 * caches, we might end up overwriting it when calling wbinv_all. So
4480 * make sure caches are clean after the operation.
4482 cpu_idcache_wbinv_range(czp->dstva, size);
4483 pmap_l2cache_wbinv_range(czp->dstva, phys, size);
4485 mtx_unlock(&czp->lock);
4490 * pmap_zero_page zeros the specified hardware page by mapping
4491 * the page into KVM and using bzero to clear its contents.
4494 pmap_zero_page(vm_page_t m)
4496 pmap_zero_page_gen(m, 0, PAGE_SIZE);
4501 * pmap_zero_page_area zeros the specified hardware page by mapping
4502 * the page into KVM and using bzero to clear its contents.
4504 * off and size may not cover an area beyond a single hardware page.
4507 pmap_zero_page_area(vm_page_t m, int off, int size)
4510 pmap_zero_page_gen(m, off, size);
4515 * pmap_zero_page_idle zeros the specified hardware page by mapping
4516 * the page into KVM and using bzero to clear its contents. This
4517 * is intended to be called from the vm_pagezero process only and
4521 pmap_zero_page_idle(vm_page_t m)
4528 * pmap_copy_page copies the specified (machine independent)
4529 * page by mapping the page into virtual memory and using
4530 * bcopy to copy the page, one machine dependent page at a
4537 * Copy one physical page into another, by mapping the pages into
4538 * hook points. The same comment regarding cachability as in
4539 * pmap_zero_page also applies here.
4542 pmap_copy_page_generic(vm_paddr_t src, vm_paddr_t dst)
4544 struct czpages *czp;
4547 czp = &cpu_czpages[PCPU_GET(cpuid)];
4548 mtx_lock(&czp->lock);
4551 * Map the pages into the page hook points, copy them, and purge the
4552 * cache for the appropriate page.
4554 *czp->srcptep = L2_S_PROTO | src | pte_l2_s_cache_mode | L2_S_REF;
4555 pmap_set_prot(czp->srcptep, VM_PROT_READ, 0);
4556 PTE_SYNC(czp->srcptep);
4557 cpu_tlb_flushD_SE(czp->srcva);
4558 *czp->dstptep = L2_S_PROTO | dst | pte_l2_s_cache_mode | L2_S_REF;
4559 pmap_set_prot(czp->dstptep, VM_PROT_READ | VM_PROT_WRITE, 0);
4560 PTE_SYNC(czp->dstptep);
4561 cpu_tlb_flushD_SE(czp->dstva);
4564 bcopy_page(czp->srcva, czp->dstva);
4567 * Although aliasing is not possible, if we use temporary mappings with
4568 * memory that will be mapped later as non-cached or with write-through
4569 * caches, we might end up overwriting it when calling wbinv_all. So
4570 * make sure caches are clean after the operation.
4572 cpu_idcache_wbinv_range(czp->dstva, PAGE_SIZE);
4573 pmap_l2cache_wbinv_range(czp->dstva, dst, PAGE_SIZE);
4575 mtx_unlock(&czp->lock);
4579 int unmapped_buf_allowed = 1;
4582 pmap_copy_pages(vm_page_t ma[], vm_offset_t a_offset, vm_page_t mb[],
4583 vm_offset_t b_offset, int xfersize)
4585 vm_page_t a_pg, b_pg;
4586 vm_offset_t a_pg_offset, b_pg_offset;
4588 struct czpages *czp;
4591 czp = &cpu_czpages[PCPU_GET(cpuid)];
4592 mtx_lock(&czp->lock);
4594 while (xfersize > 0) {
4595 a_pg = ma[a_offset >> PAGE_SHIFT];
4596 a_pg_offset = a_offset & PAGE_MASK;
4597 cnt = min(xfersize, PAGE_SIZE - a_pg_offset);
4598 b_pg = mb[b_offset >> PAGE_SHIFT];
4599 b_pg_offset = b_offset & PAGE_MASK;
4600 cnt = min(cnt, PAGE_SIZE - b_pg_offset);
4601 *czp->srcptep = L2_S_PROTO | VM_PAGE_TO_PHYS(a_pg) |
4602 pte_l2_s_cache_mode | L2_S_REF;
4603 pmap_set_prot(czp->srcptep, VM_PROT_READ, 0);
4604 PTE_SYNC(czp->srcptep);
4605 cpu_tlb_flushD_SE(czp->srcva);
4606 *czp->dstptep = L2_S_PROTO | VM_PAGE_TO_PHYS(b_pg) |
4607 pte_l2_s_cache_mode | L2_S_REF;
4608 pmap_set_prot(czp->dstptep, VM_PROT_READ | VM_PROT_WRITE, 0);
4609 PTE_SYNC(czp->dstptep);
4610 cpu_tlb_flushD_SE(czp->dstva);
4612 bcopy((char *)czp->srcva + a_pg_offset, (char *)czp->dstva + b_pg_offset,
4614 cpu_idcache_wbinv_range(czp->dstva + b_pg_offset, cnt);
4615 pmap_l2cache_wbinv_range(czp->dstva + b_pg_offset,
4616 VM_PAGE_TO_PHYS(b_pg) + b_pg_offset, cnt);
4622 mtx_unlock(&czp->lock);
4627 pmap_copy_page(vm_page_t src, vm_page_t dst)
4630 if (_arm_memcpy && PAGE_SIZE >= _min_memcpy_size &&
4631 _arm_memcpy((void *)VM_PAGE_TO_PHYS(dst),
4632 (void *)VM_PAGE_TO_PHYS(src), PAGE_SIZE, IS_PHYSICAL) == 0)
4635 pmap_copy_page_generic(VM_PAGE_TO_PHYS(src), VM_PAGE_TO_PHYS(dst));
4639 * this routine returns true if a physical page resides
4640 * in the given pmap.
4643 pmap_page_exists_quick(pmap_t pmap, vm_page_t m)
4645 struct md_page *pvh;
4650 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
4651 ("pmap_page_exists_quick: page %p is not managed", m));
4653 rw_wlock(&pvh_global_lock);
4654 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) {
4655 if (PV_PMAP(pv) == pmap) {
4663 if (!rv && loops < 16 && (m->flags & PG_FICTITIOUS) == 0) {
4664 pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m));
4665 TAILQ_FOREACH(pv, &pvh->pv_list, pv_list) {
4666 if (PV_PMAP(pv) == pmap) {
4675 rw_wunlock(&pvh_global_lock);
4680 * pmap_page_wired_mappings:
4682 * Return the number of managed mappings to the given physical page
4686 pmap_page_wired_mappings(vm_page_t m)
4691 if ((m->oflags & VPO_UNMANAGED) != 0)
4693 rw_wlock(&pvh_global_lock);
4694 count = pmap_pvh_wired_mappings(&m->md, count);
4695 if ((m->flags & PG_FICTITIOUS) == 0) {
4696 count = pmap_pvh_wired_mappings(pa_to_pvh(VM_PAGE_TO_PHYS(m)),
4699 rw_wunlock(&pvh_global_lock);
4704 * pmap_pvh_wired_mappings:
4706 * Return the updated number "count" of managed mappings that are wired.
4709 pmap_pvh_wired_mappings(struct md_page *pvh, int count)
4713 rw_assert(&pvh_global_lock, RA_WLOCKED);
4714 TAILQ_FOREACH(pv, &pvh->pv_list, pv_list) {
4715 if ((pv->pv_flags & PVF_WIRED) != 0)
4722 * Returns TRUE if any of the given mappings were referenced and FALSE
4723 * otherwise. Both page and section mappings are supported.
4726 pmap_is_referenced_pvh(struct md_page *pvh)
4728 struct l2_bucket *l2b;
4735 rw_assert(&pvh_global_lock, RA_WLOCKED);
4737 TAILQ_FOREACH(pv, &pvh->pv_list, pv_list) {
4740 pl1pd = &pmap->pm_l1->l1_kva[L1_IDX(pv->pv_va)];
4741 if ((*pl1pd & L1_TYPE_MASK) == L1_S_PROTO)
4742 rv = L1_S_REFERENCED(*pl1pd);
4744 l2b = pmap_get_l2_bucket(pmap, pv->pv_va);
4745 ptep = &l2b->l2b_kva[l2pte_index(pv->pv_va)];
4746 rv = L2_S_REFERENCED(*ptep);
4756 * pmap_is_referenced:
4758 * Return whether or not the specified physical page was referenced
4759 * in any physical maps.
4762 pmap_is_referenced(vm_page_t m)
4766 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
4767 ("pmap_is_referenced: page %p is not managed", m));
4768 rw_wlock(&pvh_global_lock);
4769 rv = pmap_is_referenced_pvh(&m->md) ||
4770 ((m->flags & PG_FICTITIOUS) == 0 &&
4771 pmap_is_referenced_pvh(pa_to_pvh(VM_PAGE_TO_PHYS(m))));
4772 rw_wunlock(&pvh_global_lock);
4777 * pmap_ts_referenced:
4779 * Return the count of reference bits for a page, clearing all of them.
4782 pmap_ts_referenced(vm_page_t m)
4785 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
4786 ("pmap_ts_referenced: page %p is not managed", m));
4787 return (pmap_clearbit(m, PVF_REF));
4791 * Returns TRUE if any of the given mappings were used to modify
4792 * physical memory. Otherwise, returns FALSE. Both page and 1MB section
4793 * mappings are supported.
4796 pmap_is_modified_pvh(struct md_page *pvh)
4799 struct l2_bucket *l2b;
4805 rw_assert(&pvh_global_lock, RA_WLOCKED);
4808 TAILQ_FOREACH(pv, &pvh->pv_list, pv_list) {
4811 pl1pd = &pmap->pm_l1->l1_kva[L1_IDX(pv->pv_va)];
4812 if ((*pl1pd & L1_TYPE_MASK) == L1_S_PROTO)
4813 rv = L1_S_WRITABLE(*pl1pd);
4815 l2b = pmap_get_l2_bucket(pmap, pv->pv_va);
4816 ptep = &l2b->l2b_kva[l2pte_index(pv->pv_va)];
4817 rv = L2_S_WRITABLE(*ptep);
4828 pmap_is_modified(vm_page_t m)
4832 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
4833 ("pmap_is_modified: page %p is not managed", m));
4835 * If the page is not exclusive busied, then PGA_WRITEABLE cannot be
4836 * concurrently set while the object is locked. Thus, if PGA_WRITEABLE
4837 * is clear, no PTEs can have APX cleared.
4839 VM_OBJECT_ASSERT_WLOCKED(m->object);
4840 if (!vm_page_xbusied(m) && (m->aflags & PGA_WRITEABLE) == 0)
4842 rw_wlock(&pvh_global_lock);
4843 rv = pmap_is_modified_pvh(&m->md) ||
4844 ((m->flags & PG_FICTITIOUS) == 0 &&
4845 pmap_is_modified_pvh(pa_to_pvh(VM_PAGE_TO_PHYS(m))));
4846 rw_wunlock(&pvh_global_lock);
4851 * Apply the given advice to the specified range of addresses within the
4852 * given pmap. Depending on the advice, clear the referenced and/or
4853 * modified flags in each mapping.
4856 pmap_advise(pmap_t pmap, vm_offset_t sva, vm_offset_t eva, int advice)
4858 struct l2_bucket *l2b;
4859 struct pv_entry *pve;
4860 pd_entry_t *pl1pd, l1pd;
4861 pt_entry_t *ptep, opte, pte;
4862 vm_offset_t next_bucket;
4865 if (advice != MADV_DONTNEED && advice != MADV_FREE)
4867 rw_wlock(&pvh_global_lock);
4869 for (; sva < eva; sva = next_bucket) {
4870 next_bucket = L2_NEXT_BUCKET(sva);
4871 if (next_bucket < sva)
4873 pl1pd = &pmap->pm_l1->l1_kva[L1_IDX(sva)];
4875 if ((l1pd & L1_TYPE_MASK) == L1_S_PROTO) {
4876 if (pmap == pmap_kernel())
4878 if (!pmap_demote_section(pmap, sva)) {
4880 * The large page mapping was destroyed.
4885 * Unless the page mappings are wired, remove the
4886 * mapping to a single page so that a subsequent
4887 * access may repromote. Since the underlying
4888 * l2_bucket is fully populated, this removal
4889 * never frees an entire l2_bucket.
4891 l2b = pmap_get_l2_bucket(pmap, sva);
4892 KASSERT(l2b != NULL,
4893 ("pmap_advise: no l2 bucket for "
4894 "va 0x%#x, pmap 0x%p", sva, pmap));
4895 ptep = &l2b->l2b_kva[l2pte_index(sva)];
4897 m = PHYS_TO_VM_PAGE(l2pte_pa(*ptep));
4899 ("pmap_advise: no vm_page for demoted superpage"));
4900 pve = pmap_find_pv(&m->md, pmap, sva);
4901 KASSERT(pve != NULL,
4902 ("pmap_advise: no PV entry for managed mapping"));
4903 if ((pve->pv_flags & PVF_WIRED) == 0) {
4904 pmap_free_l2_bucket(pmap, l2b, 1);
4905 pve = pmap_remove_pv(m, pmap, sva);
4906 pmap_free_pv_entry(pmap, pve);
4909 if (pmap_is_current(pmap)) {
4910 if (PTE_BEEN_EXECD(opte))
4911 cpu_tlb_flushID_SE(sva);
4912 else if (PTE_BEEN_REFD(opte))
4913 cpu_tlb_flushD_SE(sva);
4917 if (next_bucket > eva)
4919 l2b = pmap_get_l2_bucket(pmap, sva);
4922 for (ptep = &l2b->l2b_kva[l2pte_index(sva)];
4923 sva != next_bucket; ptep++, sva += PAGE_SIZE) {
4925 if ((opte & L2_S_PROTO) == 0)
4927 m = PHYS_TO_VM_PAGE(l2pte_pa(opte));
4928 if (m == NULL || (m->oflags & VPO_UNMANAGED) != 0)
4930 else if (L2_S_WRITABLE(opte)) {
4931 if (advice == MADV_DONTNEED) {
4933 * Don't need to mark the page
4934 * dirty as it was already marked as
4935 * such in pmap_fault_fixup() or
4936 * pmap_enter_locked().
4937 * Just clear the state.
4945 } else if (L2_S_REFERENCED(opte)) {
4951 if (pmap_is_current(pmap)) {
4952 if (PTE_BEEN_EXECD(opte))
4953 cpu_tlb_flushID_SE(sva);
4954 else if (PTE_BEEN_REFD(opte))
4955 cpu_tlb_flushD_SE(sva);
4960 rw_wunlock(&pvh_global_lock);
4965 * Clear the modify bits on the specified physical page.
4968 pmap_clear_modify(vm_page_t m)
4971 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
4972 ("pmap_clear_modify: page %p is not managed", m));
4973 VM_OBJECT_ASSERT_WLOCKED(m->object);
4974 KASSERT(!vm_page_xbusied(m),
4975 ("pmap_clear_modify: page %p is exclusive busied", m));
4978 * If the page is not PGA_WRITEABLE, then no mappings can be modified.
4979 * If the object containing the page is locked and the page is not
4980 * exclusive busied, then PGA_WRITEABLE cannot be concurrently set.
4982 if ((m->aflags & PGA_WRITEABLE) == 0)
4984 if (pmap_is_modified(m))
4985 pmap_clearbit(m, PVF_MOD);
4990 * Clear the write and modified bits in each of the given page's mappings.
4993 pmap_remove_write(vm_page_t m)
4995 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
4996 ("pmap_remove_write: page %p is not managed", m));
4999 * If the page is not exclusive busied, then PGA_WRITEABLE cannot be
5000 * set by another thread while the object is locked. Thus,
5001 * if PGA_WRITEABLE is clear, no page table entries need updating.
5003 VM_OBJECT_ASSERT_WLOCKED(m->object);
5004 if (vm_page_xbusied(m) || (m->aflags & PGA_WRITEABLE) != 0)
5005 pmap_clearbit(m, PVF_WRITE);
5010 * perform the pmap work for mincore
5013 pmap_mincore(pmap_t pmap, vm_offset_t addr, vm_paddr_t *locked_pa)
5015 struct l2_bucket *l2b;
5016 pd_entry_t *pl1pd, l1pd;
5017 pt_entry_t *ptep, pte;
5025 pl1pd = &pmap->pm_l1->l1_kva[L1_IDX(addr)];
5027 if ((l1pd & L1_TYPE_MASK) == L1_S_PROTO) {
5028 pa = (l1pd & L1_S_FRAME);
5029 val = MINCORE_SUPER | MINCORE_INCORE;
5030 if (L1_S_WRITABLE(l1pd))
5031 val |= MINCORE_MODIFIED | MINCORE_MODIFIED_OTHER;
5033 m = PHYS_TO_VM_PAGE(pa);
5034 if (m != NULL && (m->oflags & VPO_UNMANAGED) == 0)
5037 if (L1_S_REFERENCED(l1pd))
5038 val |= MINCORE_REFERENCED |
5039 MINCORE_REFERENCED_OTHER;
5042 l2b = pmap_get_l2_bucket(pmap, addr);
5047 ptep = &l2b->l2b_kva[l2pte_index(addr)];
5049 if (!l2pte_valid(pte)) {
5053 val = MINCORE_INCORE;
5054 if (L2_S_WRITABLE(pte))
5055 val |= MINCORE_MODIFIED | MINCORE_MODIFIED_OTHER;
5058 m = PHYS_TO_VM_PAGE(pa);
5059 if (m != NULL && (m->oflags & VPO_UNMANAGED) == 0)
5062 if (L2_S_REFERENCED(pte))
5063 val |= MINCORE_REFERENCED |
5064 MINCORE_REFERENCED_OTHER;
5067 if ((val & (MINCORE_MODIFIED_OTHER | MINCORE_REFERENCED_OTHER)) !=
5068 (MINCORE_MODIFIED_OTHER | MINCORE_REFERENCED_OTHER) && managed) {
5069 /* Ensure that "PHYS_TO_VM_PAGE(pa)->object" doesn't change. */
5070 if (vm_page_pa_tryrelock(pmap, pa, locked_pa))
5074 PA_UNLOCK_COND(*locked_pa);
5080 pmap_sync_icache(pmap_t pmap, vm_offset_t va, vm_size_t sz)
5085 * Increase the starting virtual address of the given mapping if a
5086 * different alignment might result in more superpage mappings.
5089 pmap_align_superpage(vm_object_t object, vm_ooffset_t offset,
5090 vm_offset_t *addr, vm_size_t size)
5092 vm_offset_t superpage_offset;
5096 if (object != NULL && (object->flags & OBJ_COLORED) != 0)
5097 offset += ptoa(object->pg_color);
5098 superpage_offset = offset & PDRMASK;
5099 if (size - ((NBPDR - superpage_offset) & PDRMASK) < NBPDR ||
5100 (*addr & PDRMASK) == superpage_offset)
5102 if ((*addr & PDRMASK) < superpage_offset)
5103 *addr = (*addr & ~PDRMASK) + superpage_offset;
5105 *addr = ((*addr + PDRMASK) & ~PDRMASK) + superpage_offset;
5111 * Create a single section mapping.
5114 pmap_map_section(pmap_t pmap, vm_offset_t va, vm_offset_t pa, vm_prot_t prot,
5117 pd_entry_t *pl1pd, l1pd;
5120 KASSERT(((va | pa) & L1_S_OFFSET) == 0,
5121 ("Not a valid section mapping"));
5123 fl = pte_l1_s_cache_mode;
5125 pl1pd = &pmap->pm_l1->l1_kva[L1_IDX(va)];
5126 l1pd = L1_S_PROTO | pa | L1_S_PROT(PTE_USER, prot) | fl |
5127 L1_S_DOM(pmap->pm_domain);
5129 /* Mark page referenced if this section is a result of a promotion. */
5142 * Link the L2 page table specified by l2pv.pv_pa into the L1
5143 * page table at the slot for "va".
5146 pmap_link_l2pt(vm_offset_t l1pt, vm_offset_t va, struct pv_addr *l2pv)
5148 pd_entry_t *pde = (pd_entry_t *) l1pt, proto;
5149 u_int slot = va >> L1_S_SHIFT;
5151 proto = L1_S_DOM(PMAP_DOMAIN_KERNEL) | L1_C_PROTO;
5153 #ifdef VERBOSE_INIT_ARM
5154 printf("pmap_link_l2pt: pa=0x%x va=0x%x\n", l2pv->pv_pa, l2pv->pv_va);
5157 pde[slot + 0] = proto | (l2pv->pv_pa + 0x000);
5158 PTE_SYNC(&pde[slot]);
5160 SLIST_INSERT_HEAD(&kernel_pt_list, l2pv, pv_list);
5167 * Create a single page mapping.
5170 pmap_map_entry(vm_offset_t l1pt, vm_offset_t va, vm_offset_t pa, int prot,
5173 pd_entry_t *pde = (pd_entry_t *) l1pt;
5177 KASSERT(((va | pa) & PAGE_MASK) == 0, ("ouin"));
5179 fl = l2s_mem_types[cache];
5181 if ((pde[va >> L1_S_SHIFT] & L1_TYPE_MASK) != L1_TYPE_C)
5182 panic("pmap_map_entry: no L2 table for VA 0x%08x", va);
5184 ptep = (pt_entry_t *)kernel_pt_lookup(pde[L1_IDX(va)] & L1_C_ADDR_MASK);
5187 panic("pmap_map_entry: can't find L2 table for VA 0x%08x", va);
5189 ptep[l2pte_index(va)] = L2_S_PROTO | pa | fl | L2_S_REF;
5190 pmap_set_prot(&ptep[l2pte_index(va)], prot, 0);
5191 PTE_SYNC(&ptep[l2pte_index(va)]);
5197 * Map a chunk of memory using the most efficient mappings
5198 * possible (section. large page, small page) into the
5199 * provided L1 and L2 tables at the specified virtual address.
5202 pmap_map_chunk(vm_offset_t l1pt, vm_offset_t va, vm_offset_t pa,
5203 vm_size_t size, int prot, int type)
5205 pd_entry_t *pde = (pd_entry_t *) l1pt;
5206 pt_entry_t *ptep, f1, f2s, f2l;
5210 resid = (size + (PAGE_SIZE - 1)) & ~(PAGE_SIZE - 1);
5213 panic("pmap_map_chunk: no L1 table provided");
5215 #ifdef VERBOSE_INIT_ARM
5216 printf("pmap_map_chunk: pa=0x%x va=0x%x size=0x%x resid=0x%x "
5217 "prot=0x%x type=%d\n", pa, va, size, resid, prot, type);
5220 f1 = l1_mem_types[type];
5221 f2l = l2l_mem_types[type];
5222 f2s = l2s_mem_types[type];
5227 /* See if we can use a section mapping. */
5228 if (L1_S_MAPPABLE_P(va, pa, resid)) {
5229 #ifdef VERBOSE_INIT_ARM
5232 pde[va >> L1_S_SHIFT] = L1_S_PROTO | pa |
5233 L1_S_PROT(PTE_KERNEL, prot | VM_PROT_EXECUTE) |
5234 f1 | L1_S_DOM(PMAP_DOMAIN_KERNEL) | L1_S_REF;
5235 PTE_SYNC(&pde[va >> L1_S_SHIFT]);
5243 * Ok, we're going to use an L2 table. Make sure
5244 * one is actually in the corresponding L1 slot
5245 * for the current VA.
5247 if ((pde[va >> L1_S_SHIFT] & L1_TYPE_MASK) != L1_TYPE_C)
5248 panic("pmap_map_chunk: no L2 table for VA 0x%08x", va);
5250 ptep = (pt_entry_t *) kernel_pt_lookup(
5251 pde[L1_IDX(va)] & L1_C_ADDR_MASK);
5253 panic("pmap_map_chunk: can't find L2 table for VA"
5255 /* See if we can use a L2 large page mapping. */
5256 if (L2_L_MAPPABLE_P(va, pa, resid)) {
5257 #ifdef VERBOSE_INIT_ARM
5260 for (i = 0; i < 16; i++) {
5261 ptep[l2pte_index(va) + i] =
5263 L2_L_PROT(PTE_KERNEL, prot) | f2l;
5264 PTE_SYNC(&ptep[l2pte_index(va) + i]);
5272 /* Use a small page mapping. */
5273 #ifdef VERBOSE_INIT_ARM
5276 ptep[l2pte_index(va)] = L2_S_PROTO | pa | f2s | L2_S_REF;
5277 pmap_set_prot(&ptep[l2pte_index(va)], prot, 0);
5278 PTE_SYNC(&ptep[l2pte_index(va)]);
5283 #ifdef VERBOSE_INIT_ARM
5291 pmap_dmap_iscurrent(pmap_t pmap)
5293 return(pmap_is_current(pmap));
5297 pmap_page_set_memattr(vm_page_t m, vm_memattr_t ma)
5300 * Remember the memattr in a field that gets used to set the appropriate
5301 * bits in the PTEs as mappings are established.
5303 m->md.pv_memattr = ma;
5306 * It appears that this function can only be called before any mappings
5307 * for the page are established on ARM. If this ever changes, this code
5308 * will need to walk the pv_list and make each of the existing mappings
5309 * uncacheable, being careful to sync caches and PTEs (and maybe
5310 * invalidate TLB?) for any current mapping it modifies.
5312 if (TAILQ_FIRST(&m->md.pv_list) != NULL)
5313 panic("Can't change memattr on page with existing mappings");