1 /* From: $NetBSD: pmap.c,v 1.148 2004/04/03 04:35:48 bsh Exp $ */
3 * Copyright 2011 Semihalf
4 * Copyright 2004 Olivier Houchard.
5 * Copyright 2003 Wasabi Systems, Inc.
8 * Written by Steve C. Woodford for Wasabi Systems, Inc.
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 * 3. All advertising materials mentioning features or use of this software
19 * must display the following acknowledgement:
20 * This product includes software developed for the NetBSD Project by
21 * Wasabi Systems, Inc.
22 * 4. The name of Wasabi Systems, Inc. may not be used to endorse
23 * or promote products derived from this software without specific prior
26 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
27 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36 * POSSIBILITY OF SUCH DAMAGE.
38 * From: FreeBSD: src/sys/arm/arm/pmap.c,v 1.113 2009/07/24 13:50:29
42 * Copyright (c) 2002-2003 Wasabi Systems, Inc.
43 * Copyright (c) 2001 Richard Earnshaw
44 * Copyright (c) 2001-2002 Christopher Gilbert
45 * All rights reserved.
47 * 1. Redistributions of source code must retain the above copyright
48 * notice, this list of conditions and the following disclaimer.
49 * 2. Redistributions in binary form must reproduce the above copyright
50 * notice, this list of conditions and the following disclaimer in the
51 * documentation and/or other materials provided with the distribution.
52 * 3. The name of the company nor the name of the author may be used to
53 * endorse or promote products derived from this software without specific
54 * prior written permission.
56 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
57 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
58 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
59 * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
60 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
61 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
62 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
63 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
64 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
65 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
69 * Copyright (c) 1999 The NetBSD Foundation, Inc.
70 * All rights reserved.
72 * This code is derived from software contributed to The NetBSD Foundation
73 * by Charles M. Hannum.
75 * Redistribution and use in source and binary forms, with or without
76 * modification, are permitted provided that the following conditions
78 * 1. Redistributions of source code must retain the above copyright
79 * notice, this list of conditions and the following disclaimer.
80 * 2. Redistributions in binary form must reproduce the above copyright
81 * notice, this list of conditions and the following disclaimer in the
82 * documentation and/or other materials provided with the distribution.
84 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
85 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
86 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
87 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
88 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
89 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
90 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
91 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
92 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
93 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
94 * POSSIBILITY OF SUCH DAMAGE.
98 * Copyright (c) 1994-1998 Mark Brinicombe.
99 * Copyright (c) 1994 Brini.
100 * All rights reserved.
102 * This code is derived from software written for Brini by Mark Brinicombe
104 * Redistribution and use in source and binary forms, with or without
105 * modification, are permitted provided that the following conditions
107 * 1. Redistributions of source code must retain the above copyright
108 * notice, this list of conditions and the following disclaimer.
109 * 2. Redistributions in binary form must reproduce the above copyright
110 * notice, this list of conditions and the following disclaimer in the
111 * documentation and/or other materials provided with the distribution.
112 * 3. All advertising materials mentioning features or use of this software
113 * must display the following acknowledgement:
114 * This product includes software developed by Mark Brinicombe.
115 * 4. The name of the author may not be used to endorse or promote products
116 * derived from this software without specific prior written permission.
118 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
119 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
120 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
121 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
122 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
123 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
124 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
125 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
126 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
128 * RiscBSD kernel project
132 * Machine dependant vm stuff
138 * Special compilation symbols
139 * PMAP_DEBUG - Build in pmap_debug_level code
141 * Note that pmap_mapdev() and pmap_unmapdev() are implemented in arm/devmap.c
143 /* Include header files */
146 #include "opt_pmap.h"
148 #include <sys/cdefs.h>
149 __FBSDID("$FreeBSD$");
150 #include <sys/param.h>
151 #include <sys/systm.h>
152 #include <sys/kernel.h>
154 #include <sys/lock.h>
155 #include <sys/proc.h>
156 #include <sys/malloc.h>
157 #include <sys/msgbuf.h>
158 #include <sys/mutex.h>
159 #include <sys/vmmeter.h>
160 #include <sys/mman.h>
161 #include <sys/rwlock.h>
163 #include <sys/sched.h>
164 #include <sys/sysctl.h>
167 #include <vm/vm_param.h>
170 #include <vm/vm_kern.h>
171 #include <vm/vm_object.h>
172 #include <vm/vm_map.h>
173 #include <vm/vm_page.h>
174 #include <vm/vm_pageout.h>
175 #include <vm/vm_extern.h>
176 #include <vm/vm_reserv.h>
178 #include <machine/md_var.h>
179 #include <machine/cpu.h>
180 #include <machine/cpufunc.h>
181 #include <machine/pcb.h>
184 extern int last_fault_code;
188 #define PDEBUG(_lev_,_stat_) \
189 if (pmap_debug_level >= (_lev_)) \
191 #define dprintf printf
193 int pmap_debug_level = 0;
195 #else /* PMAP_DEBUG */
196 #define PDEBUG(_lev_,_stat_) /* Nothing */
197 #define dprintf(x, arg...)
198 #define PMAP_INLINE __inline
199 #endif /* PMAP_DEBUG */
202 #define PV_STAT(x) do { x ; } while (0)
204 #define PV_STAT(x) do { } while (0)
207 #define pa_to_pvh(pa) (&pv_table[pa_index(pa)])
210 #define pmap_l2cache_wbinv_range(va, pa, size) cpu_l2cache_wbinv_range((pa), (size))
211 #define pmap_l2cache_inv_range(va, pa, size) cpu_l2cache_inv_range((pa), (size))
213 #define pmap_l2cache_wbinv_range(va, pa, size) cpu_l2cache_wbinv_range((va), (size))
214 #define pmap_l2cache_inv_range(va, pa, size) cpu_l2cache_inv_range((va), (size))
217 extern struct pv_addr systempage;
220 * Internal function prototypes
224 struct pv_entry *pmap_find_pv(struct md_page *, pmap_t, vm_offset_t);
225 static void pmap_free_pv_chunk(struct pv_chunk *pc);
226 static void pmap_free_pv_entry(pmap_t pmap, pv_entry_t pv);
227 static pv_entry_t pmap_get_pv_entry(pmap_t pmap, boolean_t try);
228 static vm_page_t pmap_pv_reclaim(pmap_t locked_pmap);
229 static boolean_t pmap_pv_insert_section(pmap_t, vm_offset_t,
231 static struct pv_entry *pmap_remove_pv(struct vm_page *, pmap_t, vm_offset_t);
232 static int pmap_pvh_wired_mappings(struct md_page *, int);
234 static void pmap_enter_locked(pmap_t, vm_offset_t, vm_prot_t,
235 vm_page_t, vm_prot_t, boolean_t, int);
236 static vm_paddr_t pmap_extract_locked(pmap_t pmap, vm_offset_t va);
237 static void pmap_alloc_l1(pmap_t);
238 static void pmap_free_l1(pmap_t);
240 static void pmap_map_section(pmap_t, vm_offset_t, vm_offset_t,
241 vm_prot_t, boolean_t);
242 static void pmap_promote_section(pmap_t, vm_offset_t);
243 static boolean_t pmap_demote_section(pmap_t, vm_offset_t);
244 static boolean_t pmap_enter_section(pmap_t, vm_offset_t, vm_page_t,
246 static void pmap_remove_section(pmap_t, vm_offset_t);
248 static int pmap_clearbit(struct vm_page *, u_int);
250 static struct l2_bucket *pmap_get_l2_bucket(pmap_t, vm_offset_t);
251 static struct l2_bucket *pmap_alloc_l2_bucket(pmap_t, vm_offset_t);
252 static void pmap_free_l2_bucket(pmap_t, struct l2_bucket *, u_int);
253 static vm_offset_t kernel_pt_lookup(vm_paddr_t);
255 static MALLOC_DEFINE(M_VMPMAP, "pmap", "PMAP L1");
257 vm_offset_t virtual_avail; /* VA of first avail page (after kernel bss) */
258 vm_offset_t virtual_end; /* VA of last avail page (end of kernel AS) */
259 vm_offset_t pmap_curmaxkvaddr;
260 vm_paddr_t kernel_l1pa;
262 vm_offset_t kernel_vm_end = 0;
264 vm_offset_t vm_max_kernel_address;
266 struct pmap kernel_pmap_store;
268 static pt_entry_t *csrc_pte, *cdst_pte;
269 static vm_offset_t csrcp, cdstp;
270 static struct mtx cmtx;
272 static void pmap_init_l1(struct l1_ttable *, pd_entry_t *);
274 * These routines are called when the CPU type is identified to set up
275 * the PTE prototypes, cache modes, etc.
277 * The variables are always here, just in case LKMs need to reference
278 * them (though, they shouldn't).
280 static void pmap_set_prot(pt_entry_t *pte, vm_prot_t prot, uint8_t user);
281 pt_entry_t pte_l1_s_cache_mode;
282 pt_entry_t pte_l1_s_cache_mode_pt;
284 pt_entry_t pte_l2_l_cache_mode;
285 pt_entry_t pte_l2_l_cache_mode_pt;
287 pt_entry_t pte_l2_s_cache_mode;
288 pt_entry_t pte_l2_s_cache_mode_pt;
290 struct msgbuf *msgbufp = 0;
295 static caddr_t crashdumpmap;
297 extern void bcopy_page(vm_offset_t, vm_offset_t);
298 extern void bzero_page(vm_offset_t);
303 * Metadata for L1 translation tables.
306 /* Entry on the L1 Table list */
307 SLIST_ENTRY(l1_ttable) l1_link;
309 /* Entry on the L1 Least Recently Used list */
310 TAILQ_ENTRY(l1_ttable) l1_lru;
312 /* Track how many domains are allocated from this L1 */
313 volatile u_int l1_domain_use_count;
316 * A free-list of domain numbers for this L1.
317 * We avoid using ffs() and a bitmap to track domains since ffs()
320 u_int8_t l1_domain_first;
321 u_int8_t l1_domain_free[PMAP_DOMAINS];
323 /* Physical address of this L1 page table */
324 vm_paddr_t l1_physaddr;
326 /* KVA of this L1 page table */
331 * Convert a virtual address into its L1 table index. That is, the
332 * index used to locate the L2 descriptor table pointer in an L1 table.
333 * This is basically used to index l1->l1_kva[].
335 * Each L2 descriptor table represents 1MB of VA space.
337 #define L1_IDX(va) (((vm_offset_t)(va)) >> L1_S_SHIFT)
340 * L1 Page Tables are tracked using a Least Recently Used list.
341 * - New L1s are allocated from the HEAD.
342 * - Freed L1s are added to the TAIl.
343 * - Recently accessed L1s (where an 'access' is some change to one of
344 * the userland pmaps which owns this L1) are moved to the TAIL.
346 static TAILQ_HEAD(, l1_ttable) l1_lru_list;
348 * A list of all L1 tables
350 static SLIST_HEAD(, l1_ttable) l1_list;
351 static struct mtx l1_lru_lock;
354 * The l2_dtable tracks L2_BUCKET_SIZE worth of L1 slots.
356 * This is normally 16MB worth L2 page descriptors for any given pmap.
357 * Reference counts are maintained for L2 descriptors so they can be
361 /* The number of L2 page descriptors allocated to this l2_dtable */
364 /* List of L2 page descriptors */
366 pt_entry_t *l2b_kva; /* KVA of L2 Descriptor Table */
367 vm_paddr_t l2b_phys; /* Physical address of same */
368 u_short l2b_l1idx; /* This L2 table's L1 index */
369 u_short l2b_occupancy; /* How many active descriptors */
370 } l2_bucket[L2_BUCKET_SIZE];
373 /* pmap_kenter_internal flags */
374 #define KENTER_CACHE 0x1
375 #define KENTER_USER 0x2
378 * Given an L1 table index, calculate the corresponding l2_dtable index
379 * and bucket index within the l2_dtable.
381 #define L2_IDX(l1idx) (((l1idx) >> L2_BUCKET_LOG2) & \
383 #define L2_BUCKET(l1idx) ((l1idx) & (L2_BUCKET_SIZE - 1))
386 * Given a virtual address, this macro returns the
387 * virtual address required to drop into the next L2 bucket.
389 #define L2_NEXT_BUCKET(va) (((va) & L1_S_FRAME) + L1_S_SIZE)
392 * We try to map the page tables write-through, if possible. However, not
393 * all CPUs have a write-through cache mode, so on those we have to sync
394 * the cache when we frob page tables.
396 * We try to evaluate this at compile time, if possible. However, it's
397 * not always possible to do that, hence this run-time var.
399 int pmap_needs_pte_sync;
402 * Macro to determine if a mapping might be resident in the
403 * instruction cache and/or TLB
405 #define PTE_BEEN_EXECD(pte) (L2_S_EXECUTABLE(pte) && L2_S_REFERENCED(pte))
408 * Macro to determine if a mapping might be resident in the
409 * data cache and/or TLB
411 #define PTE_BEEN_REFD(pte) (L2_S_REFERENCED(pte))
413 #ifndef PMAP_SHPGPERPROC
414 #define PMAP_SHPGPERPROC 200
417 #define pmap_is_current(pm) ((pm) == pmap_kernel() || \
418 curproc->p_vmspace->vm_map.pmap == (pm))
421 * Data for the pv entry allocation mechanism
423 static TAILQ_HEAD(pch, pv_chunk) pv_chunks = TAILQ_HEAD_INITIALIZER(pv_chunks);
424 static int pv_entry_count, pv_entry_max, pv_entry_high_water;
425 static struct md_page *pv_table;
426 static int shpgperproc = PMAP_SHPGPERPROC;
428 struct pv_chunk *pv_chunkbase; /* KVA block for pv_chunks */
429 int pv_maxchunks; /* How many chunks we have KVA for */
430 vm_offset_t pv_vafree; /* Freelist stored in the PTE */
432 static __inline struct pv_chunk *
433 pv_to_chunk(pv_entry_t pv)
436 return ((struct pv_chunk *)((uintptr_t)pv & ~(uintptr_t)PAGE_MASK));
439 #define PV_PMAP(pv) (pv_to_chunk(pv)->pc_pmap)
441 CTASSERT(sizeof(struct pv_chunk) == PAGE_SIZE);
442 CTASSERT(_NPCM == 8);
443 CTASSERT(_NPCPV == 252);
445 #define PC_FREE0_6 0xfffffffful /* Free values for index 0 through 6 */
446 #define PC_FREE7 0x0ffffffful /* Free values for index 7 */
448 static const uint32_t pc_freemask[_NPCM] = {
449 PC_FREE0_6, PC_FREE0_6, PC_FREE0_6,
450 PC_FREE0_6, PC_FREE0_6, PC_FREE0_6,
454 static SYSCTL_NODE(_vm, OID_AUTO, pmap, CTLFLAG_RD, 0, "VM/pmap parameters");
456 /* Superpages utilization enabled = 1 / disabled = 0 */
457 static int sp_enabled = 0;
458 SYSCTL_INT(_vm_pmap, OID_AUTO, sp_enabled, CTLFLAG_RDTUN, &sp_enabled, 0,
459 "Are large page mappings enabled?");
461 SYSCTL_INT(_vm_pmap, OID_AUTO, pv_entry_count, CTLFLAG_RD, &pv_entry_count, 0,
462 "Current number of pv entries");
465 static int pc_chunk_count, pc_chunk_allocs, pc_chunk_frees, pc_chunk_tryfail;
467 SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_count, CTLFLAG_RD, &pc_chunk_count, 0,
468 "Current number of pv entry chunks");
469 SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_allocs, CTLFLAG_RD, &pc_chunk_allocs, 0,
470 "Current number of pv entry chunks allocated");
471 SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_frees, CTLFLAG_RD, &pc_chunk_frees, 0,
472 "Current number of pv entry chunks frees");
473 SYSCTL_INT(_vm_pmap, OID_AUTO, pc_chunk_tryfail, CTLFLAG_RD, &pc_chunk_tryfail, 0,
474 "Number of times tried to get a chunk page but failed.");
476 static long pv_entry_frees, pv_entry_allocs;
477 static int pv_entry_spare;
479 SYSCTL_LONG(_vm_pmap, OID_AUTO, pv_entry_frees, CTLFLAG_RD, &pv_entry_frees, 0,
480 "Current number of pv entry frees");
481 SYSCTL_LONG(_vm_pmap, OID_AUTO, pv_entry_allocs, CTLFLAG_RD, &pv_entry_allocs, 0,
482 "Current number of pv entry allocs");
483 SYSCTL_INT(_vm_pmap, OID_AUTO, pv_entry_spare, CTLFLAG_RD, &pv_entry_spare, 0,
484 "Current number of spare pv entries");
488 static uma_zone_t l2table_zone;
489 static vm_offset_t pmap_kernel_l2dtable_kva;
490 static vm_offset_t pmap_kernel_l2ptp_kva;
491 static vm_paddr_t pmap_kernel_l2ptp_phys;
492 static struct rwlock pvh_global_lock;
494 int l1_mem_types[] = {
496 ARM_L1S_DEVICE_NOSHARE,
497 ARM_L1S_DEVICE_SHARE,
498 ARM_L1S_NRML_NOCACHE,
499 ARM_L1S_NRML_IWT_OWT,
500 ARM_L1S_NRML_IWB_OWB,
501 ARM_L1S_NRML_IWBA_OWBA
504 int l2l_mem_types[] = {
506 ARM_L2L_DEVICE_NOSHARE,
507 ARM_L2L_DEVICE_SHARE,
508 ARM_L2L_NRML_NOCACHE,
509 ARM_L2L_NRML_IWT_OWT,
510 ARM_L2L_NRML_IWB_OWB,
511 ARM_L2L_NRML_IWBA_OWBA
514 int l2s_mem_types[] = {
516 ARM_L2S_DEVICE_NOSHARE,
517 ARM_L2S_DEVICE_SHARE,
518 ARM_L2S_NRML_NOCACHE,
519 ARM_L2S_NRML_IWT_OWT,
520 ARM_L2S_NRML_IWB_OWB,
521 ARM_L2S_NRML_IWBA_OWBA
525 * This list exists for the benefit of pmap_map_chunk(). It keeps track
526 * of the kernel L2 tables during bootstrap, so that pmap_map_chunk() can
527 * find them as necessary.
529 * Note that the data on this list MUST remain valid after initarm() returns,
530 * as pmap_bootstrap() uses it to contruct L2 table metadata.
532 SLIST_HEAD(, pv_addr) kernel_pt_list = SLIST_HEAD_INITIALIZER(kernel_pt_list);
535 pmap_init_l1(struct l1_ttable *l1, pd_entry_t *l1pt)
540 l1->l1_domain_use_count = 0;
541 l1->l1_domain_first = 0;
543 for (i = 0; i < PMAP_DOMAINS; i++)
544 l1->l1_domain_free[i] = i + 1;
547 * Copy the kernel's L1 entries to each new L1.
549 if (l1pt != pmap_kernel()->pm_l1->l1_kva)
550 memcpy(l1pt, pmap_kernel()->pm_l1->l1_kva, L1_TABLE_SIZE);
552 if ((l1->l1_physaddr = pmap_extract(pmap_kernel(), (vm_offset_t)l1pt)) == 0)
553 panic("pmap_init_l1: can't get PA of L1 at %p", l1pt);
554 SLIST_INSERT_HEAD(&l1_list, l1, l1_link);
555 TAILQ_INSERT_TAIL(&l1_lru_list, l1, l1_lru);
559 kernel_pt_lookup(vm_paddr_t pa)
563 SLIST_FOREACH(pv, &kernel_pt_list, pv_list) {
571 pmap_pte_init_mmu_v6(void)
574 if (PTE_PAGETABLE >= 3)
575 pmap_needs_pte_sync = 1;
576 pte_l1_s_cache_mode = l1_mem_types[PTE_CACHE];
577 pte_l2_l_cache_mode = l2l_mem_types[PTE_CACHE];
578 pte_l2_s_cache_mode = l2s_mem_types[PTE_CACHE];
580 pte_l1_s_cache_mode_pt = l1_mem_types[PTE_PAGETABLE];
581 pte_l2_l_cache_mode_pt = l2l_mem_types[PTE_PAGETABLE];
582 pte_l2_s_cache_mode_pt = l2s_mem_types[PTE_PAGETABLE];
587 * Allocate an L1 translation table for the specified pmap.
588 * This is called at pmap creation time.
591 pmap_alloc_l1(pmap_t pmap)
593 struct l1_ttable *l1;
597 * Remove the L1 at the head of the LRU list
599 mtx_lock(&l1_lru_lock);
600 l1 = TAILQ_FIRST(&l1_lru_list);
601 TAILQ_REMOVE(&l1_lru_list, l1, l1_lru);
604 * Pick the first available domain number, and update
605 * the link to the next number.
607 domain = l1->l1_domain_first;
608 l1->l1_domain_first = l1->l1_domain_free[domain];
611 * If there are still free domain numbers in this L1,
612 * put it back on the TAIL of the LRU list.
614 if (++l1->l1_domain_use_count < PMAP_DOMAINS)
615 TAILQ_INSERT_TAIL(&l1_lru_list, l1, l1_lru);
617 mtx_unlock(&l1_lru_lock);
620 * Fix up the relevant bits in the pmap structure
623 pmap->pm_domain = domain + 1;
627 * Free an L1 translation table.
628 * This is called at pmap destruction time.
631 pmap_free_l1(pmap_t pmap)
633 struct l1_ttable *l1 = pmap->pm_l1;
635 mtx_lock(&l1_lru_lock);
638 * If this L1 is currently on the LRU list, remove it.
640 if (l1->l1_domain_use_count < PMAP_DOMAINS)
641 TAILQ_REMOVE(&l1_lru_list, l1, l1_lru);
644 * Free up the domain number which was allocated to the pmap
646 l1->l1_domain_free[pmap->pm_domain - 1] = l1->l1_domain_first;
647 l1->l1_domain_first = pmap->pm_domain - 1;
648 l1->l1_domain_use_count--;
651 * The L1 now must have at least 1 free domain, so add
652 * it back to the LRU list. If the use count is zero,
653 * put it at the head of the list, otherwise it goes
656 if (l1->l1_domain_use_count == 0) {
657 TAILQ_INSERT_HEAD(&l1_lru_list, l1, l1_lru);
659 TAILQ_INSERT_TAIL(&l1_lru_list, l1, l1_lru);
661 mtx_unlock(&l1_lru_lock);
665 * Returns a pointer to the L2 bucket associated with the specified pmap
666 * and VA, or NULL if no L2 bucket exists for the address.
668 static PMAP_INLINE struct l2_bucket *
669 pmap_get_l2_bucket(pmap_t pmap, vm_offset_t va)
671 struct l2_dtable *l2;
672 struct l2_bucket *l2b;
677 if ((l2 = pmap->pm_l2[L2_IDX(l1idx)]) == NULL ||
678 (l2b = &l2->l2_bucket[L2_BUCKET(l1idx)])->l2b_kva == NULL)
685 * Returns a pointer to the L2 bucket associated with the specified pmap
688 * If no L2 bucket exists, perform the necessary allocations to put an L2
689 * bucket/page table in place.
691 * Note that if a new L2 bucket/page was allocated, the caller *must*
692 * increment the bucket occupancy counter appropriately *before*
693 * releasing the pmap's lock to ensure no other thread or cpu deallocates
694 * the bucket/page in the meantime.
696 static struct l2_bucket *
697 pmap_alloc_l2_bucket(pmap_t pmap, vm_offset_t va)
699 struct l2_dtable *l2;
700 struct l2_bucket *l2b;
705 PMAP_ASSERT_LOCKED(pmap);
706 rw_assert(&pvh_global_lock, RA_WLOCKED);
707 if ((l2 = pmap->pm_l2[L2_IDX(l1idx)]) == NULL) {
709 * No mapping at this address, as there is
710 * no entry in the L1 table.
711 * Need to allocate a new l2_dtable.
714 rw_wunlock(&pvh_global_lock);
715 if ((l2 = uma_zalloc(l2table_zone, M_NOWAIT)) == NULL) {
716 rw_wlock(&pvh_global_lock);
720 rw_wlock(&pvh_global_lock);
722 if (pmap->pm_l2[L2_IDX(l1idx)] != NULL) {
724 * Someone already allocated the l2_dtable while
725 * we were doing the same.
727 uma_zfree(l2table_zone, l2);
728 l2 = pmap->pm_l2[L2_IDX(l1idx)];
730 bzero(l2, sizeof(*l2));
732 * Link it into the parent pmap
734 pmap->pm_l2[L2_IDX(l1idx)] = l2;
738 l2b = &l2->l2_bucket[L2_BUCKET(l1idx)];
741 * Fetch pointer to the L2 page table associated with the address.
743 if (l2b->l2b_kva == NULL) {
747 * No L2 page table has been allocated. Chances are, this
748 * is because we just allocated the l2_dtable, above.
751 rw_wunlock(&pvh_global_lock);
752 ptep = uma_zalloc(l2zone, M_NOWAIT);
753 rw_wlock(&pvh_global_lock);
755 if (l2b->l2b_kva != 0) {
756 /* We lost the race. */
757 uma_zfree(l2zone, ptep);
760 l2b->l2b_phys = vtophys(ptep);
763 * Oops, no more L2 page tables available at this
764 * time. We may need to deallocate the l2_dtable
765 * if we allocated a new one above.
767 if (l2->l2_occupancy == 0) {
768 pmap->pm_l2[L2_IDX(l1idx)] = NULL;
769 uma_zfree(l2table_zone, l2);
776 l2b->l2b_l1idx = l1idx;
782 static PMAP_INLINE void
783 pmap_free_l2_ptp(pt_entry_t *l2)
785 uma_zfree(l2zone, l2);
788 * One or more mappings in the specified L2 descriptor table have just been
791 * Garbage collect the metadata and descriptor table itself if necessary.
793 * The pmap lock must be acquired when this is called (not necessary
794 * for the kernel pmap).
797 pmap_free_l2_bucket(pmap_t pmap, struct l2_bucket *l2b, u_int count)
799 struct l2_dtable *l2;
800 pd_entry_t *pl1pd, l1pd;
806 * Update the bucket's reference count according to how many
807 * PTEs the caller has just invalidated.
809 l2b->l2b_occupancy -= count;
814 * Level 2 page tables allocated to the kernel pmap are never freed
815 * as that would require checking all Level 1 page tables and
816 * removing any references to the Level 2 page table. See also the
817 * comment elsewhere about never freeing bootstrap L2 descriptors.
819 * We make do with just invalidating the mapping in the L2 table.
821 * This isn't really a big deal in practice and, in fact, leads
822 * to a performance win over time as we don't need to continually
825 if (l2b->l2b_occupancy > 0 || pmap == pmap_kernel())
829 * There are no more valid mappings in this level 2 page table.
830 * Go ahead and NULL-out the pointer in the bucket, then
831 * free the page table.
833 l1idx = l2b->l2b_l1idx;
837 pl1pd = &pmap->pm_l1->l1_kva[l1idx];
840 * If the L1 slot matches the pmap's domain
841 * number, then invalidate it.
843 l1pd = *pl1pd & (L1_TYPE_MASK | L1_C_DOM_MASK);
844 if (l1pd == (L1_C_DOM(pmap->pm_domain) | L1_TYPE_C)) {
850 * Release the L2 descriptor table back to the pool cache.
852 pmap_free_l2_ptp(ptep);
855 * Update the reference count in the associated l2_dtable
857 l2 = pmap->pm_l2[L2_IDX(l1idx)];
858 if (--l2->l2_occupancy > 0)
862 * There are no more valid mappings in any of the Level 1
863 * slots managed by this l2_dtable. Go ahead and NULL-out
864 * the pointer in the parent pmap and free the l2_dtable.
866 pmap->pm_l2[L2_IDX(l1idx)] = NULL;
867 uma_zfree(l2table_zone, l2);
871 * Pool cache constructors for L2 descriptor tables, metadata and pmap
875 pmap_l2ptp_ctor(void *mem, int size, void *arg, int flags)
877 struct l2_bucket *l2b;
878 pt_entry_t *ptep, pte;
879 vm_offset_t va = (vm_offset_t)mem & ~PAGE_MASK;
882 * The mappings for these page tables were initially made using
883 * pmap_kenter() by the pool subsystem. Therefore, the cache-
884 * mode will not be right for page table mappings. To avoid
885 * polluting the pmap_kenter() code with a special case for
886 * page tables, we simply fix up the cache-mode here if it's not
889 l2b = pmap_get_l2_bucket(pmap_kernel(), va);
890 ptep = &l2b->l2b_kva[l2pte_index(va)];
893 cpu_idcache_wbinv_range(va, PAGE_SIZE);
894 pmap_l2cache_wbinv_range(va, pte & L2_S_FRAME, PAGE_SIZE);
895 if ((pte & L2_S_CACHE_MASK) != pte_l2_s_cache_mode_pt) {
897 * Page tables must have the cache-mode set to
900 *ptep = (pte & ~L2_S_CACHE_MASK) | pte_l2_s_cache_mode_pt;
902 cpu_tlb_flushD_SE(va);
906 memset(mem, 0, L2_TABLE_SIZE_REAL);
911 * Modify pte bits for all ptes corresponding to the given physical address.
912 * We use `maskbits' rather than `clearbits' because we're always passing
913 * constants and the latter would require an extra inversion at run-time.
916 pmap_clearbit(struct vm_page *m, u_int maskbits)
918 struct l2_bucket *l2b;
919 struct pv_entry *pv, *pve, *next_pv;
922 pt_entry_t *ptep, npte, opte;
928 rw_wlock(&pvh_global_lock);
929 if ((m->flags & PG_FICTITIOUS) != 0)
932 pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m));
933 TAILQ_FOREACH_SAFE(pv, &pvh->pv_list, pv_list, next_pv) {
937 pl1pd = &pmap->pm_l1->l1_kva[L1_IDX(va)];
938 KASSERT((*pl1pd & L1_TYPE_MASK) == L1_S_PROTO,
939 ("pmap_clearbit: valid section mapping expected"));
940 if ((maskbits & PVF_WRITE) && (pv->pv_flags & PVF_WRITE))
941 (void)pmap_demote_section(pmap, va);
942 else if ((maskbits & PVF_REF) && L1_S_REFERENCED(*pl1pd)) {
943 if (pmap_demote_section(pmap, va)) {
944 if ((pv->pv_flags & PVF_WIRED) == 0) {
946 * Remove the mapping to a single page
947 * so that a subsequent access may
948 * repromote. Since the underlying
949 * l2_bucket is fully populated, this
950 * removal never frees an entire
953 va += (VM_PAGE_TO_PHYS(m) &
955 l2b = pmap_get_l2_bucket(pmap, va);
957 ("pmap_clearbit: no l2 bucket for "
958 "va 0x%#x, pmap 0x%p", va, pmap));
959 ptep = &l2b->l2b_kva[l2pte_index(va)];
962 pmap_free_l2_bucket(pmap, l2b, 1);
963 pve = pmap_remove_pv(m, pmap, va);
964 KASSERT(pve != NULL, ("pmap_clearbit: "
965 "no PV entry for managed mapping"));
966 pmap_free_pv_entry(pmap, pve);
970 } else if ((maskbits & PVF_MOD) && L1_S_WRITABLE(*pl1pd)) {
971 if (pmap_demote_section(pmap, va)) {
972 if ((pv->pv_flags & PVF_WIRED) == 0) {
974 * Write protect the mapping to a
975 * single page so that a subsequent
976 * write access may repromote.
978 va += (VM_PAGE_TO_PHYS(m) &
980 l2b = pmap_get_l2_bucket(pmap, va);
982 ("pmap_clearbit: no l2 bucket for "
983 "va 0x%#x, pmap 0x%p", va, pmap));
984 ptep = &l2b->l2b_kva[l2pte_index(va)];
985 if ((*ptep & L2_S_PROTO) != 0) {
986 pve = pmap_find_pv(&m->md,
989 ("pmap_clearbit: no PV "
990 "entry for managed mapping"));
991 pve->pv_flags &= ~PVF_WRITE;
1002 if (TAILQ_EMPTY(&m->md.pv_list)) {
1003 rw_wunlock(&pvh_global_lock);
1008 * Loop over all current mappings setting/clearing as appropos
1010 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) {
1013 oflags = pv->pv_flags;
1014 pv->pv_flags &= ~maskbits;
1018 l2b = pmap_get_l2_bucket(pmap, va);
1019 KASSERT(l2b != NULL, ("pmap_clearbit: no l2 bucket for "
1020 "va 0x%#x, pmap 0x%p", va, pmap));
1022 ptep = &l2b->l2b_kva[l2pte_index(va)];
1023 npte = opte = *ptep;
1025 if (maskbits & (PVF_WRITE | PVF_MOD)) {
1026 /* make the pte read only */
1030 if (maskbits & PVF_REF) {
1032 * Clear referenced flag in PTE so that we
1033 * will take a flag fault the next time the mapping
1039 CTR4(KTR_PMAP,"clearbit: pmap:%p bits:%x pte:%x->%x",
1040 pmap, maskbits, opte, npte);
1045 /* Flush the TLB entry if a current pmap. */
1046 if (PTE_BEEN_EXECD(opte))
1047 cpu_tlb_flushID_SE(pv->pv_va);
1048 else if (PTE_BEEN_REFD(opte))
1049 cpu_tlb_flushD_SE(pv->pv_va);
1056 if (maskbits & PVF_WRITE)
1057 vm_page_aflag_clear(m, PGA_WRITEABLE);
1058 rw_wunlock(&pvh_global_lock);
1063 * main pv_entry manipulation functions:
1064 * pmap_enter_pv: enter a mapping onto a vm_page list
1065 * pmap_remove_pv: remove a mappiing from a vm_page list
1067 * NOTE: pmap_enter_pv expects to lock the pvh itself
1068 * pmap_remove_pv expects the caller to lock the pvh before calling
1072 * pmap_enter_pv: enter a mapping onto a vm_page's PV list
1074 * => caller should hold the proper lock on pvh_global_lock
1075 * => caller should have pmap locked
1076 * => we will (someday) gain the lock on the vm_page's PV list
1077 * => caller should adjust ptp's wire_count before calling
1078 * => caller should not adjust pmap's wire_count
1081 pmap_enter_pv(struct vm_page *m, struct pv_entry *pve, pmap_t pmap,
1082 vm_offset_t va, u_int flags)
1085 rw_assert(&pvh_global_lock, RA_WLOCKED);
1087 PMAP_ASSERT_LOCKED(pmap);
1089 pve->pv_flags = flags;
1091 TAILQ_INSERT_HEAD(&m->md.pv_list, pve, pv_list);
1092 if (pve->pv_flags & PVF_WIRED)
1093 ++pmap->pm_stats.wired_count;
1098 * pmap_find_pv: Find a pv entry
1100 * => caller should hold lock on vm_page
1102 static PMAP_INLINE struct pv_entry *
1103 pmap_find_pv(struct md_page *md, pmap_t pmap, vm_offset_t va)
1105 struct pv_entry *pv;
1107 rw_assert(&pvh_global_lock, RA_WLOCKED);
1108 TAILQ_FOREACH(pv, &md->pv_list, pv_list)
1109 if (pmap == PV_PMAP(pv) && va == pv->pv_va)
1116 * vector_page_setprot:
1118 * Manipulate the protection of the vector page.
1121 vector_page_setprot(int prot)
1123 struct l2_bucket *l2b;
1126 l2b = pmap_get_l2_bucket(pmap_kernel(), vector_page);
1128 ptep = &l2b->l2b_kva[l2pte_index(vector_page)];
1130 * Set referenced flag.
1131 * Vectors' page is always desired
1132 * to be allowed to reside in TLB.
1136 pmap_set_prot(ptep, prot|VM_PROT_EXECUTE, 0);
1138 cpu_tlb_flushD_SE(vector_page);
1143 pmap_set_prot(pt_entry_t *ptep, vm_prot_t prot, uint8_t user)
1146 *ptep &= ~(L2_S_PROT_MASK | L2_XN);
1148 if (!(prot & VM_PROT_EXECUTE))
1151 /* Set defaults first - kernel read access */
1153 *ptep |= L2_S_PROT_R;
1154 /* Now tune APs as desired */
1156 *ptep |= L2_S_PROT_U;
1158 if (prot & VM_PROT_WRITE)
1163 * pmap_remove_pv: try to remove a mapping from a pv_list
1165 * => caller should hold proper lock on pmap_main_lock
1166 * => pmap should be locked
1167 * => caller should hold lock on vm_page [so that attrs can be adjusted]
1168 * => caller should adjust ptp's wire_count and free PTP if needed
1169 * => caller should NOT adjust pmap's wire_count
1170 * => we return the removed pve
1172 static struct pv_entry *
1173 pmap_remove_pv(struct vm_page *m, pmap_t pmap, vm_offset_t va)
1175 struct pv_entry *pve;
1177 rw_assert(&pvh_global_lock, RA_WLOCKED);
1178 PMAP_ASSERT_LOCKED(pmap);
1180 pve = pmap_find_pv(&m->md, pmap, va); /* find corresponding pve */
1182 TAILQ_REMOVE(&m->md.pv_list, pve, pv_list);
1183 if (pve->pv_flags & PVF_WIRED)
1184 --pmap->pm_stats.wired_count;
1186 if (TAILQ_EMPTY(&m->md.pv_list))
1187 vm_page_aflag_clear(m, PGA_WRITEABLE);
1189 return(pve); /* return removed pve */
1194 * pmap_modify_pv: Update pv flags
1196 * => caller should hold lock on vm_page [so that attrs can be adjusted]
1197 * => caller should NOT adjust pmap's wire_count
1198 * => we return the old flags
1200 * Modify a physical-virtual mapping in the pv table
1203 pmap_modify_pv(struct vm_page *m, pmap_t pmap, vm_offset_t va,
1204 u_int clr_mask, u_int set_mask)
1206 struct pv_entry *npv;
1207 u_int flags, oflags;
1209 PMAP_ASSERT_LOCKED(pmap);
1210 rw_assert(&pvh_global_lock, RA_WLOCKED);
1211 if ((npv = pmap_find_pv(&m->md, pmap, va)) == NULL)
1215 * There is at least one VA mapping this page.
1217 oflags = npv->pv_flags;
1218 npv->pv_flags = flags = (oflags & ~clr_mask) | set_mask;
1220 if ((flags ^ oflags) & PVF_WIRED) {
1221 if (flags & PVF_WIRED)
1222 ++pmap->pm_stats.wired_count;
1224 --pmap->pm_stats.wired_count;
1230 /* Function to set the debug level of the pmap code */
1233 pmap_debug(int level)
1235 pmap_debug_level = level;
1236 dprintf("pmap_debug: level=%d\n", pmap_debug_level);
1238 #endif /* PMAP_DEBUG */
1241 pmap_pinit0(struct pmap *pmap)
1243 PDEBUG(1, printf("pmap_pinit0: pmap = %08x\n", (u_int32_t) pmap));
1245 bcopy(kernel_pmap, pmap, sizeof(*pmap));
1246 bzero(&pmap->pm_mtx, sizeof(pmap->pm_mtx));
1247 PMAP_LOCK_INIT(pmap);
1248 TAILQ_INIT(&pmap->pm_pvchunk);
1252 * Initialize a vm_page's machine-dependent fields.
1255 pmap_page_init(vm_page_t m)
1258 TAILQ_INIT(&m->md.pv_list);
1259 m->md.pv_memattr = VM_MEMATTR_DEFAULT;
1263 pmap_ptelist_alloc(vm_offset_t *head)
1270 return (va); /* Out of memory */
1273 if ((*head & L2_TYPE_MASK) != L2_TYPE_INV)
1274 panic("%s: va is not L2_TYPE_INV!", __func__);
1280 pmap_ptelist_free(vm_offset_t *head, vm_offset_t va)
1284 if ((va & L2_TYPE_MASK) != L2_TYPE_INV)
1285 panic("%s: freeing va that is not L2_TYPE INV!", __func__);
1287 *pte = *head; /* virtual! L2_TYPE is L2_TYPE_INV though */
1292 pmap_ptelist_init(vm_offset_t *head, void *base, int npages)
1298 for (i = npages - 1; i >= 0; i--) {
1299 va = (vm_offset_t)base + i * PAGE_SIZE;
1300 pmap_ptelist_free(head, va);
1305 * Initialize the pmap module.
1306 * Called by vm_init, to initialize any structures that the pmap
1307 * system needs to map virtual memory.
1315 PDEBUG(1, printf("pmap_init: phys_start = %08x\n", PHYSADDR));
1317 l2zone = uma_zcreate("L2 Table", L2_TABLE_SIZE_REAL, pmap_l2ptp_ctor,
1318 NULL, NULL, NULL, UMA_ALIGN_PTR, UMA_ZONE_VM | UMA_ZONE_NOFREE);
1319 l2table_zone = uma_zcreate("L2 Table", sizeof(struct l2_dtable), NULL,
1320 NULL, NULL, NULL, UMA_ALIGN_PTR, UMA_ZONE_VM | UMA_ZONE_NOFREE);
1323 * Are large page mappings supported and enabled?
1325 TUNABLE_INT_FETCH("vm.pmap.sp_enabled", &sp_enabled);
1327 KASSERT(MAXPAGESIZES > 1 && pagesizes[1] == 0,
1328 ("pmap_init: can't assign to pagesizes[1]"));
1329 pagesizes[1] = NBPDR;
1333 * Calculate the size of the pv head table for superpages.
1335 for (i = 0; phys_avail[i + 1]; i += 2);
1336 pv_npg = round_1mpage(phys_avail[(i - 2) + 1]) / NBPDR;
1339 * Allocate memory for the pv head table for superpages.
1341 s = (vm_size_t)(pv_npg * sizeof(struct md_page));
1343 pv_table = (struct md_page *)kmem_malloc(kernel_arena, s,
1345 for (i = 0; i < pv_npg; i++)
1346 TAILQ_INIT(&pv_table[i].pv_list);
1349 * Initialize the address space for the pv chunks.
1352 TUNABLE_INT_FETCH("vm.pmap.shpgperproc", &shpgperproc);
1353 pv_entry_max = shpgperproc * maxproc + cnt.v_page_count;
1354 TUNABLE_INT_FETCH("vm.pmap.pv_entries", &pv_entry_max);
1355 pv_entry_max = roundup(pv_entry_max, _NPCPV);
1356 pv_entry_high_water = 9 * (pv_entry_max / 10);
1358 pv_maxchunks = MAX(pv_entry_max / _NPCPV, maxproc);
1359 pv_chunkbase = (struct pv_chunk *)kva_alloc(PAGE_SIZE * pv_maxchunks);
1361 if (pv_chunkbase == NULL)
1362 panic("pmap_init: not enough kvm for pv chunks");
1364 pmap_ptelist_init(&pv_vafree, pv_chunkbase, pv_maxchunks);
1367 * Now it is safe to enable pv_table recording.
1369 PDEBUG(1, printf("pmap_init: done!\n"));
1372 SYSCTL_INT(_vm_pmap, OID_AUTO, pv_entry_max, CTLFLAG_RD, &pv_entry_max, 0,
1373 "Max number of PV entries");
1374 SYSCTL_INT(_vm_pmap, OID_AUTO, shpgperproc, CTLFLAG_RD, &shpgperproc, 0,
1375 "Page share factor per proc");
1377 static SYSCTL_NODE(_vm_pmap, OID_AUTO, section, CTLFLAG_RD, 0,
1378 "1MB page mapping counters");
1380 static u_long pmap_section_demotions;
1381 SYSCTL_ULONG(_vm_pmap_section, OID_AUTO, demotions, CTLFLAG_RD,
1382 &pmap_section_demotions, 0, "1MB page demotions");
1384 static u_long pmap_section_mappings;
1385 SYSCTL_ULONG(_vm_pmap_section, OID_AUTO, mappings, CTLFLAG_RD,
1386 &pmap_section_mappings, 0, "1MB page mappings");
1388 static u_long pmap_section_p_failures;
1389 SYSCTL_ULONG(_vm_pmap_section, OID_AUTO, p_failures, CTLFLAG_RD,
1390 &pmap_section_p_failures, 0, "1MB page promotion failures");
1392 static u_long pmap_section_promotions;
1393 SYSCTL_ULONG(_vm_pmap_section, OID_AUTO, promotions, CTLFLAG_RD,
1394 &pmap_section_promotions, 0, "1MB page promotions");
1397 pmap_fault_fixup(pmap_t pmap, vm_offset_t va, vm_prot_t ftype, int user)
1399 struct l2_dtable *l2;
1400 struct l2_bucket *l2b;
1401 pd_entry_t *pl1pd, l1pd;
1402 pt_entry_t *ptep, pte;
1408 rw_wlock(&pvh_global_lock);
1411 * Check and possibly fix-up L1 section mapping
1412 * only when superpage mappings are enabled to speed up.
1415 pl1pd = &pmap->pm_l1->l1_kva[l1idx];
1417 if ((l1pd & L1_TYPE_MASK) == L1_S_PROTO) {
1418 /* Catch an access to the vectors section */
1419 if (l1idx == L1_IDX(vector_page))
1422 * Stay away from the kernel mappings.
1423 * None of them should fault from L1 entry.
1425 if (pmap == pmap_kernel())
1428 * Catch a forbidden userland access
1430 if (user && !(l1pd & L1_S_PROT_U))
1433 * Superpage is always either mapped read only
1434 * or it is modified and permitted to be written
1435 * by default. Therefore, process only reference
1436 * flag fault and demote page in case of write fault.
1438 if ((ftype & VM_PROT_WRITE) && !L1_S_WRITABLE(l1pd) &&
1439 L1_S_REFERENCED(l1pd)) {
1440 (void)pmap_demote_section(pmap, va);
1442 } else if (!L1_S_REFERENCED(l1pd)) {
1443 /* Mark the page "referenced" */
1444 *pl1pd = l1pd | L1_S_REF;
1446 goto l1_section_out;
1452 * If there is no l2_dtable for this address, then the process
1453 * has no business accessing it.
1455 * Note: This will catch userland processes trying to access
1458 l2 = pmap->pm_l2[L2_IDX(l1idx)];
1463 * Likewise if there is no L2 descriptor table
1465 l2b = &l2->l2_bucket[L2_BUCKET(l1idx)];
1466 if (l2b->l2b_kva == NULL)
1470 * Check the PTE itself.
1472 ptep = &l2b->l2b_kva[l2pte_index(va)];
1478 * Catch a userland access to the vector page mapped at 0x0
1480 if (user && !(pte & L2_S_PROT_U))
1482 if (va == vector_page)
1486 CTR5(KTR_PMAP, "pmap_fault_fix: pmap:%p va:%x pte:0x%x ftype:%x user:%x",
1487 pmap, va, pte, ftype, user);
1488 if ((ftype & VM_PROT_WRITE) && !(L2_S_WRITABLE(pte)) &&
1489 L2_S_REFERENCED(pte)) {
1491 * This looks like a good candidate for "page modified"
1494 struct pv_entry *pv;
1497 /* Extract the physical address of the page */
1498 if ((m = PHYS_TO_VM_PAGE(pa)) == NULL) {
1501 /* Get the current flags for this page. */
1503 pv = pmap_find_pv(&m->md, pmap, va);
1509 * Do the flags say this page is writable? If not then it
1510 * is a genuine write fault. If yes then the write fault is
1511 * our fault as we did not reflect the write access in the
1512 * PTE. Now we know a write has occurred we can correct this
1513 * and also set the modified bit
1515 if ((pv->pv_flags & PVF_WRITE) == 0) {
1521 /* Re-enable write permissions for the page */
1522 pmap_set_prot(ptep, VM_PROT_WRITE, *ptep & L2_S_PROT_U);
1523 CTR1(KTR_PMAP, "pmap_fault_fix: new pte:0x%x", pte);
1526 } else if (!L2_S_REFERENCED(pte)) {
1528 * This looks like a good candidate for "page referenced"
1531 struct pv_entry *pv;
1534 /* Extract the physical address of the page */
1535 if ((m = PHYS_TO_VM_PAGE(pa)) == NULL)
1537 /* Get the current flags for this page. */
1538 pv = pmap_find_pv(&m->md, pmap, va);
1542 vm_page_aflag_set(m, PGA_REFERENCED);
1544 /* Mark the page "referenced" */
1545 *ptep = pte | L2_S_REF;
1551 * We know there is a valid mapping here, so simply
1552 * fix up the L1 if necessary.
1554 pl1pd = &pmap->pm_l1->l1_kva[l1idx];
1555 l1pd = l2b->l2b_phys | L1_C_DOM(pmap->pm_domain) | L1_C_PROTO;
1556 if (*pl1pd != l1pd) {
1564 * If 'rv == 0' at this point, it generally indicates that there is a
1565 * stale TLB entry for the faulting address. This happens when two or
1566 * more processes are sharing an L1. Since we don't flush the TLB on
1567 * a context switch between such processes, we can take domain faults
1568 * for mappings which exist at the same VA in both processes. EVEN IF
1569 * WE'VE RECENTLY FIXED UP THE CORRESPONDING L1 in pmap_enter(), for
1572 * This is extremely likely to happen if pmap_enter() updated the L1
1573 * entry for a recently entered mapping. In this case, the TLB is
1574 * flushed for the new mapping, but there may still be TLB entries for
1575 * other mappings belonging to other processes in the 1MB range
1576 * covered by the L1 entry.
1578 * Since 'rv == 0', we know that the L1 already contains the correct
1579 * value, so the fault must be due to a stale TLB entry.
1581 * Since we always need to flush the TLB anyway in the case where we
1582 * fixed up the L1, or frobbed the L2 PTE, we effectively deal with
1583 * stale TLB entries dynamically.
1585 * However, the above condition can ONLY happen if the current L1 is
1586 * being shared. If it happens when the L1 is unshared, it indicates
1587 * that other parts of the pmap are not doing their job WRT managing
1590 if (rv == 0 && pmap->pm_l1->l1_domain_use_count == 1) {
1591 printf("fixup: pmap %p, va 0x%08x, ftype %d - nothing to do!\n",
1593 printf("fixup: l2 %p, l2b %p, ptep %p, pl1pd %p\n",
1594 l2, l2b, ptep, pl1pd);
1595 printf("fixup: pte 0x%x, l1pd 0x%x, last code 0x%x\n",
1596 pte, l1pd, last_fault_code);
1604 cpu_tlb_flushID_SE(va);
1610 rw_wunlock(&pvh_global_lock);
1618 struct l2_bucket *l2b;
1619 struct l1_ttable *l1;
1621 pt_entry_t *ptep, pte;
1622 vm_offset_t va, eva;
1625 needed = (maxproc / PMAP_DOMAINS) + ((maxproc % PMAP_DOMAINS) ? 1 : 0);
1627 l1 = malloc(sizeof(*l1) * needed, M_VMPMAP, M_WAITOK);
1629 for (loop = 0; loop < needed; loop++, l1++) {
1630 /* Allocate a L1 page table */
1631 va = (vm_offset_t)contigmalloc(L1_TABLE_SIZE, M_VMPMAP, 0, 0x0,
1632 0xffffffff, L1_TABLE_SIZE, 0);
1635 panic("Cannot allocate L1 KVM");
1637 eva = va + L1_TABLE_SIZE;
1638 pl1pt = (pd_entry_t *)va;
1641 l2b = pmap_get_l2_bucket(pmap_kernel(), va);
1642 ptep = &l2b->l2b_kva[l2pte_index(va)];
1644 pte = (pte & ~L2_S_CACHE_MASK) | pte_l2_s_cache_mode_pt;
1647 cpu_tlb_flushD_SE(va);
1651 pmap_init_l1(l1, pl1pt);
1654 printf("pmap_postinit: Allocated %d static L1 descriptor tables\n",
1660 * This is used to stuff certain critical values into the PCB where they
1661 * can be accessed quickly from cpu_switch() et al.
1664 pmap_set_pcb_pagedir(pmap_t pmap, struct pcb *pcb)
1666 struct l2_bucket *l2b;
1668 pcb->pcb_pagedir = pmap->pm_l1->l1_physaddr;
1669 pcb->pcb_dacr = (DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL * 2)) |
1670 (DOMAIN_CLIENT << (pmap->pm_domain * 2));
1672 if (vector_page < KERNBASE) {
1673 pcb->pcb_pl1vec = &pmap->pm_l1->l1_kva[L1_IDX(vector_page)];
1674 l2b = pmap_get_l2_bucket(pmap, vector_page);
1675 pcb->pcb_l1vec = l2b->l2b_phys | L1_C_PROTO |
1676 L1_C_DOM(pmap->pm_domain) | L1_C_DOM(PMAP_DOMAIN_KERNEL);
1678 pcb->pcb_pl1vec = NULL;
1682 pmap_activate(struct thread *td)
1687 pmap = vmspace_pmap(td->td_proc->p_vmspace);
1691 pmap_set_pcb_pagedir(pmap, pcb);
1693 if (td == curthread) {
1694 u_int cur_dacr, cur_ttb;
1696 __asm __volatile("mrc p15, 0, %0, c2, c0, 0" : "=r"(cur_ttb));
1697 __asm __volatile("mrc p15, 0, %0, c3, c0, 0" : "=r"(cur_dacr));
1699 cur_ttb &= ~(L1_TABLE_SIZE - 1);
1701 if (cur_ttb == (u_int)pcb->pcb_pagedir &&
1702 cur_dacr == pcb->pcb_dacr) {
1704 * No need to switch address spaces.
1712 * We MUST, I repeat, MUST fix up the L1 entry corresponding
1713 * to 'vector_page' in the incoming L1 table before switching
1714 * to it otherwise subsequent interrupts/exceptions (including
1715 * domain faults!) will jump into hyperspace.
1717 if (pcb->pcb_pl1vec) {
1718 *pcb->pcb_pl1vec = pcb->pcb_l1vec;
1721 cpu_domains(pcb->pcb_dacr);
1722 cpu_setttb(pcb->pcb_pagedir);
1728 pmap_set_pt_cache_mode(pd_entry_t *kl1, vm_offset_t va)
1730 pd_entry_t *pdep, pde;
1731 pt_entry_t *ptep, pte;
1736 * Make sure the descriptor itself has the correct cache mode
1738 pdep = &kl1[L1_IDX(va)];
1741 if (l1pte_section_p(pde)) {
1742 if ((pde & L1_S_CACHE_MASK) != pte_l1_s_cache_mode_pt) {
1743 *pdep = (pde & ~L1_S_CACHE_MASK) |
1744 pte_l1_s_cache_mode_pt;
1749 pa = (vm_paddr_t)(pde & L1_C_ADDR_MASK);
1750 ptep = (pt_entry_t *)kernel_pt_lookup(pa);
1752 panic("pmap_bootstrap: No L2 for L2 @ va %p\n", ptep);
1754 ptep = &ptep[l2pte_index(va)];
1756 if ((pte & L2_S_CACHE_MASK) != pte_l2_s_cache_mode_pt) {
1757 *ptep = (pte & ~L2_S_CACHE_MASK) |
1758 pte_l2_s_cache_mode_pt;
1768 pmap_alloc_specials(vm_offset_t *availp, int pages, vm_offset_t *vap,
1771 vm_offset_t va = *availp;
1772 struct l2_bucket *l2b;
1775 l2b = pmap_get_l2_bucket(pmap_kernel(), va);
1777 panic("pmap_alloc_specials: no l2b for 0x%x", va);
1779 *ptep = &l2b->l2b_kva[l2pte_index(va)];
1783 *availp = va + (PAGE_SIZE * pages);
1787 * Bootstrap the system enough to run with virtual memory.
1789 * On the arm this is called after mapping has already been enabled
1790 * and just syncs the pmap module with what has already been done.
1791 * [We can't call it easily with mapping off since the kernel is not
1792 * mapped with PA == VA, hence we would have to relocate every address
1793 * from the linked base (virtual) address "KERNBASE" to the actual
1794 * (physical) address starting relative to 0]
1796 #define PMAP_STATIC_L2_SIZE 16
1799 pmap_bootstrap(vm_offset_t firstaddr, struct pv_addr *l1pt)
1801 static struct l1_ttable static_l1;
1802 static struct l2_dtable static_l2[PMAP_STATIC_L2_SIZE];
1803 struct l1_ttable *l1 = &static_l1;
1804 struct l2_dtable *l2;
1805 struct l2_bucket *l2b;
1807 pd_entry_t *kernel_l1pt = (pd_entry_t *)l1pt->pv_va;
1812 int l1idx, l2idx, l2next = 0;
1814 PDEBUG(1, printf("firstaddr = %08x, lastaddr = %08x\n",
1815 firstaddr, vm_max_kernel_address));
1817 virtual_avail = firstaddr;
1818 kernel_pmap->pm_l1 = l1;
1819 kernel_l1pa = l1pt->pv_pa;
1822 * Scan the L1 translation table created by initarm() and create
1823 * the required metadata for all valid mappings found in it.
1825 for (l1idx = 0; l1idx < (L1_TABLE_SIZE / sizeof(pd_entry_t)); l1idx++) {
1826 pde = kernel_l1pt[l1idx];
1829 * We're only interested in Coarse mappings.
1830 * pmap_extract() can deal with section mappings without
1831 * recourse to checking L2 metadata.
1833 if ((pde & L1_TYPE_MASK) != L1_TYPE_C)
1837 * Lookup the KVA of this L2 descriptor table
1839 pa = (vm_paddr_t)(pde & L1_C_ADDR_MASK);
1840 ptep = (pt_entry_t *)kernel_pt_lookup(pa);
1843 panic("pmap_bootstrap: No L2 for va 0x%x, pa 0x%lx",
1844 (u_int)l1idx << L1_S_SHIFT, (long unsigned int)pa);
1848 * Fetch the associated L2 metadata structure.
1849 * Allocate a new one if necessary.
1851 if ((l2 = kernel_pmap->pm_l2[L2_IDX(l1idx)]) == NULL) {
1852 if (l2next == PMAP_STATIC_L2_SIZE)
1853 panic("pmap_bootstrap: out of static L2s");
1854 kernel_pmap->pm_l2[L2_IDX(l1idx)] = l2 =
1855 &static_l2[l2next++];
1859 * One more L1 slot tracked...
1864 * Fill in the details of the L2 descriptor in the
1865 * appropriate bucket.
1867 l2b = &l2->l2_bucket[L2_BUCKET(l1idx)];
1868 l2b->l2b_kva = ptep;
1870 l2b->l2b_l1idx = l1idx;
1873 * Establish an initial occupancy count for this descriptor
1876 l2idx < (L2_TABLE_SIZE_REAL / sizeof(pt_entry_t));
1878 if ((ptep[l2idx] & L2_TYPE_MASK) != L2_TYPE_INV) {
1879 l2b->l2b_occupancy++;
1884 * Make sure the descriptor itself has the correct cache mode.
1885 * If not, fix it, but whine about the problem. Port-meisters
1886 * should consider this a clue to fix up their initarm()
1889 if (pmap_set_pt_cache_mode(kernel_l1pt, (vm_offset_t)ptep)) {
1890 printf("pmap_bootstrap: WARNING! wrong cache mode for "
1891 "L2 pte @ %p\n", ptep);
1897 * Ensure the primary (kernel) L1 has the correct cache mode for
1898 * a page table. Bitch if it is not correctly set.
1900 for (va = (vm_offset_t)kernel_l1pt;
1901 va < ((vm_offset_t)kernel_l1pt + L1_TABLE_SIZE); va += PAGE_SIZE) {
1902 if (pmap_set_pt_cache_mode(kernel_l1pt, va))
1903 printf("pmap_bootstrap: WARNING! wrong cache mode for "
1904 "primary L1 @ 0x%x\n", va);
1907 cpu_dcache_wbinv_all();
1908 cpu_l2cache_wbinv_all();
1912 PMAP_LOCK_INIT(kernel_pmap);
1913 CPU_FILL(&kernel_pmap->pm_active);
1914 kernel_pmap->pm_domain = PMAP_DOMAIN_KERNEL;
1915 TAILQ_INIT(&kernel_pmap->pm_pvchunk);
1918 * Initialize the global pv list lock.
1920 rw_init(&pvh_global_lock, "pmap pv global");
1923 * Reserve some special page table entries/VA space for temporary
1927 pmap_alloc_specials(&virtual_avail, 1, &csrcp, &csrc_pte);
1928 pmap_set_pt_cache_mode(kernel_l1pt, (vm_offset_t)csrc_pte);
1929 pmap_alloc_specials(&virtual_avail, 1, &cdstp, &cdst_pte);
1930 pmap_set_pt_cache_mode(kernel_l1pt, (vm_offset_t)cdst_pte);
1931 size = ((vm_max_kernel_address - pmap_curmaxkvaddr) + L1_S_OFFSET) /
1933 pmap_alloc_specials(&virtual_avail,
1934 round_page(size * L2_TABLE_SIZE_REAL) / PAGE_SIZE,
1935 &pmap_kernel_l2ptp_kva, NULL);
1937 size = (size + (L2_BUCKET_SIZE - 1)) / L2_BUCKET_SIZE;
1938 pmap_alloc_specials(&virtual_avail,
1939 round_page(size * sizeof(struct l2_dtable)) / PAGE_SIZE,
1940 &pmap_kernel_l2dtable_kva, NULL);
1942 pmap_alloc_specials(&virtual_avail,
1943 1, (vm_offset_t*)&_tmppt, NULL);
1944 pmap_alloc_specials(&virtual_avail,
1945 MAXDUMPPGS, (vm_offset_t *)&crashdumpmap, NULL);
1946 SLIST_INIT(&l1_list);
1947 TAILQ_INIT(&l1_lru_list);
1948 mtx_init(&l1_lru_lock, "l1 list lock", NULL, MTX_DEF);
1949 pmap_init_l1(l1, kernel_l1pt);
1950 cpu_dcache_wbinv_all();
1951 cpu_l2cache_wbinv_all();
1953 virtual_avail = round_page(virtual_avail);
1954 virtual_end = vm_max_kernel_address;
1955 kernel_vm_end = pmap_curmaxkvaddr;
1956 mtx_init(&cmtx, "TMP mappings mtx", NULL, MTX_DEF);
1958 pmap_set_pcb_pagedir(kernel_pmap, thread0.td_pcb);
1961 /***************************************************
1962 * Pmap allocation/deallocation routines.
1963 ***************************************************/
1966 * Release any resources held by the given physical map.
1967 * Called when a pmap initialized by pmap_pinit is being released.
1968 * Should only be called if the map contains no valid mappings.
1971 pmap_release(pmap_t pmap)
1975 cpu_idcache_wbinv_all();
1976 cpu_l2cache_wbinv_all();
1979 if (vector_page < KERNBASE) {
1980 struct pcb *curpcb = PCPU_GET(curpcb);
1981 pcb = thread0.td_pcb;
1982 if (pmap_is_current(pmap)) {
1984 * Frob the L1 entry corresponding to the vector
1985 * page so that it contains the kernel pmap's domain
1986 * number. This will ensure pmap_remove() does not
1987 * pull the current vector page out from under us.
1990 *pcb->pcb_pl1vec = pcb->pcb_l1vec;
1991 cpu_domains(pcb->pcb_dacr);
1992 cpu_setttb(pcb->pcb_pagedir);
1995 pmap_remove(pmap, vector_page, vector_page + PAGE_SIZE);
1997 * Make sure cpu_switch(), et al, DTRT. This is safe to do
1998 * since this process has no remaining mappings of its own.
2000 curpcb->pcb_pl1vec = pcb->pcb_pl1vec;
2001 curpcb->pcb_l1vec = pcb->pcb_l1vec;
2002 curpcb->pcb_dacr = pcb->pcb_dacr;
2003 curpcb->pcb_pagedir = pcb->pcb_pagedir;
2008 dprintf("pmap_release()\n");
2014 * Helper function for pmap_grow_l2_bucket()
2017 pmap_grow_map(vm_offset_t va, pt_entry_t cache_mode, vm_paddr_t *pap)
2019 struct l2_bucket *l2b;
2024 m = vm_page_alloc(NULL, 0, VM_ALLOC_NOOBJ | VM_ALLOC_WIRED);
2027 pa = VM_PAGE_TO_PHYS(m);
2032 l2b = pmap_get_l2_bucket(pmap_kernel(), va);
2034 ptep = &l2b->l2b_kva[l2pte_index(va)];
2035 *ptep = L2_S_PROTO | pa | cache_mode | L2_S_REF;
2036 pmap_set_prot(ptep, VM_PROT_READ | VM_PROT_WRITE, 0);
2043 * This is the same as pmap_alloc_l2_bucket(), except that it is only
2044 * used by pmap_growkernel().
2046 static __inline struct l2_bucket *
2047 pmap_grow_l2_bucket(pmap_t pmap, vm_offset_t va)
2049 struct l2_dtable *l2;
2050 struct l2_bucket *l2b;
2051 struct l1_ttable *l1;
2058 if ((l2 = pmap->pm_l2[L2_IDX(l1idx)]) == NULL) {
2060 * No mapping at this address, as there is
2061 * no entry in the L1 table.
2062 * Need to allocate a new l2_dtable.
2064 nva = pmap_kernel_l2dtable_kva;
2065 if ((nva & PAGE_MASK) == 0) {
2067 * Need to allocate a backing page
2069 if (pmap_grow_map(nva, pte_l2_s_cache_mode, NULL))
2073 l2 = (struct l2_dtable *)nva;
2074 nva += sizeof(struct l2_dtable);
2076 if ((nva & PAGE_MASK) < (pmap_kernel_l2dtable_kva &
2079 * The new l2_dtable straddles a page boundary.
2080 * Map in another page to cover it.
2082 if (pmap_grow_map(nva, pte_l2_s_cache_mode, NULL))
2086 pmap_kernel_l2dtable_kva = nva;
2089 * Link it into the parent pmap
2091 pmap->pm_l2[L2_IDX(l1idx)] = l2;
2092 memset(l2, 0, sizeof(*l2));
2095 l2b = &l2->l2_bucket[L2_BUCKET(l1idx)];
2098 * Fetch pointer to the L2 page table associated with the address.
2100 if (l2b->l2b_kva == NULL) {
2104 * No L2 page table has been allocated. Chances are, this
2105 * is because we just allocated the l2_dtable, above.
2107 nva = pmap_kernel_l2ptp_kva;
2108 ptep = (pt_entry_t *)nva;
2109 if ((nva & PAGE_MASK) == 0) {
2111 * Need to allocate a backing page
2113 if (pmap_grow_map(nva, pte_l2_s_cache_mode_pt,
2114 &pmap_kernel_l2ptp_phys))
2117 memset(ptep, 0, L2_TABLE_SIZE_REAL);
2119 l2b->l2b_kva = ptep;
2120 l2b->l2b_l1idx = l1idx;
2121 l2b->l2b_phys = pmap_kernel_l2ptp_phys;
2123 pmap_kernel_l2ptp_kva += L2_TABLE_SIZE_REAL;
2124 pmap_kernel_l2ptp_phys += L2_TABLE_SIZE_REAL;
2127 /* Distribute new L1 entry to all other L1s */
2128 SLIST_FOREACH(l1, &l1_list, l1_link) {
2129 pl1pd = &l1->l1_kva[L1_IDX(va)];
2130 *pl1pd = l2b->l2b_phys | L1_C_DOM(PMAP_DOMAIN_KERNEL) |
2140 * grow the number of kernel page table entries, if needed
2143 pmap_growkernel(vm_offset_t addr)
2145 pmap_t kpmap = pmap_kernel();
2147 if (addr <= pmap_curmaxkvaddr)
2148 return; /* we are OK */
2151 * whoops! we need to add kernel PTPs
2154 /* Map 1MB at a time */
2155 for (; pmap_curmaxkvaddr < addr; pmap_curmaxkvaddr += L1_S_SIZE)
2156 pmap_grow_l2_bucket(kpmap, pmap_curmaxkvaddr);
2159 * flush out the cache, expensive but growkernel will happen so
2162 cpu_dcache_wbinv_all();
2163 cpu_l2cache_wbinv_all();
2166 kernel_vm_end = pmap_curmaxkvaddr;
2170 * Returns TRUE if the given page is mapped individually or as part of
2171 * a 1MB section. Otherwise, returns FALSE.
2174 pmap_page_is_mapped(vm_page_t m)
2178 if ((m->oflags & VPO_UNMANAGED) != 0)
2180 rw_wlock(&pvh_global_lock);
2181 rv = !TAILQ_EMPTY(&m->md.pv_list) ||
2182 ((m->flags & PG_FICTITIOUS) == 0 &&
2183 !TAILQ_EMPTY(&pa_to_pvh(VM_PAGE_TO_PHYS(m))->pv_list));
2184 rw_wunlock(&pvh_global_lock);
2189 * Remove all pages from specified address space
2190 * this aids process exit speeds. Also, this code
2191 * is special cased for current process only, but
2192 * can have the more generic (and slightly slower)
2193 * mode enabled. This is much faster than pmap_remove
2194 * in the case of running down an entire address space.
2197 pmap_remove_pages(pmap_t pmap)
2199 struct pv_entry *pv;
2200 struct l2_bucket *l2b = NULL;
2201 struct pv_chunk *pc, *npc;
2202 struct md_page *pvh;
2203 pd_entry_t *pl1pd, l1pd;
2207 uint32_t inuse, bitmask;
2208 int allfree, bit, field, idx;
2210 rw_wlock(&pvh_global_lock);
2213 TAILQ_FOREACH_SAFE(pc, &pmap->pm_pvchunk, pc_list, npc) {
2215 for (field = 0; field < _NPCM; field++) {
2216 inuse = ~pc->pc_map[field] & pc_freemask[field];
2217 while (inuse != 0) {
2218 bit = ffs(inuse) - 1;
2219 bitmask = 1ul << bit;
2220 idx = field * sizeof(inuse) * NBBY + bit;
2221 pv = &pc->pc_pventry[idx];
2224 if (pv->pv_flags & PVF_WIRED) {
2225 /* Cannot remove wired pages now. */
2229 pl1pd = &pmap->pm_l1->l1_kva[L1_IDX(va)];
2231 l2b = pmap_get_l2_bucket(pmap, va);
2232 if ((l1pd & L1_TYPE_MASK) == L1_S_PROTO) {
2233 pvh = pa_to_pvh(l1pd & L1_S_FRAME);
2234 TAILQ_REMOVE(&pvh->pv_list, pv, pv_list);
2235 if (TAILQ_EMPTY(&pvh->pv_list)) {
2236 m = PHYS_TO_VM_PAGE(l1pd & L1_S_FRAME);
2237 KASSERT((vm_offset_t)m >= KERNBASE,
2238 ("Trying to access non-existent page "
2239 "va %x l1pd %x", trunc_1mpage(va), l1pd));
2240 for (mt = m; mt < &m[L2_PTE_NUM_TOTAL]; mt++) {
2241 if (TAILQ_EMPTY(&mt->md.pv_list))
2242 vm_page_aflag_clear(mt, PGA_WRITEABLE);
2246 KASSERT(l2b->l2b_occupancy == L2_PTE_NUM_TOTAL,
2247 ("pmap_remove_pages: l2_bucket occupancy error"));
2248 pmap_free_l2_bucket(pmap, l2b, L2_PTE_NUM_TOTAL);
2250 pmap->pm_stats.resident_count -= L2_PTE_NUM_TOTAL;
2254 KASSERT(l2b != NULL,
2255 ("No L2 bucket in pmap_remove_pages"));
2256 ptep = &l2b->l2b_kva[l2pte_index(va)];
2257 m = PHYS_TO_VM_PAGE(l2pte_pa(*ptep));
2258 KASSERT((vm_offset_t)m >= KERNBASE,
2259 ("Trying to access non-existent page "
2260 "va %x pte %x", va, *ptep));
2261 TAILQ_REMOVE(&m->md.pv_list, pv, pv_list);
2262 if (TAILQ_EMPTY(&m->md.pv_list) &&
2263 (m->flags & PG_FICTITIOUS) == 0) {
2264 pvh = pa_to_pvh(l2pte_pa(*ptep));
2265 if (TAILQ_EMPTY(&pvh->pv_list))
2266 vm_page_aflag_clear(m, PGA_WRITEABLE);
2270 pmap_free_l2_bucket(pmap, l2b, 1);
2271 pmap->pm_stats.resident_count--;
2275 PV_STAT(pv_entry_frees++);
2276 PV_STAT(pv_entry_spare++);
2278 pc->pc_map[field] |= bitmask;
2282 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
2283 pmap_free_pv_chunk(pc);
2288 rw_wunlock(&pvh_global_lock);
2295 /***************************************************
2296 * Low level mapping routines.....
2297 ***************************************************/
2299 #ifdef ARM_HAVE_SUPERSECTIONS
2300 /* Map a super section into the KVA. */
2303 pmap_kenter_supersection(vm_offset_t va, uint64_t pa, int flags)
2305 pd_entry_t pd = L1_S_PROTO | L1_S_SUPERSEC | (pa & L1_SUP_FRAME) |
2306 (((pa >> 32) & 0xf) << 20) | L1_S_PROT(PTE_KERNEL,
2307 VM_PROT_READ|VM_PROT_WRITE|VM_PROT_EXECUTE) |
2308 L1_S_DOM(PMAP_DOMAIN_KERNEL);
2309 struct l1_ttable *l1;
2310 vm_offset_t va0, va_end;
2312 KASSERT(((va | pa) & L1_SUP_OFFSET) == 0,
2313 ("Not a valid super section mapping"));
2314 if (flags & SECTION_CACHE)
2315 pd |= pte_l1_s_cache_mode;
2316 else if (flags & SECTION_PT)
2317 pd |= pte_l1_s_cache_mode_pt;
2319 va0 = va & L1_SUP_FRAME;
2320 va_end = va + L1_SUP_SIZE;
2321 SLIST_FOREACH(l1, &l1_list, l1_link) {
2323 for (; va < va_end; va += L1_S_SIZE) {
2324 l1->l1_kva[L1_IDX(va)] = pd;
2325 PTE_SYNC(&l1->l1_kva[L1_IDX(va)]);
2331 /* Map a section into the KVA. */
2334 pmap_kenter_section(vm_offset_t va, vm_offset_t pa, int flags)
2336 pd_entry_t pd = L1_S_PROTO | pa | L1_S_PROT(PTE_KERNEL,
2337 VM_PROT_READ|VM_PROT_WRITE|VM_PROT_EXECUTE) | L1_S_REF |
2338 L1_S_DOM(PMAP_DOMAIN_KERNEL);
2339 struct l1_ttable *l1;
2341 KASSERT(((va | pa) & L1_S_OFFSET) == 0,
2342 ("Not a valid section mapping"));
2343 if (flags & SECTION_CACHE)
2344 pd |= pte_l1_s_cache_mode;
2345 else if (flags & SECTION_PT)
2346 pd |= pte_l1_s_cache_mode_pt;
2348 SLIST_FOREACH(l1, &l1_list, l1_link) {
2349 l1->l1_kva[L1_IDX(va)] = pd;
2350 PTE_SYNC(&l1->l1_kva[L1_IDX(va)]);
2355 * Make a temporary mapping for a physical address. This is only intended
2356 * to be used for panic dumps.
2359 pmap_kenter_temp(vm_paddr_t pa, int i)
2363 va = (vm_offset_t)crashdumpmap + (i * PAGE_SIZE);
2364 pmap_kenter(va, pa);
2365 return ((void *)crashdumpmap);
2369 * add a wired page to the kva
2370 * note that in order for the mapping to take effect -- you
2371 * should do a invltlb after doing the pmap_kenter...
2373 static PMAP_INLINE void
2374 pmap_kenter_internal(vm_offset_t va, vm_offset_t pa, int flags)
2376 struct l2_bucket *l2b;
2380 PDEBUG(1, printf("pmap_kenter: va = %08x, pa = %08x\n",
2381 (uint32_t) va, (uint32_t) pa));
2384 l2b = pmap_get_l2_bucket(pmap_kernel(), va);
2386 l2b = pmap_grow_l2_bucket(pmap_kernel(), va);
2387 KASSERT(l2b != NULL, ("No L2 Bucket"));
2389 ptep = &l2b->l2b_kva[l2pte_index(va)];
2391 if (l2pte_valid(opte)) {
2392 cpu_tlb_flushD_SE(va);
2396 l2b->l2b_occupancy++;
2399 if (flags & KENTER_CACHE) {
2400 *ptep = L2_S_PROTO | pa | pte_l2_s_cache_mode | L2_S_REF;
2401 pmap_set_prot(ptep, VM_PROT_READ | VM_PROT_WRITE,
2402 flags & KENTER_USER);
2404 *ptep = L2_S_PROTO | pa | L2_S_REF;
2405 pmap_set_prot(ptep, VM_PROT_READ|VM_PROT_WRITE|VM_PROT_EXECUTE,
2409 PDEBUG(1, printf("pmap_kenter: pte = %08x, opte = %08x, npte = %08x\n",
2410 (uint32_t) ptep, opte, *ptep));
2416 pmap_kenter(vm_offset_t va, vm_paddr_t pa)
2418 pmap_kenter_internal(va, pa, KENTER_CACHE);
2422 pmap_kenter_nocache(vm_offset_t va, vm_paddr_t pa)
2425 pmap_kenter_internal(va, pa, 0);
2429 pmap_kenter_device(vm_offset_t va, vm_paddr_t pa)
2433 * XXX - Need a way for kenter_internal to handle PTE_DEVICE mapping as
2434 * a potentially different thing than PTE_NOCACHE.
2436 pmap_kenter_internal(va, pa, 0);
2440 pmap_kenter_user(vm_offset_t va, vm_paddr_t pa)
2443 pmap_kenter_internal(va, pa, KENTER_CACHE|KENTER_USER);
2445 * Call pmap_fault_fixup now, to make sure we'll have no exception
2446 * at the first use of the new address, or bad things will happen,
2447 * as we use one of these addresses in the exception handlers.
2449 pmap_fault_fixup(pmap_kernel(), va, VM_PROT_READ|VM_PROT_WRITE, 1);
2453 pmap_kextract(vm_offset_t va)
2456 return (pmap_extract_locked(kernel_pmap, va));
2460 * remove a page from the kernel pagetables
2463 pmap_kremove(vm_offset_t va)
2465 struct l2_bucket *l2b;
2466 pt_entry_t *ptep, opte;
2468 l2b = pmap_get_l2_bucket(pmap_kernel(), va);
2471 KASSERT(l2b != NULL, ("No L2 Bucket"));
2472 ptep = &l2b->l2b_kva[l2pte_index(va)];
2474 if (l2pte_valid(opte)) {
2475 va = va & ~PAGE_MASK;
2476 cpu_tlb_flushD_SE(va);
2485 * Used to map a range of physical addresses into kernel
2486 * virtual address space.
2488 * The value passed in '*virt' is a suggested virtual address for
2489 * the mapping. Architectures which can support a direct-mapped
2490 * physical to virtual region can return the appropriate address
2491 * within that region, leaving '*virt' unchanged. Other
2492 * architectures should map the pages starting at '*virt' and
2493 * update '*virt' with the first usable address after the mapped
2497 pmap_map(vm_offset_t *virt, vm_offset_t start, vm_offset_t end, int prot)
2499 vm_offset_t sva = *virt;
2500 vm_offset_t va = sva;
2502 PDEBUG(1, printf("pmap_map: virt = %08x, start = %08x, end = %08x, "
2503 "prot = %d\n", (uint32_t) *virt, (uint32_t) start, (uint32_t) end,
2506 while (start < end) {
2507 pmap_kenter(va, start);
2516 * Add a list of wired pages to the kva
2517 * this routine is only used for temporary
2518 * kernel mappings that do not need to have
2519 * page modification or references recorded.
2520 * Note that old mappings are simply written
2521 * over. The page *must* be wired.
2524 pmap_qenter(vm_offset_t va, vm_page_t *m, int count)
2528 for (i = 0; i < count; i++) {
2529 pmap_kenter_internal(va, VM_PAGE_TO_PHYS(m[i]),
2537 * this routine jerks page mappings from the
2538 * kernel -- it is meant only for temporary mappings.
2541 pmap_qremove(vm_offset_t va, int count)
2545 for (i = 0; i < count; i++) {
2555 * pmap_object_init_pt preloads the ptes for a given object
2556 * into the specified pmap. This eliminates the blast of soft
2557 * faults on process startup and immediately after an mmap.
2560 pmap_object_init_pt(pmap_t pmap, vm_offset_t addr, vm_object_t object,
2561 vm_pindex_t pindex, vm_size_t size)
2564 VM_OBJECT_ASSERT_WLOCKED(object);
2565 KASSERT(object->type == OBJT_DEVICE || object->type == OBJT_SG,
2566 ("pmap_object_init_pt: non-device object"));
2571 * pmap_is_prefaultable:
2573 * Return whether or not the specified virtual address is elgible
2577 pmap_is_prefaultable(pmap_t pmap, vm_offset_t addr)
2582 if (!pmap_get_pde_pte(pmap, addr, &pdep, &ptep))
2584 KASSERT((pdep != NULL && (l1pte_section_p(*pdep) || ptep != NULL)),
2585 ("Valid mapping but no pte ?"));
2586 if (*pdep != 0 && !l1pte_section_p(*pdep))
2593 * Fetch pointers to the PDE/PTE for the given pmap/VA pair.
2594 * Returns TRUE if the mapping exists, else FALSE.
2596 * NOTE: This function is only used by a couple of arm-specific modules.
2597 * It is not safe to take any pmap locks here, since we could be right
2598 * in the middle of debugging the pmap anyway...
2600 * It is possible for this routine to return FALSE even though a valid
2601 * mapping does exist. This is because we don't lock, so the metadata
2602 * state may be inconsistent.
2604 * NOTE: We can return a NULL *ptp in the case where the L1 pde is
2605 * a "section" mapping.
2608 pmap_get_pde_pte(pmap_t pmap, vm_offset_t va, pd_entry_t **pdp,
2611 struct l2_dtable *l2;
2612 pd_entry_t *pl1pd, l1pd;
2616 if (pmap->pm_l1 == NULL)
2620 *pdp = pl1pd = &pmap->pm_l1->l1_kva[l1idx];
2623 if (l1pte_section_p(l1pd)) {
2628 if (pmap->pm_l2 == NULL)
2631 l2 = pmap->pm_l2[L2_IDX(l1idx)];
2634 (ptep = l2->l2_bucket[L2_BUCKET(l1idx)].l2b_kva) == NULL) {
2638 *ptp = &ptep[l2pte_index(va)];
2643 * Routine: pmap_remove_all
2645 * Removes this physical page from
2646 * all physical maps in which it resides.
2647 * Reflects back modify bits to the pager.
2650 * Original versions of this routine were very
2651 * inefficient because they iteratively called
2652 * pmap_remove (slow...)
2655 pmap_remove_all(vm_page_t m)
2657 struct md_page *pvh;
2661 struct l2_bucket *l2b;
2662 boolean_t flush = FALSE;
2666 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
2667 ("pmap_remove_all: page %p is not managed", m));
2668 rw_wlock(&pvh_global_lock);
2669 if ((m->flags & PG_FICTITIOUS) != 0)
2670 goto small_mappings;
2671 pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m));
2672 while ((pv = TAILQ_FIRST(&pvh->pv_list)) != NULL) {
2676 pl1pd = &pmap->pm_l1->l1_kva[L1_IDX(pv->pv_va)];
2677 KASSERT((*pl1pd & L1_TYPE_MASK) == L1_S_PROTO,
2678 ("pmap_remove_all: valid section mapping expected"));
2679 (void)pmap_demote_section(pmap, pv->pv_va);
2683 curpmap = vmspace_pmap(curproc->p_vmspace);
2684 while ((pv = TAILQ_FIRST(&m->md.pv_list)) != NULL) {
2686 if (flush == FALSE && (pmap == curpmap ||
2687 pmap == pmap_kernel()))
2691 l2b = pmap_get_l2_bucket(pmap, pv->pv_va);
2692 KASSERT(l2b != NULL, ("No l2 bucket"));
2693 ptep = &l2b->l2b_kva[l2pte_index(pv->pv_va)];
2694 is_exec |= PTE_BEEN_EXECD(*ptep);
2696 if (pmap_is_current(pmap))
2698 pmap_free_l2_bucket(pmap, l2b, 1);
2699 pmap->pm_stats.resident_count--;
2700 TAILQ_REMOVE(&m->md.pv_list, pv, pv_list);
2701 if (pv->pv_flags & PVF_WIRED)
2702 pmap->pm_stats.wired_count--;
2703 pmap_free_pv_entry(pmap, pv);
2713 vm_page_aflag_clear(m, PGA_WRITEABLE);
2714 rw_wunlock(&pvh_global_lock);
2718 pmap_change_attr(vm_offset_t sva, vm_size_t len, int mode)
2720 vm_offset_t base, offset, tmpva;
2722 struct l2_bucket *l2b;
2723 pt_entry_t *ptep, pte;
2724 vm_offset_t next_bucket;
2726 PMAP_LOCK(kernel_pmap);
2728 base = trunc_page(sva);
2729 offset = sva & PAGE_MASK;
2730 size = roundup(offset + len, PAGE_SIZE);
2734 * Only supported on kernel virtual addresses, including the direct
2735 * map but excluding the recursive map.
2737 if (base < DMAP_MIN_ADDRESS) {
2738 PMAP_UNLOCK(kernel_pmap);
2742 for (tmpva = base; tmpva < base + size; ) {
2743 next_bucket = L2_NEXT_BUCKET(tmpva);
2744 if (next_bucket > base + size)
2745 next_bucket = base + size;
2747 l2b = pmap_get_l2_bucket(kernel_pmap, tmpva);
2749 tmpva = next_bucket;
2753 ptep = &l2b->l2b_kva[l2pte_index(tmpva)];
2756 PMAP_UNLOCK(kernel_pmap);
2760 pte = *ptep &~ L2_S_CACHE_MASK;
2761 cpu_idcache_wbinv_range(tmpva, PAGE_SIZE);
2762 pmap_l2cache_wbinv_range(tmpva, pte & L2_S_FRAME, PAGE_SIZE);
2764 cpu_tlb_flushID_SE(tmpva);
2766 dprintf("%s: for va:%x ptep:%x pte:%x\n",
2767 __func__, tmpva, (uint32_t)ptep, pte);
2771 PMAP_UNLOCK(kernel_pmap);
2777 * Set the physical protection on the
2778 * specified range of this map as requested.
2781 pmap_protect(pmap_t pmap, vm_offset_t sva, vm_offset_t eva, vm_prot_t prot)
2783 struct l2_bucket *l2b;
2784 struct md_page *pvh;
2785 struct pv_entry *pve;
2786 pd_entry_t *pl1pd, l1pd;
2787 pt_entry_t *ptep, pte;
2788 vm_offset_t next_bucket;
2789 u_int is_exec, is_refd;
2792 if ((prot & VM_PROT_READ) == 0) {
2793 pmap_remove(pmap, sva, eva);
2797 if (prot & VM_PROT_WRITE) {
2799 * If this is a read->write transition, just ignore it and let
2800 * vm_fault() take care of it later.
2805 rw_wlock(&pvh_global_lock);
2809 * OK, at this point, we know we're doing write-protect operation.
2810 * If the pmap is active, write-back the range.
2813 flush = ((eva - sva) >= (PAGE_SIZE * 4)) ? 0 : -1;
2814 is_exec = is_refd = 0;
2817 next_bucket = L2_NEXT_BUCKET(sva);
2819 * Check for large page.
2821 pl1pd = &pmap->pm_l1->l1_kva[L1_IDX(sva)];
2823 if ((l1pd & L1_TYPE_MASK) == L1_S_PROTO) {
2824 KASSERT(pmap != pmap_kernel(),
2825 ("pmap_protect: trying to modify "
2826 "kernel section protections"));
2828 * Are we protecting the entire large page? If not,
2829 * demote the mapping and fall through.
2831 if (sva + L1_S_SIZE == L2_NEXT_BUCKET(sva) &&
2832 eva >= L2_NEXT_BUCKET(sva)) {
2833 l1pd &= ~(L1_S_PROT_MASK | L1_S_XN);
2834 if (!(prot & VM_PROT_EXECUTE))
2837 * At this point we are always setting
2838 * write-protect bit.
2841 /* All managed superpages are user pages. */
2842 l1pd |= L1_S_PROT_U;
2845 pvh = pa_to_pvh(l1pd & L1_S_FRAME);
2846 pve = pmap_find_pv(pvh, pmap,
2848 pve->pv_flags &= ~PVF_WRITE;
2851 } else if (!pmap_demote_section(pmap, sva)) {
2852 /* The large page mapping was destroyed. */
2857 if (next_bucket > eva)
2859 l2b = pmap_get_l2_bucket(pmap, sva);
2865 ptep = &l2b->l2b_kva[l2pte_index(sva)];
2867 while (sva < next_bucket) {
2868 if ((pte = *ptep) != 0 && L2_S_WRITABLE(pte)) {
2871 m = PHYS_TO_VM_PAGE(l2pte_pa(pte));
2872 pmap_set_prot(ptep, prot,
2873 !(pmap == pmap_kernel()));
2876 pmap_modify_pv(m, pmap, sva, PVF_WRITE, 0);
2880 is_exec |= PTE_BEEN_EXECD(pte);
2881 is_refd |= PTE_BEEN_REFD(pte);
2883 if (PTE_BEEN_EXECD(pte))
2884 cpu_tlb_flushID_SE(sva);
2885 else if (PTE_BEEN_REFD(pte))
2886 cpu_tlb_flushD_SE(sva);
2903 rw_wunlock(&pvh_global_lock);
2910 * Insert the given physical page (p) at
2911 * the specified virtual address (v) in the
2912 * target physical map with the protection requested.
2914 * If specified, the page will be wired down, meaning
2915 * that the related pte can not be reclaimed.
2917 * NB: This is the only routine which MAY NOT lazy-evaluate
2918 * or lose information. That is, this routine must actually
2919 * insert this page into the given map NOW.
2923 pmap_enter(pmap_t pmap, vm_offset_t va, vm_prot_t access, vm_page_t m,
2924 vm_prot_t prot, boolean_t wired)
2927 rw_wlock(&pvh_global_lock);
2929 pmap_enter_locked(pmap, va, access, m, prot, wired, M_WAITOK);
2931 rw_wunlock(&pvh_global_lock);
2935 * The pvh global and pmap locks must be held.
2938 pmap_enter_locked(pmap_t pmap, vm_offset_t va, vm_prot_t access, vm_page_t m,
2939 vm_prot_t prot, boolean_t wired, int flags)
2941 struct l2_bucket *l2b = NULL;
2943 struct pv_entry *pve = NULL;
2944 pd_entry_t *pl1pd, l1pd;
2945 pt_entry_t *ptep, npte, opte;
2947 u_int is_exec, is_refd;
2951 PMAP_ASSERT_LOCKED(pmap);
2952 rw_assert(&pvh_global_lock, RA_WLOCKED);
2953 if (va == vector_page) {
2954 pa = systempage.pv_pa;
2957 KASSERT((m->oflags & VPO_UNMANAGED) != 0 ||
2958 vm_page_xbusied(m) || (flags & M_NOWAIT) != 0,
2959 ("pmap_enter_locked: page %p is not busy", m));
2960 pa = VM_PAGE_TO_PHYS(m);
2963 pl1pd = &pmap->pm_l1->l1_kva[L1_IDX(va)];
2964 if ((*pl1pd & L1_TYPE_MASK) == L1_S_PROTO)
2965 panic("pmap_enter_locked: attempt pmap_enter_on 1MB page");
2969 * Make sure userland mappings get the right permissions
2971 if (pmap != pmap_kernel() && va != vector_page)
2976 if (prot & VM_PROT_WRITE)
2977 nflags |= PVF_WRITE;
2979 nflags |= PVF_WIRED;
2981 PDEBUG(1, printf("pmap_enter: pmap = %08x, va = %08x, m = %08x, "
2982 "prot = %x, wired = %x\n", (uint32_t) pmap, va, (uint32_t) m,
2985 if (pmap == pmap_kernel()) {
2986 l2b = pmap_get_l2_bucket(pmap, va);
2988 l2b = pmap_grow_l2_bucket(pmap, va);
2991 l2b = pmap_alloc_l2_bucket(pmap, va);
2993 if (flags & M_WAITOK) {
2995 rw_wunlock(&pvh_global_lock);
2997 rw_wlock(&pvh_global_lock);
3005 ptep = &l2b->l2b_kva[l2pte_index(va)];
3009 is_exec = is_refd = 0;
3012 if (l2pte_pa(opte) == pa) {
3014 * We're changing the attrs of an existing mapping.
3017 pmap_modify_pv(m, pmap, va,
3018 PVF_WRITE | PVF_WIRED, nflags);
3019 is_exec |= PTE_BEEN_EXECD(opte);
3020 is_refd |= PTE_BEEN_REFD(opte);
3023 if ((om = PHYS_TO_VM_PAGE(l2pte_pa(opte)))) {
3025 * Replacing an existing mapping with a new one.
3026 * It is part of our managed memory so we
3027 * must remove it from the PV list
3029 if ((pve = pmap_remove_pv(om, pmap, va))) {
3030 is_exec |= PTE_BEEN_EXECD(opte);
3031 is_refd |= PTE_BEEN_REFD(opte);
3033 if (m && ((m->oflags & VPO_UNMANAGED)))
3034 pmap_free_pv_entry(pmap, pve);
3040 * Keep the stats up to date
3042 l2b->l2b_occupancy++;
3043 pmap->pm_stats.resident_count++;
3047 * Enter on the PV list if part of our managed memory.
3049 if ((m && !(m->oflags & VPO_UNMANAGED))) {
3050 if ((!pve) && (pve = pmap_get_pv_entry(pmap, FALSE)) == NULL)
3051 panic("pmap_enter: no pv entries");
3053 KASSERT(va < kmi.clean_sva || va >= kmi.clean_eva,
3054 ("pmap_enter: managed mapping within the clean submap"));
3055 KASSERT(pve != NULL, ("No pv"));
3056 pmap_enter_pv(m, pve, pmap, va, nflags);
3060 /* Make the new PTE valid */
3065 /* Set defaults first - kernel read access */
3067 npte |= L2_S_PROT_R;
3068 /* Set "referenced" flag */
3071 /* Now tune APs as desired */
3073 npte |= L2_S_PROT_U;
3075 * If this is not a vector_page
3076 * then continue setting mapping parameters
3079 if (prot & (VM_PROT_ALL)) {
3080 if ((m->oflags & VPO_UNMANAGED) == 0)
3081 vm_page_aflag_set(m, PGA_REFERENCED);
3084 * Need to do page referenced emulation.
3089 if (prot & VM_PROT_WRITE) {
3091 * Enable write permission if the access type
3092 * indicates write intention. Emulate modified
3095 if ((access & VM_PROT_WRITE) != 0)
3098 if ((m->oflags & VPO_UNMANAGED) == 0) {
3099 vm_page_aflag_set(m, PGA_WRITEABLE);
3101 * The access type and permissions indicate
3102 * that the page will be written as soon as
3103 * returned from fault service.
3104 * Mark it dirty from the outset.
3106 if ((access & VM_PROT_WRITE) != 0)
3110 if (!(prot & VM_PROT_EXECUTE))
3113 if (m->md.pv_memattr != VM_MEMATTR_UNCACHEABLE)
3114 npte |= pte_l2_s_cache_mode;
3117 CTR5(KTR_PMAP,"enter: pmap:%p va:%x prot:%x pte:%x->%x",
3118 pmap, va, prot, opte, npte);
3120 * If this is just a wiring change, the two PTEs will be
3121 * identical, so there's no need to update the page table.
3124 boolean_t is_cached = pmap_is_current(pmap);
3130 * We only need to frob the cache/tlb if this pmap
3133 if (L1_IDX(va) != L1_IDX(vector_page) &&
3134 l2pte_valid(npte)) {
3136 * This mapping is likely to be accessed as
3137 * soon as we return to userland. Fix up the
3138 * L1 entry to avoid taking another
3139 * page/domain fault.
3141 l1pd = l2b->l2b_phys |
3142 L1_C_DOM(pmap->pm_domain) | L1_C_PROTO;
3143 if (*pl1pd != l1pd) {
3151 cpu_tlb_flushID_SE(va);
3153 cpu_tlb_flushD_SE(va);
3156 if ((pmap != pmap_kernel()) && (pmap == &curproc->p_vmspace->vm_pmap))
3157 cpu_icache_sync_range(va, PAGE_SIZE);
3159 * If both the l2b_occupancy and the reservation are fully
3160 * populated, then attempt promotion.
3162 if ((l2b->l2b_occupancy == L2_PTE_NUM_TOTAL) &&
3163 sp_enabled && (m->flags & PG_FICTITIOUS) == 0 &&
3164 vm_reserv_level_iffullpop(m) == 0)
3165 pmap_promote_section(pmap, va);
3169 * Maps a sequence of resident pages belonging to the same object.
3170 * The sequence begins with the given page m_start. This page is
3171 * mapped at the given virtual address start. Each subsequent page is
3172 * mapped at a virtual address that is offset from start by the same
3173 * amount as the page is offset from m_start within the object. The
3174 * last page in the sequence is the page with the largest offset from
3175 * m_start that can be mapped at a virtual address less than the given
3176 * virtual address end. Not every virtual page between start and end
3177 * is mapped; only those for which a resident page exists with the
3178 * corresponding offset from m_start are mapped.
3181 pmap_enter_object(pmap_t pmap, vm_offset_t start, vm_offset_t end,
3182 vm_page_t m_start, vm_prot_t prot)
3186 vm_pindex_t diff, psize;
3189 VM_OBJECT_ASSERT_LOCKED(m_start->object);
3191 psize = atop(end - start);
3193 access = prot = prot & (VM_PROT_READ | VM_PROT_EXECUTE);
3194 rw_wlock(&pvh_global_lock);
3196 while (m != NULL && (diff = m->pindex - m_start->pindex) < psize) {
3197 va = start + ptoa(diff);
3198 if ((va & L1_S_OFFSET) == 0 && L2_NEXT_BUCKET(va) <= end &&
3199 (VM_PAGE_TO_PHYS(m) & L1_S_OFFSET) == 0 &&
3200 sp_enabled && vm_reserv_level_iffullpop(m) == 0 &&
3201 pmap_enter_section(pmap, va, m, prot))
3202 m = &m[L1_S_SIZE / PAGE_SIZE - 1];
3204 pmap_enter_locked(pmap, va, access, m, prot,
3206 m = TAILQ_NEXT(m, listq);
3209 rw_wunlock(&pvh_global_lock);
3213 * this code makes some *MAJOR* assumptions:
3214 * 1. Current pmap & pmap exists.
3217 * 4. No page table pages.
3218 * but is *MUCH* faster than pmap_enter...
3222 pmap_enter_quick(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot)
3226 access = prot = prot & (VM_PROT_READ | VM_PROT_EXECUTE);
3227 rw_wlock(&pvh_global_lock);
3229 pmap_enter_locked(pmap, va, access, m, prot, FALSE, M_NOWAIT);
3231 rw_wunlock(&pvh_global_lock);
3235 * Routine: pmap_change_wiring
3236 * Function: Change the wiring attribute for a map/virtual-address
3238 * In/out conditions:
3239 * The mapping must already exist in the pmap.
3242 pmap_change_wiring(pmap_t pmap, vm_offset_t va, boolean_t wired)
3244 struct l2_bucket *l2b;
3245 struct md_page *pvh;
3246 struct pv_entry *pve;
3247 pd_entry_t *pl1pd, l1pd;
3248 pt_entry_t *ptep, pte;
3251 rw_wlock(&pvh_global_lock);
3253 pl1pd = &pmap->pm_l1->l1_kva[L1_IDX(va)];
3255 if ((l1pd & L1_TYPE_MASK) == L1_S_PROTO) {
3256 m = PHYS_TO_VM_PAGE(l1pd & L1_S_FRAME);
3257 KASSERT((m != NULL) && ((m->oflags & VPO_UNMANAGED) == 0),
3258 ("pmap_change_wiring: unmanaged superpage should not "
3260 KASSERT(pmap != pmap_kernel(),
3261 ("pmap_change_wiring: managed kernel superpage "
3262 "should not exist"));
3263 pvh = pa_to_pvh(l1pd & L1_S_FRAME);
3264 pve = pmap_find_pv(pvh, pmap, trunc_1mpage(va));
3265 if (!wired != ((pve->pv_flags & PVF_WIRED) == 0)) {
3266 if (!pmap_demote_section(pmap, va))
3267 panic("pmap_change_wiring: demotion failed");
3271 l2b = pmap_get_l2_bucket(pmap, va);
3272 KASSERT(l2b, ("No l2b bucket in pmap_change_wiring"));
3273 ptep = &l2b->l2b_kva[l2pte_index(va)];
3275 m = PHYS_TO_VM_PAGE(l2pte_pa(pte));
3277 pmap_modify_pv(m, pmap, va, PVF_WIRED,
3278 wired == TRUE ? PVF_WIRED : 0);
3280 rw_wunlock(&pvh_global_lock);
3286 * Copy the range specified by src_addr/len
3287 * from the source map to the range dst_addr/len
3288 * in the destination map.
3290 * This routine is only advisory and need not do anything.
3293 pmap_copy(pmap_t dst_pmap, pmap_t src_pmap, vm_offset_t dst_addr,
3294 vm_size_t len, vm_offset_t src_addr)
3300 * Routine: pmap_extract
3302 * Extract the physical page address associated
3303 * with the given map/virtual_address pair.
3306 pmap_extract(pmap_t pmap, vm_offset_t va)
3311 pa = pmap_extract_locked(pmap, va);
3317 pmap_extract_locked(pmap_t pmap, vm_offset_t va)
3319 struct l2_dtable *l2;
3321 pt_entry_t *ptep, pte;
3325 if (pmap != kernel_pmap)
3326 PMAP_ASSERT_LOCKED(pmap);
3328 l1pd = pmap->pm_l1->l1_kva[l1idx];
3329 if (l1pte_section_p(l1pd)) {
3331 * These should only happen for the kernel pmap.
3333 KASSERT(pmap == kernel_pmap, ("unexpected section"));
3334 /* XXX: what to do about the bits > 32 ? */
3335 if (l1pd & L1_S_SUPERSEC)
3336 pa = (l1pd & L1_SUP_FRAME) | (va & L1_SUP_OFFSET);
3338 pa = (l1pd & L1_S_FRAME) | (va & L1_S_OFFSET);
3341 * Note that we can't rely on the validity of the L1
3342 * descriptor as an indication that a mapping exists.
3343 * We have to look it up in the L2 dtable.
3345 l2 = pmap->pm_l2[L2_IDX(l1idx)];
3347 (ptep = l2->l2_bucket[L2_BUCKET(l1idx)].l2b_kva) == NULL)
3349 pte = ptep[l2pte_index(va)];
3352 switch (pte & L2_TYPE_MASK) {
3354 pa = (pte & L2_L_FRAME) | (va & L2_L_OFFSET);
3357 pa = (pte & L2_S_FRAME) | (va & L2_S_OFFSET);
3365 * Atomically extract and hold the physical page with the given
3366 * pmap and virtual address pair if that mapping permits the given
3371 pmap_extract_and_hold(pmap_t pmap, vm_offset_t va, vm_prot_t prot)
3373 struct l2_dtable *l2;
3375 pt_entry_t *ptep, pte;
3376 vm_paddr_t pa, paddr;
3384 l1pd = pmap->pm_l1->l1_kva[l1idx];
3385 if (l1pte_section_p(l1pd)) {
3386 /* XXX: what to do about the bits > 32 ? */
3387 if (l1pd & L1_S_SUPERSEC)
3388 pa = (l1pd & L1_SUP_FRAME) | (va & L1_SUP_OFFSET);
3390 pa = (l1pd & L1_S_FRAME) | (va & L1_S_OFFSET);
3391 if (vm_page_pa_tryrelock(pmap, pa & PG_FRAME, &paddr))
3393 if (L1_S_WRITABLE(l1pd) || (prot & VM_PROT_WRITE) == 0) {
3394 m = PHYS_TO_VM_PAGE(pa);
3399 * Note that we can't rely on the validity of the L1
3400 * descriptor as an indication that a mapping exists.
3401 * We have to look it up in the L2 dtable.
3403 l2 = pmap->pm_l2[L2_IDX(l1idx)];
3406 (ptep = l2->l2_bucket[L2_BUCKET(l1idx)].l2b_kva) == NULL) {
3411 ptep = &ptep[l2pte_index(va)];
3417 } else if ((prot & VM_PROT_WRITE) && (pte & L2_APX)) {
3421 switch (pte & L2_TYPE_MASK) {
3423 panic("extract and hold section mapping");
3426 pa = (pte & L2_S_FRAME) | (va & L2_S_OFFSET);
3429 if (vm_page_pa_tryrelock(pmap, pa & PG_FRAME, &paddr))
3431 m = PHYS_TO_VM_PAGE(pa);
3438 PA_UNLOCK_COND(paddr);
3443 * Initialize a preallocated and zeroed pmap structure,
3444 * such as one in a vmspace structure.
3448 pmap_pinit(pmap_t pmap)
3450 PDEBUG(1, printf("pmap_pinit: pmap = %08x\n", (uint32_t) pmap));
3452 pmap_alloc_l1(pmap);
3453 bzero(pmap->pm_l2, sizeof(pmap->pm_l2));
3455 CPU_ZERO(&pmap->pm_active);
3457 TAILQ_INIT(&pmap->pm_pvchunk);
3458 bzero(&pmap->pm_stats, sizeof pmap->pm_stats);
3459 pmap->pm_stats.resident_count = 1;
3460 if (vector_page < KERNBASE) {
3461 pmap_enter(pmap, vector_page,
3462 VM_PROT_READ, PHYS_TO_VM_PAGE(systempage.pv_pa),
3469 /***************************************************
3470 * Superpage management routines.
3471 ***************************************************/
3473 static PMAP_INLINE struct pv_entry *
3474 pmap_pvh_remove(struct md_page *pvh, pmap_t pmap, vm_offset_t va)
3478 rw_assert(&pvh_global_lock, RA_WLOCKED);
3480 pv = pmap_find_pv(pvh, pmap, va);
3482 TAILQ_REMOVE(&pvh->pv_list, pv, pv_list);
3488 pmap_pvh_free(struct md_page *pvh, pmap_t pmap, vm_offset_t va)
3492 pv = pmap_pvh_remove(pvh, pmap, va);
3493 KASSERT(pv != NULL, ("pmap_pvh_free: pv not found"));
3494 pmap_free_pv_entry(pmap, pv);
3498 pmap_pv_insert_section(pmap_t pmap, vm_offset_t va, vm_paddr_t pa)
3500 struct md_page *pvh;
3503 rw_assert(&pvh_global_lock, RA_WLOCKED);
3504 if (pv_entry_count < pv_entry_high_water &&
3505 (pv = pmap_get_pv_entry(pmap, TRUE)) != NULL) {
3507 pvh = pa_to_pvh(pa);
3508 TAILQ_INSERT_TAIL(&pvh->pv_list, pv, pv_list);
3515 * Create the pv entries for each of the pages within a superpage.
3518 pmap_pv_demote_section(pmap_t pmap, vm_offset_t va, vm_paddr_t pa)
3520 struct md_page *pvh;
3522 vm_offset_t va_last;
3525 rw_assert(&pvh_global_lock, RA_WLOCKED);
3526 KASSERT((pa & L1_S_OFFSET) == 0,
3527 ("pmap_pv_demote_section: pa is not 1mpage aligned"));
3530 * Transfer the 1mpage's pv entry for this mapping to the first
3533 pvh = pa_to_pvh(pa);
3534 va = trunc_1mpage(va);
3535 pv = pmap_pvh_remove(pvh, pmap, va);
3536 KASSERT(pv != NULL, ("pmap_pv_demote_section: pv not found"));
3537 m = PHYS_TO_VM_PAGE(pa);
3538 TAILQ_INSERT_HEAD(&m->md.pv_list, pv, pv_list);
3539 /* Instantiate the remaining pv entries. */
3540 va_last = L2_NEXT_BUCKET(va) - PAGE_SIZE;
3543 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
3544 ("pmap_pv_demote_section: page %p is not managed", m));
3546 pve = pmap_get_pv_entry(pmap, FALSE);
3547 pmap_enter_pv(m, pve, pmap, va, pv->pv_flags);
3548 } while (va < va_last);
3552 pmap_pv_promote_section(pmap_t pmap, vm_offset_t va, vm_paddr_t pa)
3554 struct md_page *pvh;
3556 vm_offset_t va_last;
3559 rw_assert(&pvh_global_lock, RA_WLOCKED);
3560 KASSERT((pa & L1_S_OFFSET) == 0,
3561 ("pmap_pv_promote_section: pa is not 1mpage aligned"));
3564 * Transfer the first page's pv entry for this mapping to the
3565 * 1mpage's pv list. Aside from avoiding the cost of a call
3566 * to get_pv_entry(), a transfer avoids the possibility that
3567 * get_pv_entry() calls pmap_pv_reclaim() and that pmap_pv_reclaim()
3568 * removes one of the mappings that is being promoted.
3570 m = PHYS_TO_VM_PAGE(pa);
3571 va = trunc_1mpage(va);
3572 pv = pmap_pvh_remove(&m->md, pmap, va);
3573 KASSERT(pv != NULL, ("pmap_pv_promote_section: pv not found"));
3574 pvh = pa_to_pvh(pa);
3575 TAILQ_INSERT_TAIL(&pvh->pv_list, pv, pv_list);
3576 /* Free the remaining pv entries in the newly mapped section pages */
3577 va_last = L2_NEXT_BUCKET(va) - PAGE_SIZE;
3582 * Don't care the flags, first pv contains sufficient
3583 * information for all of the pages so nothing is really lost.
3585 pmap_pvh_free(&m->md, pmap, va);
3586 } while (va < va_last);
3590 * Tries to create a 1MB page mapping. Returns TRUE if successful and
3591 * FALSE otherwise. Fails if (1) page is unmanageg, kernel pmap or vectors
3592 * page, (2) a mapping already exists at the specified virtual address, or
3593 * (3) a pv entry cannot be allocated without reclaiming another pv entry.
3596 pmap_enter_section(pmap_t pmap, vm_offset_t va, vm_page_t m, vm_prot_t prot)
3600 struct l2_bucket *l2b;
3602 rw_assert(&pvh_global_lock, RA_WLOCKED);
3603 PMAP_ASSERT_LOCKED(pmap);
3605 /* Skip kernel, vectors page and unmanaged mappings */
3606 if ((pmap == pmap_kernel()) || (L1_IDX(va) == L1_IDX(vector_page)) ||
3607 ((m->oflags & VPO_UNMANAGED) != 0)) {
3608 CTR2(KTR_PMAP, "pmap_enter_section: failure for va %#lx"
3609 " in pmap %p", va, pmap);
3613 * Check whether this is a valid section superpage entry or
3614 * there is a l2_bucket associated with that L1 page directory.
3616 va = trunc_1mpage(va);
3617 pl1pd = &pmap->pm_l1->l1_kva[L1_IDX(va)];
3618 l2b = pmap_get_l2_bucket(pmap, va);
3619 if ((*pl1pd & L1_S_PROTO) || (l2b != NULL)) {
3620 CTR2(KTR_PMAP, "pmap_enter_section: failure for va %#lx"
3621 " in pmap %p", va, pmap);
3624 pa = VM_PAGE_TO_PHYS(m);
3626 * Abort this mapping if its PV entry could not be created.
3628 if (!pmap_pv_insert_section(pmap, va, VM_PAGE_TO_PHYS(m))) {
3629 CTR2(KTR_PMAP, "pmap_enter_section: failure for va %#lx"
3630 " in pmap %p", va, pmap);
3634 * Increment counters.
3636 pmap->pm_stats.resident_count += L2_PTE_NUM_TOTAL;
3638 * Despite permissions, mark the superpage read-only.
3640 prot &= ~VM_PROT_WRITE;
3642 * Map the superpage.
3644 pmap_map_section(pmap, va, pa, prot, FALSE);
3646 pmap_section_mappings++;
3647 CTR2(KTR_PMAP, "pmap_enter_section: success for va %#lx"
3648 " in pmap %p", va, pmap);
3653 * pmap_remove_section: do the things to unmap a superpage in a process
3656 pmap_remove_section(pmap_t pmap, vm_offset_t sva)
3658 struct md_page *pvh;
3659 struct l2_bucket *l2b;
3660 pd_entry_t *pl1pd, l1pd;
3661 vm_offset_t eva, va;
3664 PMAP_ASSERT_LOCKED(pmap);
3665 if ((pmap == pmap_kernel()) || (L1_IDX(sva) == L1_IDX(vector_page)))
3668 KASSERT((sva & L1_S_OFFSET) == 0,
3669 ("pmap_remove_section: sva is not 1mpage aligned"));
3671 pl1pd = &pmap->pm_l1->l1_kva[L1_IDX(sva)];
3674 m = PHYS_TO_VM_PAGE(l1pd & L1_S_FRAME);
3675 KASSERT((m != NULL && ((m->oflags & VPO_UNMANAGED) == 0)),
3676 ("pmap_remove_section: no corresponding vm_page or "
3679 pmap->pm_stats.resident_count -= L2_PTE_NUM_TOTAL;
3680 pvh = pa_to_pvh(l1pd & L1_S_FRAME);
3681 pmap_pvh_free(pvh, pmap, sva);
3682 eva = L2_NEXT_BUCKET(sva);
3683 for (va = sva, m = PHYS_TO_VM_PAGE(l1pd & L1_S_FRAME);
3684 va < eva; va += PAGE_SIZE, m++) {
3686 * Mark base pages referenced but skip marking them dirty.
3687 * If the superpage is writeable, hence all base pages were
3688 * already marked as dirty in pmap_fault_fixup() before
3689 * promotion. Reference bit however, might not have been set
3690 * for each base page when the superpage was created at once,
3691 * not as a result of promotion.
3693 if (L1_S_REFERENCED(l1pd))
3694 vm_page_aflag_set(m, PGA_REFERENCED);
3695 if (TAILQ_EMPTY(&m->md.pv_list) &&
3696 TAILQ_EMPTY(&pvh->pv_list))
3697 vm_page_aflag_clear(m, PGA_WRITEABLE);
3700 l2b = pmap_get_l2_bucket(pmap, sva);
3702 KASSERT(l2b->l2b_occupancy == L2_PTE_NUM_TOTAL,
3703 ("pmap_remove_section: l2_bucket occupancy error"));
3704 pmap_free_l2_bucket(pmap, l2b, L2_PTE_NUM_TOTAL);
3706 * Now invalidate L1 slot as it was not invalidated in
3707 * pmap_free_l2_bucket() due to L1_TYPE mismatch.
3715 * Tries to promote the 256, contiguous 4KB page mappings that are
3716 * within a single l2_bucket to a single 1MB section mapping.
3717 * For promotion to occur, two conditions must be met: (1) the 4KB page
3718 * mappings must map aligned, contiguous physical memory and (2) the 4KB page
3719 * mappings must have identical characteristics.
3722 pmap_promote_section(pmap_t pmap, vm_offset_t va)
3724 pt_entry_t *firstptep, firstpte, oldpte, pa, *pte;
3726 vm_offset_t first_va, old_va;
3727 struct l2_bucket *l2b = NULL;
3729 struct pv_entry *pve, *first_pve;
3731 PMAP_ASSERT_LOCKED(pmap);
3735 * Skip promoting kernel pages. This is justified by following:
3736 * 1. Kernel is already mapped using section mappings in each pmap
3737 * 2. Managed mappings within the kernel are not to be promoted anyway
3739 if (pmap == pmap_kernel()) {
3740 pmap_section_p_failures++;
3741 CTR2(KTR_PMAP, "pmap_promote_section: failure for va %#x"
3742 " in pmap %p", va, pmap);
3745 /* Do not attemp to promote vectors pages */
3746 if (L1_IDX(va) == L1_IDX(vector_page)) {
3747 pmap_section_p_failures++;
3748 CTR2(KTR_PMAP, "pmap_promote_section: failure for va %#x"
3749 " in pmap %p", va, pmap);
3753 * Examine the first PTE in the specified l2_bucket. Abort if this PTE
3754 * is either invalid, unused, or does not map the first 4KB physical
3755 * page within 1MB page.
3757 first_va = trunc_1mpage(va);
3758 l2b = pmap_get_l2_bucket(pmap, first_va);
3759 KASSERT(l2b != NULL, ("pmap_promote_section: trying to promote "
3760 "not existing l2 bucket"));
3761 firstptep = &l2b->l2b_kva[0];
3763 firstpte = *firstptep;
3764 if ((l2pte_pa(firstpte) & L1_S_OFFSET) != 0) {
3765 pmap_section_p_failures++;
3766 CTR2(KTR_PMAP, "pmap_promote_section: failure for va %#x"
3767 " in pmap %p", va, pmap);
3771 if ((firstpte & (L2_S_PROTO | L2_S_REF)) != (L2_S_PROTO | L2_S_REF)) {
3772 pmap_section_p_failures++;
3773 CTR2(KTR_PMAP, "pmap_promote_section: failure for va %#x"
3774 " in pmap %p", va, pmap);
3778 * ARM uses pv_entry to mark particular mapping WIRED so don't promote
3779 * unmanaged pages since it is impossible to determine, whether the
3780 * page is wired or not if there is no corresponding pv_entry.
3782 m = PHYS_TO_VM_PAGE(l2pte_pa(firstpte));
3783 if (m && ((m->oflags & VPO_UNMANAGED) != 0)) {
3784 pmap_section_p_failures++;
3785 CTR2(KTR_PMAP, "pmap_promote_section: failure for va %#x"
3786 " in pmap %p", va, pmap);
3789 first_pve = pmap_find_pv(&m->md, pmap, first_va);
3791 * PTE is modified only on write due to modified bit
3792 * emulation. If the entry is referenced and writable
3793 * then it is modified and we don't clear write enable.
3794 * Otherwise, writing is disabled in PTE anyway and
3795 * we just configure protections for the section mapping
3796 * that is going to be created.
3798 if (!L2_S_WRITABLE(firstpte) && (first_pve->pv_flags & PVF_WRITE)) {
3799 first_pve->pv_flags &= ~PVF_WRITE;
3800 prot &= ~VM_PROT_WRITE;
3803 if (!L2_S_EXECUTABLE(firstpte))
3804 prot &= ~VM_PROT_EXECUTE;
3807 * Examine each of the other PTEs in the specified l2_bucket.
3808 * Abort if this PTE maps an unexpected 4KB physical page or
3809 * does not have identical characteristics to the first PTE.
3811 pa = l2pte_pa(firstpte) + ((L2_PTE_NUM_TOTAL - 1) * PAGE_SIZE);
3812 old_va = L2_NEXT_BUCKET(first_va) - PAGE_SIZE;
3814 for (pte = (firstptep + L2_PTE_NUM_TOTAL - 1); pte > firstptep; pte--) {
3816 if (l2pte_pa(oldpte) != pa) {
3817 pmap_section_p_failures++;
3818 CTR2(KTR_PMAP, "pmap_promote_section: failure for "
3819 "va %#x in pmap %p", va, pmap);
3822 if ((oldpte & L2_S_PROMOTE) != (firstpte & L2_S_PROMOTE)) {
3823 pmap_section_p_failures++;
3824 CTR2(KTR_PMAP, "pmap_promote_section: failure for "
3825 "va %#x in pmap %p", va, pmap);
3828 oldm = PHYS_TO_VM_PAGE(l2pte_pa(oldpte));
3829 if (oldm && ((oldm->oflags & VPO_UNMANAGED) != 0)) {
3830 pmap_section_p_failures++;
3831 CTR2(KTR_PMAP, "pmap_promote_section: failure for "
3832 "va %#x in pmap %p", va, pmap);
3836 pve = pmap_find_pv(&oldm->md, pmap, old_va);
3838 pmap_section_p_failures++;
3839 CTR2(KTR_PMAP, "pmap_promote_section: failure for "
3840 "va %#x old_va %x - no pve", va, old_va);
3844 if (!L2_S_WRITABLE(oldpte) && (pve->pv_flags & PVF_WRITE))
3845 pve->pv_flags &= ~PVF_WRITE;
3847 old_va -= PAGE_SIZE;
3851 * Promote the pv entries.
3853 pmap_pv_promote_section(pmap, first_va, l2pte_pa(firstpte));
3855 * Map the superpage.
3857 pmap_map_section(pmap, first_va, l2pte_pa(firstpte), prot, TRUE);
3858 pmap_section_promotions++;
3859 CTR2(KTR_PMAP, "pmap_promote_section: success for va %#x"
3860 " in pmap %p", first_va, pmap);
3864 * Fills a l2_bucket with mappings to consecutive physical pages.
3867 pmap_fill_l2b(struct l2_bucket *l2b, pt_entry_t newpte)
3872 for (i = 0; i < L2_PTE_NUM_TOTAL; i++) {
3873 ptep = &l2b->l2b_kva[i];
3877 newpte += PAGE_SIZE;
3880 l2b->l2b_occupancy = L2_PTE_NUM_TOTAL;
3884 * Tries to demote a 1MB section mapping. If demotion fails, the
3885 * 1MB section mapping is invalidated.
3888 pmap_demote_section(pmap_t pmap, vm_offset_t va)
3890 struct l2_bucket *l2b;
3891 struct pv_entry *l1pdpve;
3892 struct md_page *pvh;
3893 pd_entry_t *pl1pd, l1pd;
3894 pt_entry_t *firstptep, newpte;
3898 PMAP_ASSERT_LOCKED(pmap);
3900 * According to assumptions described in pmap_promote_section,
3901 * kernel is and always should be mapped using 1MB section mappings.
3902 * What more, managed kernel pages were not to be promoted.
3904 KASSERT(pmap != pmap_kernel() && L1_IDX(va) != L1_IDX(vector_page),
3905 ("pmap_demote_section: forbidden section mapping"));
3907 va = trunc_1mpage(va);
3908 pl1pd = &pmap->pm_l1->l1_kva[L1_IDX(va)];
3910 KASSERT((l1pd & L1_TYPE_MASK) == L1_S_PROTO,
3911 ("pmap_demote_section: not section or invalid section"));
3913 pa = l1pd & L1_S_FRAME;
3914 m = PHYS_TO_VM_PAGE(pa);
3915 KASSERT((m != NULL && (m->oflags & VPO_UNMANAGED) == 0),
3916 ("pmap_demote_section: no vm_page for selected superpage or"
3919 pvh = pa_to_pvh(pa);
3920 l1pdpve = pmap_find_pv(pvh, pmap, va);
3921 KASSERT(l1pdpve != NULL, ("pmap_demote_section: no pv entry for "
3924 l2b = pmap_get_l2_bucket(pmap, va);
3926 KASSERT((l1pdpve->pv_flags & PVF_WIRED) == 0,
3927 ("pmap_demote_section: No l2_bucket for wired mapping"));
3929 * Invalidate the 1MB section mapping and return
3930 * "failure" if the mapping was never accessed or the
3931 * allocation of the new l2_bucket fails.
3933 if (!L1_S_REFERENCED(l1pd) ||
3934 (l2b = pmap_alloc_l2_bucket(pmap, va)) == NULL) {
3935 /* Unmap and invalidate superpage. */
3936 pmap_remove_section(pmap, trunc_1mpage(va));
3937 CTR2(KTR_PMAP, "pmap_demote_section: failure for "
3938 "va %#x in pmap %p", va, pmap);
3944 * Now we should have corresponding l2_bucket available.
3945 * Let's process it to recreate 256 PTEs for each base page
3948 newpte = pa | L1_S_DEMOTE(l1pd);
3949 if (m->md.pv_memattr != VM_MEMATTR_UNCACHEABLE)
3950 newpte |= pte_l2_s_cache_mode;
3953 * If the l2_bucket is new, initialize it.
3955 if (l2b->l2b_occupancy == 0)
3956 pmap_fill_l2b(l2b, newpte);
3958 firstptep = &l2b->l2b_kva[0];
3959 KASSERT(l2pte_pa(*firstptep) == (pa),
3960 ("pmap_demote_section: firstpte and newpte map different "
3961 "physical addresses"));
3963 * If the mapping has changed attributes, update the page table
3966 if ((*firstptep & L2_S_PROMOTE) != (L1_S_DEMOTE(l1pd)))
3967 pmap_fill_l2b(l2b, newpte);
3969 /* Demote PV entry */
3970 pmap_pv_demote_section(pmap, va, pa);
3973 l1pd = l2b->l2b_phys | L1_C_DOM(pmap->pm_domain) | L1_C_PROTO;
3977 pmap_section_demotions++;
3978 CTR2(KTR_PMAP, "pmap_demote_section: success for va %#x"
3979 " in pmap %p", va, pmap);
3983 /***************************************************
3984 * page management routines.
3985 ***************************************************/
3988 * We are in a serious low memory condition. Resort to
3989 * drastic measures to free some pages so we can allocate
3990 * another pv entry chunk.
3993 pmap_pv_reclaim(pmap_t locked_pmap)
3996 struct pv_chunk *pc;
3997 struct l2_bucket *l2b = NULL;
4003 vm_page_t free, m, m_pc;
4005 int bit, field, freed, idx;
4007 PMAP_ASSERT_LOCKED(locked_pmap);
4010 TAILQ_INIT(&newtail);
4011 while ((pc = TAILQ_FIRST(&pv_chunks)) != NULL && (pv_vafree == 0 ||
4013 TAILQ_REMOVE(&pv_chunks, pc, pc_lru);
4014 if (pmap != pc->pc_pmap) {
4018 if (pmap != locked_pmap)
4022 /* Avoid deadlock and lock recursion. */
4023 if (pmap > locked_pmap)
4025 else if (pmap != locked_pmap && !PMAP_TRYLOCK(pmap)) {
4027 TAILQ_INSERT_TAIL(&newtail, pc, pc_lru);
4033 * Destroy every non-wired, 4 KB page mapping in the chunk.
4036 for (field = 0; field < _NPCM; field++) {
4037 for (inuse = ~pc->pc_map[field] & pc_freemask[field];
4038 inuse != 0; inuse &= ~(1UL << bit)) {
4039 bit = ffs(inuse) - 1;
4040 idx = field * sizeof(inuse) * NBBY + bit;
4041 pv = &pc->pc_pventry[idx];
4044 pl1pd = &pmap->pm_l1->l1_kva[L1_IDX(va)];
4045 if ((*pl1pd & L1_TYPE_MASK) == L1_S_PROTO)
4047 if (pv->pv_flags & PVF_WIRED)
4050 l2b = pmap_get_l2_bucket(pmap, va);
4051 KASSERT(l2b != NULL, ("No l2 bucket"));
4052 ptep = &l2b->l2b_kva[l2pte_index(va)];
4053 m = PHYS_TO_VM_PAGE(l2pte_pa(*ptep));
4054 KASSERT((vm_offset_t)m >= KERNBASE,
4055 ("Trying to access non-existent page "
4056 "va %x pte %x", va, *ptep));
4059 TAILQ_REMOVE(&m->md.pv_list, pv, pv_list);
4060 if (TAILQ_EMPTY(&m->md.pv_list))
4061 vm_page_aflag_clear(m, PGA_WRITEABLE);
4062 pc->pc_map[field] |= 1UL << bit;
4068 TAILQ_INSERT_TAIL(&newtail, pc, pc_lru);
4071 /* Every freed mapping is for a 4 KB page. */
4072 pmap->pm_stats.resident_count -= freed;
4073 PV_STAT(pv_entry_frees += freed);
4074 PV_STAT(pv_entry_spare += freed);
4075 pv_entry_count -= freed;
4076 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
4077 for (field = 0; field < _NPCM; field++)
4078 if (pc->pc_map[field] != pc_freemask[field]) {
4079 TAILQ_INSERT_HEAD(&pmap->pm_pvchunk, pc,
4081 TAILQ_INSERT_TAIL(&newtail, pc, pc_lru);
4084 * One freed pv entry in locked_pmap is
4087 if (pmap == locked_pmap)
4091 if (field == _NPCM) {
4092 PV_STAT(pv_entry_spare -= _NPCPV);
4093 PV_STAT(pc_chunk_count--);
4094 PV_STAT(pc_chunk_frees++);
4095 /* Entire chunk is free; return it. */
4096 m_pc = PHYS_TO_VM_PAGE(pmap_kextract((vm_offset_t)pc));
4097 pmap_qremove((vm_offset_t)pc, 1);
4098 pmap_ptelist_free(&pv_vafree, (vm_offset_t)pc);
4103 TAILQ_CONCAT(&pv_chunks, &newtail, pc_lru);
4107 if (pmap != locked_pmap)
4114 * free the pv_entry back to the free list
4117 pmap_free_pv_entry(pmap_t pmap, pv_entry_t pv)
4119 struct pv_chunk *pc;
4120 int bit, field, idx;
4122 rw_assert(&pvh_global_lock, RA_WLOCKED);
4123 PMAP_ASSERT_LOCKED(pmap);
4124 PV_STAT(pv_entry_frees++);
4125 PV_STAT(pv_entry_spare++);
4127 pc = pv_to_chunk(pv);
4128 idx = pv - &pc->pc_pventry[0];
4129 field = idx / (sizeof(u_long) * NBBY);
4130 bit = idx % (sizeof(u_long) * NBBY);
4131 pc->pc_map[field] |= 1ul << bit;
4132 for (idx = 0; idx < _NPCM; idx++)
4133 if (pc->pc_map[idx] != pc_freemask[idx]) {
4135 * 98% of the time, pc is already at the head of the
4136 * list. If it isn't already, move it to the head.
4138 if (__predict_false(TAILQ_FIRST(&pmap->pm_pvchunk) !=
4140 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
4141 TAILQ_INSERT_HEAD(&pmap->pm_pvchunk, pc,
4146 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
4147 pmap_free_pv_chunk(pc);
4151 pmap_free_pv_chunk(struct pv_chunk *pc)
4155 TAILQ_REMOVE(&pv_chunks, pc, pc_lru);
4156 PV_STAT(pv_entry_spare -= _NPCPV);
4157 PV_STAT(pc_chunk_count--);
4158 PV_STAT(pc_chunk_frees++);
4159 /* entire chunk is free, return it */
4160 m = PHYS_TO_VM_PAGE(pmap_kextract((vm_offset_t)pc));
4161 pmap_qremove((vm_offset_t)pc, 1);
4162 vm_page_unwire(m, 0);
4164 pmap_ptelist_free(&pv_vafree, (vm_offset_t)pc);
4169 pmap_get_pv_entry(pmap_t pmap, boolean_t try)
4171 static const struct timeval printinterval = { 60, 0 };
4172 static struct timeval lastprint;
4173 struct pv_chunk *pc;
4176 int bit, field, idx;
4178 rw_assert(&pvh_global_lock, RA_WLOCKED);
4179 PMAP_ASSERT_LOCKED(pmap);
4180 PV_STAT(pv_entry_allocs++);
4183 if (pv_entry_count > pv_entry_high_water)
4184 if (ratecheck(&lastprint, &printinterval))
4185 printf("%s: Approaching the limit on PV entries.\n",
4188 pc = TAILQ_FIRST(&pmap->pm_pvchunk);
4190 for (field = 0; field < _NPCM; field++) {
4191 if (pc->pc_map[field]) {
4192 bit = ffs(pc->pc_map[field]) - 1;
4196 if (field < _NPCM) {
4197 idx = field * sizeof(pc->pc_map[field]) * NBBY + bit;
4198 pv = &pc->pc_pventry[idx];
4199 pc->pc_map[field] &= ~(1ul << bit);
4200 /* If this was the last item, move it to tail */
4201 for (field = 0; field < _NPCM; field++)
4202 if (pc->pc_map[field] != 0) {
4203 PV_STAT(pv_entry_spare--);
4204 return (pv); /* not full, return */
4206 TAILQ_REMOVE(&pmap->pm_pvchunk, pc, pc_list);
4207 TAILQ_INSERT_TAIL(&pmap->pm_pvchunk, pc, pc_list);
4208 PV_STAT(pv_entry_spare--);
4213 * Access to the ptelist "pv_vafree" is synchronized by the pvh
4214 * global lock. If "pv_vafree" is currently non-empty, it will
4215 * remain non-empty until pmap_ptelist_alloc() completes.
4217 if (pv_vafree == 0 || (m = vm_page_alloc(NULL, 0, VM_ALLOC_NORMAL |
4218 VM_ALLOC_NOOBJ | VM_ALLOC_WIRED)) == NULL) {
4221 PV_STAT(pc_chunk_tryfail++);
4224 m = pmap_pv_reclaim(pmap);
4228 PV_STAT(pc_chunk_count++);
4229 PV_STAT(pc_chunk_allocs++);
4230 pc = (struct pv_chunk *)pmap_ptelist_alloc(&pv_vafree);
4231 pmap_qenter((vm_offset_t)pc, &m, 1);
4233 pc->pc_map[0] = pc_freemask[0] & ~1ul; /* preallocated bit 0 */
4234 for (field = 1; field < _NPCM; field++)
4235 pc->pc_map[field] = pc_freemask[field];
4236 TAILQ_INSERT_TAIL(&pv_chunks, pc, pc_lru);
4237 pv = &pc->pc_pventry[0];
4238 TAILQ_INSERT_HEAD(&pmap->pm_pvchunk, pc, pc_list);
4239 PV_STAT(pv_entry_spare += _NPCPV - 1);
4244 * Remove the given range of addresses from the specified map.
4246 * It is assumed that the start and end are properly
4247 * rounded to the page size.
4249 #define PMAP_REMOVE_CLEAN_LIST_SIZE 3
4251 pmap_remove(pmap_t pmap, vm_offset_t sva, vm_offset_t eva)
4253 struct l2_bucket *l2b;
4254 vm_offset_t next_bucket;
4255 pd_entry_t *pl1pd, l1pd;
4258 u_int mappings, is_exec, is_refd;
4263 * we lock in the pmap => pv_head direction
4266 rw_wlock(&pvh_global_lock);
4271 * Check for large page.
4273 pl1pd = &pmap->pm_l1->l1_kva[L1_IDX(sva)];
4275 if ((l1pd & L1_TYPE_MASK) == L1_S_PROTO) {
4276 KASSERT((l1pd & L1_S_DOM_MASK) !=
4277 L1_S_DOM(PMAP_DOMAIN_KERNEL), ("pmap_remove: "
4278 "Trying to remove kernel section mapping"));
4280 * Are we removing the entire large page? If not,
4281 * demote the mapping and fall through.
4283 if (sva + L1_S_SIZE == L2_NEXT_BUCKET(sva) &&
4284 eva >= L2_NEXT_BUCKET(sva)) {
4285 pmap_remove_section(pmap, sva);
4286 sva = L2_NEXT_BUCKET(sva);
4288 } else if (!pmap_demote_section(pmap, sva)) {
4289 /* The large page mapping was destroyed. */
4290 sva = L2_NEXT_BUCKET(sva);
4295 * Do one L2 bucket's worth at a time.
4297 next_bucket = L2_NEXT_BUCKET(sva);
4298 if (next_bucket > eva)
4301 l2b = pmap_get_l2_bucket(pmap, sva);
4307 ptep = &l2b->l2b_kva[l2pte_index(sva)];
4310 while (sva < next_bucket) {
4319 * Nothing here, move along
4326 pmap->pm_stats.resident_count--;
4332 * Update flags. In a number of circumstances,
4333 * we could cluster a lot of these and do a
4334 * number of sequential pages in one go.
4336 if ((m = PHYS_TO_VM_PAGE(pa)) != NULL) {
4337 struct pv_entry *pve;
4339 pve = pmap_remove_pv(m, pmap, sva);
4341 is_exec = PTE_BEEN_EXECD(pte);
4342 is_refd = PTE_BEEN_REFD(pte);
4343 pmap_free_pv_entry(pmap, pve);
4347 if (pmap_is_current(pmap)) {
4349 if (total < PMAP_REMOVE_CLEAN_LIST_SIZE) {
4351 cpu_tlb_flushID_SE(sva);
4353 cpu_tlb_flushD_SE(sva);
4354 } else if (total == PMAP_REMOVE_CLEAN_LIST_SIZE)
4365 pmap_free_l2_bucket(pmap, l2b, mappings);
4368 rw_wunlock(&pvh_global_lock);
4377 * Zero a given physical page by mapping it at a page hook point.
4378 * In doing the zero page op, the page we zero is mapped cachable, as with
4379 * StrongARM accesses to non-cached pages are non-burst making writing
4380 * _any_ bulk data very slow.
4383 pmap_zero_page_gen(vm_page_t m, int off, int size)
4386 vm_paddr_t phys = VM_PAGE_TO_PHYS(m);
4387 if (!TAILQ_EMPTY(&m->md.pv_list))
4388 panic("pmap_zero_page: page has mappings");
4392 * Hook in the page, zero it, invalidate the TLB as needed.
4394 * Note the temporary zero-page mapping must be a non-cached page in
4395 * order to work without corruption when write-allocate is enabled.
4397 *cdst_pte = L2_S_PROTO | phys | pte_l2_s_cache_mode | L2_S_REF;
4398 pmap_set_prot(cdst_pte, VM_PROT_WRITE, 0);
4400 cpu_tlb_flushD_SE(cdstp);
4402 if (off || size != PAGE_SIZE)
4403 bzero((void *)(cdstp + off), size);
4408 * Although aliasing is not possible if we use
4409 * cdstp temporary mappings with memory that
4410 * will be mapped later as non-cached or with write-through
4411 * caches we might end up overwriting it when calling wbinv_all
4412 * So make sure caches are clean after copy operation
4414 cpu_idcache_wbinv_range(cdstp, size);
4415 pmap_l2cache_wbinv_range(cdstp, phys, size);
4421 * pmap_zero_page zeros the specified hardware page by mapping
4422 * the page into KVM and using bzero to clear its contents.
4425 pmap_zero_page(vm_page_t m)
4427 pmap_zero_page_gen(m, 0, PAGE_SIZE);
4432 * pmap_zero_page_area zeros the specified hardware page by mapping
4433 * the page into KVM and using bzero to clear its contents.
4435 * off and size may not cover an area beyond a single hardware page.
4438 pmap_zero_page_area(vm_page_t m, int off, int size)
4441 pmap_zero_page_gen(m, off, size);
4446 * pmap_zero_page_idle zeros the specified hardware page by mapping
4447 * the page into KVM and using bzero to clear its contents. This
4448 * is intended to be called from the vm_pagezero process only and
4452 pmap_zero_page_idle(vm_page_t m)
4459 * pmap_copy_page copies the specified (machine independent)
4460 * page by mapping the page into virtual memory and using
4461 * bcopy to copy the page, one machine dependent page at a
4468 * Copy one physical page into another, by mapping the pages into
4469 * hook points. The same comment regarding cachability as in
4470 * pmap_zero_page also applies here.
4473 pmap_copy_page_generic(vm_paddr_t src, vm_paddr_t dst)
4476 * Hold the source page's lock for the duration of the copy
4477 * so that no other mappings can be created while we have a
4478 * potentially aliased mapping.
4479 * Map the pages into the page hook points, copy them, and purge
4480 * the cache for the appropriate page. Invalidate the TLB
4485 /* For ARMv6 using System bit is deprecated and mapping with AP
4486 * bits set to 0x0 makes page not accessible. csrc_pte is mapped
4487 * read/write until proper mapping defines are created for ARMv6.
4489 *csrc_pte = L2_S_PROTO | src | pte_l2_s_cache_mode | L2_S_REF;
4490 pmap_set_prot(csrc_pte, VM_PROT_READ, 0);
4493 *cdst_pte = L2_S_PROTO | dst | pte_l2_s_cache_mode | L2_S_REF;
4494 pmap_set_prot(cdst_pte, VM_PROT_READ | VM_PROT_WRITE, 0);
4497 cpu_tlb_flushD_SE(csrcp);
4498 cpu_tlb_flushD_SE(cdstp);
4502 * Although aliasing is not possible if we use
4503 * cdstp temporary mappings with memory that
4504 * will be mapped later as non-cached or with write-through
4505 * caches we might end up overwriting it when calling wbinv_all
4506 * So make sure caches are clean after copy operation
4508 bcopy_page(csrcp, cdstp);
4510 cpu_idcache_wbinv_range(cdstp, PAGE_SIZE);
4511 pmap_l2cache_wbinv_range(cdstp, dst, PAGE_SIZE);
4516 int unmapped_buf_allowed = 1;
4519 pmap_copy_pages(vm_page_t ma[], vm_offset_t a_offset, vm_page_t mb[],
4520 vm_offset_t b_offset, int xfersize)
4522 vm_page_t a_pg, b_pg;
4523 vm_offset_t a_pg_offset, b_pg_offset;
4527 while (xfersize > 0) {
4528 a_pg = ma[a_offset >> PAGE_SHIFT];
4529 a_pg_offset = a_offset & PAGE_MASK;
4530 cnt = min(xfersize, PAGE_SIZE - a_pg_offset);
4531 b_pg = mb[b_offset >> PAGE_SHIFT];
4532 b_pg_offset = b_offset & PAGE_MASK;
4533 cnt = min(cnt, PAGE_SIZE - b_pg_offset);
4534 *csrc_pte = L2_S_PROTO | VM_PAGE_TO_PHYS(a_pg) |
4535 pte_l2_s_cache_mode | L2_S_REF;
4536 pmap_set_prot(csrc_pte, VM_PROT_READ, 0);
4538 *cdst_pte = L2_S_PROTO | VM_PAGE_TO_PHYS(b_pg) |
4539 pte_l2_s_cache_mode | L2_S_REF;
4540 pmap_set_prot(cdst_pte, VM_PROT_READ | VM_PROT_WRITE, 0);
4542 cpu_tlb_flushD_SE(csrcp);
4543 cpu_tlb_flushD_SE(cdstp);
4545 bcopy((char *)csrcp + a_pg_offset, (char *)cdstp + b_pg_offset,
4547 cpu_idcache_wbinv_range(cdstp + b_pg_offset, cnt);
4548 pmap_l2cache_wbinv_range(cdstp + b_pg_offset,
4549 VM_PAGE_TO_PHYS(b_pg) + b_pg_offset, cnt);
4558 pmap_copy_page(vm_page_t src, vm_page_t dst)
4561 if (_arm_memcpy && PAGE_SIZE >= _min_memcpy_size &&
4562 _arm_memcpy((void *)VM_PAGE_TO_PHYS(dst),
4563 (void *)VM_PAGE_TO_PHYS(src), PAGE_SIZE, IS_PHYSICAL) == 0)
4566 pmap_copy_page_generic(VM_PAGE_TO_PHYS(src), VM_PAGE_TO_PHYS(dst));
4570 * this routine returns true if a physical page resides
4571 * in the given pmap.
4574 pmap_page_exists_quick(pmap_t pmap, vm_page_t m)
4576 struct md_page *pvh;
4581 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
4582 ("pmap_page_exists_quick: page %p is not managed", m));
4584 rw_wlock(&pvh_global_lock);
4585 TAILQ_FOREACH(pv, &m->md.pv_list, pv_list) {
4586 if (PV_PMAP(pv) == pmap) {
4594 if (!rv && loops < 16 && (m->flags & PG_FICTITIOUS) == 0) {
4595 pvh = pa_to_pvh(VM_PAGE_TO_PHYS(m));
4596 TAILQ_FOREACH(pv, &pvh->pv_list, pv_list) {
4597 if (PV_PMAP(pv) == pmap) {
4606 rw_wunlock(&pvh_global_lock);
4611 * pmap_page_wired_mappings:
4613 * Return the number of managed mappings to the given physical page
4617 pmap_page_wired_mappings(vm_page_t m)
4622 if ((m->oflags & VPO_UNMANAGED) != 0)
4624 rw_wlock(&pvh_global_lock);
4625 count = pmap_pvh_wired_mappings(&m->md, count);
4626 if ((m->flags & PG_FICTITIOUS) == 0) {
4627 count = pmap_pvh_wired_mappings(pa_to_pvh(VM_PAGE_TO_PHYS(m)),
4630 rw_wunlock(&pvh_global_lock);
4635 * pmap_pvh_wired_mappings:
4637 * Return the updated number "count" of managed mappings that are wired.
4640 pmap_pvh_wired_mappings(struct md_page *pvh, int count)
4644 rw_assert(&pvh_global_lock, RA_WLOCKED);
4645 TAILQ_FOREACH(pv, &pvh->pv_list, pv_list) {
4646 if ((pv->pv_flags & PVF_WIRED) != 0)
4653 * Returns TRUE if any of the given mappings were referenced and FALSE
4654 * otherwise. Both page and section mappings are supported.
4657 pmap_is_referenced_pvh(struct md_page *pvh)
4659 struct l2_bucket *l2b;
4666 rw_assert(&pvh_global_lock, RA_WLOCKED);
4668 TAILQ_FOREACH(pv, &pvh->pv_list, pv_list) {
4671 pl1pd = &pmap->pm_l1->l1_kva[L1_IDX(pv->pv_va)];
4672 if ((*pl1pd & L1_TYPE_MASK) == L1_S_PROTO)
4673 rv = L1_S_REFERENCED(*pl1pd);
4675 l2b = pmap_get_l2_bucket(pmap, pv->pv_va);
4676 ptep = &l2b->l2b_kva[l2pte_index(pv->pv_va)];
4677 rv = L2_S_REFERENCED(*ptep);
4687 * pmap_is_referenced:
4689 * Return whether or not the specified physical page was referenced
4690 * in any physical maps.
4693 pmap_is_referenced(vm_page_t m)
4697 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
4698 ("pmap_is_referenced: page %p is not managed", m));
4699 rw_wlock(&pvh_global_lock);
4700 rv = pmap_is_referenced_pvh(&m->md) ||
4701 ((m->flags & PG_FICTITIOUS) == 0 &&
4702 pmap_is_referenced_pvh(pa_to_pvh(VM_PAGE_TO_PHYS(m))));
4703 rw_wunlock(&pvh_global_lock);
4708 * pmap_ts_referenced:
4710 * Return the count of reference bits for a page, clearing all of them.
4713 pmap_ts_referenced(vm_page_t m)
4716 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
4717 ("pmap_ts_referenced: page %p is not managed", m));
4718 return (pmap_clearbit(m, PVF_REF));
4722 * Returns TRUE if any of the given mappings were used to modify
4723 * physical memory. Otherwise, returns FALSE. Both page and 1MB section
4724 * mappings are supported.
4727 pmap_is_modified_pvh(struct md_page *pvh)
4730 struct l2_bucket *l2b;
4736 rw_assert(&pvh_global_lock, RA_WLOCKED);
4739 TAILQ_FOREACH(pv, &pvh->pv_list, pv_list) {
4742 pl1pd = &pmap->pm_l1->l1_kva[L1_IDX(pv->pv_va)];
4743 if ((*pl1pd & L1_TYPE_MASK) == L1_S_PROTO)
4744 rv = L1_S_WRITABLE(*pl1pd);
4746 l2b = pmap_get_l2_bucket(pmap, pv->pv_va);
4747 ptep = &l2b->l2b_kva[l2pte_index(pv->pv_va)];
4748 rv = L2_S_WRITABLE(*ptep);
4759 pmap_is_modified(vm_page_t m)
4763 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
4764 ("pmap_is_modified: page %p is not managed", m));
4766 * If the page is not exclusive busied, then PGA_WRITEABLE cannot be
4767 * concurrently set while the object is locked. Thus, if PGA_WRITEABLE
4768 * is clear, no PTEs can have APX cleared.
4770 VM_OBJECT_ASSERT_WLOCKED(m->object);
4771 if (!vm_page_xbusied(m) && (m->aflags & PGA_WRITEABLE) == 0)
4773 rw_wlock(&pvh_global_lock);
4774 rv = pmap_is_modified_pvh(&m->md) ||
4775 ((m->flags & PG_FICTITIOUS) == 0 &&
4776 pmap_is_modified_pvh(pa_to_pvh(VM_PAGE_TO_PHYS(m))));
4777 rw_wunlock(&pvh_global_lock);
4782 * Apply the given advice to the specified range of addresses within the
4783 * given pmap. Depending on the advice, clear the referenced and/or
4784 * modified flags in each mapping.
4787 pmap_advise(pmap_t pmap, vm_offset_t sva, vm_offset_t eva, int advice)
4789 struct l2_bucket *l2b;
4790 struct pv_entry *pve;
4791 pd_entry_t *pl1pd, l1pd;
4792 pt_entry_t *ptep, opte, pte;
4793 vm_offset_t next_bucket;
4796 if (advice != MADV_DONTNEED && advice != MADV_FREE)
4798 rw_wlock(&pvh_global_lock);
4800 for (; sva < eva; sva = next_bucket) {
4801 next_bucket = L2_NEXT_BUCKET(sva);
4802 if (next_bucket < sva)
4804 pl1pd = &pmap->pm_l1->l1_kva[L1_IDX(sva)];
4806 if ((l1pd & L1_TYPE_MASK) == L1_S_PROTO) {
4807 if (pmap == pmap_kernel())
4809 if (!pmap_demote_section(pmap, sva)) {
4811 * The large page mapping was destroyed.
4816 * Unless the page mappings are wired, remove the
4817 * mapping to a single page so that a subsequent
4818 * access may repromote. Since the underlying
4819 * l2_bucket is fully populated, this removal
4820 * never frees an entire l2_bucket.
4822 l2b = pmap_get_l2_bucket(pmap, sva);
4823 KASSERT(l2b != NULL,
4824 ("pmap_advise: no l2 bucket for "
4825 "va 0x%#x, pmap 0x%p", sva, pmap));
4826 ptep = &l2b->l2b_kva[l2pte_index(sva)];
4828 m = PHYS_TO_VM_PAGE(l2pte_pa(*ptep));
4830 ("pmap_advise: no vm_page for demoted superpage"));
4831 pve = pmap_find_pv(&m->md, pmap, sva);
4832 KASSERT(pve != NULL,
4833 ("pmap_advise: no PV entry for managed mapping"));
4834 if ((pve->pv_flags & PVF_WIRED) == 0) {
4835 pmap_free_l2_bucket(pmap, l2b, 1);
4836 pve = pmap_remove_pv(m, pmap, sva);
4837 pmap_free_pv_entry(pmap, pve);
4840 if (pmap_is_current(pmap)) {
4841 if (PTE_BEEN_EXECD(opte))
4842 cpu_tlb_flushID_SE(sva);
4843 else if (PTE_BEEN_REFD(opte))
4844 cpu_tlb_flushD_SE(sva);
4848 if (next_bucket > eva)
4850 l2b = pmap_get_l2_bucket(pmap, sva);
4853 for (ptep = &l2b->l2b_kva[l2pte_index(sva)];
4854 sva != next_bucket; ptep++, sva += PAGE_SIZE) {
4856 if ((opte & L2_S_PROTO) == 0)
4858 m = PHYS_TO_VM_PAGE(l2pte_pa(opte));
4859 if (m == NULL || (m->oflags & VPO_UNMANAGED) != 0)
4861 else if (L2_S_WRITABLE(opte)) {
4862 if (advice == MADV_DONTNEED) {
4864 * Don't need to mark the page
4865 * dirty as it was already marked as
4866 * such in pmap_fault_fixup() or
4867 * pmap_enter_locked().
4868 * Just clear the state.
4876 } else if (L2_S_REFERENCED(opte)) {
4882 if (pmap_is_current(pmap)) {
4883 if (PTE_BEEN_EXECD(opte))
4884 cpu_tlb_flushID_SE(sva);
4885 else if (PTE_BEEN_REFD(opte))
4886 cpu_tlb_flushD_SE(sva);
4890 rw_wunlock(&pvh_global_lock);
4895 * Clear the modify bits on the specified physical page.
4898 pmap_clear_modify(vm_page_t m)
4901 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
4902 ("pmap_clear_modify: page %p is not managed", m));
4903 VM_OBJECT_ASSERT_WLOCKED(m->object);
4904 KASSERT(!vm_page_xbusied(m),
4905 ("pmap_clear_modify: page %p is exclusive busied", m));
4908 * If the page is not PGA_WRITEABLE, then no mappings can be modified.
4909 * If the object containing the page is locked and the page is not
4910 * exclusive busied, then PGA_WRITEABLE cannot be concurrently set.
4912 if ((m->aflags & PGA_WRITEABLE) == 0)
4914 if (pmap_is_modified(m))
4915 pmap_clearbit(m, PVF_MOD);
4920 * Clear the write and modified bits in each of the given page's mappings.
4923 pmap_remove_write(vm_page_t m)
4925 KASSERT((m->oflags & VPO_UNMANAGED) == 0,
4926 ("pmap_remove_write: page %p is not managed", m));
4929 * If the page is not exclusive busied, then PGA_WRITEABLE cannot be
4930 * set by another thread while the object is locked. Thus,
4931 * if PGA_WRITEABLE is clear, no page table entries need updating.
4933 VM_OBJECT_ASSERT_WLOCKED(m->object);
4934 if (vm_page_xbusied(m) || (m->aflags & PGA_WRITEABLE) != 0)
4935 pmap_clearbit(m, PVF_WRITE);
4940 * perform the pmap work for mincore
4943 pmap_mincore(pmap_t pmap, vm_offset_t addr, vm_paddr_t *locked_pa)
4945 struct l2_bucket *l2b;
4946 pd_entry_t *pl1pd, l1pd;
4947 pt_entry_t *ptep, pte;
4955 pl1pd = &pmap->pm_l1->l1_kva[L1_IDX(addr)];
4957 if ((l1pd & L1_TYPE_MASK) == L1_S_PROTO) {
4958 pa = (l1pd & L1_S_FRAME);
4959 val = MINCORE_SUPER | MINCORE_INCORE;
4960 if (L1_S_WRITABLE(l1pd))
4961 val |= MINCORE_MODIFIED | MINCORE_MODIFIED_OTHER;
4963 m = PHYS_TO_VM_PAGE(pa);
4964 if (m != NULL && (m->oflags & VPO_UNMANAGED) == 0)
4967 if (L1_S_REFERENCED(l1pd))
4968 val |= MINCORE_REFERENCED |
4969 MINCORE_REFERENCED_OTHER;
4972 l2b = pmap_get_l2_bucket(pmap, addr);
4977 ptep = &l2b->l2b_kva[l2pte_index(addr)];
4979 if (!l2pte_valid(pte)) {
4983 val = MINCORE_INCORE;
4984 if (L2_S_WRITABLE(pte))
4985 val |= MINCORE_MODIFIED | MINCORE_MODIFIED_OTHER;
4988 m = PHYS_TO_VM_PAGE(pa);
4989 if (m != NULL && (m->oflags & VPO_UNMANAGED) == 0)
4992 if (L2_S_REFERENCED(pte))
4993 val |= MINCORE_REFERENCED |
4994 MINCORE_REFERENCED_OTHER;
4997 if ((val & (MINCORE_MODIFIED_OTHER | MINCORE_REFERENCED_OTHER)) !=
4998 (MINCORE_MODIFIED_OTHER | MINCORE_REFERENCED_OTHER) && managed) {
4999 /* Ensure that "PHYS_TO_VM_PAGE(pa)->object" doesn't change. */
5000 if (vm_page_pa_tryrelock(pmap, pa, locked_pa))
5004 PA_UNLOCK_COND(*locked_pa);
5010 pmap_sync_icache(pmap_t pmap, vm_offset_t va, vm_size_t sz)
5015 * Increase the starting virtual address of the given mapping if a
5016 * different alignment might result in more superpage mappings.
5019 pmap_align_superpage(vm_object_t object, vm_ooffset_t offset,
5020 vm_offset_t *addr, vm_size_t size)
5027 * Create a single section mapping.
5030 pmap_map_section(pmap_t pmap, vm_offset_t va, vm_offset_t pa, vm_prot_t prot,
5033 pd_entry_t *pl1pd, l1pd;
5036 KASSERT(((va | pa) & L1_S_OFFSET) == 0,
5037 ("Not a valid section mapping"));
5039 fl = pte_l1_s_cache_mode;
5041 pl1pd = &pmap->pm_l1->l1_kva[L1_IDX(va)];
5042 l1pd = L1_S_PROTO | pa | L1_S_PROT(PTE_USER, prot) | fl |
5043 L1_S_DOM(pmap->pm_domain);
5045 /* Mark page referenced if this section is a result of a promotion. */
5058 * Link the L2 page table specified by l2pv.pv_pa into the L1
5059 * page table at the slot for "va".
5062 pmap_link_l2pt(vm_offset_t l1pt, vm_offset_t va, struct pv_addr *l2pv)
5064 pd_entry_t *pde = (pd_entry_t *) l1pt, proto;
5065 u_int slot = va >> L1_S_SHIFT;
5067 proto = L1_S_DOM(PMAP_DOMAIN_KERNEL) | L1_C_PROTO;
5069 #ifdef VERBOSE_INIT_ARM
5070 printf("pmap_link_l2pt: pa=0x%x va=0x%x\n", l2pv->pv_pa, l2pv->pv_va);
5073 pde[slot + 0] = proto | (l2pv->pv_pa + 0x000);
5074 PTE_SYNC(&pde[slot]);
5076 SLIST_INSERT_HEAD(&kernel_pt_list, l2pv, pv_list);
5083 * Create a single page mapping.
5086 pmap_map_entry(vm_offset_t l1pt, vm_offset_t va, vm_offset_t pa, int prot,
5089 pd_entry_t *pde = (pd_entry_t *) l1pt;
5093 KASSERT(((va | pa) & PAGE_MASK) == 0, ("ouin"));
5095 fl = l2s_mem_types[cache];
5097 if ((pde[va >> L1_S_SHIFT] & L1_TYPE_MASK) != L1_TYPE_C)
5098 panic("pmap_map_entry: no L2 table for VA 0x%08x", va);
5100 ptep = (pt_entry_t *)kernel_pt_lookup(pde[L1_IDX(va)] & L1_C_ADDR_MASK);
5103 panic("pmap_map_entry: can't find L2 table for VA 0x%08x", va);
5105 ptep[l2pte_index(va)] = L2_S_PROTO | pa | fl | L2_S_REF;
5106 pmap_set_prot(&ptep[l2pte_index(va)], prot, 0);
5107 PTE_SYNC(&ptep[l2pte_index(va)]);
5113 * Map a chunk of memory using the most efficient mappings
5114 * possible (section. large page, small page) into the
5115 * provided L1 and L2 tables at the specified virtual address.
5118 pmap_map_chunk(vm_offset_t l1pt, vm_offset_t va, vm_offset_t pa,
5119 vm_size_t size, int prot, int type)
5121 pd_entry_t *pde = (pd_entry_t *) l1pt;
5122 pt_entry_t *ptep, f1, f2s, f2l;
5126 resid = (size + (PAGE_SIZE - 1)) & ~(PAGE_SIZE - 1);
5129 panic("pmap_map_chunk: no L1 table provided");
5131 #ifdef VERBOSE_INIT_ARM
5132 printf("pmap_map_chunk: pa=0x%x va=0x%x size=0x%x resid=0x%x "
5133 "prot=0x%x type=%d\n", pa, va, size, resid, prot, type);
5136 f1 = l1_mem_types[type];
5137 f2l = l2l_mem_types[type];
5138 f2s = l2s_mem_types[type];
5143 /* See if we can use a section mapping. */
5144 if (L1_S_MAPPABLE_P(va, pa, resid)) {
5145 #ifdef VERBOSE_INIT_ARM
5148 pde[va >> L1_S_SHIFT] = L1_S_PROTO | pa |
5149 L1_S_PROT(PTE_KERNEL, prot | VM_PROT_EXECUTE) |
5150 f1 | L1_S_DOM(PMAP_DOMAIN_KERNEL) | L1_S_REF;
5151 PTE_SYNC(&pde[va >> L1_S_SHIFT]);
5159 * Ok, we're going to use an L2 table. Make sure
5160 * one is actually in the corresponding L1 slot
5161 * for the current VA.
5163 if ((pde[va >> L1_S_SHIFT] & L1_TYPE_MASK) != L1_TYPE_C)
5164 panic("pmap_map_chunk: no L2 table for VA 0x%08x", va);
5166 ptep = (pt_entry_t *) kernel_pt_lookup(
5167 pde[L1_IDX(va)] & L1_C_ADDR_MASK);
5169 panic("pmap_map_chunk: can't find L2 table for VA"
5171 /* See if we can use a L2 large page mapping. */
5172 if (L2_L_MAPPABLE_P(va, pa, resid)) {
5173 #ifdef VERBOSE_INIT_ARM
5176 for (i = 0; i < 16; i++) {
5177 ptep[l2pte_index(va) + i] =
5179 L2_L_PROT(PTE_KERNEL, prot) | f2l;
5180 PTE_SYNC(&ptep[l2pte_index(va) + i]);
5188 /* Use a small page mapping. */
5189 #ifdef VERBOSE_INIT_ARM
5192 ptep[l2pte_index(va)] = L2_S_PROTO | pa | f2s | L2_S_REF;
5193 pmap_set_prot(&ptep[l2pte_index(va)], prot, 0);
5194 PTE_SYNC(&ptep[l2pte_index(va)]);
5199 #ifdef VERBOSE_INIT_ARM
5207 pmap_dmap_iscurrent(pmap_t pmap)
5209 return(pmap_is_current(pmap));
5213 pmap_page_set_memattr(vm_page_t m, vm_memattr_t ma)
5216 * Remember the memattr in a field that gets used to set the appropriate
5217 * bits in the PTEs as mappings are established.
5219 m->md.pv_memattr = ma;
5222 * It appears that this function can only be called before any mappings
5223 * for the page are established on ARM. If this ever changes, this code
5224 * will need to walk the pv_list and make each of the existing mappings
5225 * uncacheable, being careful to sync caches and PTEs (and maybe
5226 * invalidate TLB?) for any current mapping it modifies.
5228 if (TAILQ_FIRST(&m->md.pv_list) != NULL)
5229 panic("Can't change memattr on page with existing mappings");