2 * Copyright (c) 2013 Ian Lepore <ian@freebsd.org>
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27 #include <sys/cdefs.h>
28 __FBSDID("$FreeBSD$");
31 * Clocks and power control driver for Freescale i.MX6 family of SoCs.
34 #include <sys/param.h>
35 #include <sys/systm.h>
36 #include <sys/kernel.h>
37 #include <sys/module.h>
41 #include <dev/ofw/ofw_bus.h>
42 #include <dev/ofw/ofw_bus_subr.h>
44 #include <machine/bus.h>
46 #include <arm/freescale/imx/imx6_anatopreg.h>
47 #include <arm/freescale/imx/imx6_anatopvar.h>
48 #include <arm/freescale/imx/imx_machdep.h>
49 #include <arm/freescale/imx/imx6_ccmreg.h>
52 /* XXX temp kludge for imx51_get_clock. */
53 #include <arm/freescale/imx/imx51_ccmvar.h>
54 #include <arm/freescale/imx/imx51_ccmreg.h>
58 struct resource *mem_res;
61 static struct ccm_softc *ccm_sc;
63 static inline uint32_t
64 RD4(struct ccm_softc *sc, bus_size_t off)
67 return (bus_read_4(sc->mem_res, off));
71 WR4(struct ccm_softc *sc, bus_size_t off, uint32_t val)
74 bus_write_4(sc->mem_res, off, val);
78 ccm_detach(device_t dev)
82 sc = device_get_softc(dev);
84 if (sc->mem_res != NULL)
85 bus_release_resource(dev, SYS_RES_MEMORY, 0, sc->mem_res);
91 ccm_attach(device_t dev)
97 sc = device_get_softc(dev);
100 /* Allocate bus_space resources. */
102 sc->mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
104 if (sc->mem_res == NULL) {
105 device_printf(dev, "Cannot allocate memory resources\n");
113 * Configure the Low Power Mode setting to leave the ARM core power on
114 * when a WFI instruction is executed. This lets the MPCore timers and
115 * GIC continue to run, which is helpful when the only thing that can
116 * wake you up is an MPCore Private Timer interrupt delivered via GIC.
118 * XXX Based on the docs, setting CCM_CGPR_INT_MEM_CLK_LPM shouldn't be
119 * required when the LPM bits are set to LPM_RUN. But experimentally
120 * I've experienced a fairly rare lockup when not setting it. I was
121 * unable to prove conclusively that the lockup was related to power
122 * management or that this definitively fixes it. Revisit this.
124 reg = RD4(sc, CCM_CGPR);
125 reg |= CCM_CGPR_INT_MEM_CLK_LPM;
126 WR4(sc, CCM_CGPR, reg);
127 reg = RD4(sc, CCM_CLPCR);
128 reg = (reg & ~CCM_CLPCR_LPM_MASK) | CCM_CLPCR_LPM_RUN;
129 WR4(sc, CCM_CLPCR, reg);
142 ccm_probe(device_t dev)
145 if (!ofw_bus_status_okay(dev))
148 if (ofw_bus_is_compatible(dev, "fsl,imx6q-ccm") == 0)
151 device_set_desc(dev, "Freescale i.MX6 Clock Control Module");
153 return (BUS_PROBE_DEFAULT);
157 imx_ccm_usb_enable(device_t _usbdev)
161 * For imx6, the USBOH3 clock gate is bits 0-1 of CCGR6, so no need for
162 * shifting and masking here, just set the low-order two bits to ALWAYS.
164 WR4(ccm_sc, CCM_CCGR6, RD4(ccm_sc, CCM_CCGR6) | CCGR_CLK_MODE_ALWAYS);
168 imx_ccm_usbphy_enable(device_t _phydev)
172 * Right now it's not clear how to figure from fdt data which phy unit
173 * we're supposed to operate on. Until this is worked out, just enable
179 phy_num = 0; /* XXX */
189 device_printf(ccm_sc->dev, "Bad PHY number %u,\n",
194 imx6_anatop_write_4(IMX6_ANALOG_CCM_PLL_USB1 + regoff,
195 IMX6_ANALOG_CCM_PLL_USB_ENABLE |
196 IMX6_ANALOG_CCM_PLL_USB_POWER |
197 IMX6_ANALOG_CCM_PLL_USB_EN_USB_CLKS);
199 imx6_anatop_write_4(IMX6_ANALOG_CCM_PLL_USB1 + 0,
200 IMX6_ANALOG_CCM_PLL_USB_ENABLE |
201 IMX6_ANALOG_CCM_PLL_USB_POWER |
202 IMX6_ANALOG_CCM_PLL_USB_EN_USB_CLKS);
204 imx6_anatop_write_4(IMX6_ANALOG_CCM_PLL_USB1 + 0x10,
205 IMX6_ANALOG_CCM_PLL_USB_ENABLE |
206 IMX6_ANALOG_CCM_PLL_USB_POWER |
207 IMX6_ANALOG_CCM_PLL_USB_EN_USB_CLKS);
215 // XXX Fix this. This has to be here for other code to link,
216 // but it doesn't have to return anything useful for imx6 right now.
218 imx51_get_clock(enum imx51_clock clk)
222 case IMX51CLK_IPG_CLK_ROOT:
225 printf("imx51_get_clock() on imx6 doesn't know about clock %d\n", clk);
231 static device_method_t ccm_methods[] = {
232 /* Device interface */
233 DEVMETHOD(device_probe, ccm_probe),
234 DEVMETHOD(device_attach, ccm_attach),
235 DEVMETHOD(device_detach, ccm_detach),
240 static driver_t ccm_driver = {
243 sizeof(struct ccm_softc)
246 static devclass_t ccm_devclass;
248 DRIVER_MODULE(ccm, simplebus, ccm_driver, ccm_devclass, 0, 0);