2 * Copyright (c) 2011 Jakub Wojciech Klama <jceel@FreeBSD.org>
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27 #include <sys/cdefs.h>
28 __FBSDID("$FreeBSD$");
30 #include <sys/param.h>
31 #include <sys/systm.h>
35 #include <sys/endian.h>
36 #include <sys/kernel.h>
37 #include <sys/kthread.h>
39 #include <sys/malloc.h>
40 #include <sys/module.h>
41 #include <sys/mutex.h>
42 #include <sys/queue.h>
43 #include <sys/resource.h>
46 #include <sys/timetc.h>
47 #include <sys/watchdog.h>
51 #include <machine/bus.h>
52 #include <machine/cpu.h>
53 #include <machine/cpufunc.h>
54 #include <machine/resource.h>
55 #include <machine/intr.h>
57 #include <dev/fdt/fdt_common.h>
58 #include <dev/ofw/ofw_bus.h>
59 #include <dev/ofw/ofw_bus_subr.h>
61 #include <arm/lpc/lpcreg.h>
62 #include <arm/lpc/lpcvar.h>
65 struct lpc_fb_dmamap_arg {
66 bus_addr_t lf_dma_busaddr;
69 struct lpc_lcd_config {
73 uint32_t lc_pixelclock;
84 struct cdev * lf_cdev;
86 struct resource * lf_mem_res;
87 struct resource * lf_irq_res;
88 bus_space_tag_t lf_bst;
89 bus_space_handle_t lf_bsh;
91 bus_dma_tag_t lf_dma_tag;
92 bus_dmamap_t lf_dma_map;
94 bus_addr_t lf_buffer_phys;
95 bus_size_t lf_buffer_size;
96 struct lpc_lcd_config lf_lcd_config;
101 extern void ssd1289_configure(void);
103 #define lpc_fb_lock(_sc) mtx_lock(&(_sc)->lf_mtx)
104 #define lpc_fb_unlock(_sc) mtx_unlock(&(_sc)->lf_mtx)
105 #define lpc_fb_lock_assert(sc) mtx_assert(&(_sc)->lf_mtx, MA_OWNED)
107 #define lpc_fb_read_4(_sc, _reg) \
108 bus_space_read_4((_sc)->lf_bst, (_sc)->lf_bsh, (_reg))
109 #define lpc_fb_write_4(_sc, _reg, _val) \
110 bus_space_write_4((_sc)->lf_bst, (_sc)->lf_bsh, (_reg), (_val))
114 static int lpc_fb_probe(device_t);
115 static int lpc_fb_attach(device_t);
116 static void lpc_fb_intr(void *);
117 static void lpc_fb_dmamap_cb(void *arg, bus_dma_segment_t *segs, int nseg, int err);
119 static int lpc_fb_fdt_read(phandle_t, const char *, uint32_t *);
120 static int lpc_fb_read_lcd_config(phandle_t, struct lpc_lcd_config *);
122 static int lpc_fb_open(struct cdev *, int, int, struct thread *);
123 static int lpc_fb_close(struct cdev *, int, int, struct thread *);
124 static int lpc_fb_ioctl(struct cdev *, u_long, caddr_t, int, struct thread *);
125 static int lpc_fb_mmap(struct cdev *, vm_ooffset_t, vm_paddr_t *, int, vm_memattr_t *);
127 static void lpc_fb_blank(struct lpc_fb_softc *);
129 static struct cdevsw lpc_fb_cdevsw = {
130 .d_open = lpc_fb_open,
131 .d_close = lpc_fb_close,
132 .d_ioctl = lpc_fb_ioctl,
133 .d_mmap = lpc_fb_mmap,
135 .d_version = D_VERSION,
139 lpc_fb_probe(device_t dev)
141 if (!ofw_bus_is_compatible(dev, "lpc,fb"))
144 device_set_desc(dev, "LPC32x0 framebuffer device");
145 return (BUS_PROBE_DEFAULT);
149 lpc_fb_attach(device_t dev)
151 struct lpc_fb_softc *sc = device_get_softc(dev);
152 struct lpc_fb_dmamap_arg ctx;
154 int mode, rid, err = 0;
157 mtx_init(&sc->lf_mtx, "lpcfb", "fb", MTX_DEF);
160 sc->lf_mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
162 if (!sc->lf_mem_res) {
163 device_printf(dev, "cannot allocate memory window\n");
167 sc->lf_bst = rman_get_bustag(sc->lf_mem_res);
168 sc->lf_bsh = rman_get_bushandle(sc->lf_mem_res);
171 sc->lf_irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid,
173 if (!sc->lf_irq_res) {
174 device_printf(dev, "cannot allocate interrupt\n");
175 bus_release_resource(dev, SYS_RES_MEMORY, 0, sc->lf_mem_res);
179 if (bus_setup_intr(dev, sc->lf_irq_res, INTR_TYPE_MISC | INTR_MPSAFE,
180 NULL, lpc_fb_intr, sc, &sc->lf_intrhand))
182 bus_release_resource(dev, SYS_RES_MEMORY, 0, sc->lf_mem_res);
183 bus_release_resource(dev, SYS_RES_IRQ, 1, sc->lf_irq_res);
184 device_printf(dev, "cannot setup interrupt handler\n");
188 node = ofw_bus_get_node(dev);
190 err = lpc_fb_read_lcd_config(node, &sc->lf_lcd_config);
192 device_printf(dev, "cannot read LCD configuration\n");
196 sc->lf_buffer_size = sc->lf_lcd_config.lc_xres *
197 sc->lf_lcd_config.lc_yres *
198 (sc->lf_lcd_config.lc_bpp == 24 ? 3 : 2);
200 device_printf(dev, "%dx%d LCD, %d bits per pixel, %dkHz pixel clock\n",
201 sc->lf_lcd_config.lc_xres, sc->lf_lcd_config.lc_yres,
202 sc->lf_lcd_config.lc_bpp, sc->lf_lcd_config.lc_pixelclock / 1000);
204 err = bus_dma_tag_create(
205 bus_get_dma_tag(sc->lf_dev),
206 4, 0, /* alignment, boundary */
207 BUS_SPACE_MAXADDR_32BIT, /* lowaddr */
208 BUS_SPACE_MAXADDR, /* highaddr */
209 NULL, NULL, /* filter, filterarg */
210 sc->lf_buffer_size, 1, /* maxsize, nsegments */
211 sc->lf_buffer_size, 0, /* maxsegsize, flags */
212 NULL, NULL, /* lockfunc, lockarg */
215 err = bus_dmamem_alloc(sc->lf_dma_tag, (void **)&sc->lf_buffer,
218 device_printf(dev, "cannot allocate framebuffer\n");
222 err = bus_dmamap_load(sc->lf_dma_tag, sc->lf_dma_map, sc->lf_buffer,
223 sc->lf_buffer_size, lpc_fb_dmamap_cb, &ctx, BUS_DMA_NOWAIT);
225 device_printf(dev, "cannot load DMA map\n");
229 switch (sc->lf_lcd_config.lc_bpp) {
231 mode = LPC_CLKPWR_LCDCLK_CTRL_MODE_12;
234 mode = LPC_CLKPWR_LCDCLK_CTRL_MODE_15;
237 mode = LPC_CLKPWR_LCDCLK_CTRL_MODE_16;
240 mode = LPC_CLKPWR_LCDCLK_CTRL_MODE_24;
243 panic("unsupported bpp");
246 lpc_pwr_write(sc->lf_dev, LPC_CLKPWR_LCDCLK_CTRL,
247 LPC_CLKPWR_LCDCLK_CTRL_MODE(mode) |
248 LPC_CLKPWR_LCDCLK_CTRL_HCLKEN);
250 sc->lf_buffer_phys = ctx.lf_dma_busaddr;
251 sc->lf_cdev = make_dev(&lpc_fb_cdevsw, 0, UID_ROOT, GID_WHEEL,
254 sc->lf_cdev->si_drv1 = sc;
262 lpc_fb_dmamap_cb(void *arg, bus_dma_segment_t *segs, int nseg, int err)
264 struct lpc_fb_dmamap_arg *ctx;
269 ctx = (struct lpc_fb_dmamap_arg *)arg;
270 ctx->lf_dma_busaddr = segs[0].ds_addr;
274 lpc_fb_intr(void *arg)
279 lpc_fb_fdt_read(phandle_t node, const char *name, uint32_t *ret)
281 if (OF_getprop(node, name, ret, sizeof(uint32_t)) <= 0)
284 *ret = fdt32_to_cpu(*ret);
289 lpc_fb_read_lcd_config(phandle_t node, struct lpc_lcd_config *cfg)
291 if (lpc_fb_fdt_read(node, "horizontal-resolution", &cfg->lc_xres))
294 if (lpc_fb_fdt_read(node, "vertical-resolution", &cfg->lc_yres))
297 if (lpc_fb_fdt_read(node, "bits-per-pixel", &cfg->lc_bpp))
300 if (lpc_fb_fdt_read(node, "pixel-clock", &cfg->lc_pixelclock))
303 if (lpc_fb_fdt_read(node, "left-margin", &cfg->lc_left_margin))
306 if (lpc_fb_fdt_read(node, "right-margin", &cfg->lc_right_margin))
309 if (lpc_fb_fdt_read(node, "upper-margin", &cfg->lc_upper_margin))
312 if (lpc_fb_fdt_read(node, "lower-margin", &cfg->lc_lower_margin))
315 if (lpc_fb_fdt_read(node, "hsync-len", &cfg->lc_hsync_len))
318 if (lpc_fb_fdt_read(node, "vsync-len", &cfg->lc_vsync_len))
325 lpc_fb_setup(struct lpc_fb_softc *sc)
327 struct lpc_lcd_config *cfg = &sc->lf_lcd_config;
330 lpc_fb_write_4(sc, LPC_LCD_TIMH,
331 LPC_LCD_TIMH_PPL(cfg->lc_xres) |
332 LPC_LCD_TIMH_HSW(cfg->lc_hsync_len - 1) |
333 LPC_LCD_TIMH_HFP(cfg->lc_right_margin - 1) |
334 LPC_LCD_TIMH_HBP(cfg->lc_left_margin - 1));
336 lpc_fb_write_4(sc, LPC_LCD_TIMV,
337 LPC_LCD_TIMV_LPP(cfg->lc_yres - 1) |
338 LPC_LCD_TIMV_VSW(cfg->lc_vsync_len - 1) |
339 LPC_LCD_TIMV_VFP(cfg->lc_lower_margin) |
340 LPC_LCD_TIMV_VBP(cfg->lc_upper_margin));
342 /* XXX LPC_LCD_POL_PCD_LO */
343 lpc_fb_write_4(sc, LPC_LCD_POL,
344 LPC_LCD_POL_IHS | LPC_LCD_POL_IVS |
345 LPC_LCD_POL_CPL(cfg->lc_xres - 1) |
346 LPC_LCD_POL_PCD_LO(4));
348 lpc_fb_write_4(sc, LPC_LCD_UPBASE, sc->lf_buffer_phys);
350 switch (cfg->lc_bpp) {
352 bpp = LPC_LCD_CTRL_BPP1;
355 bpp = LPC_LCD_CTRL_BPP2;
358 bpp = LPC_LCD_CTRL_BPP4;
361 bpp = LPC_LCD_CTRL_BPP8;
364 bpp = LPC_LCD_CTRL_BPP12_444;
367 bpp = LPC_LCD_CTRL_BPP16;
370 bpp = LPC_LCD_CTRL_BPP16_565;
373 bpp = LPC_LCD_CTRL_BPP24;
376 panic("LCD unknown bpp: %d", cfg->lc_bpp);
379 lpc_fb_write_4(sc, LPC_LCD_CTRL,
380 LPC_LCD_CTRL_LCDVCOMP(1) |
381 LPC_LCD_CTRL_LCDPWR |
383 LPC_LCD_CTRL_LCDTFT |
384 LPC_LCD_CTRL_LCDBPP(bpp) |
390 lpc_fb_open(struct cdev *cdev, int oflags, int devtype, struct thread *td)
392 struct lpc_fb_softc *sc = cdev->si_drv1;
403 if (!sc->lf_initialized) {
407 sc->lf_initialized = 1;
414 lpc_fb_close(struct cdev *cdev, int fflag, int devtype, struct thread *td)
416 struct lpc_fb_softc *sc = cdev->si_drv1;
426 lpc_fb_ioctl(struct cdev *cdev, u_long cmd, caddr_t data, int x,
434 lpc_fb_mmap(struct cdev *cdev, vm_ooffset_t offset, vm_paddr_t *paddr,
435 int nprot, vm_memattr_t *memattr)
437 struct lpc_fb_softc *sc = cdev->si_drv1;
439 *paddr = (vm_paddr_t)(sc->lf_buffer_phys + offset);
444 lpc_fb_blank(struct lpc_fb_softc *sc)
446 memset(sc->lf_buffer, 0xffff, sc->lf_buffer_size);
449 static device_method_t lpc_fb_methods[] = {
450 /* Device interface */
451 DEVMETHOD(device_probe, lpc_fb_probe),
452 DEVMETHOD(device_attach, lpc_fb_attach),
457 static devclass_t lpc_fb_devclass;
459 static driver_t lpc_fb_driver = {
462 sizeof(struct lpc_fb_softc),
465 DRIVER_MODULE(lpcfb, simplebus, lpc_fb_driver, lpc_fb_devclass, 0, 0);