2 * Copyright (c) 2011 Jakub Wojciech Klama <jceel@FreeBSD.org>
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27 #include <sys/cdefs.h>
28 __FBSDID("$FreeBSD$");
30 #include <sys/param.h>
31 #include <sys/systm.h>
35 #include <sys/endian.h>
36 #include <sys/kernel.h>
37 #include <sys/kthread.h>
39 #include <sys/malloc.h>
40 #include <sys/module.h>
41 #include <sys/mutex.h>
42 #include <sys/queue.h>
43 #include <sys/resource.h>
46 #include <sys/timetc.h>
47 #include <sys/watchdog.h>
51 #include <machine/bus.h>
52 #include <machine/cpu.h>
53 #include <machine/cpufunc.h>
54 #include <machine/resource.h>
55 #include <machine/frame.h>
56 #include <machine/intr.h>
58 #include <dev/fdt/fdt_common.h>
59 #include <dev/ofw/ofw_bus.h>
60 #include <dev/ofw/ofw_bus_subr.h>
62 #include <arm/lpc/lpcreg.h>
63 #include <arm/lpc/lpcvar.h>
66 struct lpc_fb_dmamap_arg {
67 bus_addr_t lf_dma_busaddr;
70 struct lpc_lcd_config {
74 uint32_t lc_pixelclock;
85 struct cdev * lf_cdev;
87 struct resource * lf_mem_res;
88 struct resource * lf_irq_res;
89 bus_space_tag_t lf_bst;
90 bus_space_handle_t lf_bsh;
92 bus_dma_tag_t lf_dma_tag;
93 bus_dmamap_t lf_dma_map;
95 bus_addr_t lf_buffer_phys;
96 bus_size_t lf_buffer_size;
97 struct lpc_lcd_config lf_lcd_config;
102 extern void ssd1289_configure(void);
104 #define lpc_fb_lock(_sc) mtx_lock(&(_sc)->lf_mtx)
105 #define lpc_fb_unlock(_sc) mtx_unlock(&(_sc)->lf_mtx)
106 #define lpc_fb_lock_assert(sc) mtx_assert(&(_sc)->lf_mtx, MA_OWNED)
108 #define lpc_fb_read_4(_sc, _reg) \
109 bus_space_read_4((_sc)->lf_bst, (_sc)->lf_bsh, (_reg))
110 #define lpc_fb_write_4(_sc, _reg, _val) \
111 bus_space_write_4((_sc)->lf_bst, (_sc)->lf_bsh, (_reg), (_val))
115 static int lpc_fb_probe(device_t);
116 static int lpc_fb_attach(device_t);
117 static void lpc_fb_intr(void *);
118 static void lpc_fb_dmamap_cb(void *arg, bus_dma_segment_t *segs, int nseg, int err);
120 static int lpc_fb_fdt_read(phandle_t, const char *, uint32_t *);
121 static int lpc_fb_read_lcd_config(phandle_t, struct lpc_lcd_config *);
123 static int lpc_fb_open(struct cdev *, int, int, struct thread *);
124 static int lpc_fb_close(struct cdev *, int, int, struct thread *);
125 static int lpc_fb_ioctl(struct cdev *, u_long, caddr_t, int, struct thread *);
126 static int lpc_fb_mmap(struct cdev *, vm_ooffset_t, vm_paddr_t *, int, vm_memattr_t *);
128 static void lpc_fb_blank(struct lpc_fb_softc *);
130 static struct cdevsw lpc_fb_cdevsw = {
131 .d_open = lpc_fb_open,
132 .d_close = lpc_fb_close,
133 .d_ioctl = lpc_fb_ioctl,
134 .d_mmap = lpc_fb_mmap,
136 .d_version = D_VERSION,
140 lpc_fb_probe(device_t dev)
142 if (!ofw_bus_is_compatible(dev, "lpc,fb"))
145 device_set_desc(dev, "LPC32x0 framebuffer device");
146 return (BUS_PROBE_DEFAULT);
150 lpc_fb_attach(device_t dev)
152 struct lpc_fb_softc *sc = device_get_softc(dev);
153 struct lpc_fb_dmamap_arg ctx;
155 int mode, rid, err = 0;
158 mtx_init(&sc->lf_mtx, "lpcfb", "fb", MTX_DEF);
161 sc->lf_mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
163 if (!sc->lf_mem_res) {
164 device_printf(dev, "cannot allocate memory window\n");
168 sc->lf_bst = rman_get_bustag(sc->lf_mem_res);
169 sc->lf_bsh = rman_get_bushandle(sc->lf_mem_res);
172 sc->lf_irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid,
174 if (!sc->lf_irq_res) {
175 device_printf(dev, "cannot allocate interrupt\n");
176 bus_release_resource(dev, SYS_RES_MEMORY, 0, sc->lf_mem_res);
180 if (bus_setup_intr(dev, sc->lf_irq_res, INTR_TYPE_MISC | INTR_MPSAFE,
181 NULL, lpc_fb_intr, sc, &sc->lf_intrhand))
183 bus_release_resource(dev, SYS_RES_MEMORY, 0, sc->lf_mem_res);
184 bus_release_resource(dev, SYS_RES_IRQ, 1, sc->lf_irq_res);
185 device_printf(dev, "cannot setup interrupt handler\n");
189 node = ofw_bus_get_node(dev);
191 err = lpc_fb_read_lcd_config(node, &sc->lf_lcd_config);
193 device_printf(dev, "cannot read LCD configuration\n");
197 sc->lf_buffer_size = sc->lf_lcd_config.lc_xres *
198 sc->lf_lcd_config.lc_yres *
199 (sc->lf_lcd_config.lc_bpp == 24 ? 3 : 2);
201 device_printf(dev, "%dx%d LCD, %d bits per pixel, %dkHz pixel clock\n",
202 sc->lf_lcd_config.lc_xres, sc->lf_lcd_config.lc_yres,
203 sc->lf_lcd_config.lc_bpp, sc->lf_lcd_config.lc_pixelclock / 1000);
205 err = bus_dma_tag_create(
206 bus_get_dma_tag(sc->lf_dev),
207 4, 0, /* alignment, boundary */
208 BUS_SPACE_MAXADDR_32BIT, /* lowaddr */
209 BUS_SPACE_MAXADDR, /* highaddr */
210 NULL, NULL, /* filter, filterarg */
211 sc->lf_buffer_size, 1, /* maxsize, nsegments */
212 sc->lf_buffer_size, 0, /* maxsegsize, flags */
213 NULL, NULL, /* lockfunc, lockarg */
216 err = bus_dmamem_alloc(sc->lf_dma_tag, (void **)&sc->lf_buffer,
219 device_printf(dev, "cannot allocate framebuffer\n");
223 err = bus_dmamap_load(sc->lf_dma_tag, sc->lf_dma_map, sc->lf_buffer,
224 sc->lf_buffer_size, lpc_fb_dmamap_cb, &ctx, BUS_DMA_NOWAIT);
226 device_printf(dev, "cannot load DMA map\n");
230 switch (sc->lf_lcd_config.lc_bpp) {
232 mode = LPC_CLKPWR_LCDCLK_CTRL_MODE_12;
235 mode = LPC_CLKPWR_LCDCLK_CTRL_MODE_15;
238 mode = LPC_CLKPWR_LCDCLK_CTRL_MODE_16;
241 mode = LPC_CLKPWR_LCDCLK_CTRL_MODE_24;
244 panic("unsupported bpp");
247 lpc_pwr_write(sc->lf_dev, LPC_CLKPWR_LCDCLK_CTRL,
248 LPC_CLKPWR_LCDCLK_CTRL_MODE(mode) |
249 LPC_CLKPWR_LCDCLK_CTRL_HCLKEN);
251 sc->lf_buffer_phys = ctx.lf_dma_busaddr;
252 sc->lf_cdev = make_dev(&lpc_fb_cdevsw, 0, UID_ROOT, GID_WHEEL,
255 sc->lf_cdev->si_drv1 = sc;
263 lpc_fb_dmamap_cb(void *arg, bus_dma_segment_t *segs, int nseg, int err)
265 struct lpc_fb_dmamap_arg *ctx;
270 ctx = (struct lpc_fb_dmamap_arg *)arg;
271 ctx->lf_dma_busaddr = segs[0].ds_addr;
275 lpc_fb_intr(void *arg)
280 lpc_fb_fdt_read(phandle_t node, const char *name, uint32_t *ret)
282 if (OF_getprop(node, name, ret, sizeof(uint32_t)) <= 0)
285 *ret = fdt32_to_cpu(*ret);
290 lpc_fb_read_lcd_config(phandle_t node, struct lpc_lcd_config *cfg)
292 if (lpc_fb_fdt_read(node, "horizontal-resolution", &cfg->lc_xres))
295 if (lpc_fb_fdt_read(node, "vertical-resolution", &cfg->lc_yres))
298 if (lpc_fb_fdt_read(node, "bits-per-pixel", &cfg->lc_bpp))
301 if (lpc_fb_fdt_read(node, "pixel-clock", &cfg->lc_pixelclock))
304 if (lpc_fb_fdt_read(node, "left-margin", &cfg->lc_left_margin))
307 if (lpc_fb_fdt_read(node, "right-margin", &cfg->lc_right_margin))
310 if (lpc_fb_fdt_read(node, "upper-margin", &cfg->lc_upper_margin))
313 if (lpc_fb_fdt_read(node, "lower-margin", &cfg->lc_lower_margin))
316 if (lpc_fb_fdt_read(node, "hsync-len", &cfg->lc_hsync_len))
319 if (lpc_fb_fdt_read(node, "vsync-len", &cfg->lc_vsync_len))
326 lpc_fb_setup(struct lpc_fb_softc *sc)
328 struct lpc_lcd_config *cfg = &sc->lf_lcd_config;
331 lpc_fb_write_4(sc, LPC_LCD_TIMH,
332 LPC_LCD_TIMH_PPL(cfg->lc_xres) |
333 LPC_LCD_TIMH_HSW(cfg->lc_hsync_len - 1) |
334 LPC_LCD_TIMH_HFP(cfg->lc_right_margin - 1) |
335 LPC_LCD_TIMH_HBP(cfg->lc_left_margin - 1));
337 lpc_fb_write_4(sc, LPC_LCD_TIMV,
338 LPC_LCD_TIMV_LPP(cfg->lc_yres - 1) |
339 LPC_LCD_TIMV_VSW(cfg->lc_vsync_len - 1) |
340 LPC_LCD_TIMV_VFP(cfg->lc_lower_margin) |
341 LPC_LCD_TIMV_VBP(cfg->lc_upper_margin));
343 /* XXX LPC_LCD_POL_PCD_LO */
344 lpc_fb_write_4(sc, LPC_LCD_POL,
345 LPC_LCD_POL_IHS | LPC_LCD_POL_IVS |
346 LPC_LCD_POL_CPL(cfg->lc_xres - 1) |
347 LPC_LCD_POL_PCD_LO(4));
349 lpc_fb_write_4(sc, LPC_LCD_UPBASE, sc->lf_buffer_phys);
351 switch (cfg->lc_bpp) {
353 bpp = LPC_LCD_CTRL_BPP1;
356 bpp = LPC_LCD_CTRL_BPP2;
359 bpp = LPC_LCD_CTRL_BPP4;
362 bpp = LPC_LCD_CTRL_BPP8;
365 bpp = LPC_LCD_CTRL_BPP12_444;
368 bpp = LPC_LCD_CTRL_BPP16;
371 bpp = LPC_LCD_CTRL_BPP16_565;
374 bpp = LPC_LCD_CTRL_BPP24;
377 panic("LCD unknown bpp: %d", cfg->lc_bpp);
380 lpc_fb_write_4(sc, LPC_LCD_CTRL,
381 LPC_LCD_CTRL_LCDVCOMP(1) |
382 LPC_LCD_CTRL_LCDPWR |
384 LPC_LCD_CTRL_LCDTFT |
385 LPC_LCD_CTRL_LCDBPP(bpp) |
391 lpc_fb_open(struct cdev *cdev, int oflags, int devtype, struct thread *td)
393 struct lpc_fb_softc *sc = cdev->si_drv1;
404 if (!sc->lf_initialized) {
408 sc->lf_initialized = 1;
415 lpc_fb_close(struct cdev *cdev, int fflag, int devtype, struct thread *td)
417 struct lpc_fb_softc *sc = cdev->si_drv1;
427 lpc_fb_ioctl(struct cdev *cdev, u_long cmd, caddr_t data, int x,
435 lpc_fb_mmap(struct cdev *cdev, vm_ooffset_t offset, vm_paddr_t *paddr,
436 int nprot, vm_memattr_t *memattr)
438 struct lpc_fb_softc *sc = cdev->si_drv1;
440 *paddr = (vm_paddr_t)(sc->lf_buffer_phys + offset);
445 lpc_fb_blank(struct lpc_fb_softc *sc)
447 memset(sc->lf_buffer, 0xffff, sc->lf_buffer_size);
450 static device_method_t lpc_fb_methods[] = {
451 /* Device interface */
452 DEVMETHOD(device_probe, lpc_fb_probe),
453 DEVMETHOD(device_attach, lpc_fb_attach),
458 static devclass_t lpc_fb_devclass;
460 static driver_t lpc_fb_driver = {
463 sizeof(struct lpc_fb_softc),
466 DRIVER_MODULE(lpcfb, simplebus, lpc_fb_driver, lpc_fb_devclass, 0, 0);