2 * Copyright (c) 2002, 2003 Wasabi Systems, Inc.
5 * Written by Jason R. Thorpe for Wasabi Systems, Inc.
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 * 3. All advertising materials mentioning features or use of this software
16 * must display the following acknowledgement:
17 * This product includes software developed for the NetBSD Project by
18 * Wasabi Systems, Inc.
19 * 4. The name of Wasabi Systems, Inc. may not be used to endorse
20 * or promote products derived from this software without specific prior
23 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
24 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
25 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
26 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
27 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
28 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
29 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
30 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
31 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
32 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
33 * POSSIBILITY OF SUCH DAMAGE.
35 * from: FreeBSD: //depot/projects/arm/src/sys/arm/xscale/pxa2x0/pxa2x0var.h, rev 1
44 #include <machine/bus.h>
47 #include <machine/vm.h>
49 #include <dev/ofw/openfirm.h>
52 #define MV_TYPE_PCIE 1
54 #define MV_MODE_ENDPOINT 0
55 #define MV_MODE_ROOT 1
58 int gc_gpio; /* GPIO number */
59 uint32_t gc_flags; /* GPIO flags */
60 int gc_output; /* GPIO output value */
64 int target; /* Mbus unit ID */
65 int attr; /* Attributes of the target interface */
66 vm_paddr_t base; /* Physical base addr */
71 extern const struct gpio_config mv_gpio_config[];
72 extern const struct decode_win *cpu_wins;
73 extern const struct decode_win *idma_wins;
74 extern const struct decode_win *xor_wins;
75 extern int idma_wins_no;
76 extern int xor_wins_no;
78 /* Function prototypes */
79 int mv_gpio_setup_intrhandler(const char *name, driver_filter_t *filt,
80 void (*hand)(void *), void *arg, int pin, int flags, void **cookiep);
81 void mv_gpio_intr_mask(int pin);
82 void mv_gpio_intr_unmask(int pin);
83 void mv_gpio_out(uint32_t pin, uint8_t val, uint8_t enable);
84 uint8_t mv_gpio_in(uint32_t pin);
85 int platform_gpio_init(void);
87 int soc_decode_win(void);
88 void soc_id(uint32_t *dev, uint32_t *rev);
89 void soc_dump_decode_win(void);
90 uint32_t soc_power_ctrl_get(uint32_t mask);
91 void soc_power_ctrl_set(uint32_t mask);
92 uint64_t get_sar_value(void);
94 int decode_win_cpu_set(int target, int attr, vm_paddr_t base, uint32_t size,
96 int decode_win_overlap(int, int, const struct decode_win *);
97 int win_cpu_can_remap(int);
98 void decode_win_pcie_setup(u_long);
100 void ddr_disable(int i);
101 int ddr_is_active(int i);
102 uint32_t ddr_base(int i);
103 uint32_t ddr_size(int i);
104 uint32_t ddr_attr(int i);
105 uint32_t ddr_target(int i);
107 uint32_t cpu_extra_feat(void);
108 uint32_t get_tclk(void);
109 uint32_t get_l2clk(void);
110 uint32_t read_cpu_ctrl(uint32_t);
111 void write_cpu_ctrl(uint32_t, uint32_t);
113 #if defined(SOC_MV_ARMADAXP)
114 uint32_t read_cpu_mp_clocks(uint32_t reg);
115 void write_cpu_mp_clocks(uint32_t reg, uint32_t val);
116 uint32_t read_cpu_misc(uint32_t reg);
117 void write_cpu_misc(uint32_t reg, uint32_t val);
120 int mv_pcib_bar_win_set(device_t dev, uint32_t base, uint32_t size,
121 uint32_t remap, int winno, int busno);
122 int mv_pcib_cpu_win_remap(device_t dev, uint32_t remap, uint32_t size);
124 void mv_mask_endpoint_irq(uintptr_t nb, int unit);
125 void mv_unmask_endpoint_irq(uintptr_t nb, int unit);
127 int mv_drbl_get_next_irq(int dir, int unit);
128 void mv_drbl_mask_all(int unit);
129 void mv_drbl_mask_irq(uint32_t irq, int dir, int unit);
130 void mv_drbl_unmask_irq(uint32_t irq, int dir, int unit);
131 void mv_drbl_set_mask(uint32_t val, int dir, int unit);
132 uint32_t mv_drbl_get_mask(int dir, int unit);
133 void mv_drbl_set_cause(uint32_t val, int dir, int unit);
134 uint32_t mv_drbl_get_cause(int dir, int unit);
135 void mv_drbl_set_msg(uint32_t val, int mnr, int dir, int unit);
136 uint32_t mv_drbl_get_msg(int mnr, int dir, int unit);
138 int mv_msi_data(int irq, uint64_t *addr, uint32_t *data);
140 struct arm_devmap_entry;
142 int mv_pci_devmap(phandle_t, struct arm_devmap_entry *, vm_offset_t,
145 #endif /* _MVVAR_H_ */