2 * Copyright (c) 2003 Marcel Moolenaar
3 * Copyright (c) 2007-2009 Andrew Turner
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
21 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
22 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
23 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
24 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
25 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 #include <sys/cdefs.h>
29 __FBSDID("$FreeBSD$");
31 #include <sys/param.h>
32 #include <sys/systm.h>
38 #include <machine/bus.h>
39 #include <machine/intr.h>
41 #include <dev/uart/uart.h>
42 #include <dev/uart/uart_cpu.h>
43 #include <dev/uart/uart_bus.h>
44 #include <arm/s3c2xx0/s3c2440reg.h>
45 #include <arm/s3c2xx0/uart_dev_s3c2410.h>
46 #include <arm/s3c2xx0/s3c2xx0reg.h>
47 #include <arm/s3c2xx0/s3c2xx0var.h>
50 /* Finds the subirq from the parent */
51 #define get_sub_irq(parent, offset) \
52 ((parent == S3C24X0_INT_UART0) ? S3C24X0_SUBIRQ_MIN + offset : \
53 ((parent == S3C24X0_INT_UART1) ? S3C24X0_SUBIRQ_MIN + 3 + offset : \
54 S3C24X0_SUBIRQ_MIN + 6 + offset))
59 extern unsigned int s3c2410_pclk;
61 static int sscomspeed(long, long);
62 static int s3c24x0_uart_param(struct uart_bas *, int, int, int, int);
65 * Low-level UART interface.
67 static int s3c2410_probe(struct uart_bas *bas);
68 static void s3c2410_init(struct uart_bas *bas, int, int, int, int);
69 static void s3c2410_term(struct uart_bas *bas);
70 static void s3c2410_putc(struct uart_bas *bas, int);
71 static int s3c2410_rxready(struct uart_bas *bas);
72 static int s3c2410_getc(struct uart_bas *bas, struct mtx *mtx);
74 extern SLIST_HEAD(uart_devinfo_list, uart_devinfo) uart_sysdevs;
77 sscomspeed(long speed, long frequency)
81 if (speed <= 0 || frequency <= 0)
83 x = (frequency / 16) / speed;
88 s3c24x0_uart_param(struct uart_bas *bas, int baudrate, int databits,
89 int stopbits, int parity)
97 ulcon |= ULCON_LENGTH_5;
100 ulcon |= ULCON_LENGTH_6;
103 ulcon |= ULCON_LENGTH_7;
106 ulcon |= ULCON_LENGTH_8;
113 case UART_PARITY_NONE:
114 ulcon |= ULCON_PARITY_NONE;
116 case UART_PARITY_ODD:
117 ulcon |= ULCON_PARITY_ODD;
119 case UART_PARITY_EVEN:
120 ulcon |= ULCON_PARITY_EVEN;
122 case UART_PARITY_MARK:
123 case UART_PARITY_SPACE:
131 uart_setreg(bas, SSCOM_ULCON, ulcon);
133 brd = sscomspeed(baudrate, bas->rclk);
134 uart_setreg(bas, SSCOM_UBRDIV, brd);
139 struct uart_ops uart_s3c2410_ops = {
140 .probe = s3c2410_probe,
141 .init = s3c2410_init,
142 .term = s3c2410_term,
143 .putc = s3c2410_putc,
144 .rxready = s3c2410_rxready,
145 .getc = s3c2410_getc,
149 s3c2410_probe(struct uart_bas *bas)
155 s3c2410_init(struct uart_bas *bas, int baudrate, int databits, int stopbits,
159 bas->rclk = s3c2410_pclk;
160 KASSERT(bas->rclk != 0, ("s3c2410_init: Invalid rclk"));
162 uart_setreg(bas, SSCOM_UCON, 0);
163 uart_setreg(bas, SSCOM_UFCON,
164 UFCON_TXTRIGGER_8 | UFCON_RXTRIGGER_8 |
165 UFCON_TXFIFO_RESET | UFCON_RXFIFO_RESET |
167 s3c24x0_uart_param(bas, baudrate, databits, stopbits, parity);
170 uart_setreg(bas, SSCOM_UCON, UCON_TXMODE_INT | UCON_RXMODE_INT |
172 uart_setreg(bas, SSCOM_UMCON, UMCON_RTS);
176 s3c2410_term(struct uart_bas *bas)
182 s3c2410_putc(struct uart_bas *bas, int c)
184 while ((bus_space_read_4(bas->bst, bas->bsh, SSCOM_UFSTAT) &
185 UFSTAT_TXFULL) == UFSTAT_TXFULL)
188 uart_setreg(bas, SSCOM_UTXH, c);
192 s3c2410_rxready(struct uart_bas *bas)
194 return ((uart_getreg(bas, SSCOM_UTRSTAT) & UTRSTAT_RXREADY) ==
199 s3c2410_getc(struct uart_bas *bas, struct mtx *mtx)
201 while (!sscom_rxrdy(bas->bst, bas->bsh))
204 return sscom_getc(bas->bst, bas->bsh);
207 static int s3c2410_bus_probe(struct uart_softc *sc);
208 static int s3c2410_bus_attach(struct uart_softc *sc);
209 static int s3c2410_bus_flush(struct uart_softc *, int);
210 static int s3c2410_bus_getsig(struct uart_softc *);
211 static int s3c2410_bus_ioctl(struct uart_softc *, int, intptr_t);
212 static int s3c2410_bus_ipend(struct uart_softc *);
213 static int s3c2410_bus_param(struct uart_softc *, int, int, int, int);
214 static int s3c2410_bus_receive(struct uart_softc *);
215 static int s3c2410_bus_setsig(struct uart_softc *, int);
216 static int s3c2410_bus_transmit(struct uart_softc *);
218 static kobj_method_t s3c2410_methods[] = {
219 KOBJMETHOD(uart_probe, s3c2410_bus_probe),
220 KOBJMETHOD(uart_attach, s3c2410_bus_attach),
221 KOBJMETHOD(uart_flush, s3c2410_bus_flush),
222 KOBJMETHOD(uart_getsig, s3c2410_bus_getsig),
223 KOBJMETHOD(uart_ioctl, s3c2410_bus_ioctl),
224 KOBJMETHOD(uart_ipend, s3c2410_bus_ipend),
225 KOBJMETHOD(uart_param, s3c2410_bus_param),
226 KOBJMETHOD(uart_receive, s3c2410_bus_receive),
227 KOBJMETHOD(uart_setsig, s3c2410_bus_setsig),
228 KOBJMETHOD(uart_transmit, s3c2410_bus_transmit),
234 s3c2410_bus_probe(struct uart_softc *sc)
240 s3c2410_bus_attach(struct uart_softc *sc)
244 switch(s3c2xx0_softc->sc_cpu) {
246 sc->sc_txfifosz = 16;
247 sc->sc_rxfifosz = 16;
250 sc->sc_txfifosz = 64;
251 sc->sc_rxfifosz = 64;
260 irq = rman_get_start(sc->sc_ires);
262 arm_unmask_irq(get_sub_irq(irq, RX_OFF));
263 arm_unmask_irq(get_sub_irq(irq, TX_OFF));
264 arm_unmask_irq(get_sub_irq(irq, ERR_OFF));
270 s3c2410_bus_transmit(struct uart_softc *sc)
274 uart_lock(sc->sc_hwmtx);
276 for (int i = 0; i < sc->sc_txdatasz; i++) {
277 s3c2410_putc(&sc->sc_bas, sc->sc_txbuf[i]);
278 uart_barrier(&sc->sc_bas);
283 uart_unlock(sc->sc_hwmtx);
285 irq = rman_get_start(sc->sc_ires);
286 arm_unmask_irq(get_sub_irq(irq, TX_OFF));
292 s3c2410_bus_setsig(struct uart_softc *sc, int sig)
298 s3c2410_bus_receive(struct uart_softc *sc)
301 uart_rx_put(sc, uart_getreg(&sc->sc_bas, SSCOM_URXH));
306 s3c2410_bus_param(struct uart_softc *sc, int baudrate, int databits,
307 int stopbits, int parity)
311 if (sc->sc_bas.rclk == 0)
312 sc->sc_bas.rclk = s3c2410_pclk;
313 KASSERT(sc->sc_bas.rclk != 0, ("s3c2410_init: Invalid rclk"));
315 uart_lock(sc->sc_hwmtx);
316 error = s3c24x0_uart_param(&sc->sc_bas, baudrate, databits, stopbits,
318 uart_unlock(sc->sc_hwmtx);
324 s3c2410_bus_ipend(struct uart_softc *sc)
326 uint32_t ufstat, txmask, rxmask;
330 uart_lock(sc->sc_hwmtx);
331 ufstat = bus_space_read_4(sc->sc_bas.bst, sc->sc_bas.bsh, SSCOM_UFSTAT);
332 uart_unlock(sc->sc_hwmtx);
335 switch (s3c2xx0_softc->sc_cpu) {
337 txmask = UFSTAT_TXCOUNT;
338 rxmask = UFSTAT_RXCOUNT;
341 txmask = S3C2440_UFSTAT_TXCOUNT;
342 rxmask = S3C2440_UFSTAT_RXCOUNT;
345 if ((ufstat & txmask) == 0) {
346 if (sc->sc_txbusy != 0)
347 ipend |= SER_INT_TXIDLE;
348 irq = rman_get_start(sc->sc_ires);
349 arm_mask_irq(get_sub_irq(irq, TX_OFF));
351 if ((ufstat & rxmask) > 0) {
352 ipend |= SER_INT_RXREADY;
359 s3c2410_bus_flush(struct uart_softc *sc, int what)
365 s3c2410_bus_getsig(struct uart_softc *sc)
371 s3c2410_bus_ioctl(struct uart_softc *sc, int request, intptr_t data)
376 struct uart_class uart_s3c2410_class = {
380 .uc_ops = &uart_s3c2410_ops,