1 /* $NetBSD: sa11x0_io_asm.S,v 1.1 2001/07/08 23:37:53 rjs Exp $ */
4 * Copyright (c) 1997 Mark Brinicombe.
5 * Copyright (c) 1997 Causality Limited.
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 * 3. All advertising materials mentioning features or use of this software
17 * must display the following acknowledgement:
18 * This product includes software developed by Mark Brinicombe.
19 * 4. The name of the company nor the name of the author may be used to
20 * endorse or promote products derived from this software without specific
21 * prior written permission.
23 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
24 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
25 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
26 * IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
27 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
29 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
30 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
31 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
32 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
37 #include <machine/asm.h>
38 __FBSDID("$FreeBSD$");
41 * bus_space I/O functions for sa11x0
89 subs r2, r2, #0x00000001
90 strb r1, [r3], #0x0001
91 bgt sa11x0_bs_rm_1_loop
102 tsteq r3, #0x00000003
103 beq sa11x0_bs_rm_2_fast
107 subs r2, r2, #0x00000001
108 strh r1, [r3], #0x0002
109 bgt sa11x0_bs_rm_2_loop
114 stmfd sp!, {r4, r5, lr}
116 sa11x0_bs_rm_2_fastloop:
119 orr r1, r1, lr, lsl #16
123 orr r4, r4, lr, lsl #16
127 orr r5, r5, lr, lsl #16
131 orr ip, ip, lr, lsl #16
133 stmia r3!, {r1, r4, r5, ip}
135 bgt sa11x0_bs_rm_2_fastloop
137 ldmfd sp!, {r4, r5, pc}
140 ENTRY(sa11x0_bs_rm_4)
148 subs r2, r2, #0x00000001
149 str r1, [r3], #0x0004
150 bgt sa11x0_bs_rm_4_loop
158 ENTRY(sa11x0_bs_wm_1)
165 ldrb r1, [r3], #0x0001
166 subs r2, r2, #0x00000001
172 ENTRY(sa11x0_bs_wm_2)
179 ldrh r1, [r3], #0x0002
180 subs r2, r2, #0x00000001
182 bgt sa11x0_bs_wm_2_loop
186 ENTRY(sa11x0_bs_wm_4)
193 ldr r1, [r3], #0x0004
194 subs r2, r2, #0x00000001
196 bgt sa11x0_bs_wm_4_loop
204 ENTRY(sa11x0_bs_rr_2)
211 ldrh r1, [r0], #0x0002
212 strh r1, [r3], #0x0002
213 subs r2, r2, #0x00000001
214 bgt sa11x0_bs_rr_2_loop
222 ENTRY(sa11x0_bs_wr_2)
229 ldrh r1, [r3], #0x0002
230 strh r1, [r0], #0x0002
231 subs r2, r2, #0x00000001
232 bgt sa11x0_bs_wr_2_loop
240 ENTRY(sa11x0_bs_sr_2)
247 strh r3, [r0], #0x0002
248 subs r2, r2, #0x00000001
249 bgt sa11x0_bs_sr_2_loop
266 blt sa11x0_bs_c_2_backwards
269 ldrh r3, [r0], #0x0002
270 strh r3, [r1], #0x0002
271 subs r2, r2, #0x00000001
272 bgt sa11x0_bs_cf_2_loop
276 sa11x0_bs_c_2_backwards:
277 add r0, r0, r2, lsl #1
278 add r1, r1, r2, lsl #1
286 bne sa11x0_bs_cb_2_loop
290 /* end of sa11x0_io_asm.S */