1 /* $NetBSD: hpc_machdep.c,v 1.70 2003/09/16 08:18:22 agc Exp $ */
4 * Copyright (c) 1994-1998 Mark Brinicombe.
5 * Copyright (c) 1994 Brini.
8 * This code is derived from software written for Brini by Mark Brinicombe
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 * 3. All advertising materials mentioning features or use of this software
19 * must display the following acknowledgement:
20 * This product includes software developed by Brini.
21 * 4. The name of the company nor the name of the author may be used to
22 * endorse or promote products derived from this software without specific
23 * prior written permission.
25 * THIS SOFTWARE IS PROVIDED BY BRINI ``AS IS'' AND ANY EXPRESS OR IMPLIED
26 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
27 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
28 * IN NO EVENT SHALL BRINI OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
29 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
30 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
31 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
32 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
33 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
34 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
37 * RiscBSD kernel project
41 * Machine dependant functions for kernel setup
43 * This file needs a lot of work.
48 #include <sys/cdefs.h>
49 __FBSDID("$FreeBSD$");
51 #define _ARM32_BUS_DMA_PRIVATE
52 #include <sys/param.h>
53 #include <sys/systm.h>
54 #include <sys/sysproto.h>
55 #include <sys/signalvar.h>
56 #include <sys/imgact.h>
57 #include <sys/kernel.h>
59 #include <sys/linker.h>
61 #include <sys/malloc.h>
62 #include <sys/mutex.h>
65 #include <sys/ptrace.h>
72 #include <sys/msgbuf.h>
73 #include <machine/reg.h>
74 #include <machine/cpu.h>
78 #include <vm/vm_object.h>
79 #include <vm/vm_page.h>
80 #include <vm/vm_pager.h>
81 #include <vm/vm_map.h>
82 #include <vm/vnode_pager.h>
83 #include <machine/pmap.h>
84 #include <machine/vmparam.h>
85 #include <machine/pcb.h>
86 #include <machine/undefined.h>
87 #include <machine/machdep.h>
88 #include <machine/metadata.h>
89 #include <machine/armreg.h>
90 #include <machine/bus.h>
91 #include <sys/reboot.h>
93 #include <arm/xscale/i80321/i80321reg.h>
94 #include <arm/xscale/i80321/i80321var.h>
95 #include <arm/xscale/i80321/iq80321reg.h>
96 #include <arm/xscale/i80321/obiovar.h>
98 #define KERNEL_PT_SYS 0 /* Page table for mapping proc0 zero page */
99 #define KERNEL_PT_IOPXS 1
100 #define KERNEL_PT_BEFOREKERN 2
101 #define KERNEL_PT_AFKERNEL 3 /* L2 table for mapping after kernel */
102 #define KERNEL_PT_AFKERNEL_NUM 9
104 /* this should be evenly divisable by PAGE_SIZE / L2_TABLE_SIZE_REAL (or 4) */
105 #define NUM_KERNEL_PTS (KERNEL_PT_AFKERNEL + KERNEL_PT_AFKERNEL_NUM)
107 /* Define various stack sizes in pages */
108 #define IRQ_STACK_SIZE 1
109 #define ABT_STACK_SIZE 1
110 #define UND_STACK_SIZE 1
112 extern u_int data_abort_handler_address;
113 extern u_int prefetch_abort_handler_address;
114 extern u_int undefined_handler_address;
116 struct pv_addr kernel_pt_table[NUM_KERNEL_PTS];
123 struct pcpu *pcpup = &__pcpu;
125 /* Physical and virtual addresses for some global pages */
127 vm_paddr_t phys_avail[10];
128 vm_paddr_t dump_avail[4];
129 vm_offset_t physical_pages;
131 struct pv_addr systempage;
132 struct pv_addr msgbufpv;
133 struct pv_addr irqstack;
134 struct pv_addr undstack;
135 struct pv_addr abtstack;
136 struct pv_addr kernelstack;
137 struct pv_addr minidataclean;
139 static struct trapframe proc0_tf;
142 /* #define IQ80321_OBIO_BASE 0xfe800000UL */
143 /* #define IQ80321_OBIO_SIZE 0x00100000UL */
145 /* Static device mappings. */
146 static const struct pmap_devmap ep80219_devmap[] = {
148 * Map the on-board devices VA == PA so that we can access them
149 * with the MMU on or off.
155 VM_PROT_READ|VM_PROT_WRITE,
160 VERDE_OUT_XLATE_IO_WIN0_BASE,
161 VERDE_OUT_XLATE_IO_WIN_SIZE,
162 VM_PROT_READ|VM_PROT_WRITE,
169 VM_PROT_READ|VM_PROT_WRITE,
181 extern vm_offset_t xscale_cache_clean_addr;
184 initarm(void *arg, void *arg2)
186 struct pv_addr kernel_l1pt;
187 struct pv_addr dpcpu;
190 vm_offset_t freemempos;
191 vm_offset_t freemem_pt;
192 vm_offset_t afterkern;
193 vm_offset_t freemem_after;
194 vm_offset_t lastaddr;
195 uint32_t memsize, memstart;
198 lastaddr = fake_preload_metadata();
199 pcpu_init(pcpup, 0, sizeof(struct pcpu));
200 PCPU_SET(curthread, &thread0);
202 freemempos = 0xa0200000;
203 /* Define a macro to simplify memory allocation */
204 #define valloc_pages(var, np) \
205 alloc_pages((var).pv_pa, (np)); \
206 (var).pv_va = (var).pv_pa + 0x20000000;
208 #define alloc_pages(var, np) \
209 freemempos -= (np * PAGE_SIZE); \
210 (var) = freemempos; \
211 memset((char *)(var), 0, ((np) * PAGE_SIZE));
213 /* Do basic tuning, hz etc */
216 while (((freemempos - L1_TABLE_SIZE) & (L1_TABLE_SIZE - 1)) != 0)
217 freemempos -= PAGE_SIZE;
218 valloc_pages(kernel_l1pt, L1_TABLE_SIZE / PAGE_SIZE);
219 for (loop = 0; loop < NUM_KERNEL_PTS; ++loop) {
220 if (!(loop % (PAGE_SIZE / L2_TABLE_SIZE_REAL))) {
221 valloc_pages(kernel_pt_table[loop],
222 L2_TABLE_SIZE / PAGE_SIZE);
224 kernel_pt_table[loop].pv_pa = freemempos +
225 (loop % (PAGE_SIZE / L2_TABLE_SIZE_REAL)) *
227 kernel_pt_table[loop].pv_va =
228 kernel_pt_table[loop].pv_pa + 0x20000000;
232 freemem_pt = freemempos;
233 freemempos = 0xa0100000;
235 * Allocate a page for the system page mapped to V0x00000000
236 * This page will just contain the system vectors and can be
237 * shared by all processes.
239 valloc_pages(systempage, 1);
241 /* Allocate dynamic per-cpu area. */
242 valloc_pages(dpcpu, DPCPU_SIZE / PAGE_SIZE);
243 dpcpu_init((void *)dpcpu.pv_va, 0);
245 /* Allocate stacks for all modes */
246 valloc_pages(irqstack, IRQ_STACK_SIZE);
247 valloc_pages(abtstack, ABT_STACK_SIZE);
248 valloc_pages(undstack, UND_STACK_SIZE);
249 valloc_pages(kernelstack, KSTACK_PAGES);
250 alloc_pages(minidataclean.pv_pa, 1);
251 valloc_pages(msgbufpv, round_page(msgbufsize) / PAGE_SIZE);
252 #ifdef ARM_USE_SMALL_ALLOC
253 freemempos -= PAGE_SIZE;
254 freemem_pt = trunc_page(freemem_pt);
255 freemem_after = freemempos - ((freemem_pt - 0xa0100000) /
256 PAGE_SIZE) * sizeof(struct arm_small_page);
257 arm_add_smallalloc_pages((void *)(freemem_after + 0x20000000)
258 , (void *)0xc0100000, freemem_pt - 0xa0100000, 1);
259 freemem_after -= ((freemem_after - 0xa0001000) / PAGE_SIZE) *
260 sizeof(struct arm_small_page);
261 arm_add_smallalloc_pages((void *)(freemem_after + 0x20000000),
263 trunc_page(freemem_after) - 0xa0001000, 0);
265 freemempos = trunc_page(freemem_after);
266 freemempos -= PAGE_SIZE;
269 * Allocate memory for the l1 and l2 page tables. The scheme to avoid
270 * wasting memory by allocating the l1pt on the first 16k memory was
271 * taken from NetBSD rpc_machdep.c. NKPT should be greater than 12 for
272 * this to work (which is supposed to be the case).
276 * Now we start construction of the L1 page table
277 * We start by mapping the L2 page tables into the L1.
278 * This means that we can replace L1 mappings later on if necessary
280 l1pagetable = kernel_l1pt.pv_va;
282 /* Map the L2 pages tables in the L1 page table */
283 pmap_link_l2pt(l1pagetable, ARM_VECTORS_HIGH & ~(0x00100000 - 1),
284 &kernel_pt_table[KERNEL_PT_SYS]);
285 pmap_link_l2pt(l1pagetable, IQ80321_IOPXS_VBASE,
286 &kernel_pt_table[KERNEL_PT_IOPXS]);
287 pmap_link_l2pt(l1pagetable, KERNBASE,
288 &kernel_pt_table[KERNEL_PT_BEFOREKERN]);
289 pmap_map_chunk(l1pagetable, KERNBASE, IQ80321_SDRAM_START, 0x100000,
290 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
291 pmap_map_chunk(l1pagetable, KERNBASE + 0x100000, IQ80321_SDRAM_START + 0x100000,
292 0x100000, VM_PROT_READ|VM_PROT_WRITE, PTE_PAGETABLE);
293 pmap_map_chunk(l1pagetable, KERNBASE + 0x200000, IQ80321_SDRAM_START + 0x200000,
294 (((uint32_t)(lastaddr) - KERNBASE - 0x200000) + L1_S_SIZE) & ~(L1_S_SIZE - 1),
295 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
296 freemem_after = ((int)lastaddr + PAGE_SIZE) & ~(PAGE_SIZE - 1);
297 afterkern = round_page(((vm_offset_t)lastaddr + L1_S_SIZE) & ~(L1_S_SIZE
299 for (i = 0; i < KERNEL_PT_AFKERNEL_NUM; i++) {
300 pmap_link_l2pt(l1pagetable, afterkern + i * 0x00100000,
301 &kernel_pt_table[KERNEL_PT_AFKERNEL + i]);
303 pmap_map_entry(l1pagetable, afterkern, minidataclean.pv_pa,
304 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
307 #ifdef ARM_USE_SMALL_ALLOC
308 if ((freemem_after + 2 * PAGE_SIZE) <= afterkern) {
309 arm_add_smallalloc_pages((void *)(freemem_after),
310 (void*)(freemem_after + PAGE_SIZE),
311 afterkern - (freemem_after + PAGE_SIZE), 0);
316 /* Map the Mini-Data cache clean area. */
317 xscale_setup_minidata(l1pagetable, afterkern,
318 minidataclean.pv_pa);
320 /* Map the vector page. */
321 pmap_map_entry(l1pagetable, ARM_VECTORS_HIGH, systempage.pv_pa,
322 VM_PROT_READ|VM_PROT_WRITE, PTE_CACHE);
323 pmap_devmap_bootstrap(l1pagetable, ep80219_devmap);
325 * Give the XScale global cache clean code an appropriately
326 * sized chunk of unmapped VA space starting at 0xff000000
327 * (our device mappings end before this address).
329 xscale_cache_clean_addr = 0xff000000U;
331 cpu_domains((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2)) | DOMAIN_CLIENT);
332 setttb(kernel_l1pt.pv_pa);
334 cpu_domains(DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2));
336 * Pages were allocated during the secondary bootstrap for the
337 * stacks for different CPU modes.
338 * We must now set the r13 registers in the different CPU modes to
339 * point to these stacks.
340 * Since the ARM stacks use STMFD etc. we must set r13 to the top end
341 * of the stack memory.
345 set_stackptr(PSR_IRQ32_MODE,
346 irqstack.pv_va + IRQ_STACK_SIZE * PAGE_SIZE);
347 set_stackptr(PSR_ABT32_MODE,
348 abtstack.pv_va + ABT_STACK_SIZE * PAGE_SIZE);
349 set_stackptr(PSR_UND32_MODE,
350 undstack.pv_va + UND_STACK_SIZE * PAGE_SIZE);
355 * We must now clean the cache again....
356 * Cleaning may be done by reading new data to displace any
357 * dirty data in the cache. This will have happened in setttb()
358 * but since we are boot strapping the addresses used for the read
359 * may have just been remapped and thus the cache could be out
360 * of sync. A re-clean after the switch will cure this.
361 * After booting there are no gross relocations of the kernel thus
362 * this problem will not occur after initarm().
364 cpu_idcache_wbinv_all();
366 * Fetch the SDRAM start/size from the i80321 SDRAM configration
369 i80321_calibrate_delay();
370 i80321_sdram_bounds(&obio_bs_tag, IQ80321_80321_VBASE + VERDE_MCU_BASE,
371 &memstart, &memsize);
372 physmem = memsize / PAGE_SIZE;
375 /* Set stack for exception handlers */
377 data_abort_handler_address = (u_int)data_abort_handler;
378 prefetch_abort_handler_address = (u_int)prefetch_abort_handler;
379 undefined_handler_address = (u_int)undefinedinstruction_bounce;
382 proc_linkup0(&proc0, &thread0);
383 thread0.td_kstack = kernelstack.pv_va;
384 thread0.td_pcb = (struct pcb *)
385 (thread0.td_kstack + KSTACK_PAGES * PAGE_SIZE) - 1;
386 thread0.td_pcb->pcb_flags = 0;
387 thread0.td_frame = &proc0_tf;
388 pcpup->pc_curpcb = thread0.td_pcb;
390 /* Enable MMU, I-cache, D-cache, write buffer. */
392 arm_vector_init(ARM_VECTORS_HIGH, ARM_VEC_ALL);
393 pmap_curmaxkvaddr = afterkern + PAGE_SIZE;
394 dump_avail[0] = 0xa0000000;
395 dump_avail[1] = 0xa0000000 + memsize;
398 pmap_bootstrap(pmap_curmaxkvaddr,
399 0xd0000000, &kernel_l1pt);
400 msgbufp = (void*)msgbufpv.pv_va;
401 msgbufinit(msgbufp, msgbufsize);
405 #ifdef ARM_USE_SMALL_ALLOC
406 phys_avail[i++] = 0xa0000000;
407 phys_avail[i++] = 0xa0001000; /*
408 *XXX: Gross hack to get our
409 * pages in the vm_page_array
412 phys_avail[i++] = round_page(virtual_avail - KERNBASE + IQ80321_SDRAM_START);
413 phys_avail[i++] = trunc_page(0xa0000000 + memsize - 1);
417 init_param2(physmem);
419 return ((void *)(kernelstack.pv_va + USPACE_SVC_STACK_TOP -
420 sizeof(struct pcb)));
424 machdep_pci_route_interrupt(device_t pcib, device_t dev, int pin)
430 struct i80321_pci_softc *sc = device_get_softc(pcib);
431 bus = pci_get_bus(dev);
432 device = pci_get_slot(dev);
433 func = pci_get_function(dev);
434 busno = bus_space_read_4(sc->sc_st, sc->sc_atu_sh, ATU_PCIXSR);
435 busno = PCIXSR_BUSNO(busno);
442 case 1: /* Ethernet i82555 10/100 */
443 printf("Device %d routed to irq %d\n", device, ICU_INT_XINT(0));
444 return (ICU_INT_XINT(0));
446 printf("Device %d routed to irq %d\n", device, ICU_INT_XINT(1));
447 return (ICU_INT_XINT(1));
450 * The S-ATA chips are behind the bridge, and all of
451 * the S-ATA interrupts are wired together.
453 printf("Device %d routed to irq %d\n", device, ICU_INT_XINT(2));
454 return (ICU_INT_XINT(2));
455 case 4: /* MINI-PIC_INT */
456 printf("Device %d routed to irq %d\n", device, ICU_INT_XINT(3));
457 return( ICU_INT_XINT(3));
460 printf("No mapping for %d/%d/%d/%c\n", bus, device, func, pin);