1 /* $NetBSD: i80321_timer.c,v 1.7 2003/07/27 04:52:28 thorpej Exp $ */
4 * Copyright (c) 2001, 2002 Wasabi Systems, Inc.
7 * Written by Jason R. Thorpe for Wasabi Systems, Inc.
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 * 3. All advertising materials mentioning features or use of this software
18 * must display the following acknowledgement:
19 * This product includes software developed for the NetBSD Project by
20 * Wasabi Systems, Inc.
21 * 4. The name of Wasabi Systems, Inc. may not be used to endorse
22 * or promote products derived from this software without specific prior
25 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
27 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
28 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
29 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
35 * POSSIBILITY OF SUCH DAMAGE.
39 * Timer/clock support for the Intel i80321 I/O processor.
42 #include <sys/cdefs.h>
43 __FBSDID("$FreeBSD$");
45 #include <sys/param.h>
46 #include <sys/systm.h>
47 #include <sys/kernel.h>
48 #include <sys/module.h>
51 #include <sys/resource.h>
53 #include <sys/timetc.h>
55 #include <machine/bus.h>
56 #include <machine/cpu.h>
57 #include <machine/cpufunc.h>
58 #include <machine/frame.h>
59 #include <machine/resource.h>
60 #include <machine/intr.h>
61 #include <arm/xscale/i80321/i80321reg.h>
62 #include <arm/xscale/i80321/i80321var.h>
64 #ifdef CPU_XSCALE_81342
65 #define ICU_INT_TIMER0 (8) /* XXX: Can't include i81342reg.h because
66 definitions overrides the ones from i80321reg.h
69 #include "opt_timer.h"
71 void (*i80321_hardclock_hook)(void) = NULL;
72 struct i80321_timer_softc {
77 static unsigned i80321_timer_get_timecount(struct timecounter *tc);
80 static uint32_t counts_per_hz;
82 #if defined(XSCALE_DISABLE_CCNT) || defined(CPU_XSCALE_81342)
83 static uint32_t offset;
84 static uint32_t last = -1;
87 static int ticked = 0;
89 #ifndef COUNTS_PER_SEC
90 #define COUNTS_PER_SEC 200000000 /* 200MHz */
93 #define COUNTS_PER_USEC (COUNTS_PER_SEC / 1000000)
95 static struct timecounter i80321_timer_timecounter = {
96 i80321_timer_get_timecount, /* get_timecount */
97 NULL, /* no poll_pps */
98 ~0u, /* counter_mask */
99 #if defined(XSCALE_DISABLE_CCNT) || defined(CPU_XSCALE_81342)
102 COUNTS_PER_SEC * 3, /* frequency */
104 "i80321 timer", /* name */
109 i80321_timer_probe(device_t dev)
112 device_set_desc(dev, "i80321 timer");
117 i80321_timer_attach(device_t dev)
119 timer_softc.dev = dev;
124 static device_method_t i80321_timer_methods[] = {
125 DEVMETHOD(device_probe, i80321_timer_probe),
126 DEVMETHOD(device_attach, i80321_timer_attach),
130 static driver_t i80321_timer_driver = {
132 i80321_timer_methods,
133 sizeof(struct i80321_timer_softc),
135 static devclass_t i80321_timer_devclass;
137 DRIVER_MODULE(itimer, iq, i80321_timer_driver, i80321_timer_devclass, 0, 0);
139 int clockhandler(void *);
142 static __inline uint32_t
147 #ifdef CPU_XSCALE_81342
148 __asm __volatile("mrc p6, 0, %0, c1, c9, 0"
150 __asm __volatile("mrc p6, 0, %0, c1, c1, 0"
157 tmr1_write(uint32_t val)
161 #ifdef CPU_XSCALE_81342
162 __asm __volatile("mcr p6, 0, %0, c1, c9, 0"
164 __asm __volatile("mcr p6, 0, %0, c1, c1, 0"
170 static __inline uint32_t
175 #ifdef CPU_XSCALE_81342
176 __asm __volatile("mrc p6, 0, %0, c3, c9, 0"
178 __asm __volatile("mrc p6, 0, %0, c3, c1, 0"
184 tcr1_write(uint32_t val)
187 #ifdef CPU_XSCALE_81342
188 __asm __volatile("mcr p6, 0, %0, c3, c9, 0"
190 __asm __volatile("mcr p6, 0, %0, c3, c1, 0"
197 trr1_write(uint32_t val)
200 #ifdef CPU_XSCALE_81342
201 __asm __volatile("mcr p6, 0, %0, c5, c9, 0"
203 __asm __volatile("mcr p6, 0, %0, c5, c1, 0"
209 static __inline uint32_t
214 #ifdef CPU_XSCALE_81342
215 __asm __volatile("mrc p6, 0, %0, c0, c9, 0"
217 __asm __volatile("mrc p6, 0, %0, c0, c1, 0"
224 tmr0_write(uint32_t val)
227 #ifdef CPU_XSCALE_81342
228 __asm __volatile("mcr p6, 0, %0, c0, c9, 0"
230 __asm __volatile("mcr p6, 0, %0, c0, c1, 0"
236 static __inline uint32_t
241 #ifdef CPU_XSCALE_81342
242 __asm __volatile("mrc p6, 0, %0, c2, c9, 0"
244 __asm __volatile("mrc p6, 0, %0, c2, c1, 0"
250 tcr0_write(uint32_t val)
253 #ifdef CPU_XSCALE_81342
254 __asm __volatile("mcr p6, 0, %0, c2, c9, 0"
256 __asm __volatile("mcr p6, 0, %0, c2, c1, 0"
263 trr0_write(uint32_t val)
266 #ifdef CPU_XSCALE_81342
267 __asm __volatile("mcr p6, 0, %0, c4, c9, 0"
269 __asm __volatile("mcr p6, 0, %0, c4, c1, 0"
276 tisr_write(uint32_t val)
279 #ifdef CPU_XSCALE_81342
280 __asm __volatile("mcr p6, 0, %0, c6, c9, 0"
282 __asm __volatile("mcr p6, 0, %0, c6, c1, 0"
288 static __inline uint32_t
293 #ifdef CPU_XSCALE_81342
294 __asm __volatile("mrc p6, 0, %0, c6, c9, 0" : "=r" (ret));
296 __asm __volatile("mrc p6, 0, %0, c6, c1, 0" : "=r" (ret));
302 i80321_timer_get_timecount(struct timecounter *tc)
304 #if defined(XSCALE_DISABLE_CCNT) || defined(CPU_XSCALE_81342)
305 uint32_t cur = tcr0_read();
307 if (cur > last && last != -1) {
308 offset += counts_per_hz;
313 offset += ticked * counts_per_hz;
316 return (counts_per_hz - cur + offset);
320 __asm __volatile("mrc p14, 0, %0, c1, c0, 0\n"
327 * i80321_calibrate_delay:
329 * Calibrate the delay loop.
332 i80321_calibrate_delay(void)
336 * Just use hz=100 for now -- we'll adjust it, if necessary,
337 * in cpu_initclocks().
339 counts_per_hz = COUNTS_PER_SEC / 100;
341 tmr0_write(0); /* stop timer */
342 tisr_write(TISR_TMR0); /* clear interrupt */
343 trr0_write(counts_per_hz); /* reload value */
344 tcr0_write(counts_per_hz); /* current value */
346 tmr0_write(TMRx_ENABLE|TMRx_RELOAD|TMRx_CSEL_CORE);
352 * Initialize the clock and get them going.
358 struct resource *irq;
361 device_t dev = timer_softc.dev;
363 if (hz < 50 || COUNTS_PER_SEC % hz) {
364 printf("Cannot get %d Hz clock; using 100 Hz\n", hz);
367 tick = 1000000 / hz; /* number of microseconds between interrupts */
370 * We only have one timer available; stathz and profhz are
371 * always left as 0 (the upper-layer clock code deals with
375 printf("Cannot get %d Hz statclock\n", stathz);
379 printf("Cannot get %d Hz profclock\n", profhz);
382 /* Report the clock frequency. */
384 oldirqstate = disable_interrupts(I32_bit);
386 irq = bus_alloc_resource(dev, SYS_RES_IRQ, &rid,
387 #ifdef CPU_XSCALE_81342
388 ICU_INT_TIMER0, ICU_INT_TIMER0,
390 ICU_INT_TMR0, ICU_INT_TMR0,
394 panic("Unable to setup the clock irq handler.\n");
396 bus_setup_intr(dev, irq, INTR_TYPE_CLK, clockhandler, NULL,
398 tmr0_write(0); /* stop timer */
399 tisr_write(TISR_TMR0); /* clear interrupt */
401 counts_per_hz = COUNTS_PER_SEC / hz;
403 trr0_write(counts_per_hz); /* reload value */
404 tcr0_write(counts_per_hz); /* current value */
405 tmr0_write(TMRx_ENABLE|TMRx_RELOAD|TMRx_CSEL_CORE);
407 tc_init(&i80321_timer_timecounter);
408 restore_interrupts(oldirqstate);
410 #if !defined(XSCALE_DISABLE_CCNT) && !defined(CPU_XSCALE_81342)
411 /* Enable the clock count register. */
412 __asm __volatile("mrc p14, 0, %0, c0, c0, 0\n" : "=r" (rid));
415 __asm __volatile("mcr p14, 0, %0, c0, c0, 0\n"
424 * Delay for at least N microseconds.
429 uint32_t cur, last, delta, usecs;
432 * This works by polling the timer and counting the
433 * number of microseconds that go by.
441 /* Check to see if the timer has wrapped around. */
443 delta += (last + (counts_per_hz - cur));
445 delta += (last - cur);
449 if (delta >= COUNTS_PER_USEC) {
450 usecs += delta / COUNTS_PER_USEC;
451 delta %= COUNTS_PER_USEC;
459 * Handle the hardclock interrupt.
462 clockhandler(void *arg)
464 struct trapframe *frame = arg;
467 tisr_write(TISR_TMR0);
468 hardclock(TRAPF_USERMODE(frame), TRAPF_PC(frame));
470 if (i80321_hardclock_hook != NULL)
471 (*i80321_hardclock_hook)();
472 return (FILTER_HANDLED);
476 cpu_startprofclock(void)
481 cpu_stopprofclock(void)