sys/boot/fdt/dts/arm/exynos5250.dtsi

   1 /*-
   2  * Copyright (c) 2013 Ruslan Bukin <br@bsdpad.com>
   3  * All rights reserved.
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification, are permitted provided that the following conditions
   7  * are met:
   8  * 1. Redistributions of source code must retain the above copyright
   9  *    notice, this list of conditions and the following disclaimer.
  10  * 2. Redistributions in binary form must reproduce the above copyright
  11  *    notice, this list of conditions and the following disclaimer in the
  12  *    documentation and/or other materials provided with the distribution.
  13  *
  14  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
  15  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  16  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  17  * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
  18  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  19  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  20  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  21  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  22  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  23  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  24  * SUCH DAMAGE.
  25  *
  26  * $FreeBSD$
  27  */
  28
  29 / {
  30         compatible = "samsung,exynos5250";
  31         #address-cells = <1>;
  32         #size-cells = <1>;
  33         interrupt-parent = <&GIC>;
  34
  35         aliases {
  36                 soc = &SOC;
  37                 serial0 = &serial0;
  38                 serial1 = &serial1;
  39                 clk0 = &clk0;
  40                 dp0 = &dp0;
  41                 fimd0 = &fimd0;
  42         };
  43
  44         SOC: Exynos5@0 {
  45                 #address-cells = <1>;
  46                 #size-cells = <1>;
  47                 compatible = "simple-bus";
  48                 ranges;
  49                 bus-frequency = <0>;
  50
  51                 GIC: interrupt-controller@10481000 {
  52                         compatible = "arm,gic";
  53                         reg =   < 0x10481000 0x1000 >,  /* Distributor Registers */
  54                                 < 0x10482000 0x2000 >;  /* CPU Interface Registers */
  55                         interrupt-controller;
  56                         #address-cells = <0>;
  57                         #interrupt-cells = <1>;
  58                 };
  59
  60                 combiner: interrupt-controller@10440000 {
  61                         compatible = "exynos,combiner";
  62                         reg = <0x10440000 0x1000>;
  63                         interrupts = < 32 33 34 35 36 37 38 39
  64                                        40 41 42 43 44 45 46 47
  65                                        48 49 50 51 52 53 54 55
  66                                        56 57 58 59 60 61 62 63 >;
  67                         interrupt-parent = <&GIC>;
  68                 };
  69
  70                 clk0: clk@10010000 {
  71                         compatible = "exynos,clk";
  72                         reg = < 0x10020000 0x20000 >;
  73                 };
  74
  75                 mct {
  76                         compatible = "exynos,mct";
  77                         reg = < 0x101C0000 0x1000 >;
  78                         clock-frequency = <24000000>;
  79                 };
  80
  81                 generic_timer {
  82                         compatible = "arm,armv7-timer";
  83                         clock-frequency = <24000000>;
  84                 };
  85
  86                 pwm {
  87                         compatible = "samsung,s3c24x0-timer";
  88                         reg = <0x12DD0000 0x1000>;
  89                         interrupts = < 71 >;
  90                         interrupt-parent = <&GIC>;
  91                         clock-frequency = <24000000>;
  92                 };
  93
  94                 pad0: pad@11400000 {
  95                         compatible = "exynos,pad";
  96                         status = "disabled";
  97                         reg = <0x11400000 0x1000>, /* gpio left */
  98                               <0x13400000 0x1000>, /* gpio right */
  99                               <0x10D10000 0x1000>, /* gpio c2c */
 100                               <0x03860000 0x1000>;
 101                         interrupts = < 78 77 82 79 >;
 102                         interrupt-parent = <&GIC>;
 103                 };
 104
 105                 usb@12110000 {
 106                         compatible = "exynos,usb-ehci", "usb-ehci";
 107                         reg = <0x12110000 0x1000>, /* EHCI */
 108                               <0x12130000 0x1000>, /* EHCI host ctrl */
 109                               <0x10040000 0x1000>, /* Power */
 110                               <0x10050230 0x10>; /* Sysreg */
 111                         interrupts = < 103 >;
 112                         interrupt-parent = <&GIC>;
 113                 };
 114
 115                 usb@12120000 {
 116                         compatible = "exynos,usb-ohci", "usb-ohci";
 117                         reg = <0x12120000 0x10000>;
 118                         interrupts = < 103 >;
 119                         interrupt-parent = <&GIC>;
 120                 };
 121
 122                 sdhci@12200000 {
 123                         compatible = "sdhci_generic";
 124                         reg = <0x12200000 0x1000>;
 125                         interrupts = <107>;
 126                         interrupt-parent = <&GIC>;
 127                         clock-frequency = <24000000>; /* TODO: verify freq */
 128                 };
 129
 130                 sdhci@12210000 {
 131                         compatible = "sdhci_generic";
 132                         reg = <0x12210000 0x1000>;
 133                         interrupts = <108>;
 134                         interrupt-parent = <&GIC>;
 135                         clock-frequency = <24000000>;
 136                 };
 137
 138                 sdhci@12220000 {
 139                         compatible = "sdhci_generic";
 140                         reg = <0x12220000 0x1000>;
 141                         interrupts = <109>;
 142                         interrupt-parent = <&GIC>;
 143                         clock-frequency = <24000000>;
 144                 };
 145
 146                 sdhci@12230000 {
 147                         compatible = "sdhci_generic";
 148                         reg = <0x12230000 0x1000>;
 149                         interrupts = <110>;
 150                         interrupt-parent = <&GIC>;
 151                         clock-frequency = <24000000>;
 152                 };
 153
 154                 serial0: serial@12C00000 {
 155                         compatible = "exynos";
 156                         reg = <0x12C00000 0x100>;
 157                         interrupts = < 83 >;
 158                         interrupt-parent = <&GIC>;
 159                         clock-frequency = < 100000000 >;
 160                         current-speed = <115200>;
 161                 };
 162
 163                 serial1: serial@12C10000 {
 164                         compatible = "exynos";
 165                         reg = <0x12C10000 0x100>;
 166                         interrupts = < 84 >;
 167                         interrupt-parent = <&GIC>;
 168                         clock-frequency = < 100000000 >;
 169                         current-speed = <115200>;
 170                 };
 171
 172                 serial2: serial@12C20000 {
 173                         compatible = "exynos";
 174                         reg = <0x12C20000 0x100>;
 175                         interrupts = < 85 >;
 176                         interrupt-parent = <&GIC>;
 177                         clock-frequency = < 100000000 >;
 178                         current-speed = <115200>;
 179                 };
 180
 181                 serial3: serial@12C30000 {
 182                         compatible = "exynos";
 183                         reg = <0x12C30000 0x100>;
 184                         interrupts = < 86 >;
 185                         interrupt-parent = <&GIC>;
 186                         clock-frequency = < 100000000 >;
 187                         current-speed = <115200>;
 188                 };
 189
 190                 i2c0: i2c@12C60000 {
 191                         compatible = "exynos,i2c";
 192                         status = "disabled";
 193                         reg = <0x12C60000 0x10000>;
 194                         interrupts = < 88 >;
 195                         interrupt-parent = <&GIC>;
 196                 };
 197
 198                 i2c1: i2c@12C70000 {
 199                         compatible = "exynos,i2c";
 200                         status = "disabled";
 201                         reg = <0x12C70000 0x10000>;
 202                         interrupts = < 89 >;
 203                         interrupt-parent = <&GIC>;
 204                 };
 205
 206                 i2c2: i2c@12C80000 {
 207                         compatible = "exynos,i2c";
 208                         status = "disabled";
 209                         reg = <0x12C80000 0x10000>;
 210                         interrupts = < 90 >;
 211                         interrupt-parent = <&GIC>;
 212                 };
 213
 214                 i2c3: i2c@12C90000 {
 215                         compatible = "exynos,i2c";
 216                         status = "disabled";
 217                         reg = <0x12C90000 0x10000>;
 218                         interrupts = < 91 >;
 219                         interrupt-parent = <&GIC>;
 220                 };
 221
 222                 i2c4: i2c@12CA0000 {
 223                         compatible = "exynos,i2c";
 224                         status = "disabled";
 225                         reg = <0x12CA0000 0x10000>;
 226                         interrupts = < 92 >;
 227                         interrupt-parent = <&GIC>;
 228                 };
 229
 230                 i2c5: i2c@12CB0000 {
 231                         compatible = "exynos,i2c";
 232                         status = "disabled";
 233                         reg = <0x12CB0000 0x10000>;
 234                         interrupts = < 93 >;
 235                         interrupt-parent = <&GIC>;
 236                 };
 237
 238                 i2c6: i2c@12CC0000 {
 239                         compatible = "exynos,i2c";
 240                         status = "disabled";
 241                         reg = <0x12CC0000 0x10000>;
 242                         interrupts = < 94 >;
 243                         interrupt-parent = <&GIC>;
 244                 };
 245
 246                 i2c7: i2c@12CD0000 {
 247                         compatible = "exynos,i2c";
 248                         status = "disabled";
 249                         reg = <0x12CD0000 0x10000>;
 250                         interrupts = < 95 >;
 251                         interrupt-parent = <&GIC>;
 252                 };
 253
 254                 fimd0: fimd@14400000 {
 255                         compatible = "exynos,fimd";
 256                         status = "disabled";
 257                         reg = < 0x14400000 0x10000 >, /* fimd */
 258                               < 0x14420000 0x10000 >, /* disp */
 259                               < 0x10050000 0x220 >; /* sysreg */
 260                         interrupt-parent = <&GIC>;
 261                 };
 262
 263                 dp0: dp@145B0000 {
 264                         compatible = "exynos,dp";
 265                         status = "disabled";
 266                         reg = < 0x145B0000 0x10000 >,
 267                               < 0x10040720 0x10 >; /* PHY */
 268                         interrupt-parent = <&GIC>;
 269                 };
 270         };
 271 };