3 * Multi purpose pin (MPP) configuration.
7 - pin-map : array of pin configurations. Each pin is defined by 2 cells,
8 respectively: <pin> <function>. Pins not specified in the pin-map property
9 are assumed to have default value of <function> = 0, which means GPIO.
13 - function : function ID of the pin according to the assignment tables in
14 User Manual. Each pin can have many possible functions depending on the
17 - pin-count: number of the physical MPP connections on the SOC (depending on
18 the model it can be 24-50, or possibly else in future devices).
24 compatible = "mrvl,mpp";
28 0 1 /* MPP[0]: NF_IO[2] */
29 1 1 /* MPP[1]: NF_IO[3] */
30 2 1 /* MPP[2]: NF_IO[4] */
31 3 1 /* MPP[3]: NF_IO[5] */
32 4 1 /* MPP[4]: NF_IO[6] */
33 5 1 /* MPP[5]: NF_IO[7] */
34 6 1 /* MPP[6]: SYSRST_OUTn */
35 7 2 /* MPP[7]: SPI_SCn */
36 8 1 /* MPP[8]: TW_SDA */
37 9 1 /* MPP[9]: TW_SCK */
38 10 3 /* MPP[10]: UA0_TXD */
39 11 3 /* MPP[11]: UA0_RXD */
40 12 1 /* MPP[12]: SD_CLK */
41 13 1 /* MPP[13]: SD_CMD */
42 14 1 /* MPP[14]: SD_D[0] */
43 15 1 /* MPP[15]: SD_D[1] */
44 16 1 /* MPP[16]: SD_D[2] */
45 17 1 /* MPP[17]: SD_D[3] */
46 18 1 /* MPP[18]: NF_IO[0] */
47 19 1 /* MPP[19]: NF_IO[1] */
48 20 5 /* MPP[20]: SATA1_AC */
49 21 5 >; /* MPP[21]: SATA0_AC */