sys/boot/fdt/dts/rk3188.dtsi

   1 /*-
   2  * Copyright (c) 2013 Ganbold Tsagaankhuu <ganbold@gmail.com>
   3  * All rights reserved.
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification, are permitted provided that the following conditions
   7  * are met:
   8  * 1. Redistributions of source code must retain the above copyright
   9  *    notice, this list of conditions and the following disclaimer.
  10  * 2. Redistributions in binary form must reproduce the above copyright
  11  *    notice, this list of conditions and the following disclaimer in the
  12  *    documentation and/or other materials provided with the distribution.
  13  *
  14  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
  15  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  16  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  17  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
  18  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  19  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  20  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  21  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  22  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
  23  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  24  * SUCH DAMAGE.
  25  *
  26  * $FreeBSD$
  27  */
  28
  29 / {
  30         compatible = "rockchip,rk3188";
  31         #address-cells = <1>;
  32         #size-cells = <1>;
  33
  34         aliases {
  35                 soc = &SOC;
  36         };
  37
  38         SOC: rk3188 {
  39                 #address-cells = <1>;
  40                 #size-cells = <1>;
  41                 compatible = "simple-bus";
  42                 ranges;
  43                 bus-frequency = <0>;
  44
  45                 GIC: interrupt-controller@1013d000 {
  46                         compatible = "arm,gic";
  47                         reg =   <0x1013d000 0x1000>,    /* Distributor Registers */
  48                                 <0x1013c100 0x0100>;    /* CPU Interface Registers */
  49                         interrupt-controller;
  50                         #interrupt-cells = <1>;
  51                 };
  52
  53                 pmu@20004000 {
  54                         compatible = "rockchip,rk30xx-pmu";
  55                         #address-cells = <1>;
  56                         #size-cells = <1>;
  57                         reg = <0x20004000 0x100>;
  58                 };
  59
  60                 grf@20008000 {
  61                         compatible = "rockchip,rk30xx-grf";
  62                         #address-cells = <1>;
  63                         #size-cells = <1>;
  64                         reg = < 0x20008000 0x2000 >;
  65                 };
  66
  67                 mp_tmr@1013c600 {
  68                         compatible = "arm,mpcore-timers";
  69                         #address-cells = <1>;
  70                         #size-cells = <0>;
  71                         clock-frequency = < 148500000 >;
  72                         reg =   <0x1013c200 0x100>,     /* Global Timer Regs */
  73                                 <0x1013c600 0x20>;      /* Private Timer Regs */
  74                         interrupts = < 27 29 >;
  75                         interrupt-parent = <&GIC>;
  76                 };
  77
  78                 timer@20038000 {
  79                         compatible = "rockchip,rk30xx-timer";
  80                         compatible = "rockchip,rk3188-dw-apb-timer-osc";
  81                         reg = <0x20038000 0x20>;
  82                         interrupts = <76>;
  83                         clocks = <24000000>;
  84                         status = "disabled";
  85                 };
  86
  87                 timer@20038020 {
  88                         compatible = "rockchip,rk30xx-timer";
  89                         reg = <0x20038020 0x20>;
  90                         interrupts = <77>;
  91                         clocks = <24000000>;
  92                         status = "disabled";
  93                 };
  94
  95                 timer@20038060 {
  96                         compatible = "rockchip,rk30xx-timer";
  97                         reg = <0x20038060 0x20>;
  98                         interrupts = <91>;
  99                         clocks = <24000000>;
 100                         status = "disabled";
 101                 };
 102
 103                 timer@20038080 {
 104                         compatible = "rockchip,rk30xx-timer";
 105                         reg = <0x20038080 0x20>;
 106                         interrupts = <92>;
 107                         clocks = <24000000>;
 108                         status = "disabled";
 109                 };
 110
 111                 timer@200380a0 {
 112                         compatible = "rockchip,rk30xx-timer";
 113                         reg = <0x200380a0 0x20>;
 114                         interrupts = <96>;
 115                         clocks = <24000000>;
 116                         status = "disabled";
 117                 };
 118
 119                 watchdog@2004c000 {
 120                         compatible = "rockchip,rk30xx-wdt";
 121                         reg = <0x2004c000 0x100>;
 122                 };
 123
 124                 gpio0: gpio@2000a000 {
 125                         compatible = "rockchip,rk30xx-gpio";
 126                         gpio-controller;
 127                         #gpio-cells = <2>;
 128                         reg = <0x2000a000 0x100>;
 129                         interrupts = <86>;
 130                         interrupt-parent = <&GIC>;
 131                 };
 132
 133                 gpio1: gpio@2003c000 {
 134                         compatible = "rockchip,rk30xx-gpio";
 135                         gpio-controller;
 136                         #gpio-cells = <2>;
 137                         reg = <0x2003c000 0x100>;
 138                         interrupts = <87>;
 139                         interrupt-parent = <&GIC>;
 140                 };
 141
 142                 gpio2: gpio@2003e000 {
 143                         compatible = "rockchip,rk30xx-gpio";
 144                         gpio-controller;
 145                         #gpio-cells = <2>;
 146                         reg = <0x2003e000 0x100>;
 147                         interrupts = <88>;
 148                         interrupt-parent = <&GIC>;
 149                 };
 150
 151                 gpio3: gpio@20080000 {
 152                         compatible = "rockchip,rk30xx-gpio";
 153                         gpio-controller;
 154                         #gpio-cells = <2>;
 155                         reg = <0x20080000 0x100>;
 156                         interrupts = <89>;
 157                         interrupt-parent = <&GIC>;
 158                 };
 159
 160                 usb0: usb@10180000 {
 161                         compatible = "synopsys,designware-hs-otg2";
 162                         reg = <0x10180000 0x40000>;
 163                         interrupts = <48>;
 164                         interrupt-parent = <&GIC>;
 165                         #address-cells = <1>;
 166                         #size-cells = <0>;
 167                 };
 168
 169                 usb1: usb@101c0000 {
 170                         compatible = "synopsys,designware-hs-otg2";
 171                         reg = <0x101c0000 0x40000>;
 172                         interrupts = < 49 >;
 173                         interrupt-parent = <&GIC>;
 174                         #address-cells = <1>;
 175                         #size-cells = <0>;
 176                 };
 177
 178                 uart0: serial@10124000 {
 179                         compatible = "ns16550";
 180                         reg = <0x10124000 0x400>;
 181                         reg-shift = <2>;
 182                         interrupts = <66>;
 183                         interrupt-parent = <&GIC>;
 184                         current-speed = <115200>;
 185                         clock-frequency = < 24000000 >;
 186                         busy-detect = <1>;
 187                         broken-txfifo = <1>;
 188                         status = "disabled";
 189                 };
 190
 191                 uart1: serial@10126000 {
 192                         compatible = "ns16550";
 193                         reg = <0x10126000 0x400>;
 194                         reg-shift = <2>;
 195                         interrupts = <67>;
 196                         interrupt-parent = <&GIC>;
 197                         current-speed = <115200>;
 198                         clock-frequency = < 24000000 >;
 199                         busy-detect = <1>;
 200                         broken-txfifo = <1>;
 201                         status = "disabled";
 202                 };
 203
 204                 uart2: serial@20064000 {
 205                         compatible = "ns16550";
 206                         reg = <0x20064000 0x400>;
 207                         reg-shift = <2>;
 208                         interrupts = <68>;
 209                         interrupt-parent = <&GIC>;
 210                         current-speed = <115200>;
 211                         clock-frequency = < 24000000 >;
 212                         busy-detect = <1>;
 213                         broken-txfifo = <1>;
 214                         status = "disabled";
 215                 };
 216
 217                 uart3: serial@20068000 {
 218                         compatible = "ns16550";
 219                         reg = <0x20068000 0x400>;
 220                         reg-shift = <2>;
 221                         interrupts = <69>;
 222                         interrupt-parent = <&GIC>;
 223                         current-speed = <115200>;
 224                         clock-frequency = < 24000000 >;
 225                         busy-detect = <1>;
 226                         broken-txfifo = <1>;
 227                         status = "disabled";
 228                 };
 229
 230                 mmc@10214000 {
 231                         compatible = "rockchip,rk30xx-mmc";
 232                         reg = <0x10214000 0x1000>;
 233                         interrupts = <55>;
 234                         #address-cells = <1>;
 235                         #size-cells = <0>;
 236                         clocks = <24000000>;    /* TODO: verify freq */
 237                         status = "disabled";
 238                 };
 239
 240                 mmc@10218000 {
 241                         compatible = "rockchip,rk30xx-mmc";
 242                         reg = <0x10218000 0x1000>;
 243                         interrupts = <56>;
 244                         #address-cells = <1>;
 245                         #size-cells = <0>;
 246                         clocks = <24000000>;    /* TODO: verify freq */
 247                         status = "disabled";
 248                 };
 249         };
 250 };
 251