2 * Initial implementation:
3 * Copyright (c) 2001 Robert Drehmel
6 * As long as the above copyright statement and this notice remain
7 * unchanged, you can do what ever you want with this file.
10 * Copyright (c) 2008 Marius Strobl <marius@FreeBSD.org>
11 * All rights reserved.
13 * Redistribution and use in source and binary forms, with or without
14 * modification, are permitted provided that the following conditions
16 * 1. Redistributions of source code must retain the above copyright
17 * notice, this list of conditions and the following disclaimer.
18 * 2. Redistributions in binary form must reproduce the above copyright
19 * notice, this list of conditions and the following disclaimer in the
20 * documentation and/or other materials provided with the distribution.
22 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
25 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
28 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
29 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
30 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
31 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
35 #include <sys/cdefs.h>
36 __FBSDID("$FreeBSD$");
39 * FreeBSD/sparc64 kernel loader - machine dependent part
41 * - implements copyin and readin functions that map kernel
42 * pages on demand. The machine independent code does not
43 * know the size of the kernel early enough to pre-enter
44 * TTEs and install just one 4MB mapping seemed to limiting
49 #include <sys/param.h>
51 #include <sys/linker.h>
52 #include <sys/queue.h>
53 #include <sys/types.h>
54 #ifdef LOADER_ZFS_SUPPORT
59 #include <machine/asi.h>
60 #include <machine/cmt.h>
61 #include <machine/cpufunc.h>
62 #include <machine/elf.h>
63 #include <machine/fireplane.h>
64 #include <machine/jbus.h>
65 #include <machine/lsu.h>
66 #include <machine/metadata.h>
67 #include <machine/tte.h>
68 #include <machine/tlb.h>
69 #include <machine/upa.h>
70 #include <machine/ver.h>
71 #include <machine/vmparam.h>
73 #include "bootstrap.h"
78 #define CTASSERT(x) _CTASSERT(x, __LINE__)
79 #define _CTASSERT(x, y) __CTASSERT(x, y)
80 #define __CTASSERT(x, y) typedef char __assert ## y[(x) ? 1 : -1]
83 extern char bootprog_name[], bootprog_rev[], bootprog_date[], bootprog_maker[];
88 LOADSZ = 0x1000000 /* for kernel and modules */
91 /* At least Sun Fire V1280 require page sized allocations to be claimed. */
92 CTASSERT(HEAPSZ % PAGE_SIZE == 0);
94 static struct mmu_ops {
95 void (*tlb_init)(void);
96 int (*mmu_mapin)(vm_offset_t va, vm_size_t len);
99 typedef void kernel_entry_t(vm_offset_t mdp, u_long o1, u_long o2, u_long o3,
102 static inline u_long dtlb_get_data_sun4u(u_int, u_int);
103 static int dtlb_enter_sun4u(u_int, u_long data, vm_offset_t);
104 static vm_offset_t dtlb_va_to_pa_sun4u(vm_offset_t);
105 static inline u_long itlb_get_data_sun4u(u_int, u_int);
106 static int itlb_enter_sun4u(u_int, u_long data, vm_offset_t);
107 static vm_offset_t itlb_va_to_pa_sun4u(vm_offset_t);
108 static void itlb_relocate_locked0_sun4u(void);
109 extern vm_offset_t md_load(char *, vm_offset_t *);
110 static int sparc64_autoload(void);
111 static ssize_t sparc64_readin(const int, vm_offset_t, const size_t);
112 static ssize_t sparc64_copyin(const void *, vm_offset_t, size_t);
113 static void sparc64_maphint(vm_offset_t, size_t);
114 static vm_offset_t claim_virt(vm_offset_t, size_t, int);
115 static vm_offset_t alloc_phys(size_t, int);
116 static int map_phys(int, size_t, vm_offset_t, vm_offset_t);
117 static void release_phys(vm_offset_t, u_int);
118 static int __elfN(exec)(struct preloaded_file *);
119 static int mmu_mapin_sun4u(vm_offset_t, vm_size_t);
120 static int mmu_mapin_sun4v(vm_offset_t, vm_size_t);
121 static vm_offset_t init_heap(void);
122 static phandle_t find_bsp_sun4u(phandle_t, uint32_t);
123 const char *cpu_cpuid_prop_sun4u(void);
124 uint32_t cpu_get_mid_sun4u(void);
125 static void tlb_init_sun4u(void);
126 static void tlb_init_sun4v(void);
129 typedef u_int64_t tte_t;
131 static void pmap_print_tlb_sun4u(void);
132 static void pmap_print_tte_sun4u(tte_t, tte_t);
135 static struct mmu_ops mmu_ops_sun4u = { tlb_init_sun4u, mmu_mapin_sun4u };
136 static struct mmu_ops mmu_ops_sun4v = { tlb_init_sun4v, mmu_mapin_sun4v };
139 struct tlb_entry *dtlb_store;
140 struct tlb_entry *itlb_store;
144 static u_int dtlb_slot_max;
145 static u_int itlb_slot_max;
146 static u_int tlb_locked;
149 static struct tlb_entry *tlb_store;
150 static int is_sun4v = 0;
152 * no direct TLB access on sun4v
153 * we somewhat arbitrarily declare enough
154 * slots to cover a 4GB AS with 4MB pages
156 #define SUN4V_TLB_SLOT_MAX (1 << 10)
158 static vm_offset_t curkva = 0;
159 static vm_offset_t heapva;
161 static phandle_t root;
163 #ifdef LOADER_ZFS_SUPPORT
164 static int zfs_dev_init(void);
169 * Machine dependent structures that the machine independent
172 struct devsw *devsw[] = {
173 #ifdef LOADER_DISK_SUPPORT
176 #ifdef LOADER_NET_SUPPORT
179 #ifdef LOADER_ZFS_SUPPORT
184 struct arch_switch archsw;
186 static struct file_format sparc64_elf = {
190 struct file_format *file_formats[] = {
195 struct fs_ops *file_system[] = {
196 #ifdef LOADER_UFS_SUPPORT
199 #ifdef LOADER_CD9660_SUPPORT
202 #ifdef LOADER_ZFS_SUPPORT
205 #ifdef LOADER_ZIP_SUPPORT
208 #ifdef LOADER_GZIP_SUPPORT
211 #ifdef LOADER_BZIP2_SUPPORT
214 #ifdef LOADER_NFS_SUPPORT
217 #ifdef LOADER_TFTP_SUPPORT
222 struct netif_driver *netif_drivers[] = {
223 #ifdef LOADER_NET_SUPPORT
229 extern struct console ofwconsole;
230 struct console *consoles[] = {
237 watch_phys_set_mask(vm_offset_t pa, u_long mask)
241 stxa(AA_DMMU_PWPR, ASI_DMMU, pa & (((2UL << 38) - 1) << 3));
242 lsucr = ldxa(0, ASI_LSU_CTL_REG);
243 lsucr = ((lsucr | LSU_PW) & ~LSU_PM_MASK) |
244 (mask << LSU_PM_SHIFT);
245 stxa(0, ASI_LSU_CTL_REG, lsucr);
250 watch_phys_set(vm_offset_t pa, int sz)
254 off = (u_long)pa & 7;
255 /* Test for misaligned watch points. */
258 return (watch_phys_set_mask(pa, ((1 << sz) - 1) << off));
263 watch_virt_set_mask(vm_offset_t va, u_long mask)
267 stxa(AA_DMMU_VWPR, ASI_DMMU, va & (((2UL << 41) - 1) << 3));
268 lsucr = ldxa(0, ASI_LSU_CTL_REG);
269 lsucr = ((lsucr | LSU_VW) & ~LSU_VM_MASK) |
270 (mask << LSU_VM_SHIFT);
271 stxa(0, ASI_LSU_CTL_REG, lsucr);
276 watch_virt_set(vm_offset_t va, int sz)
280 off = (u_long)va & 7;
281 /* Test for misaligned watch points. */
284 return (watch_virt_set_mask(va, ((1 << sz) - 1) << off));
292 sparc64_autoload(void)
299 sparc64_readin(const int fd, vm_offset_t va, const size_t len)
302 mmu_ops->mmu_mapin(va, len);
303 return (read(fd, (void *)va, len));
307 sparc64_copyin(const void *src, vm_offset_t dest, size_t len)
310 mmu_ops->mmu_mapin(dest, len);
311 memcpy((void *)dest, src, len);
316 sparc64_maphint(vm_offset_t va, size_t len)
321 int i, free_excess = 0;
326 if (tlb_store[va >> 22].te_pa != -1)
329 /* round up to nearest 4MB page */
330 size = (len + PAGE_MASK_4M) & ~PAGE_MASK_4M;
332 pa = alloc_phys(PAGE_SIZE_256M, PAGE_SIZE_256M);
338 pa = alloc_phys(size, PAGE_SIZE_256M);
340 pa = alloc_phys(size, PAGE_SIZE_4M);
342 panic("%s: out of memory", __func__);
344 for (i = 0; i < size; i += PAGE_SIZE_4M) {
345 mva = claim_virt(va + i, PAGE_SIZE_4M, 0);
347 panic("%s: can't claim virtual page "
348 "(wanted %#lx, got %#lx)",
351 tlb_store[mva >> 22].te_pa = pa + i;
352 if (map_phys(-1, PAGE_SIZE_4M, mva, pa + i) != 0)
353 printf("%s: can't map physical page\n", __func__);
356 release_phys(pa, PAGE_SIZE_256M);
363 claim_virt(vm_offset_t virt, size_t size, int align)
367 if (OF_call_method("claim", mmu, 3, 1, virt, size, align, &mva) == -1)
368 return ((vm_offset_t)-1);
373 alloc_phys(size_t size, int align)
375 cell_t phys_hi, phys_low;
377 if (OF_call_method("claim", memory, 2, 2, size, align, &phys_low,
379 return ((vm_offset_t)-1);
380 return ((vm_offset_t)phys_hi << 32 | phys_low);
384 map_phys(int mode, size_t size, vm_offset_t virt, vm_offset_t phys)
387 return (OF_call_method("map", mmu, 5, 0, (uint32_t)phys,
388 (uint32_t)(phys >> 32), virt, size, mode));
392 release_phys(vm_offset_t phys, u_int size)
395 (void)OF_call_method("release", memory, 3, 0, (uint32_t)phys,
396 (uint32_t)(phys >> 32), size);
400 __elfN(exec)(struct preloaded_file *fp)
402 struct file_metadata *fmp;
408 if ((fmp = file_findmetadata(fp, MODINFOMD_ELFHDR)) == 0)
410 e = (Elf_Ehdr *)&fmp->md_data;
412 if ((error = md_load(fp->f_args, &mdp)) != 0)
415 printf("jumping to kernel entry at %#lx.\n", e->e_entry);
417 pmap_print_tlb_sun4u();
424 OF_release((void *)heapva, HEAPSZ);
426 ((kernel_entry_t *)entry)(mdp, 0, 0, 0, openfirmware);
428 panic("%s: exec returned", __func__);
432 dtlb_get_data_sun4u(u_int tlb, u_int slot)
436 slot = TLB_DAR_SLOT(tlb, slot);
438 * We read ASI_DTLB_DATA_ACCESS_REG twice back-to-back in order to
439 * work around errata of USIII and beyond.
441 pstate = rdpr(pstate);
442 wrpr(pstate, pstate & ~PSTATE_IE, 0);
443 (void)ldxa(slot, ASI_DTLB_DATA_ACCESS_REG);
444 data = ldxa(slot, ASI_DTLB_DATA_ACCESS_REG);
445 wrpr(pstate, pstate, 0);
450 itlb_get_data_sun4u(u_int tlb, u_int slot)
454 slot = TLB_DAR_SLOT(tlb, slot);
456 * We read ASI_DTLB_DATA_ACCESS_REG twice back-to-back in order to
457 * work around errata of USIII and beyond.
459 pstate = rdpr(pstate);
460 wrpr(pstate, pstate & ~PSTATE_IE, 0);
461 (void)ldxa(slot, ASI_ITLB_DATA_ACCESS_REG);
462 data = ldxa(slot, ASI_ITLB_DATA_ACCESS_REG);
463 wrpr(pstate, pstate, 0);
468 dtlb_va_to_pa_sun4u(vm_offset_t va)
473 pstate = rdpr(pstate);
474 wrpr(pstate, pstate & ~PSTATE_IE, 0);
475 for (i = 0; i < dtlb_slot_max; i++) {
476 reg = ldxa(TLB_DAR_SLOT(tlb_locked, i),
477 ASI_DTLB_TAG_READ_REG);
478 if (TLB_TAR_VA(reg) != va)
480 reg = dtlb_get_data_sun4u(tlb_locked, i);
481 wrpr(pstate, pstate, 0);
483 if (cpu_impl == CPU_IMPL_SPARC64V ||
484 cpu_impl >= CPU_IMPL_ULTRASPARCIII)
485 return (reg & TD_PA_CH_MASK);
486 return (reg & TD_PA_SF_MASK);
488 wrpr(pstate, pstate, 0);
493 itlb_va_to_pa_sun4u(vm_offset_t va)
498 pstate = rdpr(pstate);
499 wrpr(pstate, pstate & ~PSTATE_IE, 0);
500 for (i = 0; i < itlb_slot_max; i++) {
501 reg = ldxa(TLB_DAR_SLOT(tlb_locked, i),
502 ASI_ITLB_TAG_READ_REG);
503 if (TLB_TAR_VA(reg) != va)
505 reg = itlb_get_data_sun4u(tlb_locked, i);
506 wrpr(pstate, pstate, 0);
508 if (cpu_impl == CPU_IMPL_SPARC64V ||
509 cpu_impl >= CPU_IMPL_ULTRASPARCIII)
510 return (reg & TD_PA_CH_MASK);
511 return (reg & TD_PA_SF_MASK);
513 wrpr(pstate, pstate, 0);
518 dtlb_enter_sun4u(u_int index, u_long data, vm_offset_t virt)
521 return (OF_call_method("SUNW,dtlb-load", mmu, 3, 0, index, data,
526 itlb_enter_sun4u(u_int index, u_long data, vm_offset_t virt)
529 if (cpu_impl == CPU_IMPL_ULTRASPARCIIIp && index == 0 &&
531 panic("%s: won't enter locked TLB entry at index 0 on USIII+",
533 return (OF_call_method("SUNW,itlb-load", mmu, 3, 0, index, data,
538 itlb_relocate_locked0_sun4u(void)
540 u_long data, pstate, tag;
543 if (cpu_impl != CPU_IMPL_ULTRASPARCIIIp)
546 pstate = rdpr(pstate);
547 wrpr(pstate, pstate & ~PSTATE_IE, 0);
549 data = itlb_get_data_sun4u(tlb_locked, 0);
550 if ((data & (TD_V | TD_L)) != (TD_V | TD_L)) {
551 wrpr(pstate, pstate, 0);
555 /* Flush the mapping of slot 0. */
556 tag = ldxa(TLB_DAR_SLOT(tlb_locked, 0), ASI_ITLB_TAG_READ_REG);
557 stxa(TLB_DEMAP_VA(TLB_TAR_VA(tag)) | TLB_DEMAP_PRIMARY |
558 TLB_DEMAP_PAGE, ASI_IMMU_DEMAP, 0);
559 flush(0); /* The USIII-family ignores the address. */
562 * Search a replacement slot != 0 and enter the data and tag
563 * that formerly were in slot 0.
565 for (i = 1; i < itlb_slot_max; i++) {
566 if ((itlb_get_data_sun4u(tlb_locked, i) & TD_V) != 0)
569 stxa(AA_IMMU_TAR, ASI_IMMU, tag);
570 stxa(TLB_DAR_SLOT(tlb_locked, i), ASI_ITLB_DATA_ACCESS_REG,
572 flush(0); /* The USIII-family ignores the address. */
575 wrpr(pstate, pstate, 0);
576 if (i == itlb_slot_max)
577 panic("%s: could not find a replacement slot", __func__);
581 mmu_mapin_sun4u(vm_offset_t va, vm_size_t len)
587 if (va + len > curkva)
590 pa = (vm_offset_t)-1;
591 len += va & PAGE_MASK_4M;
594 if (dtlb_va_to_pa_sun4u(va) == (vm_offset_t)-1 ||
595 itlb_va_to_pa_sun4u(va) == (vm_offset_t)-1) {
596 /* Allocate a physical page, claim the virtual area. */
597 if (pa == (vm_offset_t)-1) {
598 pa = alloc_phys(PAGE_SIZE_4M, PAGE_SIZE_4M);
599 if (pa == (vm_offset_t)-1)
600 panic("%s: out of memory", __func__);
601 mva = claim_virt(va, PAGE_SIZE_4M, 0);
603 panic("%s: can't claim virtual page "
604 "(wanted %#lx, got %#lx)",
607 * The mappings may have changed, be paranoid.
612 * Actually, we can only allocate two pages less at
613 * most (depending on the kernel TSB size).
615 if (dtlb_slot >= dtlb_slot_max)
616 panic("%s: out of dtlb_slots", __func__);
617 if (itlb_slot >= itlb_slot_max)
618 panic("%s: out of itlb_slots", __func__);
619 data = TD_V | TD_4M | TD_PA(pa) | TD_L | TD_CP |
621 dtlb_store[dtlb_slot].te_pa = pa;
622 dtlb_store[dtlb_slot].te_va = va;
623 index = dtlb_slot_max - dtlb_slot - 1;
624 if (dtlb_enter_sun4u(index, data, va) < 0)
625 panic("%s: can't enter dTLB slot %d data "
626 "%#lx va %#lx", __func__, index, data,
629 itlb_store[itlb_slot].te_pa = pa;
630 itlb_store[itlb_slot].te_va = va;
631 index = itlb_slot_max - itlb_slot - 1;
632 if (itlb_enter_sun4u(index, data, va) < 0)
633 panic("%s: can't enter iTLB slot %d data "
634 "%#lx va %#lxd", __func__, index, data,
637 pa = (vm_offset_t)-1;
639 len -= len > PAGE_SIZE_4M ? PAGE_SIZE_4M : len;
642 if (pa != (vm_offset_t)-1)
643 release_phys(pa, PAGE_SIZE_4M);
648 mmu_mapin_sun4v(vm_offset_t va, vm_size_t len)
652 if (va + len > curkva)
655 pa = (vm_offset_t)-1;
656 len += va & PAGE_MASK_4M;
659 if ((va >> 22) > SUN4V_TLB_SLOT_MAX)
660 panic("%s: trying to map more than 4GB", __func__);
661 if (tlb_store[va >> 22].te_pa == -1) {
662 /* Allocate a physical page, claim the virtual area */
663 if (pa == (vm_offset_t)-1) {
664 pa = alloc_phys(PAGE_SIZE_4M, PAGE_SIZE_4M);
665 if (pa == (vm_offset_t)-1)
666 panic("%s: out of memory", __func__);
667 mva = claim_virt(va, PAGE_SIZE_4M, 0);
669 panic("%s: can't claim virtual page "
670 "(wanted %#lx, got %#lx)",
674 tlb_store[va >> 22].te_pa = pa;
675 if (map_phys(-1, PAGE_SIZE_4M, va, pa) == -1)
676 printf("%s: can't map physical page\n",
678 pa = (vm_offset_t)-1;
680 len -= len > PAGE_SIZE_4M ? PAGE_SIZE_4M : len;
683 if (pa != (vm_offset_t)-1)
684 release_phys(pa, PAGE_SIZE_4M);
692 /* There is no need for continuous physical heap memory. */
693 heapva = (vm_offset_t)OF_claim((void *)HEAPVA, HEAPSZ, 32);
698 find_bsp_sun4u(phandle_t node, uint32_t bspid)
700 char type[sizeof("cpu")];
704 for (; node > 0; node = OF_peer(node)) {
705 child = OF_child(node);
707 child = find_bsp_sun4u(child, bspid);
711 if (OF_getprop(node, "device_type", type,
714 if (strcmp(type, "cpu") != 0)
716 if (OF_getprop(node, cpu_cpuid_prop_sun4u(), &cpuid,
727 cpu_cpuid_prop_sun4u(void)
731 case CPU_IMPL_SPARC64:
732 case CPU_IMPL_SPARC64V:
733 case CPU_IMPL_ULTRASPARCI:
734 case CPU_IMPL_ULTRASPARCII:
735 case CPU_IMPL_ULTRASPARCIIi:
736 case CPU_IMPL_ULTRASPARCIIe:
737 return ("upa-portid");
738 case CPU_IMPL_ULTRASPARCIII:
739 case CPU_IMPL_ULTRASPARCIIIp:
740 case CPU_IMPL_ULTRASPARCIIIi:
741 case CPU_IMPL_ULTRASPARCIIIip:
743 case CPU_IMPL_ULTRASPARCIV:
744 case CPU_IMPL_ULTRASPARCIVp:
752 cpu_get_mid_sun4u(void)
756 case CPU_IMPL_SPARC64:
757 case CPU_IMPL_SPARC64V:
758 case CPU_IMPL_ULTRASPARCI:
759 case CPU_IMPL_ULTRASPARCII:
760 case CPU_IMPL_ULTRASPARCIIi:
761 case CPU_IMPL_ULTRASPARCIIe:
762 return (UPA_CR_GET_MID(ldxa(0, ASI_UPA_CONFIG_REG)));
763 case CPU_IMPL_ULTRASPARCIII:
764 case CPU_IMPL_ULTRASPARCIIIp:
765 return (FIREPLANE_CR_GET_AID(ldxa(AA_FIREPLANE_CONFIG,
766 ASI_FIREPLANE_CONFIG_REG)));
767 case CPU_IMPL_ULTRASPARCIIIi:
768 case CPU_IMPL_ULTRASPARCIIIip:
769 return (JBUS_CR_GET_JID(ldxa(0, ASI_JBUS_CONFIG_REG)));
770 case CPU_IMPL_ULTRASPARCIV:
771 case CPU_IMPL_ULTRASPARCIVp:
772 return (INTR_ID_GET_ID(ldxa(AA_INTR_ID, ASI_INTR_ID)));
783 cpu_impl = VER_IMPL(rdpr(ver));
785 case CPU_IMPL_SPARC64:
786 case CPU_IMPL_ULTRASPARCI:
787 case CPU_IMPL_ULTRASPARCII:
788 case CPU_IMPL_ULTRASPARCIIi:
789 case CPU_IMPL_ULTRASPARCIIe:
790 tlb_locked = TLB_DAR_T32;
792 case CPU_IMPL_ULTRASPARCIII:
793 case CPU_IMPL_ULTRASPARCIIIp:
794 case CPU_IMPL_ULTRASPARCIIIi:
795 case CPU_IMPL_ULTRASPARCIIIip:
796 case CPU_IMPL_ULTRASPARCIV:
797 case CPU_IMPL_ULTRASPARCIVp:
798 tlb_locked = TLB_DAR_T16;
800 case CPU_IMPL_SPARC64V:
801 tlb_locked = TLB_DAR_FTLB;
804 bsp = find_bsp_sun4u(OF_child(root), cpu_get_mid_sun4u());
806 panic("%s: no node for bootcpu?!?!", __func__);
808 if (OF_getprop(bsp, "#dtlb-entries", &dtlb_slot_max,
809 sizeof(dtlb_slot_max)) == -1 ||
810 OF_getprop(bsp, "#itlb-entries", &itlb_slot_max,
811 sizeof(itlb_slot_max)) == -1)
812 panic("%s: can't get TLB slot max.", __func__);
814 if (cpu_impl == CPU_IMPL_ULTRASPARCIIIp) {
816 printf("pre fixup:\n");
817 pmap_print_tlb_sun4u();
821 * Relocate the locked entry in it16 slot 0 (if existent)
822 * as part of working around Cheetah+ erratum 34.
824 itlb_relocate_locked0_sun4u();
827 printf("post fixup:\n");
828 pmap_print_tlb_sun4u();
832 dtlb_store = malloc(dtlb_slot_max * sizeof(*dtlb_store));
833 itlb_store = malloc(itlb_slot_max * sizeof(*itlb_store));
834 if (dtlb_store == NULL || itlb_store == NULL)
835 panic("%s: can't allocate TLB store", __func__);
842 tlb_store = malloc(SUN4V_TLB_SLOT_MAX * sizeof(*tlb_store));
843 memset(tlb_store, 0xFF, SUN4V_TLB_SLOT_MAX * sizeof(*tlb_store));
846 #ifdef LOADER_ZFS_SUPPORT
861 /* Get the GUID of the ZFS pool on the boot device. */
862 fd = open(getenv("currdev"), O_RDONLY);
864 if (vdev_probe(vdev_read, (void *)(uintptr_t) fd, &spa) == 0)
865 guid = spa->spa_guid;
869 /* Clean up the environment to let ZFS work. */
870 while ((vdev = STAILQ_FIRST(&zfs_vdevs)) != NULL) {
871 STAILQ_REMOVE_HEAD(&zfs_vdevs, v_alllink);
874 while ((spa = STAILQ_FIRST(&zfs_pools)) != NULL) {
875 STAILQ_REMOVE_HEAD(&zfs_pools, spa_link);
879 for (unit = 0; unit < MAXBDDEV; unit++) {
880 /* Find freebsd-zfs slices in the VTOC. */
881 sprintf(devname, "disk%d:", unit);
882 fd = open(devname, O_RDONLY);
885 lseek(fd, 0, SEEK_SET);
886 if (read(fd, &vtoc, sizeof(vtoc)) != sizeof(vtoc)) {
892 for (part = 0; part < 8; part++) {
893 if (part == 2 || vtoc.part[part].tag !=
894 VTOC_TAG_FREEBSD_ZFS)
896 sprintf(devname, "disk%d:%c", unit, part + 'a');
897 fd = open(devname, O_RDONLY);
901 if (vdev_probe(vdev_read, (void*)(uintptr_t) fd, 0))
907 unit = zfs_guid_to_unit(guid);
909 /* Update the environment for ZFS. */
910 sprintf(devname, "zfs%d", unit);
911 env_setenv("currdev", EV_VOLATILE, devname,
912 ofw_setcurrdev, env_nounset);
913 env_setenv("loaddev", EV_VOLATILE, devname,
914 env_noset, env_nounset);
920 #endif /* LOADER_ZFS_SUPPORT */
923 main(int (*openfirm)(void *))
930 * Tell the Open Firmware functions where they find the OFW gate.
934 archsw.arch_getdev = ofw_getdev;
935 archsw.arch_copyin = sparc64_copyin;
936 archsw.arch_copyout = ofw_copyout;
937 archsw.arch_readin = sparc64_readin;
938 archsw.arch_autoload = sparc64_autoload;
939 archsw.arch_maphint = sparc64_maphint;
941 if (init_heap() == (vm_offset_t)-1)
943 setheap((void *)heapva, (void *)(heapva + HEAPSZ));
946 * Probe for a console.
950 if ((root = OF_peer(0)) == -1)
951 panic("%s: can't get root phandle", __func__);
952 OF_getprop(root, "compatible", compatible, sizeof(compatible));
953 if (!strcmp(compatible, "sun4v")) {
954 printf("\nBooting with sun4v support.\n");
955 mmu_ops = &mmu_ops_sun4v;
958 printf("\nBooting with sun4u support.\n");
959 mmu_ops = &mmu_ops_sun4u;
965 * Set up the current device.
967 OF_getprop(chosen, "bootpath", bootpath, sizeof(bootpath));
970 * Sun compatible bootable CD-ROMs have a disk label placed
971 * before the cd9660 data, with the actual filesystem being
972 * in the first partition, while the other partitions contain
973 * pseudo disk labels with embedded boot blocks for different
974 * architectures, which may be followed by UFS filesystems.
975 * The firmware will set the boot path to the partition it
976 * boots from ('f' in the sun4u case), but we want the kernel
977 * to be loaded from the cd9660 fs ('a'), so the boot path
978 * needs to be altered.
980 if (bootpath[strlen(bootpath) - 2] == ':' &&
981 bootpath[strlen(bootpath) - 1] == 'f' &&
982 strstr(bootpath, "cdrom")) {
983 bootpath[strlen(bootpath) - 1] = 'a';
984 printf("Boot path set to %s\n", bootpath);
987 env_setenv("currdev", EV_VOLATILE, bootpath,
988 ofw_setcurrdev, env_nounset);
989 env_setenv("loaddev", EV_VOLATILE, bootpath,
990 env_noset, env_nounset);
993 * Initialize devices.
995 for (dp = devsw; *dp != 0; dp++)
996 if ((*dp)->dv_init != 0)
1000 printf("%s, Revision %s\n", bootprog_name, bootprog_rev);
1001 printf("(%s, %s)\n", bootprog_maker, bootprog_date);
1002 printf("bootpath=\"%s\"\n", bootpath);
1004 /* Give control to the machine independent loader code. */
1009 COMMAND_SET(heap, "heap", "show heap usage", command_heap);
1012 command_heap(int argc, char *argv[])
1016 printf("heap base at %p, top at %p, upper limit at %p\n", heapva,
1017 sbrk(0), heapva + HEAPSZ);
1021 COMMAND_SET(reboot, "reboot", "reboot the system", command_reboot);
1024 command_reboot(int argc, char *argv[])
1028 for (i = 0; devsw[i] != NULL; ++i)
1029 if (devsw[i]->dv_cleanup != NULL)
1030 (devsw[i]->dv_cleanup)();
1032 printf("Rebooting...\n");
1036 /* provide this for panic, as it's not in the startup code */
1045 static const char *const page_sizes[] = {
1046 " 8k", " 64k", "512k", " 4m"
1050 pmap_print_tte_sun4u(tte_t tag, tte_t tte)
1054 page_sizes[(tte >> TD_SIZE_SHIFT) & TD_SIZE_MASK],
1055 tag & TD_G ? "G" : " ");
1056 printf(tte & TD_W ? "W " : " ");
1057 printf(tte & TD_P ? "\e[33mP\e[0m " : " ");
1058 printf(tte & TD_E ? "E " : " ");
1059 printf(tte & TD_CV ? "CV " : " ");
1060 printf(tte & TD_CP ? "CP " : " ");
1061 printf(tte & TD_L ? "\e[32mL\e[0m " : " ");
1062 printf(tte & TD_IE ? "IE " : " ");
1063 printf(tte & TD_NFO ? "NFO " : " ");
1064 printf("pa=0x%lx va=0x%lx ctx=%ld\n",
1065 TD_PA(tte), TLB_TAR_VA(tag), TLB_TAR_CTX(tag));
1069 pmap_print_tlb_sun4u(void)
1075 pstate = rdpr(pstate);
1076 for (i = 0; i < itlb_slot_max; i++) {
1077 wrpr(pstate, pstate & ~PSTATE_IE, 0);
1078 tte = itlb_get_data_sun4u(tlb_locked, i);
1079 wrpr(pstate, pstate, 0);
1082 tag = ldxa(TLB_DAR_SLOT(tlb_locked, i),
1083 ASI_ITLB_TAG_READ_REG);
1084 printf("iTLB-%2u: ", i);
1085 pmap_print_tte_sun4u(tag, tte);
1087 for (i = 0; i < dtlb_slot_max; i++) {
1088 wrpr(pstate, pstate & ~PSTATE_IE, 0);
1089 tte = dtlb_get_data_sun4u(tlb_locked, i);
1090 wrpr(pstate, pstate, 0);
1093 tag = ldxa(TLB_DAR_SLOT(tlb_locked, i),
1094 ASI_DTLB_TAG_READ_REG);
1095 printf("dTLB-%2u: ", i);
1096 pmap_print_tte_sun4u(tag, tte);