4 * The contents of this file are subject to the terms of the
5 * Common Development and Distribution License (the "License").
6 * You may not use this file except in compliance with the License.
8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9 * or http://www.opensolaris.org/os/licensing.
10 * See the License for the specific language governing permissions
11 * and limitations under the License.
13 * When distributing Covered Code, include this CDDL HEADER in each
14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15 * If applicable, add the following below this CDDL HEADER, with the
16 * fields enclosed by brackets "[]" replaced with your own identifying
17 * information: Portions Copyright [yyyy] [name of copyright owner]
21 * Portions Copyright 2010 The FreeBSD Foundation
27 * Copyright 2008 Sun Microsystems, Inc. All rights reserved.
28 * Use is subject to license terms.
32 #pragma ident "%Z%%M% %I% %E% SMI"
35 #include <sys/fasttrap_isa.h>
36 #include <sys/fasttrap_impl.h>
37 #include <sys/dtrace.h>
38 #include <sys/dtrace_impl.h>
39 #include <sys/cmn_err.h>
41 #include <sys/regset.h>
42 #include <sys/privregs.h>
43 #include <sys/segments.h>
44 #include <sys/x86_archext.h>
46 #include <cddl/dev/dtrace/dtrace_cddl.h>
47 #include <sys/types.h>
49 #include <sys/dtrace_bsd.h>
50 #include <cddl/dev/dtrace/i386/regset.h>
51 #include <machine/segments.h>
52 #include <machine/reg.h>
53 #include <machine/pcb.h>
55 #include <sys/sysmacros.h>
58 #include <sys/archsystm.h>
60 #include <sys/ptrace.h>
63 proc_ops(int op, proc_t *p, void *kaddr, off_t uaddr, size_t len)
70 uio.uio_offset = uaddr;
74 uio.uio_segflg = UIO_SYSSPACE;
75 uio.uio_td = curthread;
78 if (proc_rwmem(p, &uio) < 0) {
88 uread(proc_t *p, void *kaddr, size_t len, uintptr_t uaddr)
91 return (proc_ops(UIO_READ, p, kaddr, uaddr, len));
95 uwrite(proc_t *p, void *kaddr, size_t len, uintptr_t uaddr)
98 return (proc_ops(UIO_WRITE, p, kaddr, uaddr, len));
105 #define r_rflags r_eflags
110 * Lossless User-Land Tracing on x86
111 * ---------------------------------
113 * The execution of most instructions is not dependent on the address; for
114 * these instructions it is sufficient to copy them into the user process's
115 * address space and execute them. To effectively single-step an instruction
116 * in user-land, we copy out the following sequence of instructions to scratch
117 * space in the user thread's ulwp_t structure.
119 * We then set the program counter (%eip or %rip) to point to this scratch
120 * space. Once execution resumes, the original instruction is executed and
121 * then control flow is redirected to what was originally the subsequent
122 * instruction. If the kernel attemps to deliver a signal while single-
123 * stepping, the signal is deferred and the program counter is moved into the
124 * second sequence of instructions. The second sequence ends in a trap into
125 * the kernel where the deferred signal is then properly handled and delivered.
127 * For instructions whose execute is position dependent, we perform simple
128 * emulation. These instructions are limited to control transfer
129 * instructions in 32-bit mode, but in 64-bit mode there's the added wrinkle
130 * of %rip-relative addressing that means that almost any instruction can be
131 * position dependent. For all the details on how we emulate generic
132 * instructions included %rip-relative instructions, see the code in
133 * fasttrap_pid_probe() below where we handle instructions of type
134 * FASTTRAP_T_COMMON (under the header: Generic Instruction Tracing).
137 #define FASTTRAP_MODRM_MOD(modrm) (((modrm) >> 6) & 0x3)
138 #define FASTTRAP_MODRM_REG(modrm) (((modrm) >> 3) & 0x7)
139 #define FASTTRAP_MODRM_RM(modrm) ((modrm) & 0x7)
140 #define FASTTRAP_MODRM(mod, reg, rm) (((mod) << 6) | ((reg) << 3) | (rm))
142 #define FASTTRAP_SIB_SCALE(sib) (((sib) >> 6) & 0x3)
143 #define FASTTRAP_SIB_INDEX(sib) (((sib) >> 3) & 0x7)
144 #define FASTTRAP_SIB_BASE(sib) ((sib) & 0x7)
146 #define FASTTRAP_REX_W(rex) (((rex) >> 3) & 1)
147 #define FASTTRAP_REX_R(rex) (((rex) >> 2) & 1)
148 #define FASTTRAP_REX_X(rex) (((rex) >> 1) & 1)
149 #define FASTTRAP_REX_B(rex) ((rex) & 1)
150 #define FASTTRAP_REX(w, r, x, b) \
151 (0x40 | ((w) << 3) | ((r) << 2) | ((x) << 1) | (b))
154 * Single-byte op-codes.
156 #define FASTTRAP_PUSHL_EBP 0x55
158 #define FASTTRAP_JO 0x70
159 #define FASTTRAP_JNO 0x71
160 #define FASTTRAP_JB 0x72
161 #define FASTTRAP_JAE 0x73
162 #define FASTTRAP_JE 0x74
163 #define FASTTRAP_JNE 0x75
164 #define FASTTRAP_JBE 0x76
165 #define FASTTRAP_JA 0x77
166 #define FASTTRAP_JS 0x78
167 #define FASTTRAP_JNS 0x79
168 #define FASTTRAP_JP 0x7a
169 #define FASTTRAP_JNP 0x7b
170 #define FASTTRAP_JL 0x7c
171 #define FASTTRAP_JGE 0x7d
172 #define FASTTRAP_JLE 0x7e
173 #define FASTTRAP_JG 0x7f
175 #define FASTTRAP_NOP 0x90
177 #define FASTTRAP_MOV_EAX 0xb8
178 #define FASTTRAP_MOV_ECX 0xb9
180 #define FASTTRAP_RET16 0xc2
181 #define FASTTRAP_RET 0xc3
183 #define FASTTRAP_LOOPNZ 0xe0
184 #define FASTTRAP_LOOPZ 0xe1
185 #define FASTTRAP_LOOP 0xe2
186 #define FASTTRAP_JCXZ 0xe3
188 #define FASTTRAP_CALL 0xe8
189 #define FASTTRAP_JMP32 0xe9
190 #define FASTTRAP_JMP8 0xeb
192 #define FASTTRAP_INT3 0xcc
193 #define FASTTRAP_INT 0xcd
195 #define FASTTRAP_2_BYTE_OP 0x0f
196 #define FASTTRAP_GROUP5_OP 0xff
199 * Two-byte op-codes (second byte only).
201 #define FASTTRAP_0F_JO 0x80
202 #define FASTTRAP_0F_JNO 0x81
203 #define FASTTRAP_0F_JB 0x82
204 #define FASTTRAP_0F_JAE 0x83
205 #define FASTTRAP_0F_JE 0x84
206 #define FASTTRAP_0F_JNE 0x85
207 #define FASTTRAP_0F_JBE 0x86
208 #define FASTTRAP_0F_JA 0x87
209 #define FASTTRAP_0F_JS 0x88
210 #define FASTTRAP_0F_JNS 0x89
211 #define FASTTRAP_0F_JP 0x8a
212 #define FASTTRAP_0F_JNP 0x8b
213 #define FASTTRAP_0F_JL 0x8c
214 #define FASTTRAP_0F_JGE 0x8d
215 #define FASTTRAP_0F_JLE 0x8e
216 #define FASTTRAP_0F_JG 0x8f
218 #define FASTTRAP_EFLAGS_OF 0x800
219 #define FASTTRAP_EFLAGS_DF 0x400
220 #define FASTTRAP_EFLAGS_SF 0x080
221 #define FASTTRAP_EFLAGS_ZF 0x040
222 #define FASTTRAP_EFLAGS_AF 0x010
223 #define FASTTRAP_EFLAGS_PF 0x004
224 #define FASTTRAP_EFLAGS_CF 0x001
227 * Instruction prefixes.
229 #define FASTTRAP_PREFIX_OPERAND 0x66
230 #define FASTTRAP_PREFIX_ADDRESS 0x67
231 #define FASTTRAP_PREFIX_CS 0x2E
232 #define FASTTRAP_PREFIX_DS 0x3E
233 #define FASTTRAP_PREFIX_ES 0x26
234 #define FASTTRAP_PREFIX_FS 0x64
235 #define FASTTRAP_PREFIX_GS 0x65
236 #define FASTTRAP_PREFIX_SS 0x36
237 #define FASTTRAP_PREFIX_LOCK 0xF0
238 #define FASTTRAP_PREFIX_REP 0xF3
239 #define FASTTRAP_PREFIX_REPNE 0xF2
241 #define FASTTRAP_NOREG 0xff
244 * Map between instruction register encodings and the kernel constants which
245 * correspond to indicies into struct regs.
248 static const uint8_t regmap[16] = {
249 REG_RAX, REG_RCX, REG_RDX, REG_RBX, REG_RSP, REG_RBP, REG_RSI, REG_RDI,
250 REG_R8, REG_R9, REG_R10, REG_R11, REG_R12, REG_R13, REG_R14, REG_R15,
253 static const uint8_t regmap[8] = {
254 EAX, ECX, EDX, EBX, UESP, EBP, ESI, EDI
258 static ulong_t fasttrap_getreg(struct reg *, uint_t);
261 fasttrap_anarg(struct reg *rp, int function_entry, int argno)
264 int shift = function_entry ? 1 : 0;
267 if (curproc->p_model == DATAMODEL_LP64) {
271 * In 64-bit mode, the first six arguments are stored in
275 return ((&rp->r_rdi)[argno]);
277 stack = (uintptr_t *)rp->r_rsp;
278 DTRACE_CPUFLAG_SET(CPU_DTRACE_NOFAULT);
279 value = dtrace_fulword(&stack[argno - 6 + shift]);
280 DTRACE_CPUFLAG_CLEAR(CPU_DTRACE_NOFAULT | CPU_DTRACE_BADADDR);
284 uint32_t *stack = (uint32_t *)rp->r_esp;
285 DTRACE_CPUFLAG_SET(CPU_DTRACE_NOFAULT);
286 value = dtrace_fuword32(&stack[argno + shift]);
287 DTRACE_CPUFLAG_CLEAR(CPU_DTRACE_NOFAULT | CPU_DTRACE_BADADDR);
298 fasttrap_tracepoint_init(proc_t *p, fasttrap_tracepoint_t *tp, uintptr_t pc,
299 fasttrap_probe_type_t type)
301 uint8_t instr[FASTTRAP_MAX_INSTR_SIZE + 10];
302 size_t len = FASTTRAP_MAX_INSTR_SIZE;
303 size_t first = MIN(len, PAGESIZE - (pc & PAGEOFFSET));
306 uint8_t seg, rex = 0;
309 * Read the instruction at the given address out of the process's
310 * address space. We don't have to worry about a debugger
311 * changing this instruction before we overwrite it with our trap
312 * instruction since P_PR_LOCK is set. Since instructions can span
313 * pages, we potentially read the instruction in two parts. If the
314 * second part fails, we just zero out that part of the instruction.
316 if (uread(p, &instr[0], first, pc) != 0)
319 uread(p, &instr[first], len - first, pc + first) != 0) {
320 bzero(&instr[first], len - first);
325 * If the disassembly fails, then we have a malformed instruction.
327 if ((size = dtrace_instr_size_isa(instr, p->p_model, &rmindex)) <= 0)
331 * Make sure the disassembler isn't completely broken.
333 ASSERT(-1 <= rmindex && rmindex < size);
336 * If the computed size is greater than the number of bytes read,
337 * then it was a malformed instruction possibly because it fell on a
338 * page boundary and the subsequent page was missing or because of
339 * some malicious user.
344 tp->ftt_size = (uint8_t)size;
345 tp->ftt_segment = FASTTRAP_SEG_NONE;
348 * Find the start of the instruction's opcode by processing any
353 switch (instr[start]) {
354 case FASTTRAP_PREFIX_SS:
357 case FASTTRAP_PREFIX_GS:
360 case FASTTRAP_PREFIX_FS:
363 case FASTTRAP_PREFIX_ES:
366 case FASTTRAP_PREFIX_DS:
369 case FASTTRAP_PREFIX_CS:
372 case FASTTRAP_PREFIX_OPERAND:
373 case FASTTRAP_PREFIX_ADDRESS:
374 case FASTTRAP_PREFIX_LOCK:
375 case FASTTRAP_PREFIX_REP:
376 case FASTTRAP_PREFIX_REPNE:
379 * It's illegal for an instruction to specify
380 * two segment prefixes -- give up on this
381 * illegal instruction.
383 if (tp->ftt_segment != FASTTRAP_SEG_NONE)
386 tp->ftt_segment = seg;
396 * Identify the REX prefix on 64-bit processes.
398 if (p->p_model == DATAMODEL_LP64 && (instr[start] & 0xf0) == 0x40)
399 rex = instr[start++];
403 * Now that we're pretty sure that the instruction is okay, copy the
404 * valid part to the tracepoint.
406 bcopy(instr, tp->ftt_instr, FASTTRAP_MAX_INSTR_SIZE);
408 tp->ftt_type = FASTTRAP_T_COMMON;
409 if (instr[start] == FASTTRAP_2_BYTE_OP) {
410 switch (instr[start + 1]) {
412 case FASTTRAP_0F_JNO:
414 case FASTTRAP_0F_JAE:
416 case FASTTRAP_0F_JNE:
417 case FASTTRAP_0F_JBE:
420 case FASTTRAP_0F_JNS:
422 case FASTTRAP_0F_JNP:
424 case FASTTRAP_0F_JGE:
425 case FASTTRAP_0F_JLE:
427 tp->ftt_type = FASTTRAP_T_JCC;
428 tp->ftt_code = (instr[start + 1] & 0x0f) | FASTTRAP_JO;
429 tp->ftt_dest = pc + tp->ftt_size +
430 /* LINTED - alignment */
431 *(int32_t *)&instr[start + 2];
434 } else if (instr[start] == FASTTRAP_GROUP5_OP) {
435 uint_t mod = FASTTRAP_MODRM_MOD(instr[start + 1]);
436 uint_t reg = FASTTRAP_MODRM_REG(instr[start + 1]);
437 uint_t rm = FASTTRAP_MODRM_RM(instr[start + 1]);
439 if (reg == 2 || reg == 4) {
443 tp->ftt_type = FASTTRAP_T_CALL;
445 tp->ftt_type = FASTTRAP_T_JMP;
452 ASSERT(p->p_model == DATAMODEL_LP64 || rex == 0);
455 * See AMD x86-64 Architecture Programmer's Manual
456 * Volume 3, Section 1.2.7, Table 1-12, and
457 * Appendix A.3.1, Table A-15.
459 if (mod != 3 && rm == 4) {
460 uint8_t sib = instr[start + 2];
461 uint_t index = FASTTRAP_SIB_INDEX(sib);
462 uint_t base = FASTTRAP_SIB_BASE(sib);
464 tp->ftt_scale = FASTTRAP_SIB_SCALE(sib);
466 tp->ftt_index = (index == 4) ?
468 regmap[index | (FASTTRAP_REX_X(rex) << 3)];
469 tp->ftt_base = (mod == 0 && base == 5) ?
471 regmap[base | (FASTTRAP_REX_B(rex) << 3)];
474 sz = mod == 1 ? 1 : 4;
477 * In 64-bit mode, mod == 0 and r/m == 5
478 * denotes %rip-relative addressing; in 32-bit
479 * mode, the base register isn't used. In both
480 * modes, there is a 32-bit operand.
482 if (mod == 0 && rm == 5) {
484 if (p->p_model == DATAMODEL_LP64)
485 tp->ftt_base = REG_RIP;
488 tp->ftt_base = FASTTRAP_NOREG;
492 (FASTTRAP_REX_B(rex) << 3);
494 tp->ftt_base = regmap[base];
495 sz = mod == 1 ? 1 : mod == 2 ? 4 : 0;
497 tp->ftt_index = FASTTRAP_NOREG;
502 tp->ftt_dest = *(int8_t *)&instr[start + i];
503 } else if (sz == 4) {
504 /* LINTED - alignment */
505 tp->ftt_dest = *(int32_t *)&instr[start + i];
511 switch (instr[start]) {
513 tp->ftt_type = FASTTRAP_T_RET;
517 tp->ftt_type = FASTTRAP_T_RET16;
518 /* LINTED - alignment */
519 tp->ftt_dest = *(uint16_t *)&instr[start + 1];
538 tp->ftt_type = FASTTRAP_T_JCC;
539 tp->ftt_code = instr[start];
540 tp->ftt_dest = pc + tp->ftt_size +
541 (int8_t)instr[start + 1];
544 case FASTTRAP_LOOPNZ:
547 tp->ftt_type = FASTTRAP_T_LOOP;
548 tp->ftt_code = instr[start];
549 tp->ftt_dest = pc + tp->ftt_size +
550 (int8_t)instr[start + 1];
554 tp->ftt_type = FASTTRAP_T_JCXZ;
555 tp->ftt_dest = pc + tp->ftt_size +
556 (int8_t)instr[start + 1];
560 tp->ftt_type = FASTTRAP_T_CALL;
561 tp->ftt_dest = pc + tp->ftt_size +
562 /* LINTED - alignment */
563 *(int32_t *)&instr[start + 1];
568 tp->ftt_type = FASTTRAP_T_JMP;
569 tp->ftt_dest = pc + tp->ftt_size +
570 /* LINTED - alignment */
571 *(int32_t *)&instr[start + 1];
574 tp->ftt_type = FASTTRAP_T_JMP;
575 tp->ftt_dest = pc + tp->ftt_size +
576 (int8_t)instr[start + 1];
579 case FASTTRAP_PUSHL_EBP:
581 tp->ftt_type = FASTTRAP_T_PUSHL_EBP;
586 ASSERT(p->p_model == DATAMODEL_LP64 || rex == 0);
589 * On amd64 we have to be careful not to confuse a nop
590 * (actually xchgl %eax, %eax) with an instruction using
591 * the same opcode, but that does something different
592 * (e.g. xchgl %r8d, %eax or xcghq %r8, %rax).
594 if (FASTTRAP_REX_B(rex) == 0)
596 tp->ftt_type = FASTTRAP_T_NOP;
601 * The pid provider shares the int3 trap with debugger
602 * breakpoints so we can't instrument them.
604 ASSERT(instr[start] == FASTTRAP_INSTR);
609 * Interrupts seem like they could be traced with
610 * no negative implications, but it's possible that
611 * a thread could be redirected by the trap handling
612 * code which would eventually return to the
613 * instruction after the interrupt. If the interrupt
614 * were in our scratch space, the subsequent
615 * instruction might be overwritten before we return.
616 * Accordingly we refuse to instrument any interrupt.
623 if (p->p_model == DATAMODEL_LP64 && tp->ftt_type == FASTTRAP_T_COMMON) {
625 * If the process is 64-bit and the instruction type is still
626 * FASTTRAP_T_COMMON -- meaning we're going to copy it out an
627 * execute it -- we need to watch for %rip-relative
628 * addressing mode. See the portion of fasttrap_pid_probe()
629 * below where we handle tracepoints with type
630 * FASTTRAP_T_COMMON for how we emulate instructions that
631 * employ %rip-relative addressing.
634 uint_t mod = FASTTRAP_MODRM_MOD(instr[rmindex]);
635 uint_t reg = FASTTRAP_MODRM_REG(instr[rmindex]);
636 uint_t rm = FASTTRAP_MODRM_RM(instr[rmindex]);
638 ASSERT(rmindex > start);
640 if (mod == 0 && rm == 5) {
642 * We need to be sure to avoid other
643 * registers used by this instruction. While
644 * the reg field may determine the op code
645 * rather than denoting a register, assuming
646 * that it denotes a register is always safe.
647 * We leave the REX field intact and use
648 * whatever value's there for simplicity.
651 tp->ftt_ripmode = FASTTRAP_RIP_1 |
653 FASTTRAP_REX_B(rex));
656 tp->ftt_ripmode = FASTTRAP_RIP_2 |
658 FASTTRAP_REX_B(rex));
662 tp->ftt_modrm = tp->ftt_instr[rmindex];
663 tp->ftt_instr[rmindex] =
664 FASTTRAP_MODRM(2, reg, rm);
674 fasttrap_tracepoint_install(proc_t *p, fasttrap_tracepoint_t *tp)
676 fasttrap_instr_t instr = FASTTRAP_INSTR;
678 if (uwrite(p, &instr, 1, tp->ftt_pc) != 0)
685 fasttrap_tracepoint_remove(proc_t *p, fasttrap_tracepoint_t *tp)
690 * Distinguish between read or write failures and a changed
693 if (uread(p, &instr, 1, tp->ftt_pc) != 0)
695 if (instr != FASTTRAP_INSTR)
697 if (uwrite(p, &tp->ftt_instr[0], 1, tp->ftt_pc) != 0)
705 fasttrap_fulword_noerr(const void *uaddr)
709 if ((ret = fasttrap_fulword(uaddr)) != -1)
718 fasttrap_fuword32_noerr(const void *uaddr)
722 if ((ret = fasttrap_fuword32(uaddr)) != -1)
730 fasttrap_return_common(struct reg *rp, uintptr_t pc, pid_t pid,
733 fasttrap_tracepoint_t *tp;
734 fasttrap_bucket_t *bucket;
741 pid_mtx = &cpu_core[CPU->cpu_id].cpuc_pid_lock;
742 mutex_enter(pid_mtx);
744 bucket = &fasttrap_tpoints.fth_table[FASTTRAP_TPOINTS_INDEX(pid, pc)];
746 for (tp = bucket->ftb_data; tp != NULL; tp = tp->ftt_next) {
747 if (pid == tp->ftt_pid && pc == tp->ftt_pc &&
748 tp->ftt_proc->ftpc_acount != 0)
753 * Don't sweat it if we can't find the tracepoint again; unlike
754 * when we're in fasttrap_pid_probe(), finding the tracepoint here
755 * is not essential to the correct execution of the process.
764 for (id = tp->ftt_retids; id != NULL; id = id->fti_next) {
766 * If there's a branch that could act as a return site, we
767 * need to trace it, and check here if the program counter is
768 * external to the function.
770 if (tp->ftt_type != FASTTRAP_T_RET &&
771 tp->ftt_type != FASTTRAP_T_RET16 &&
772 new_pc - id->fti_probe->ftp_faddr <
773 id->fti_probe->ftp_fsize)
776 dtrace_probe(id->fti_probe->ftp_id,
777 pc - id->fti_probe->ftp_faddr,
778 rp->r_rax, rp->r_rbx, 0, 0);
787 fasttrap_sigsegv(proc_t *p, kthread_t *t, uintptr_t addr)
790 sigqueue_t *sqp = kmem_zalloc(sizeof (sigqueue_t), KM_SLEEP);
792 sqp->sq_info.si_signo = SIGSEGV;
793 sqp->sq_info.si_code = SEGV_MAPERR;
794 sqp->sq_info.si_addr = (caddr_t)addr;
796 mutex_enter(&p->p_lock);
798 mutex_exit(&p->p_lock);
803 ksiginfo_t *ksi = kmem_zalloc(sizeof (ksiginfo_t), KM_SLEEP);
806 ksi->ksi_signo = SIGSEGV;
807 ksi->ksi_code = SEGV_MAPERR;
808 ksi->ksi_addr = (caddr_t)addr;
809 (void) tdksignal(t, SIGSEGV, ksi);
815 fasttrap_usdt_args64(fasttrap_probe_t *probe, struct reg *rp, int argc,
818 int i, x, cap = MIN(argc, probe->ftp_nargs);
819 uintptr_t *stack = (uintptr_t *)rp->r_rsp;
821 for (i = 0; i < cap; i++) {
822 x = probe->ftp_argmap[i];
825 argv[i] = (&rp->r_rdi)[x];
827 argv[i] = fasttrap_fulword_noerr(&stack[x]);
830 for (; i < argc; i++) {
838 fasttrap_usdt_args32(fasttrap_probe_t *probe, struct reg *rp, int argc,
841 int i, x, cap = MIN(argc, probe->ftp_nargs);
842 uint32_t *stack = (uint32_t *)rp->r_rsp;
844 for (i = 0; i < cap; i++) {
845 x = probe->ftp_argmap[i];
847 argv[i] = fasttrap_fuword32_noerr(&stack[x]);
850 for (; i < argc; i++) {
857 fasttrap_do_seg(fasttrap_tracepoint_t *tp, struct reg *rp, uintptr_t *addr)
861 struct segment_descriptor *desc;
863 struct user_segment_descriptor *desc;
865 uint16_t sel = 0, ndx, type;
868 switch (tp->ftt_segment) {
869 case FASTTRAP_SEG_CS:
872 case FASTTRAP_SEG_DS:
875 case FASTTRAP_SEG_ES:
878 case FASTTRAP_SEG_FS:
881 case FASTTRAP_SEG_GS:
884 case FASTTRAP_SEG_SS:
890 * Make sure the given segment register specifies a user priority
891 * selector rather than a kernel selector.
893 if (ISPL(sel) != SEL_UPL)
899 * Check the bounds and grab the descriptor out of the specified
904 if (ndx > p->p_md.md_ldt->ldt_len)
907 desc = (struct segment_descriptor *)
908 p->p_md.md_ldt[ndx].ldt_base;
910 if (ndx > max_ldt_segment)
913 desc = (struct user_segment_descriptor *)
914 p->p_md.md_ldt[ndx].ldt_base;
929 * The descriptor must have user privilege level and it must be
932 if (desc->sd_dpl != SEL_UPL || desc->sd_p != 1)
935 type = desc->sd_type;
938 * If the S bit in the type field is not set, this descriptor can
939 * only be used in system context.
941 if ((type & 0x10) != 0x10)
944 limit = USD_GETLIMIT(desc) * (desc->sd_gran ? PAGESIZE : 1);
946 if (tp->ftt_segment == FASTTRAP_SEG_CS) {
948 * The code/data bit and readable bit must both be set.
950 if ((type & 0xa) != 0xa)
957 * The code/data bit must be clear.
959 if ((type & 0x8) != 0)
963 * If the expand-down bit is clear, we just check the limit as
964 * it would naturally be applied. Otherwise, we need to check
965 * that the address is the range [limit + 1 .. 0xffff] or
966 * [limit + 1 ... 0xffffffff] depending on if the default
967 * operand size bit is set.
969 if ((type & 0x4) == 0) {
972 } else if (desc->sd_def32) {
973 if (*addr < limit + 1 || 0xffff < *addr)
976 if (*addr < limit + 1 || 0xffffffff < *addr)
981 *addr += USD_GETBASE(desc);
987 fasttrap_pid_probe(struct reg *rp)
990 uintptr_t pc = rp->r_rip - 1;
991 uintptr_t new_pc = 0;
992 fasttrap_bucket_t *bucket;
996 fasttrap_tracepoint_t *tp, tp_local;
998 dtrace_icookie_t cookie;
999 uint_t is_enabled = 0;
1002 * It's possible that a user (in a veritable orgy of bad planning)
1003 * could redirect this thread's flow of control before it reached the
1004 * return probe fasttrap. In this case we need to kill the process
1005 * since it's in a unrecoverable state.
1007 if (curthread->t_dtrace_step) {
1008 ASSERT(curthread->t_dtrace_on);
1009 fasttrap_sigtrap(p, curthread, pc);
1014 * Clear all user tracing flags.
1016 curthread->t_dtrace_ft = 0;
1017 curthread->t_dtrace_pc = 0;
1018 curthread->t_dtrace_npc = 0;
1019 curthread->t_dtrace_scrpc = 0;
1020 curthread->t_dtrace_astpc = 0;
1022 curthread->t_dtrace_regv = 0;
1027 * Treat a child created by a call to vfork(2) as if it were its
1028 * parent. We know that there's only one thread of control in such a
1029 * process: this one.
1031 while (p->p_flag & SVFORK) {
1039 pid_mtx = &cpu_core[CPU->cpu_id].cpuc_pid_lock;
1040 mutex_enter(pid_mtx);
1042 bucket = &fasttrap_tpoints.fth_table[FASTTRAP_TPOINTS_INDEX(pid, pc)];
1045 * Lookup the tracepoint that the process just hit.
1047 for (tp = bucket->ftb_data; tp != NULL; tp = tp->ftt_next) {
1048 if (pid == tp->ftt_pid && pc == tp->ftt_pc &&
1049 tp->ftt_proc->ftpc_acount != 0)
1054 * If we couldn't find a matching tracepoint, either a tracepoint has
1055 * been inserted without using the pid<pid> ioctl interface (see
1056 * fasttrap_ioctl), or somehow we have mislaid this tracepoint.
1060 mutex_exit(pid_mtx);
1067 * Set the program counter to the address of the traced instruction
1068 * so that it looks right in ustack() output.
1072 if (tp->ftt_ids != NULL) {
1076 if (p->p_model == DATAMODEL_LP64) {
1077 for (id = tp->ftt_ids; id != NULL; id = id->fti_next) {
1078 fasttrap_probe_t *probe = id->fti_probe;
1080 if (id->fti_ptype == DTFTP_ENTRY) {
1082 * We note that this was an entry
1083 * probe to help ustack() find the
1086 cookie = dtrace_interrupt_disable();
1087 DTRACE_CPUFLAG_SET(CPU_DTRACE_ENTRY);
1088 dtrace_probe(probe->ftp_id, rp->r_rdi,
1089 rp->r_rsi, rp->r_rdx, rp->r_rcx,
1091 DTRACE_CPUFLAG_CLEAR(CPU_DTRACE_ENTRY);
1092 dtrace_interrupt_enable(cookie);
1093 } else if (id->fti_ptype == DTFTP_IS_ENABLED) {
1095 * Note that in this case, we don't
1096 * call dtrace_probe() since it's only
1097 * an artificial probe meant to change
1098 * the flow of control so that it
1099 * encounters the true probe.
1102 } else if (probe->ftp_argmap == NULL) {
1103 dtrace_probe(probe->ftp_id, rp->r_rdi,
1104 rp->r_rsi, rp->r_rdx, rp->r_rcx,
1109 fasttrap_usdt_args64(probe, rp,
1110 sizeof (t) / sizeof (t[0]), t);
1112 dtrace_probe(probe->ftp_id, t[0], t[1],
1118 uintptr_t s0, s1, s2, s3, s4, s5;
1119 uint32_t *stack = (uint32_t *)rp->r_esp;
1122 * In 32-bit mode, all arguments are passed on the
1123 * stack. If this is a function entry probe, we need
1124 * to skip the first entry on the stack as it
1125 * represents the return address rather than a
1126 * parameter to the function.
1128 s0 = fasttrap_fuword32_noerr(&stack[0]);
1129 s1 = fasttrap_fuword32_noerr(&stack[1]);
1130 s2 = fasttrap_fuword32_noerr(&stack[2]);
1131 s3 = fasttrap_fuword32_noerr(&stack[3]);
1132 s4 = fasttrap_fuword32_noerr(&stack[4]);
1133 s5 = fasttrap_fuword32_noerr(&stack[5]);
1135 for (id = tp->ftt_ids; id != NULL; id = id->fti_next) {
1136 fasttrap_probe_t *probe = id->fti_probe;
1138 if (id->fti_ptype == DTFTP_ENTRY) {
1140 * We note that this was an entry
1141 * probe to help ustack() find the
1144 cookie = dtrace_interrupt_disable();
1145 DTRACE_CPUFLAG_SET(CPU_DTRACE_ENTRY);
1146 dtrace_probe(probe->ftp_id, s1, s2,
1148 DTRACE_CPUFLAG_CLEAR(CPU_DTRACE_ENTRY);
1149 dtrace_interrupt_enable(cookie);
1150 } else if (id->fti_ptype == DTFTP_IS_ENABLED) {
1152 * Note that in this case, we don't
1153 * call dtrace_probe() since it's only
1154 * an artificial probe meant to change
1155 * the flow of control so that it
1156 * encounters the true probe.
1159 } else if (probe->ftp_argmap == NULL) {
1160 dtrace_probe(probe->ftp_id, s0, s1,
1165 fasttrap_usdt_args32(probe, rp,
1166 sizeof (t) / sizeof (t[0]), t);
1168 dtrace_probe(probe->ftp_id, t[0], t[1],
1172 #endif /* __amd64 */
1179 * We're about to do a bunch of work so we cache a local copy of
1180 * the tracepoint to emulate the instruction, and then find the
1181 * tracepoint again later if we need to light up any return probes.
1186 mutex_exit(pid_mtx);
1191 * Set the program counter to appear as though the traced instruction
1192 * had completely executed. This ensures that fasttrap_getreg() will
1193 * report the expected value for REG_RIP.
1195 rp->r_rip = pc + tp->ftt_size;
1198 * If there's an is-enabled probe connected to this tracepoint it
1199 * means that there was a 'xorl %eax, %eax' or 'xorq %rax, %rax'
1200 * instruction that was placed there by DTrace when the binary was
1201 * linked. As this probe is, in fact, enabled, we need to stuff 1
1202 * into %eax or %rax. Accordingly, we can bypass all the instruction
1203 * emulation logic since we know the inevitable result. It's possible
1204 * that a user could construct a scenario where the 'is-enabled'
1205 * probe was on some other instruction, but that would be a rather
1206 * exotic way to shoot oneself in the foot.
1215 * We emulate certain types of instructions to ensure correctness
1216 * (in the case of position dependent instructions) or optimize
1217 * common cases. The rest we have the thread execute back in user-
1220 switch (tp->ftt_type) {
1221 case FASTTRAP_T_RET:
1222 case FASTTRAP_T_RET16:
1229 * We have to emulate _every_ facet of the behavior of a ret
1230 * instruction including what happens if the load from %esp
1231 * fails; in that case, we send a SIGSEGV.
1234 if (p->p_model == DATAMODEL_NATIVE) {
1235 ret = dst = fasttrap_fulword((void *)rp->r_rsp);
1236 addr = rp->r_rsp + sizeof (uintptr_t);
1241 ret = dst32 = fasttrap_fuword32((void *)rp->r_esp);
1243 addr = rp->r_esp + sizeof (uint32_t);
1250 fasttrap_sigsegv(p, curthread, rp->r_rsp);
1255 if (tp->ftt_type == FASTTRAP_T_RET16)
1256 addr += tp->ftt_dest;
1263 case FASTTRAP_T_JCC:
1267 switch (tp->ftt_code) {
1269 taken = (rp->r_rflags & FASTTRAP_EFLAGS_OF) != 0;
1272 taken = (rp->r_rflags & FASTTRAP_EFLAGS_OF) == 0;
1275 taken = (rp->r_rflags & FASTTRAP_EFLAGS_CF) != 0;
1278 taken = (rp->r_rflags & FASTTRAP_EFLAGS_CF) == 0;
1281 taken = (rp->r_rflags & FASTTRAP_EFLAGS_ZF) != 0;
1284 taken = (rp->r_rflags & FASTTRAP_EFLAGS_ZF) == 0;
1287 taken = (rp->r_rflags & FASTTRAP_EFLAGS_CF) != 0 ||
1288 (rp->r_rflags & FASTTRAP_EFLAGS_ZF) != 0;
1291 taken = (rp->r_rflags & FASTTRAP_EFLAGS_CF) == 0 &&
1292 (rp->r_rflags & FASTTRAP_EFLAGS_ZF) == 0;
1295 taken = (rp->r_rflags & FASTTRAP_EFLAGS_SF) != 0;
1298 taken = (rp->r_rflags & FASTTRAP_EFLAGS_SF) == 0;
1301 taken = (rp->r_rflags & FASTTRAP_EFLAGS_PF) != 0;
1304 taken = (rp->r_rflags & FASTTRAP_EFLAGS_PF) == 0;
1307 taken = ((rp->r_rflags & FASTTRAP_EFLAGS_SF) == 0) !=
1308 ((rp->r_rflags & FASTTRAP_EFLAGS_OF) == 0);
1311 taken = ((rp->r_rflags & FASTTRAP_EFLAGS_SF) == 0) ==
1312 ((rp->r_rflags & FASTTRAP_EFLAGS_OF) == 0);
1315 taken = (rp->r_rflags & FASTTRAP_EFLAGS_ZF) != 0 ||
1316 ((rp->r_rflags & FASTTRAP_EFLAGS_SF) == 0) !=
1317 ((rp->r_rflags & FASTTRAP_EFLAGS_OF) == 0);
1320 taken = (rp->r_rflags & FASTTRAP_EFLAGS_ZF) == 0 &&
1321 ((rp->r_rflags & FASTTRAP_EFLAGS_SF) == 0) ==
1322 ((rp->r_rflags & FASTTRAP_EFLAGS_OF) == 0);
1328 new_pc = tp->ftt_dest;
1330 new_pc = pc + tp->ftt_size;
1334 case FASTTRAP_T_LOOP:
1338 greg_t cx = rp->r_rcx--;
1340 greg_t cx = rp->r_ecx--;
1343 switch (tp->ftt_code) {
1344 case FASTTRAP_LOOPNZ:
1345 taken = (rp->r_rflags & FASTTRAP_EFLAGS_ZF) == 0 &&
1348 case FASTTRAP_LOOPZ:
1349 taken = (rp->r_rflags & FASTTRAP_EFLAGS_ZF) != 0 &&
1358 new_pc = tp->ftt_dest;
1360 new_pc = pc + tp->ftt_size;
1364 case FASTTRAP_T_JCXZ:
1367 greg_t cx = rp->r_rcx;
1369 greg_t cx = rp->r_ecx;
1373 new_pc = tp->ftt_dest;
1375 new_pc = pc + tp->ftt_size;
1379 case FASTTRAP_T_PUSHL_EBP:
1385 if (p->p_model == DATAMODEL_NATIVE) {
1386 addr = rp->r_rsp - sizeof (uintptr_t);
1387 ret = fasttrap_sulword((void *)addr, &rp->r_rsp);
1391 addr = rp->r_rsp - sizeof (uint32_t);
1392 ret = fasttrap_suword32((void *)addr, &rp->r_rsp);
1399 fasttrap_sigsegv(p, curthread, addr);
1405 new_pc = pc + tp->ftt_size;
1409 case FASTTRAP_T_NOP:
1410 new_pc = pc + tp->ftt_size;
1413 case FASTTRAP_T_JMP:
1414 case FASTTRAP_T_CALL:
1415 if (tp->ftt_code == 0) {
1416 new_pc = tp->ftt_dest;
1421 uintptr_t addr = tp->ftt_dest;
1423 if (tp->ftt_base != FASTTRAP_NOREG)
1424 addr += fasttrap_getreg(rp, tp->ftt_base);
1425 if (tp->ftt_index != FASTTRAP_NOREG)
1426 addr += fasttrap_getreg(rp, tp->ftt_index) <<
1429 if (tp->ftt_code == 1) {
1431 * If there's a segment prefix for this
1432 * instruction, we'll need to check permissions
1433 * and bounds on the given selector, and adjust
1434 * the address accordingly.
1436 if (tp->ftt_segment != FASTTRAP_SEG_NONE &&
1437 fasttrap_do_seg(tp, rp, &addr) != 0) {
1438 fasttrap_sigsegv(p, curthread, addr);
1444 if (p->p_model == DATAMODEL_NATIVE) {
1445 if ((value = fasttrap_fulword((void *)addr))
1447 fasttrap_sigsegv(p, curthread,
1457 addr = (uintptr_t)(uint32_t)addr;
1458 if ((value32 = fasttrap_fuword32((void *)addr))
1460 fasttrap_sigsegv(p, curthread,
1476 * If this is a call instruction, we need to push the return
1477 * address onto the stack. If this fails, we send the process
1478 * a SIGSEGV and reset the pc to emulate what would happen if
1479 * this instruction weren't traced.
1481 if (tp->ftt_type == FASTTRAP_T_CALL) {
1483 uintptr_t addr = 0, pcps;
1485 if (p->p_model == DATAMODEL_NATIVE) {
1486 addr = rp->r_rsp - sizeof (uintptr_t);
1487 pcps = pc + tp->ftt_size;
1488 ret = fasttrap_sulword((void *)addr, &pcps);
1492 addr = rp->r_rsp - sizeof (uint32_t);
1493 pcps = (uint32_t)(pc + tp->ftt_size);
1494 ret = fasttrap_suword32((void *)addr, &pcps);
1501 fasttrap_sigsegv(p, curthread, addr);
1511 case FASTTRAP_T_COMMON:
1514 #if defined(__amd64)
1515 uint8_t scratch[2 * FASTTRAP_MAX_INSTR_SIZE + 22];
1517 uint8_t scratch[2 * FASTTRAP_MAX_INSTR_SIZE + 7];
1521 klwp_t *lwp = ttolwp(curthread);
1525 * Compute the address of the ulwp_t and step over the
1526 * ul_self pointer. The method used to store the user-land
1527 * thread pointer is very different on 32- and 64-bit
1531 #if defined(__amd64)
1532 if (p->p_model == DATAMODEL_LP64) {
1533 addr = lwp->lwp_pcb.pcb_fsbase;
1534 addr += sizeof (void *);
1536 addr = lwp->lwp_pcb.pcb_gsbase;
1537 addr += sizeof (caddr32_t);
1540 addr = USD_GETBASE(&lwp->lwp_pcb.pcb_gsdesc);
1541 addr += sizeof (void *);
1545 addr = USD_GETBASE(&curthread->td_pcb->pcb_gsd);
1547 addr = curthread->td_pcb->pcb_gsbase;
1549 addr += sizeof (void *);
1552 * Generic Instruction Tracing
1553 * ---------------------------
1555 * This is the layout of the scratch space in the user-land
1556 * thread structure for our generated instructions.
1559 * ------------------------ -----
1560 * a: <original instruction> <= 15
1561 * jmp <pc + tp->ftt_size> 5
1562 * b: <original instruction> <= 15
1563 * int T_DTRACE_RET 2
1568 * ------------------------ -----
1569 * a: <original instruction> <= 15
1571 * <pc + tp->ftt_size> 8
1572 * b: <original instruction> <= 15
1573 * int T_DTRACE_RET 2
1577 * The %pc is set to a, and curthread->t_dtrace_astpc is set
1578 * to b. If we encounter a signal on the way out of the
1579 * kernel, trap() will set %pc to curthread->t_dtrace_astpc
1580 * so that we execute the original instruction and re-enter
1581 * the kernel rather than redirecting to the next instruction.
1583 * If there are return probes (so we know that we're going to
1584 * need to reenter the kernel after executing the original
1585 * instruction), the scratch space will just contain the
1586 * original instruction followed by an interrupt -- the same
1589 * %rip-relative Addressing
1590 * ------------------------
1592 * There's a further complication in 64-bit mode due to %rip-
1593 * relative addressing. While this is clearly a beneficial
1594 * architectural decision for position independent code, it's
1595 * hard not to see it as a personal attack against the pid
1596 * provider since before there was a relatively small set of
1597 * instructions to emulate; with %rip-relative addressing,
1598 * almost every instruction can potentially depend on the
1599 * address at which it's executed. Rather than emulating
1600 * the broad spectrum of instructions that can now be
1601 * position dependent, we emulate jumps and others as in
1602 * 32-bit mode, and take a different tack for instructions
1603 * using %rip-relative addressing.
1605 * For every instruction that uses the ModRM byte, the
1606 * in-kernel disassembler reports its location. We use the
1607 * ModRM byte to identify that an instruction uses
1608 * %rip-relative addressing and to see what other registers
1609 * the instruction uses. To emulate those instructions,
1610 * we modify the instruction to be %rax-relative rather than
1611 * %rip-relative (or %rcx-relative if the instruction uses
1612 * %rax; or %r8- or %r9-relative if the REX.B is present so
1613 * we don't have to rewrite the REX prefix). We then load
1614 * the value that %rip would have been into the scratch
1615 * register and generate an instruction to reset the scratch
1616 * register back to its original value. The instruction
1617 * sequence looks like this:
1619 * 64-mode %rip-relative bytes
1620 * ------------------------ -----
1621 * a: <modified instruction> <= 15
1622 * movq $<value>, %<scratch> 6
1624 * <pc + tp->ftt_size> 8
1625 * b: <modified instruction> <= 15
1626 * int T_DTRACE_RET 2
1630 * We set curthread->t_dtrace_regv so that upon receiving
1631 * a signal we can reset the value of the scratch register.
1634 ASSERT(tp->ftt_size < FASTTRAP_MAX_INSTR_SIZE);
1636 curthread->t_dtrace_scrpc = addr;
1637 bcopy(tp->ftt_instr, &scratch[i], tp->ftt_size);
1641 if (tp->ftt_ripmode != 0) {
1644 ASSERT(p->p_model == DATAMODEL_LP64);
1645 ASSERT(tp->ftt_ripmode &
1646 (FASTTRAP_RIP_1 | FASTTRAP_RIP_2));
1649 * If this was a %rip-relative instruction, we change
1650 * it to be either a %rax- or %rcx-relative
1651 * instruction (depending on whether those registers
1652 * are used as another operand; or %r8- or %r9-
1653 * relative depending on the value of REX.B). We then
1654 * set that register and generate a movq instruction
1655 * to reset the value.
1657 if (tp->ftt_ripmode & FASTTRAP_RIP_X)
1658 scratch[i++] = FASTTRAP_REX(1, 0, 0, 1);
1660 scratch[i++] = FASTTRAP_REX(1, 0, 0, 0);
1662 if (tp->ftt_ripmode & FASTTRAP_RIP_1)
1663 scratch[i++] = FASTTRAP_MOV_EAX;
1665 scratch[i++] = FASTTRAP_MOV_ECX;
1667 switch (tp->ftt_ripmode) {
1668 case FASTTRAP_RIP_1:
1670 curthread->t_dtrace_reg = REG_RAX;
1672 case FASTTRAP_RIP_2:
1674 curthread->t_dtrace_reg = REG_RCX;
1676 case FASTTRAP_RIP_1 | FASTTRAP_RIP_X:
1678 curthread->t_dtrace_reg = REG_R8;
1680 case FASTTRAP_RIP_2 | FASTTRAP_RIP_X:
1682 curthread->t_dtrace_reg = REG_R9;
1686 /* LINTED - alignment */
1687 *(uint64_t *)&scratch[i] = *reg;
1688 curthread->t_dtrace_regv = *reg;
1689 *reg = pc + tp->ftt_size;
1690 i += sizeof (uint64_t);
1695 * Generate the branch instruction to what would have
1696 * normally been the subsequent instruction. In 32-bit mode,
1697 * this is just a relative branch; in 64-bit mode this is a
1698 * %rip-relative branch that loads the 64-bit pc value
1699 * immediately after the jmp instruction.
1702 if (p->p_model == DATAMODEL_LP64) {
1703 scratch[i++] = FASTTRAP_GROUP5_OP;
1704 scratch[i++] = FASTTRAP_MODRM(0, 4, 5);
1705 /* LINTED - alignment */
1706 *(uint32_t *)&scratch[i] = 0;
1707 i += sizeof (uint32_t);
1708 /* LINTED - alignment */
1709 *(uint64_t *)&scratch[i] = pc + tp->ftt_size;
1710 i += sizeof (uint64_t);
1715 * Set up the jmp to the next instruction; note that
1716 * the size of the traced instruction cancels out.
1718 scratch[i++] = FASTTRAP_JMP32;
1719 /* LINTED - alignment */
1720 *(uint32_t *)&scratch[i] = pc - addr - 5;
1721 i += sizeof (uint32_t);
1727 curthread->t_dtrace_astpc = addr + i;
1728 bcopy(tp->ftt_instr, &scratch[i], tp->ftt_size);
1730 scratch[i++] = FASTTRAP_INT;
1731 scratch[i++] = T_DTRACE_RET;
1733 ASSERT(i <= sizeof (scratch));
1737 if (fasttrap_copyout(scratch, (char *)addr, i)) {
1739 if (uwrite(curproc, scratch, i, addr)) {
1741 fasttrap_sigtrap(p, curthread, pc);
1745 if (tp->ftt_retids != NULL) {
1746 curthread->t_dtrace_step = 1;
1747 curthread->t_dtrace_ret = 1;
1748 new_pc = curthread->t_dtrace_astpc;
1750 new_pc = curthread->t_dtrace_scrpc;
1753 curthread->t_dtrace_pc = pc;
1754 curthread->t_dtrace_npc = pc + tp->ftt_size;
1755 curthread->t_dtrace_on = 1;
1760 panic("fasttrap: mishandled an instruction");
1765 * If there were no return probes when we first found the tracepoint,
1766 * we should feel no obligation to honor any return probes that were
1767 * subsequently enabled -- they'll just have to wait until the next
1770 if (tp->ftt_retids != NULL) {
1772 * We need to wait until the results of the instruction are
1773 * apparent before invoking any return probes. If this
1774 * instruction was emulated we can just call
1775 * fasttrap_return_common(); if it needs to be executed, we
1776 * need to wait until the user thread returns to the kernel.
1778 if (tp->ftt_type != FASTTRAP_T_COMMON) {
1780 * Set the program counter to the address of the traced
1781 * instruction so that it looks right in ustack()
1782 * output. We had previously set it to the end of the
1783 * instruction to simplify %rip-relative addressing.
1787 fasttrap_return_common(rp, pc, pid, new_pc);
1789 ASSERT(curthread->t_dtrace_ret != 0);
1790 ASSERT(curthread->t_dtrace_pc == pc);
1791 ASSERT(curthread->t_dtrace_scrpc != 0);
1792 ASSERT(new_pc == curthread->t_dtrace_astpc);
1797 set_regs(curthread, rp);
1803 fasttrap_return_probe(struct reg *rp)
1805 proc_t *p = curproc;
1806 uintptr_t pc = curthread->t_dtrace_pc;
1807 uintptr_t npc = curthread->t_dtrace_npc;
1809 curthread->t_dtrace_pc = 0;
1810 curthread->t_dtrace_npc = 0;
1811 curthread->t_dtrace_scrpc = 0;
1812 curthread->t_dtrace_astpc = 0;
1816 * Treat a child created by a call to vfork(2) as if it were its
1817 * parent. We know that there's only one thread of control in such a
1818 * process: this one.
1820 while (p->p_flag & SVFORK) {
1826 * We set rp->r_rip to the address of the traced instruction so
1827 * that it appears to dtrace_probe() that we're on the original
1828 * instruction, and so that the user can't easily detect our
1829 * complex web of lies. dtrace_return_probe() (our caller)
1830 * will correctly set %pc after we return.
1834 fasttrap_return_common(rp, pc, p->p_pid, npc);
1841 fasttrap_pid_getarg(void *arg, dtrace_id_t id, void *parg, int argno,
1846 fill_regs(curthread, &r);
1848 return (fasttrap_anarg(&r, 1, argno));
1853 fasttrap_usdt_getarg(void *arg, dtrace_id_t id, void *parg, int argno,
1858 fill_regs(curthread, &r);
1860 return (fasttrap_anarg(&r, 0, argno));
1864 fasttrap_getreg(struct reg *rp, uint_t reg)
1868 case REG_R15: return (rp->r_r15);
1869 case REG_R14: return (rp->r_r14);
1870 case REG_R13: return (rp->r_r13);
1871 case REG_R12: return (rp->r_r12);
1872 case REG_R11: return (rp->r_r11);
1873 case REG_R10: return (rp->r_r10);
1874 case REG_R9: return (rp->r_r9);
1875 case REG_R8: return (rp->r_r8);
1876 case REG_RDI: return (rp->r_rdi);
1877 case REG_RSI: return (rp->r_rsi);
1878 case REG_RBP: return (rp->r_rbp);
1879 case REG_RBX: return (rp->r_rbx);
1880 case REG_RDX: return (rp->r_rdx);
1881 case REG_RCX: return (rp->r_rcx);
1882 case REG_RAX: return (rp->r_rax);
1883 case REG_TRAPNO: return (rp->r_trapno);
1884 case REG_ERR: return (rp->r_err);
1885 case REG_RIP: return (rp->r_rip);
1886 case REG_CS: return (rp->r_cs);
1888 case REG_RFL: return (rp->r_rfl);
1890 case REG_RSP: return (rp->r_rsp);
1891 case REG_SS: return (rp->r_ss);
1892 case REG_FS: return (rp->r_fs);
1893 case REG_GS: return (rp->r_gs);
1894 case REG_DS: return (rp->r_ds);
1895 case REG_ES: return (rp->r_es);
1896 case REG_FSBASE: return (rdmsr(MSR_FSBASE));
1897 case REG_GSBASE: return (rdmsr(MSR_GSBASE));
1900 panic("dtrace: illegal register constant");
1905 panic("dtrace: illegal register constant");
1907 return (((greg_t *)&rp->r_gs)[reg]);