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38 ***********************license end**************************************/
44 * Configuration and status register (CSR) type definitions for
47 * This file is auto generated. Do not edit.
52 #ifndef __CVMX_RNM_TYPEDEFS_H__
53 #define __CVMX_RNM_TYPEDEFS_H__
55 #define CVMX_RNM_BIST_STATUS (CVMX_ADD_IO_SEG(0x0001180040000008ull))
56 #define CVMX_RNM_CTL_STATUS (CVMX_ADD_IO_SEG(0x0001180040000000ull))
57 #if CVMX_ENABLE_CSR_ADDRESS_CHECKING
58 #define CVMX_RNM_EER_DBG CVMX_RNM_EER_DBG_FUNC()
59 static inline uint64_t CVMX_RNM_EER_DBG_FUNC(void)
61 if (!(OCTEON_IS_MODEL(OCTEON_CN63XX)))
62 cvmx_warn("CVMX_RNM_EER_DBG not supported on this chip\n");
63 return CVMX_ADD_IO_SEG(0x0001180040000018ull);
66 #define CVMX_RNM_EER_DBG (CVMX_ADD_IO_SEG(0x0001180040000018ull))
68 #if CVMX_ENABLE_CSR_ADDRESS_CHECKING
69 #define CVMX_RNM_EER_KEY CVMX_RNM_EER_KEY_FUNC()
70 static inline uint64_t CVMX_RNM_EER_KEY_FUNC(void)
72 if (!(OCTEON_IS_MODEL(OCTEON_CN63XX)))
73 cvmx_warn("CVMX_RNM_EER_KEY not supported on this chip\n");
74 return CVMX_ADD_IO_SEG(0x0001180040000010ull);
77 #define CVMX_RNM_EER_KEY (CVMX_ADD_IO_SEG(0x0001180040000010ull))
79 #if CVMX_ENABLE_CSR_ADDRESS_CHECKING
80 #define CVMX_RNM_SERIAL_NUM CVMX_RNM_SERIAL_NUM_FUNC()
81 static inline uint64_t CVMX_RNM_SERIAL_NUM_FUNC(void)
83 if (!(OCTEON_IS_MODEL(OCTEON_CN63XX)))
84 cvmx_warn("CVMX_RNM_SERIAL_NUM not supported on this chip\n");
85 return CVMX_ADD_IO_SEG(0x0001180040000020ull);
88 #define CVMX_RNM_SERIAL_NUM (CVMX_ADD_IO_SEG(0x0001180040000020ull))
92 * cvmx_rnm_bist_status
94 * RNM_BIST_STATUS = RNM's BIST Status Register
96 * The RNM's Memory Bist Status register.
98 union cvmx_rnm_bist_status
101 struct cvmx_rnm_bist_status_s
103 #if __BYTE_ORDER == __BIG_ENDIAN
104 uint64_t reserved_2_63 : 62;
105 uint64_t rrc : 1; /**< Status of RRC block bist. */
106 uint64_t mem : 1; /**< Status of MEM block bist. */
110 uint64_t reserved_2_63 : 62;
113 struct cvmx_rnm_bist_status_s cn30xx;
114 struct cvmx_rnm_bist_status_s cn31xx;
115 struct cvmx_rnm_bist_status_s cn38xx;
116 struct cvmx_rnm_bist_status_s cn38xxp2;
117 struct cvmx_rnm_bist_status_s cn50xx;
118 struct cvmx_rnm_bist_status_s cn52xx;
119 struct cvmx_rnm_bist_status_s cn52xxp1;
120 struct cvmx_rnm_bist_status_s cn56xx;
121 struct cvmx_rnm_bist_status_s cn56xxp1;
122 struct cvmx_rnm_bist_status_s cn58xx;
123 struct cvmx_rnm_bist_status_s cn58xxp1;
124 struct cvmx_rnm_bist_status_s cn63xx;
125 struct cvmx_rnm_bist_status_s cn63xxp1;
127 typedef union cvmx_rnm_bist_status cvmx_rnm_bist_status_t;
130 * cvmx_rnm_ctl_status
132 * RNM_CTL_STATUS = RNM's Control/Status Register
134 * The RNM's interrupt enable register.
136 union cvmx_rnm_ctl_status
139 struct cvmx_rnm_ctl_status_s
141 #if __BYTE_ORDER == __BIG_ENDIAN
142 uint64_t reserved_11_63 : 53;
143 uint64_t eer_lck : 1; /**< Encryption enable register locked */
144 uint64_t eer_val : 1; /**< Dormant encryption key match */
145 uint64_t ent_sel : 4; /**< ? */
146 uint64_t exp_ent : 1; /**< Exported entropy enable for random number generator */
147 uint64_t rng_rst : 1; /**< Reset RNG as core reset. */
148 uint64_t rnm_rst : 1; /**< Reset the RNM as core reset except for register
150 uint64_t rng_en : 1; /**< Enable the output of the RNG. */
151 uint64_t ent_en : 1; /**< Entropy enable for random number generator. */
155 uint64_t rnm_rst : 1;
156 uint64_t rng_rst : 1;
157 uint64_t exp_ent : 1;
158 uint64_t ent_sel : 4;
159 uint64_t eer_val : 1;
160 uint64_t eer_lck : 1;
161 uint64_t reserved_11_63 : 53;
164 struct cvmx_rnm_ctl_status_cn30xx
166 #if __BYTE_ORDER == __BIG_ENDIAN
167 uint64_t reserved_4_63 : 60;
168 uint64_t rng_rst : 1; /**< Reset RNG as core reset. */
169 uint64_t rnm_rst : 1; /**< Reset the RNM as core reset except for register
171 uint64_t rng_en : 1; /**< Enable the output of the RNG. */
172 uint64_t ent_en : 1; /**< Entropy enable for random number generator. */
176 uint64_t rnm_rst : 1;
177 uint64_t rng_rst : 1;
178 uint64_t reserved_4_63 : 60;
181 struct cvmx_rnm_ctl_status_cn30xx cn31xx;
182 struct cvmx_rnm_ctl_status_cn30xx cn38xx;
183 struct cvmx_rnm_ctl_status_cn30xx cn38xxp2;
184 struct cvmx_rnm_ctl_status_cn50xx
186 #if __BYTE_ORDER == __BIG_ENDIAN
187 uint64_t reserved_9_63 : 55;
188 uint64_t ent_sel : 4; /**< ? */
189 uint64_t exp_ent : 1; /**< Exported entropy enable for random number generator */
190 uint64_t rng_rst : 1; /**< Reset RNG as core reset. */
191 uint64_t rnm_rst : 1; /**< Reset the RNM as core reset except for register
193 uint64_t rng_en : 1; /**< Enable the output of the RNG. */
194 uint64_t ent_en : 1; /**< Entropy enable for random number generator. */
198 uint64_t rnm_rst : 1;
199 uint64_t rng_rst : 1;
200 uint64_t exp_ent : 1;
201 uint64_t ent_sel : 4;
202 uint64_t reserved_9_63 : 55;
205 struct cvmx_rnm_ctl_status_cn50xx cn52xx;
206 struct cvmx_rnm_ctl_status_cn50xx cn52xxp1;
207 struct cvmx_rnm_ctl_status_cn50xx cn56xx;
208 struct cvmx_rnm_ctl_status_cn50xx cn56xxp1;
209 struct cvmx_rnm_ctl_status_cn50xx cn58xx;
210 struct cvmx_rnm_ctl_status_cn50xx cn58xxp1;
211 struct cvmx_rnm_ctl_status_s cn63xx;
212 struct cvmx_rnm_ctl_status_s cn63xxp1;
214 typedef union cvmx_rnm_ctl_status cvmx_rnm_ctl_status_t;
219 * RNM_EER_DBG = RNM's Encryption enable debug register
221 * The RNM's Encryption enable debug register
223 union cvmx_rnm_eer_dbg
226 struct cvmx_rnm_eer_dbg_s
228 #if __BYTE_ORDER == __BIG_ENDIAN
229 uint64_t dat : 64; /**< Dormant encryption debug info. */
234 struct cvmx_rnm_eer_dbg_s cn63xx;
235 struct cvmx_rnm_eer_dbg_s cn63xxp1;
237 typedef union cvmx_rnm_eer_dbg cvmx_rnm_eer_dbg_t;
242 * RNM_EER_KEY = RNM's Encryption enable register
244 * The RNM's Encryption enable register
246 union cvmx_rnm_eer_key
249 struct cvmx_rnm_eer_key_s
251 #if __BYTE_ORDER == __BIG_ENDIAN
252 uint64_t key : 64; /**< Dormant encryption key. If dormant crypto is fuse
253 enabled, crypto can be enable by writing this
254 register with the correct key. */
259 struct cvmx_rnm_eer_key_s cn63xx;
260 struct cvmx_rnm_eer_key_s cn63xxp1;
262 typedef union cvmx_rnm_eer_key cvmx_rnm_eer_key_t;
265 * cvmx_rnm_serial_num
267 * RNM_SERIAL_NUM = RNM's fuse serial number register
269 * The RNM's fuse serial number register
272 * Added RNM_SERIAL_NUM in pass 2.0
275 union cvmx_rnm_serial_num
278 struct cvmx_rnm_serial_num_s
280 #if __BYTE_ORDER == __BIG_ENDIAN
281 uint64_t dat : 64; /**< Dormant encryption serial number */
286 struct cvmx_rnm_serial_num_s cn63xx;
288 typedef union cvmx_rnm_serial_num cvmx_rnm_serial_num_t;