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49 * Interface to the TWSI / I2C bus
51 * Note: Currently on 7 bit device addresses are supported
53 * <hr>$Revision: 70030 $<hr>
57 #ifndef __CVMX_TWSI_H__
58 #define __CVMX_TWSI_H__
65 /* Extra TWSI Bus Opcodes */
66 #define TWSI_SLAVE_ADD 0
69 #define TWSI_CLKCTL_STAT 3 /* R=0 selects CLKCTL, R=1 selects STAT */
70 #define TWSI_STAT 3 /* when R = 1 */
71 #define TWSI_SLAVE_ADD_EXT 4
76 * Do a twsi read from a 7 bit device address using an (optional) internal address.
77 * Up to 8 bytes can be read at a time.
79 * @param twsi_id which Octeon TWSI bus to use
80 * @param dev_addr Device address (7 bit)
81 * @param internal_addr
82 * Internal address. Can be 0, 1 or 2 bytes in width
83 * @param num_bytes Number of data bytes to read
84 * @param ia_width_bytes
85 * Internal address size in bytes (0, 1, or 2)
86 * @param data Pointer argument where the read data is returned.
88 * @return read data returned in 'data' argument
89 * Number of bytes read on success
92 int cvmx_twsix_read_ia(int twsi_id, uint8_t dev_addr, uint16_t internal_addr, int num_bytes, int ia_width_bytes, uint64_t *data);
98 * A convenience wrapper function around cvmx_twsix_read_ia() that
99 * only supports 8 bit internal addresses.
100 * Reads up to 7 bytes, and returns both the value read or error
101 * value in the return value
103 * @param twsi_id which Octeon TWSI bus to use
104 * @param dev_addr Device address (7 bit only)
105 * @param internal_addr
106 * Internal address (8 bit only)
107 * @param num_bytes Number of bytes to read (0-7)
109 * @return Value read from TWSI on success
112 static inline int64_t cvmx_twsix_read_ia8(int twsi_id, uint8_t dev_addr, uint8_t internal_addr, int num_bytes)
115 if (num_bytes < 1 || num_bytes > 7)
117 if (cvmx_twsix_read_ia(twsi_id,dev_addr,internal_addr,num_bytes, 1, &data) < 0)
123 * A convenience wrapper function around cvmx_twsix_read_ia() that
124 * only supports 16 bit internal addresses.
125 * Reads up to 7 bytes, and returns both the value read or error
126 * value in the return value
128 * @param twsi_id which Octeon TWSI bus to use
129 * @param dev_addr Device address (7 bit only)
130 * @param internal_addr
131 * Internal address (16 bit only)
132 * @param num_bytes Number of bytes to read (0-7)
134 * @return Value read from TWSI on success
137 static inline int64_t cvmx_twsix_read_ia16(int twsi_id, uint8_t dev_addr, uint16_t internal_addr, int num_bytes)
140 if (num_bytes < 1 || num_bytes > 7)
142 if (cvmx_twsix_read_ia(twsi_id, dev_addr, internal_addr, num_bytes, 2, &data) < 0)
150 * Read from a TWSI device (7 bit device address only) without generating any
151 * internal addresses.
152 * Read from 1-8 bytes and returns them in the data pointer.
154 * @param twsi_id TWSI interface on Octeon to use
155 * @param dev_addr TWSI device address (7 bit only)
156 * @param num_bytes number of bytes to read
157 * @param data Pointer to data read from TWSI device
159 * @return Number of bytes read on success
162 int cvmx_twsix_read(int twsi_id, uint8_t dev_addr, int num_bytes, uint64_t *data);
167 * Perform a twsi write operation to a 7 bit device address.
169 * Note that many eeprom devices have page restrictions regarding address boundaries
170 * that can be crossed in one write operation. This is device dependent, and this routine
171 * does nothing in this regard.
172 * This command does not generate any internal addressess.
174 * @param twsi_id Octeon TWSI interface to use
175 * @param dev_addr TWSI device address
176 * @param num_bytes Number of bytes to write (between 1 and 8 inclusive)
177 * @param data Data to write
179 * @return 0 on success
182 int cvmx_twsix_write(int twsi_id, uint8_t dev_addr, int num_bytes, uint64_t data);
185 * Write 1-8 bytes to a TWSI device using an internal address.
187 * @param twsi_id which TWSI interface on Octeon to use
188 * @param dev_addr TWSI device address (7 bit only)
189 * @param internal_addr
190 * TWSI internal address (0, 8, or 16 bits)
191 * @param num_bytes Number of bytes to write (1-8)
192 * @param ia_width_bytes
193 * internal address width, in bytes (0, 1, 2)
194 * @param data Data to write. Data is written MSB first on the twsi bus, and only the lower
195 * num_bytes bytes of the argument are valid. (If a 2 byte write is done, only
196 * the low 2 bytes of the argument is used.
198 * @return Number of bytes read on success,
201 int cvmx_twsix_write_ia(int twsi_id, uint8_t dev_addr, uint16_t internal_addr, int num_bytes, int ia_width_bytes, uint64_t data);
203 /***********************************************************************
204 ** Functions below are deprecated, and not recomended for use.
205 ** They have been superceded by more flexible functions that are
207 ************************************************************************/
215 * Read 8-bit from a device on the TWSI / I2C bus
217 * @param twsi_id Which TWSI bus to use. CN3XXX, CN58XX, and CN50XX only
218 * support 0. CN56XX and CN57XX support 0-1.
219 * @param dev_addr I2C device address (7 bit)
220 * @param internal_addr
221 * Internal device address
223 * @return 8-bit data or < 0 in case of error
225 static inline int cvmx_twsix_read8(int twsi_id, uint8_t dev_addr, uint8_t internal_addr)
227 return cvmx_twsix_read_ia8(twsi_id, dev_addr, internal_addr, 1);
231 * Read 8-bit from a device on the TWSI / I2C bus
233 * Uses current internal address
235 * @param twsi_id Which TWSI bus to use. CN3XXX, CN58XX, and CN50XX only
236 * support 0. CN56XX and CN57XX support 0-1.
237 * @param dev_addr I2C device address (7 bit)
239 * @return 8-bit value or < 0 in case of error
241 static inline int cvmx_twsix_read8_cur_addr(int twsi_id, uint8_t dev_addr)
245 if (cvmx_twsix_read(twsi_id,dev_addr, 1, &data) < 0)
251 * Write 8-bit to a device on the TWSI / I2C bus
253 * @param twsi_id Which TWSI bus to use. CN3XXX, CN58XX, and CN50XX only
254 * support 0. CN56XX and CN57XX support 0-1.
255 * @param dev_addr I2C device address (7 bit)
256 * @param internal_addr
257 * Internal device address
258 * @param data Data to be written
260 * @return 0 on success and < 0 in case of error
262 static inline int cvmx_twsix_write8(int twsi_id, uint8_t dev_addr, uint8_t internal_addr, uint8_t data)
264 if (cvmx_twsix_write_ia(twsi_id,dev_addr,internal_addr, 1, 1,data) < 0)
270 * Read 8-bit from a device on the TWSI / I2C bus zero.
272 * This function is for compatibility with SDK 1.6.0 and
273 * before which only supported a single TWSI bus.
275 * @param dev_addr I2C device address (7 bit)
276 * @param internal_addr
277 * Internal device address
279 * @return 8-bit data or < 0 in case of error
281 static inline int cvmx_twsi_read8(uint8_t dev_addr, uint8_t internal_addr)
283 return cvmx_twsix_read8(0, dev_addr, internal_addr);
287 * Read 8-bit from a device on the TWSI / I2C bus zero.
289 * Uses current internal address
291 * This function is for compatibility with SDK 1.6.0 and
292 * before which only supported a single TWSI bus.
294 * @param dev_addr I2C device address (7 bit)
296 * @return 8-bit value or < 0 in case of error
298 static inline int cvmx_twsi_read8_cur_addr(uint8_t dev_addr)
300 return cvmx_twsix_read8_cur_addr(0, dev_addr);
304 * Write 8-bit to a device on the TWSI / I2C bus zero.
305 * This function is for compatibility with SDK 1.6.0 and
306 * before which only supported a single TWSI bus.
308 * @param dev_addr I2C device address (7 bit)
309 * @param internal_addr
310 * Internal device address
311 * @param data Data to be written
313 * @return 0 on success and < 0 in case of error
315 static inline int cvmx_twsi_write8(uint8_t dev_addr, uint8_t internal_addr, uint8_t data)
317 return cvmx_twsix_write8(0, dev_addr, internal_addr, data);
324 #endif /* __CVMX_TWSI_H__ */