1 /***********************license start***************
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38 ***********************license end**************************************/
47 #ifndef __OCTEON_PCI_CONSOLE_H__
48 #define __OCTEON_PCI_CONSOLE_H__
50 #ifndef CVMX_BUILD_FOR_LINUX_KERNEL
51 #include "cvmx-platform.h"
54 /* Current versions */
55 #define OCTEON_PCI_CONSOLE_MAJOR_VERSION 1
56 #define OCTEON_PCI_CONSOLE_MINOR_VERSION 0
58 #define OCTEON_PCI_CONSOLE_BLOCK_NAME "__pci_console"
61 /* Structure that defines a single console.
64 * Note: when read_index == write_index, the buffer is empty. The actual usable size
65 * of each console is console_buf_size -1;
68 uint64_t input_base_addr;
69 uint32_t input_read_index;
70 uint32_t input_write_index;
71 uint64_t output_base_addr;
72 uint32_t output_read_index;
73 uint32_t output_write_index;
76 } octeon_pci_console_t;
79 /* This is the main container structure that contains all the information
80 about all PCI consoles. The address of this structure is passed to various
81 routines that operation on PCI consoles.
84 uint32_t major_version;
85 uint32_t minor_version;
88 uint32_t num_consoles;
90 /* must be 64 bit aligned here... */
91 uint64_t console_addr_array[0]; /* Array of addresses of octeon_pci_console_t structures */
92 /* Implicit storage for console_addr_array */
93 } octeon_pci_console_desc_t;
96 /* Flag definitions for octeon_pci_console_desc_t */
98 OCT_PCI_CON_DESC_FLAG_PERCPU = 1 << 0, /* If set, output from core N will be sent to console N */
101 #if defined(OCTEON_TARGET) && !defined(__linux__)
103 * This is an internal-only function that is called from within the simple executive
104 * C library, and is not intended for any other use.
112 int __cvmx_pci_console_write (int fd, char *buf, int nbytes);
116 #ifdef CVMX_BUILD_FOR_UBOOT
117 uint64_t octeon_pci_console_init(int num_consoles, int buffer_size);
120 /* Flag definitions for read/write functions */
122 OCT_PCI_CON_FLAG_NONBLOCK = 1 << 0, /* If set, read/write functions won't block waiting for space or data.
123 * For reads, 0 bytes may be read, and for writes not all of the
124 * supplied data may be written.*/
127 #if !defined(__linux__) || defined(__KERNEL__)
128 int octeon_pci_console_write(uint64_t console_desc_addr, unsigned int console_num, const char * buffer, int bytes_to_write, uint32_t flags);
129 int octeon_pci_console_write_avail(uint64_t console_desc_addr, unsigned int console_num);
131 int octeon_pci_console_read(uint64_t console_desc_addr, unsigned int console_num, char * buffer, int buffer_size, uint32_t flags);
132 int octeon_pci_console_read_avail(uint64_t console_desc_addr, unsigned int console_num);
135 #if !defined(OCTEON_TARGET) && defined(__linux__) && !defined(__KERNEL__)
136 int octeon_pci_console_host_write(uint64_t console_desc_addr, unsigned int console_num, const char * buffer, int write_reqest_size, uint32_t flags);
137 int octeon_pci_console_host_write_avail(uint64_t console_desc_addr, unsigned int console_num);
139 int octeon_pci_console_host_read(uint64_t console_desc_addr, unsigned int console_num, char * buffer, int buf_size, uint32_t flags);
140 int octeon_pci_console_host_read_avail(uint64_t console_desc_addr, unsigned int console_num);