2 * Copyright (c) 2003-2005 Nate Lawson (SDG)
3 * Copyright (c) 2001 Michael Smith
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28 #include <sys/cdefs.h>
29 __FBSDID("$FreeBSD$");
32 #include <sys/param.h>
35 #include <sys/kernel.h>
36 #include <sys/malloc.h>
37 #include <sys/module.h>
39 #include <sys/power.h>
44 #include <dev/pci/pcivar.h>
45 #include <machine/atomic.h>
46 #include <machine/bus.h>
49 #include <contrib/dev/acpica/include/acpi.h>
50 #include <contrib/dev/acpica/include/accommon.h>
52 #include <dev/acpica/acpivar.h>
55 * Support for ACPI Processor devices, including C[1-3] sleep states.
58 /* Hooks for the ACPI CA debugging infrastructure */
59 #define _COMPONENT ACPI_PROCESSOR
60 ACPI_MODULE_NAME("PROCESSOR")
63 struct resource *p_lvlx; /* Register to read to enter state. */
64 uint32_t type; /* C1-3 (C4 and up treated as C3). */
65 uint32_t trans_lat; /* Transition latency (usec). */
66 uint32_t power; /* Power consumed (mW). */
67 int res_type; /* Resource type for p_lvlx. */
69 #define MAX_CX_STATES 8
71 struct acpi_cpu_softc {
73 ACPI_HANDLE cpu_handle;
74 struct pcpu *cpu_pcpu;
75 uint32_t cpu_acpi_id; /* ACPI processor id */
76 uint32_t cpu_p_blk; /* ACPI P_BLK location */
77 uint32_t cpu_p_blk_len; /* P_BLK length (must be 6). */
78 struct acpi_cx cpu_cx_states[MAX_CX_STATES];
79 int cpu_cx_count; /* Number of valid Cx states. */
80 int cpu_prev_sleep;/* Last idle sleep duration. */
81 int cpu_features; /* Child driver supported features. */
83 int cpu_non_c3; /* Index of lowest non-C3 state. */
84 u_int cpu_cx_stats[MAX_CX_STATES];/* Cx usage history. */
85 /* Values for sysctl. */
86 struct sysctl_ctx_list cpu_sysctl_ctx;
87 struct sysctl_oid *cpu_sysctl_tree;
89 char cpu_cx_supported[64];
93 struct acpi_cpu_device {
94 struct resource_list ad_rl;
97 #define CPU_GET_REG(reg, width) \
98 (bus_space_read_ ## width(rman_get_bustag((reg)), \
99 rman_get_bushandle((reg)), 0))
100 #define CPU_SET_REG(reg, width, val) \
101 (bus_space_write_ ## width(rman_get_bustag((reg)), \
102 rman_get_bushandle((reg)), 0, (val)))
104 #define PM_USEC(x) ((x) >> 2) /* ~4 clocks per usec (3.57955 Mhz) */
106 #define ACPI_NOTIFY_CX_STATES 0x81 /* _CST changed. */
108 #define CPU_QUIRK_NO_C3 (1<<0) /* C3-type states are not usable. */
109 #define CPU_QUIRK_NO_BM_CTRL (1<<2) /* No bus mastering control. */
111 #define PCI_VENDOR_INTEL 0x8086
112 #define PCI_DEVICE_82371AB_3 0x7113 /* PIIX4 chipset for quirks. */
113 #define PCI_REVISION_A_STEP 0
114 #define PCI_REVISION_B_STEP 1
115 #define PCI_REVISION_4E 2
116 #define PCI_REVISION_4M 3
117 #define PIIX4_DEVACTB_REG 0x58
118 #define PIIX4_BRLD_EN_IRQ0 (1<<0)
119 #define PIIX4_BRLD_EN_IRQ (1<<1)
120 #define PIIX4_BRLD_EN_IRQ8 (1<<5)
121 #define PIIX4_STOP_BREAK_MASK (PIIX4_BRLD_EN_IRQ0 | PIIX4_BRLD_EN_IRQ | PIIX4_BRLD_EN_IRQ8)
122 #define PIIX4_PCNTRL_BST_EN (1<<10)
124 /* Platform hardware resource information. */
125 static uint32_t cpu_smi_cmd; /* Value to write to SMI_CMD. */
126 static uint8_t cpu_cst_cnt; /* Indicate we are _CST aware. */
127 static int cpu_quirks; /* Indicate any hardware bugs. */
130 static int cpu_disable_idle; /* Disable entry to idle function */
131 static int cpu_cx_count; /* Number of valid Cx states */
133 /* Values for sysctl. */
134 static struct sysctl_ctx_list cpu_sysctl_ctx;
135 static struct sysctl_oid *cpu_sysctl_tree;
136 static int cpu_cx_generic;
137 static int cpu_cx_lowest;
139 static device_t *cpu_devices;
140 static int cpu_ndevices;
141 static struct acpi_cpu_softc **cpu_softc;
142 ACPI_SERIAL_DECL(cpu, "ACPI CPU");
144 static int acpi_cpu_probe(device_t dev);
145 static int acpi_cpu_attach(device_t dev);
146 static int acpi_cpu_suspend(device_t dev);
147 static int acpi_cpu_resume(device_t dev);
148 static int acpi_pcpu_get_id(uint32_t idx, uint32_t *acpi_id,
150 static struct resource_list *acpi_cpu_get_rlist(device_t dev, device_t child);
151 static device_t acpi_cpu_add_child(device_t dev, u_int order, const char *name,
153 static int acpi_cpu_read_ivar(device_t dev, device_t child, int index,
155 static int acpi_cpu_shutdown(device_t dev);
156 static void acpi_cpu_cx_probe(struct acpi_cpu_softc *sc);
157 static void acpi_cpu_generic_cx_probe(struct acpi_cpu_softc *sc);
158 static int acpi_cpu_cx_cst(struct acpi_cpu_softc *sc);
159 static void acpi_cpu_startup(void *arg);
160 static void acpi_cpu_startup_cx(struct acpi_cpu_softc *sc);
161 static void acpi_cpu_cx_list(struct acpi_cpu_softc *sc);
162 static void acpi_cpu_idle(void);
163 static void acpi_cpu_notify(ACPI_HANDLE h, UINT32 notify, void *context);
164 static int acpi_cpu_quirks(void);
165 static int acpi_cpu_usage_sysctl(SYSCTL_HANDLER_ARGS);
166 static int acpi_cpu_set_cx_lowest(struct acpi_cpu_softc *sc, int val);
167 static int acpi_cpu_cx_lowest_sysctl(SYSCTL_HANDLER_ARGS);
168 static int acpi_cpu_global_cx_lowest_sysctl(SYSCTL_HANDLER_ARGS);
170 static device_method_t acpi_cpu_methods[] = {
171 /* Device interface */
172 DEVMETHOD(device_probe, acpi_cpu_probe),
173 DEVMETHOD(device_attach, acpi_cpu_attach),
174 DEVMETHOD(device_detach, bus_generic_detach),
175 DEVMETHOD(device_shutdown, acpi_cpu_shutdown),
176 DEVMETHOD(device_suspend, acpi_cpu_suspend),
177 DEVMETHOD(device_resume, acpi_cpu_resume),
180 DEVMETHOD(bus_add_child, acpi_cpu_add_child),
181 DEVMETHOD(bus_read_ivar, acpi_cpu_read_ivar),
182 DEVMETHOD(bus_get_resource_list, acpi_cpu_get_rlist),
183 DEVMETHOD(bus_get_resource, bus_generic_rl_get_resource),
184 DEVMETHOD(bus_set_resource, bus_generic_rl_set_resource),
185 DEVMETHOD(bus_alloc_resource, bus_generic_rl_alloc_resource),
186 DEVMETHOD(bus_release_resource, bus_generic_rl_release_resource),
187 DEVMETHOD(bus_driver_added, bus_generic_driver_added),
188 DEVMETHOD(bus_activate_resource, bus_generic_activate_resource),
189 DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource),
190 DEVMETHOD(bus_setup_intr, bus_generic_setup_intr),
191 DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr),
196 static driver_t acpi_cpu_driver = {
199 sizeof(struct acpi_cpu_softc),
202 static devclass_t acpi_cpu_devclass;
203 DRIVER_MODULE(cpu, acpi, acpi_cpu_driver, acpi_cpu_devclass, 0, 0);
204 MODULE_DEPEND(cpu, acpi, 1, 1, 1);
207 acpi_cpu_probe(device_t dev)
215 if (acpi_disabled("cpu") || acpi_get_type(dev) != ACPI_TYPE_PROCESSOR)
218 handle = acpi_get_handle(dev);
219 if (cpu_softc == NULL)
220 cpu_softc = malloc(sizeof(struct acpi_cpu_softc *) *
221 (mp_maxid + 1), M_TEMP /* XXX */, M_WAITOK | M_ZERO);
223 /* Get our Processor object. */
225 buf.Length = ACPI_ALLOCATE_BUFFER;
226 status = AcpiEvaluateObject(handle, NULL, NULL, &buf);
227 if (ACPI_FAILURE(status)) {
228 device_printf(dev, "probe failed to get Processor obj - %s\n",
229 AcpiFormatException(status));
232 obj = (ACPI_OBJECT *)buf.Pointer;
233 if (obj->Type != ACPI_TYPE_PROCESSOR) {
234 device_printf(dev, "Processor object has bad type %d\n", obj->Type);
240 * Find the processor associated with our unit. We could use the
241 * ProcId as a key, however, some boxes do not have the same values
242 * in their Processor object as the ProcId values in the MADT.
244 acpi_id = obj->Processor.ProcId;
246 if (acpi_pcpu_get_id(device_get_unit(dev), &acpi_id, &cpu_id) != 0)
250 * Check if we already probed this processor. We scan the bus twice
251 * so it's possible we've already seen this one.
253 if (cpu_softc[cpu_id] != NULL)
256 /* Mark this processor as in-use and save our derived id for attach. */
257 cpu_softc[cpu_id] = (void *)1;
258 acpi_set_private(dev, (void*)(intptr_t)cpu_id);
259 device_set_desc(dev, "ACPI CPU");
265 acpi_cpu_attach(device_t dev)
268 ACPI_OBJECT arg[4], *obj;
269 ACPI_OBJECT_LIST arglist;
270 struct pcpu *pcpu_data;
271 struct acpi_cpu_softc *sc;
272 struct acpi_softc *acpi_sc;
275 int cpu_id, drv_count, i;
279 /* UUID needed by _OSC evaluation */
280 static uint8_t cpu_oscuuid[16] = { 0x16, 0xA6, 0x77, 0x40, 0x0C, 0x29,
281 0xBE, 0x47, 0x9E, 0xBD, 0xD8, 0x70,
282 0x58, 0x71, 0x39, 0x53 };
284 ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__);
286 sc = device_get_softc(dev);
288 sc->cpu_handle = acpi_get_handle(dev);
289 cpu_id = (int)(intptr_t)acpi_get_private(dev);
290 cpu_softc[cpu_id] = sc;
291 pcpu_data = pcpu_find(cpu_id);
292 pcpu_data->pc_device = dev;
293 sc->cpu_pcpu = pcpu_data;
294 cpu_smi_cmd = AcpiGbl_FADT.SmiCommand;
295 cpu_cst_cnt = AcpiGbl_FADT.CstControl;
298 buf.Length = ACPI_ALLOCATE_BUFFER;
299 status = AcpiEvaluateObject(sc->cpu_handle, NULL, NULL, &buf);
300 if (ACPI_FAILURE(status)) {
301 device_printf(dev, "attach failed to get Processor obj - %s\n",
302 AcpiFormatException(status));
305 obj = (ACPI_OBJECT *)buf.Pointer;
306 sc->cpu_p_blk = obj->Processor.PblkAddress;
307 sc->cpu_p_blk_len = obj->Processor.PblkLength;
308 sc->cpu_acpi_id = obj->Processor.ProcId;
310 ACPI_DEBUG_PRINT((ACPI_DB_INFO, "acpi_cpu%d: P_BLK at %#x/%d\n",
311 device_get_unit(dev), sc->cpu_p_blk, sc->cpu_p_blk_len));
314 * If this is the first cpu we attach, create and initialize the generic
315 * resources that will be used by all acpi cpu devices.
317 if (device_get_unit(dev) == 0) {
318 /* Assume we won't be using generic Cx mode by default */
319 cpu_cx_generic = FALSE;
321 /* Install hw.acpi.cpu sysctl tree */
322 acpi_sc = acpi_device_get_parent_softc(dev);
323 sysctl_ctx_init(&cpu_sysctl_ctx);
324 cpu_sysctl_tree = SYSCTL_ADD_NODE(&cpu_sysctl_ctx,
325 SYSCTL_CHILDREN(acpi_sc->acpi_sysctl_tree), OID_AUTO, "cpu",
326 CTLFLAG_RD, 0, "node for CPU children");
328 /* Queue post cpu-probing task handler */
329 AcpiOsExecute(OSL_NOTIFY_HANDLER, acpi_cpu_startup, NULL);
333 * Before calling any CPU methods, collect child driver feature hints
334 * and notify ACPI of them. We support unified SMP power control
335 * so advertise this ourselves. Note this is not the same as independent
336 * SMP control where each CPU can have different settings.
338 sc->cpu_features = ACPI_CAP_SMP_SAME | ACPI_CAP_SMP_SAME_C3;
339 if (devclass_get_drivers(acpi_cpu_devclass, &drivers, &drv_count) == 0) {
340 for (i = 0; i < drv_count; i++) {
341 if (ACPI_GET_FEATURES(drivers[i], &features) == 0)
342 sc->cpu_features |= features;
344 free(drivers, M_TEMP);
348 * CPU capabilities are specified in
349 * Intel Processor Vendor-Specific ACPI Interface Specification.
351 if (sc->cpu_features) {
352 arglist.Pointer = arg;
354 arg[0].Type = ACPI_TYPE_BUFFER;
355 arg[0].Buffer.Length = sizeof(cpu_oscuuid);
356 arg[0].Buffer.Pointer = cpu_oscuuid; /* UUID */
357 arg[1].Type = ACPI_TYPE_INTEGER;
358 arg[1].Integer.Value = 1; /* revision */
359 arg[2].Type = ACPI_TYPE_INTEGER;
360 arg[2].Integer.Value = 1; /* count */
361 arg[3].Type = ACPI_TYPE_BUFFER;
362 arg[3].Buffer.Length = sizeof(cap_set); /* Capabilities buffer */
363 arg[3].Buffer.Pointer = (uint8_t *)cap_set;
364 cap_set[0] = 0; /* status */
365 cap_set[1] = sc->cpu_features;
366 status = AcpiEvaluateObject(sc->cpu_handle, "_OSC", &arglist, NULL);
367 if (ACPI_SUCCESS(status)) {
369 device_printf(dev, "_OSC returned status %#x\n", cap_set[0]);
372 arglist.Pointer = arg;
374 arg[0].Type = ACPI_TYPE_BUFFER;
375 arg[0].Buffer.Length = sizeof(cap_set);
376 arg[0].Buffer.Pointer = (uint8_t *)cap_set;
377 cap_set[0] = 1; /* revision */
378 cap_set[1] = 1; /* number of capabilities integers */
379 cap_set[2] = sc->cpu_features;
380 AcpiEvaluateObject(sc->cpu_handle, "_PDC", &arglist, NULL);
384 /* Probe for Cx state support. */
385 acpi_cpu_cx_probe(sc);
391 acpi_cpu_postattach(void *unused __unused)
397 err = devclass_get_devices(acpi_cpu_devclass, &devices, &n);
399 printf("devclass_get_devices(acpi_cpu_devclass) failed\n");
402 for (i = 0; i < n; i++)
403 bus_generic_probe(devices[i]);
404 for (i = 0; i < n; i++)
405 bus_generic_attach(devices[i]);
406 free(devices, M_TEMP);
409 SYSINIT(acpi_cpu, SI_SUB_CONFIGURE, SI_ORDER_MIDDLE,
410 acpi_cpu_postattach, NULL);
413 * Disable any entry to the idle function during suspend and re-enable it
417 acpi_cpu_suspend(device_t dev)
421 error = bus_generic_suspend(dev);
424 cpu_disable_idle = TRUE;
429 acpi_cpu_resume(device_t dev)
432 cpu_disable_idle = FALSE;
433 return (bus_generic_resume(dev));
437 * Find the nth present CPU and return its pc_cpuid as well as set the
438 * pc_acpi_id from the most reliable source.
441 acpi_pcpu_get_id(uint32_t idx, uint32_t *acpi_id, uint32_t *cpu_id)
443 struct pcpu *pcpu_data;
446 KASSERT(acpi_id != NULL, ("Null acpi_id"));
447 KASSERT(cpu_id != NULL, ("Null cpu_id"));
449 pcpu_data = pcpu_find(i);
450 KASSERT(pcpu_data != NULL, ("no pcpu data for %d", i));
453 * If pc_acpi_id was not initialized (e.g., a non-APIC UP box)
454 * override it with the value from the ASL. Otherwise, if the
455 * two don't match, prefer the MADT-derived value. Finally,
456 * return the pc_cpuid to reference this processor.
458 if (pcpu_data->pc_acpi_id == 0xffffffff)
459 pcpu_data->pc_acpi_id = *acpi_id;
460 else if (pcpu_data->pc_acpi_id != *acpi_id)
461 *acpi_id = pcpu_data->pc_acpi_id;
462 *cpu_id = pcpu_data->pc_cpuid;
470 static struct resource_list *
471 acpi_cpu_get_rlist(device_t dev, device_t child)
473 struct acpi_cpu_device *ad;
475 ad = device_get_ivars(child);
482 acpi_cpu_add_child(device_t dev, u_int order, const char *name, int unit)
484 struct acpi_cpu_device *ad;
487 if ((ad = malloc(sizeof(*ad), M_TEMP, M_NOWAIT | M_ZERO)) == NULL)
490 resource_list_init(&ad->ad_rl);
492 child = device_add_child_ordered(dev, order, name, unit);
494 device_set_ivars(child, ad);
501 acpi_cpu_read_ivar(device_t dev, device_t child, int index, uintptr_t *result)
503 struct acpi_cpu_softc *sc;
505 sc = device_get_softc(dev);
507 case ACPI_IVAR_HANDLE:
508 *result = (uintptr_t)sc->cpu_handle;
511 *result = (uintptr_t)sc->cpu_pcpu;
520 acpi_cpu_shutdown(device_t dev)
522 ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__);
524 /* Allow children to shutdown first. */
525 bus_generic_shutdown(dev);
528 * Disable any entry to the idle function. There is a small race where
529 * an idle thread have passed this check but not gone to sleep. This
530 * is ok since device_shutdown() does not free the softc, otherwise
531 * we'd have to be sure all threads were evicted before returning.
533 cpu_disable_idle = TRUE;
539 acpi_cpu_cx_probe(struct acpi_cpu_softc *sc)
541 ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__);
543 /* Use initial sleep value of 1 sec. to start with lowest idle state. */
544 sc->cpu_prev_sleep = 1000000;
545 sc->cpu_cx_lowest = 0;
548 * Check for the ACPI 2.0 _CST sleep states object. If we can't find
549 * any, we'll revert to generic FADT/P_BLK Cx control method which will
550 * be handled by acpi_cpu_startup. We need to defer to after having
551 * probed all the cpus in the system before probing for generic Cx
552 * states as we may already have found cpus with valid _CST packages
554 if (!cpu_cx_generic && acpi_cpu_cx_cst(sc) != 0) {
556 * We were unable to find a _CST package for this cpu or there
557 * was an error parsing it. Switch back to generic mode.
559 cpu_cx_generic = TRUE;
561 device_printf(sc->cpu_dev, "switching to generic Cx mode\n");
565 * TODO: _CSD Package should be checked here.
570 acpi_cpu_generic_cx_probe(struct acpi_cpu_softc *sc)
572 ACPI_GENERIC_ADDRESS gas;
573 struct acpi_cx *cx_ptr;
575 sc->cpu_cx_count = 0;
576 cx_ptr = sc->cpu_cx_states;
578 /* Use initial sleep value of 1 sec. to start with lowest idle state. */
579 sc->cpu_prev_sleep = 1000000;
581 /* C1 has been required since just after ACPI 1.0 */
582 cx_ptr->type = ACPI_STATE_C1;
583 cx_ptr->trans_lat = 0;
588 * The spec says P_BLK must be 6 bytes long. However, some systems
589 * use it to indicate a fractional set of features present so we
590 * take 5 as C2. Some may also have a value of 7 to indicate
591 * another C3 but most use _CST for this (as required) and having
592 * "only" C1-C3 is not a hardship.
594 if (sc->cpu_p_blk_len < 5)
597 /* Validate and allocate resources for C2 (P_LVL2). */
598 gas.SpaceId = ACPI_ADR_SPACE_SYSTEM_IO;
600 if (AcpiGbl_FADT.C2Latency <= 100) {
601 gas.Address = sc->cpu_p_blk + 4;
602 acpi_bus_alloc_gas(sc->cpu_dev, &cx_ptr->res_type, &sc->cpu_rid,
603 &gas, &cx_ptr->p_lvlx, RF_SHAREABLE);
604 if (cx_ptr->p_lvlx != NULL) {
606 cx_ptr->type = ACPI_STATE_C2;
607 cx_ptr->trans_lat = AcpiGbl_FADT.C2Latency;
612 if (sc->cpu_p_blk_len < 6)
615 /* Validate and allocate resources for C3 (P_LVL3). */
616 if (AcpiGbl_FADT.C3Latency <= 1000 && !(cpu_quirks & CPU_QUIRK_NO_C3)) {
617 gas.Address = sc->cpu_p_blk + 5;
618 acpi_bus_alloc_gas(sc->cpu_dev, &cx_ptr->res_type, &sc->cpu_rid, &gas,
619 &cx_ptr->p_lvlx, RF_SHAREABLE);
620 if (cx_ptr->p_lvlx != NULL) {
622 cx_ptr->type = ACPI_STATE_C3;
623 cx_ptr->trans_lat = AcpiGbl_FADT.C3Latency;
631 * Parse a _CST package and set up its Cx states. Since the _CST object
632 * can change dynamically, our notify handler may call this function
633 * to clean up and probe the new _CST package.
636 acpi_cpu_cx_cst(struct acpi_cpu_softc *sc)
638 struct acpi_cx *cx_ptr;
646 ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__);
649 buf.Length = ACPI_ALLOCATE_BUFFER;
650 status = AcpiEvaluateObject(sc->cpu_handle, "_CST", NULL, &buf);
651 if (ACPI_FAILURE(status))
654 /* _CST is a package with a count and at least one Cx package. */
655 top = (ACPI_OBJECT *)buf.Pointer;
656 if (!ACPI_PKG_VALID(top, 2) || acpi_PkgInt32(top, 0, &count) != 0) {
657 device_printf(sc->cpu_dev, "invalid _CST package\n");
658 AcpiOsFree(buf.Pointer);
661 if (count != top->Package.Count - 1) {
662 device_printf(sc->cpu_dev, "invalid _CST state count (%d != %d)\n",
663 count, top->Package.Count - 1);
664 count = top->Package.Count - 1;
666 if (count > MAX_CX_STATES) {
667 device_printf(sc->cpu_dev, "_CST has too many states (%d)\n", count);
668 count = MAX_CX_STATES;
671 /* Set up all valid states. */
672 sc->cpu_cx_count = 0;
673 cx_ptr = sc->cpu_cx_states;
674 for (i = 0; i < count; i++) {
675 pkg = &top->Package.Elements[i + 1];
676 if (!ACPI_PKG_VALID(pkg, 4) ||
677 acpi_PkgInt32(pkg, 1, &cx_ptr->type) != 0 ||
678 acpi_PkgInt32(pkg, 2, &cx_ptr->trans_lat) != 0 ||
679 acpi_PkgInt32(pkg, 3, &cx_ptr->power) != 0) {
681 device_printf(sc->cpu_dev, "skipping invalid Cx state package\n");
685 /* Validate the state to see if we should use it. */
686 switch (cx_ptr->type) {
697 if ((cpu_quirks & CPU_QUIRK_NO_C3) != 0) {
698 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
699 "acpi_cpu%d: C3[%d] not available.\n",
700 device_get_unit(sc->cpu_dev), i));
707 /* Free up any previous register. */
708 if (cx_ptr->p_lvlx != NULL) {
709 bus_release_resource(sc->cpu_dev, 0, 0, cx_ptr->p_lvlx);
710 cx_ptr->p_lvlx = NULL;
714 /* Allocate the control register for C2 or C3. */
715 acpi_PkgGas(sc->cpu_dev, pkg, 0, &cx_ptr->res_type, &sc->cpu_rid,
716 &cx_ptr->p_lvlx, RF_SHAREABLE);
717 if (cx_ptr->p_lvlx) {
719 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
720 "acpi_cpu%d: Got C%d - %d latency\n",
721 device_get_unit(sc->cpu_dev), cx_ptr->type,
727 AcpiOsFree(buf.Pointer);
733 * Call this *after* all CPUs have been attached.
736 acpi_cpu_startup(void *arg)
738 struct acpi_cpu_softc *sc;
741 /* Get set of CPU devices */
742 devclass_get_devices(acpi_cpu_devclass, &cpu_devices, &cpu_ndevices);
745 * Setup any quirks that might necessary now that we have probed
751 if (cpu_cx_generic) {
753 * We are using generic Cx mode, probe for available Cx states
754 * for all processors.
756 for (i = 0; i < cpu_ndevices; i++) {
757 sc = device_get_softc(cpu_devices[i]);
758 acpi_cpu_generic_cx_probe(sc);
759 if (sc->cpu_cx_count > cpu_cx_count)
760 cpu_cx_count = sc->cpu_cx_count;
764 * Find the highest Cx state common to all CPUs
765 * in the system, taking quirks into account.
767 for (i = 0; i < cpu_ndevices; i++) {
768 sc = device_get_softc(cpu_devices[i]);
769 if (sc->cpu_cx_count < cpu_cx_count)
770 cpu_cx_count = sc->cpu_cx_count;
774 * We are using _CST mode, remove C3 state if necessary.
775 * Update the largest Cx state supported in the global cpu_cx_count.
776 * It will be used in the global Cx sysctl handler.
777 * As we now know for sure that we will be using _CST mode
778 * install our notify handler.
780 for (i = 0; i < cpu_ndevices; i++) {
781 sc = device_get_softc(cpu_devices[i]);
782 if (cpu_quirks & CPU_QUIRK_NO_C3) {
783 sc->cpu_cx_count = sc->cpu_non_c3 + 1;
785 if (sc->cpu_cx_count > cpu_cx_count)
786 cpu_cx_count = sc->cpu_cx_count;
787 AcpiInstallNotifyHandler(sc->cpu_handle, ACPI_DEVICE_NOTIFY,
788 acpi_cpu_notify, sc);
792 /* Perform Cx final initialization. */
793 for (i = 0; i < cpu_ndevices; i++) {
794 sc = device_get_softc(cpu_devices[i]);
795 acpi_cpu_startup_cx(sc);
798 /* Add a sysctl handler to handle global Cx lowest setting */
799 SYSCTL_ADD_PROC(&cpu_sysctl_ctx, SYSCTL_CHILDREN(cpu_sysctl_tree),
800 OID_AUTO, "cx_lowest", CTLTYPE_STRING | CTLFLAG_RW,
801 NULL, 0, acpi_cpu_global_cx_lowest_sysctl, "A",
802 "Global lowest Cx sleep state to use");
804 /* Take over idling from cpu_idle_default(). */
806 cpu_disable_idle = FALSE;
807 cpu_idle_hook = acpi_cpu_idle;
811 acpi_cpu_cx_list(struct acpi_cpu_softc *sc)
817 * Set up the list of Cx states
820 sbuf_new(&sb, sc->cpu_cx_supported, sizeof(sc->cpu_cx_supported),
822 for (i = 0; i < sc->cpu_cx_count; i++) {
823 sbuf_printf(&sb, "C%d/%d ", i + 1, sc->cpu_cx_states[i].trans_lat);
824 if (sc->cpu_cx_states[i].type < ACPI_STATE_C3)
832 acpi_cpu_startup_cx(struct acpi_cpu_softc *sc)
834 acpi_cpu_cx_list(sc);
836 SYSCTL_ADD_STRING(&sc->cpu_sysctl_ctx,
837 SYSCTL_CHILDREN(device_get_sysctl_tree(sc->cpu_dev)),
838 OID_AUTO, "cx_supported", CTLFLAG_RD,
839 sc->cpu_cx_supported, 0,
840 "Cx/microsecond values for supported Cx states");
841 SYSCTL_ADD_PROC(&sc->cpu_sysctl_ctx,
842 SYSCTL_CHILDREN(device_get_sysctl_tree(sc->cpu_dev)),
843 OID_AUTO, "cx_lowest", CTLTYPE_STRING | CTLFLAG_RW,
844 (void *)sc, 0, acpi_cpu_cx_lowest_sysctl, "A",
845 "lowest Cx sleep state to use");
846 SYSCTL_ADD_PROC(&sc->cpu_sysctl_ctx,
847 SYSCTL_CHILDREN(device_get_sysctl_tree(sc->cpu_dev)),
848 OID_AUTO, "cx_usage", CTLTYPE_STRING | CTLFLAG_RD,
849 (void *)sc, 0, acpi_cpu_usage_sysctl, "A",
850 "percent usage for each Cx state");
853 /* Signal platform that we can handle _CST notification. */
854 if (!cpu_cx_generic && cpu_cst_cnt != 0) {
856 AcpiOsWritePort(cpu_smi_cmd, cpu_cst_cnt, 8);
863 * Idle the CPU in the lowest state possible. This function is called with
864 * interrupts disabled. Note that once it re-enables interrupts, a task
865 * switch can occur so do not access shared data (i.e. the softc) after
866 * interrupts are re-enabled.
871 struct acpi_cpu_softc *sc;
872 struct acpi_cx *cx_next;
873 uint32_t start_time, end_time;
874 int bm_active, cx_next_idx, i;
876 /* If disabled, return immediately. */
877 if (cpu_disable_idle) {
883 * Look up our CPU id to get our softc. If it's NULL, we'll use C1
884 * since there is no ACPI processor object for this CPU. This occurs
885 * for logical CPUs in the HTT case.
887 sc = cpu_softc[PCPU_GET(cpuid)];
893 /* Find the lowest state that has small enough latency. */
895 for (i = sc->cpu_cx_lowest; i >= 0; i--) {
896 if (sc->cpu_cx_states[i].trans_lat * 3 <= sc->cpu_prev_sleep) {
903 * Check for bus master activity. If there was activity, clear
904 * the bit and use the lowest non-C3 state. Note that the USB
905 * driver polling for new devices keeps this bit set all the
906 * time if USB is loaded.
908 if ((cpu_quirks & CPU_QUIRK_NO_BM_CTRL) == 0) {
909 AcpiReadBitRegister(ACPI_BITREG_BUS_MASTER_STATUS, &bm_active);
910 if (bm_active != 0) {
911 AcpiWriteBitRegister(ACPI_BITREG_BUS_MASTER_STATUS, 1);
912 cx_next_idx = min(cx_next_idx, sc->cpu_non_c3);
916 /* Select the next state and update statistics. */
917 cx_next = &sc->cpu_cx_states[cx_next_idx];
918 sc->cpu_cx_stats[cx_next_idx]++;
919 KASSERT(cx_next->type != ACPI_STATE_C0, ("acpi_cpu_idle: C0 sleep"));
922 * Execute HLT (or equivalent) and wait for an interrupt. We can't
923 * precisely calculate the time spent in C1 since the place we wake up
924 * is an ISR. Assume we slept no more then half of quantum.
926 if (cx_next->type == ACPI_STATE_C1) {
927 AcpiHwRead(&start_time, &AcpiGbl_FADT.XPmTimerBlock);
929 AcpiHwRead(&end_time, &AcpiGbl_FADT.XPmTimerBlock);
930 end_time = acpi_TimerDelta(end_time, start_time);
931 sc->cpu_prev_sleep = (sc->cpu_prev_sleep * 3 +
932 min(PM_USEC(end_time), 500000 / hz)) / 4;
937 * For C3, disable bus master arbitration and enable bus master wake
938 * if BM control is available, otherwise flush the CPU cache.
940 if (cx_next->type == ACPI_STATE_C3) {
941 if ((cpu_quirks & CPU_QUIRK_NO_BM_CTRL) == 0) {
942 AcpiWriteBitRegister(ACPI_BITREG_ARB_DISABLE, 1);
943 AcpiWriteBitRegister(ACPI_BITREG_BUS_MASTER_RLD, 1);
945 ACPI_FLUSH_CPU_CACHE();
949 * Read from P_LVLx to enter C2(+), checking time spent asleep.
950 * Use the ACPI timer for measuring sleep time. Since we need to
951 * get the time very close to the CPU start/stop clock logic, this
952 * is the only reliable time source.
954 AcpiHwRead(&start_time, &AcpiGbl_FADT.XPmTimerBlock);
955 CPU_GET_REG(cx_next->p_lvlx, 1);
958 * Read the end time twice. Since it may take an arbitrary time
959 * to enter the idle state, the first read may be executed before
960 * the processor has stopped. Doing it again provides enough
961 * margin that we are certain to have a correct value.
963 AcpiHwRead(&end_time, &AcpiGbl_FADT.XPmTimerBlock);
964 AcpiHwRead(&end_time, &AcpiGbl_FADT.XPmTimerBlock);
966 /* Enable bus master arbitration and disable bus master wakeup. */
967 if (cx_next->type == ACPI_STATE_C3 &&
968 (cpu_quirks & CPU_QUIRK_NO_BM_CTRL) == 0) {
969 AcpiWriteBitRegister(ACPI_BITREG_ARB_DISABLE, 0);
970 AcpiWriteBitRegister(ACPI_BITREG_BUS_MASTER_RLD, 0);
974 /* Find the actual time asleep in microseconds. */
975 end_time = acpi_TimerDelta(end_time, start_time);
976 sc->cpu_prev_sleep = (sc->cpu_prev_sleep * 3 + PM_USEC(end_time)) / 4;
980 * Re-evaluate the _CST object when we are notified that it changed.
982 * XXX Re-evaluation disabled until locking is done.
985 acpi_cpu_notify(ACPI_HANDLE h, UINT32 notify, void *context)
987 struct acpi_cpu_softc *sc = (struct acpi_cpu_softc *)context;
988 struct acpi_cpu_softc *isc;
991 if (notify != ACPI_NOTIFY_CX_STATES)
994 /* Update the list of Cx states. */
996 acpi_cpu_cx_list(sc);
998 /* Update the new lowest useable Cx state for all CPUs. */
999 ACPI_SERIAL_BEGIN(cpu);
1001 for (i = 0; i < cpu_ndevices; i++) {
1002 isc = device_get_softc(cpu_devices[i]);
1003 if (isc->cpu_cx_count > cpu_cx_count)
1004 cpu_cx_count = isc->cpu_cx_count;
1006 if (sc->cpu_cx_lowest < cpu_cx_lowest)
1007 acpi_cpu_set_cx_lowest(sc, min(cpu_cx_lowest, sc->cpu_cx_count - 1));
1008 ACPI_SERIAL_END(cpu);
1012 acpi_cpu_quirks(void)
1017 ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__);
1020 * Bus mastering arbitration control is needed to keep caches coherent
1021 * while sleeping in C3. If it's not present but a working flush cache
1022 * instruction is present, flush the caches before entering C3 instead.
1023 * Otherwise, just disable C3 completely.
1025 if (AcpiGbl_FADT.Pm2ControlBlock == 0 ||
1026 AcpiGbl_FADT.Pm2ControlLength == 0) {
1027 if ((AcpiGbl_FADT.Flags & ACPI_FADT_WBINVD) &&
1028 (AcpiGbl_FADT.Flags & ACPI_FADT_WBINVD_FLUSH) == 0) {
1029 cpu_quirks |= CPU_QUIRK_NO_BM_CTRL;
1030 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
1031 "acpi_cpu: no BM control, using flush cache method\n"));
1033 cpu_quirks |= CPU_QUIRK_NO_C3;
1034 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
1035 "acpi_cpu: no BM control, C3 not available\n"));
1040 * If we are using generic Cx mode, C3 on multiple CPUs requires using
1041 * the expensive flush cache instruction.
1043 if (cpu_cx_generic && mp_ncpus > 1) {
1044 cpu_quirks |= CPU_QUIRK_NO_BM_CTRL;
1045 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
1046 "acpi_cpu: SMP, using flush cache mode for C3\n"));
1049 /* Look for various quirks of the PIIX4 part. */
1050 acpi_dev = pci_find_device(PCI_VENDOR_INTEL, PCI_DEVICE_82371AB_3);
1051 if (acpi_dev != NULL) {
1052 switch (pci_get_revid(acpi_dev)) {
1054 * Disable C3 support for all PIIX4 chipsets. Some of these parts
1055 * do not report the BMIDE status to the BM status register and
1056 * others have a livelock bug if Type-F DMA is enabled. Linux
1057 * works around the BMIDE bug by reading the BM status directly
1058 * but we take the simpler approach of disabling C3 for these
1061 * See erratum #18 ("C3 Power State/BMIDE and Type-F DMA
1062 * Livelock") from the January 2002 PIIX4 specification update.
1063 * Applies to all PIIX4 models.
1065 * Also, make sure that all interrupts cause a "Stop Break"
1066 * event to exit from C2 state.
1067 * Also, BRLD_EN_BM (ACPI_BITREG_BUS_MASTER_RLD in ACPI-speak)
1068 * should be set to zero, otherwise it causes C2 to short-sleep.
1069 * PIIX4 doesn't properly support C3 and bus master activity
1070 * need not break out of C2.
1072 case PCI_REVISION_A_STEP:
1073 case PCI_REVISION_B_STEP:
1074 case PCI_REVISION_4E:
1075 case PCI_REVISION_4M:
1076 cpu_quirks |= CPU_QUIRK_NO_C3;
1077 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
1078 "acpi_cpu: working around PIIX4 bug, disabling C3\n"));
1080 val = pci_read_config(acpi_dev, PIIX4_DEVACTB_REG, 4);
1081 if ((val & PIIX4_STOP_BREAK_MASK) != PIIX4_STOP_BREAK_MASK) {
1082 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
1083 "acpi_cpu: PIIX4: enabling IRQs to generate Stop Break\n"));
1084 val |= PIIX4_STOP_BREAK_MASK;
1085 pci_write_config(acpi_dev, PIIX4_DEVACTB_REG, val, 4);
1087 AcpiReadBitRegister(ACPI_BITREG_BUS_MASTER_RLD, &val);
1089 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
1090 "acpi_cpu: PIIX4: reset BRLD_EN_BM\n"));
1091 AcpiWriteBitRegister(ACPI_BITREG_BUS_MASTER_RLD, 0);
1103 acpi_cpu_usage_sysctl(SYSCTL_HANDLER_ARGS)
1105 struct acpi_cpu_softc *sc;
1109 uintmax_t fract, sum, whole;
1111 sc = (struct acpi_cpu_softc *) arg1;
1113 for (i = 0; i < sc->cpu_cx_count; i++)
1114 sum += sc->cpu_cx_stats[i];
1115 sbuf_new(&sb, buf, sizeof(buf), SBUF_FIXEDLEN);
1116 for (i = 0; i < sc->cpu_cx_count; i++) {
1118 whole = (uintmax_t)sc->cpu_cx_stats[i] * 100;
1119 fract = (whole % sum) * 100;
1120 sbuf_printf(&sb, "%u.%02u%% ", (u_int)(whole / sum),
1121 (u_int)(fract / sum));
1123 sbuf_printf(&sb, "0.00%% ");
1125 sbuf_printf(&sb, "last %dus", sc->cpu_prev_sleep);
1128 sysctl_handle_string(oidp, sbuf_data(&sb), sbuf_len(&sb), req);
1135 acpi_cpu_set_cx_lowest(struct acpi_cpu_softc *sc, int val)
1139 ACPI_SERIAL_ASSERT(cpu);
1140 sc->cpu_cx_lowest = val;
1142 /* If not disabling, cache the new lowest non-C3 state. */
1144 for (i = sc->cpu_cx_lowest; i >= 0; i--) {
1145 if (sc->cpu_cx_states[i].type < ACPI_STATE_C3) {
1151 /* Reset the statistics counters. */
1152 bzero(sc->cpu_cx_stats, sizeof(sc->cpu_cx_stats));
1157 acpi_cpu_cx_lowest_sysctl(SYSCTL_HANDLER_ARGS)
1159 struct acpi_cpu_softc *sc;
1163 sc = (struct acpi_cpu_softc *) arg1;
1164 snprintf(state, sizeof(state), "C%d", sc->cpu_cx_lowest + 1);
1165 error = sysctl_handle_string(oidp, state, sizeof(state), req);
1166 if (error != 0 || req->newptr == NULL)
1168 if (strlen(state) < 2 || toupper(state[0]) != 'C')
1170 val = (int) strtol(state + 1, NULL, 10) - 1;
1171 if (val < 0 || val > sc->cpu_cx_count - 1)
1174 ACPI_SERIAL_BEGIN(cpu);
1175 acpi_cpu_set_cx_lowest(sc, val);
1176 ACPI_SERIAL_END(cpu);
1182 acpi_cpu_global_cx_lowest_sysctl(SYSCTL_HANDLER_ARGS)
1184 struct acpi_cpu_softc *sc;
1188 snprintf(state, sizeof(state), "C%d", cpu_cx_lowest + 1);
1189 error = sysctl_handle_string(oidp, state, sizeof(state), req);
1190 if (error != 0 || req->newptr == NULL)
1192 if (strlen(state) < 2 || toupper(state[0]) != 'C')
1194 val = (int) strtol(state + 1, NULL, 10) - 1;
1195 if (val < 0 || val > cpu_cx_count - 1)
1197 cpu_cx_lowest = val;
1199 /* Update the new lowest useable Cx state for all CPUs. */
1200 ACPI_SERIAL_BEGIN(cpu);
1201 for (i = 0; i < cpu_ndevices; i++) {
1202 sc = device_get_softc(cpu_devices[i]);
1203 acpi_cpu_set_cx_lowest(sc, min(val, sc->cpu_cx_count - 1));
1205 ACPI_SERIAL_END(cpu);