2 * Copyright (c) 2003-2005 Nate Lawson (SDG)
3 * Copyright (c) 2001 Michael Smith
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28 #include <sys/cdefs.h>
29 __FBSDID("$FreeBSD$");
32 #include <sys/param.h>
35 #include <sys/kernel.h>
36 #include <sys/malloc.h>
37 #include <sys/module.h>
39 #include <sys/power.h>
44 #include <dev/pci/pcivar.h>
45 #include <machine/atomic.h>
46 #include <machine/bus.h>
49 #include <contrib/dev/acpica/include/acpi.h>
50 #include <contrib/dev/acpica/include/accommon.h>
52 #include <dev/acpica/acpivar.h>
55 * Support for ACPI Processor devices, including C[1-3] sleep states.
58 /* Hooks for the ACPI CA debugging infrastructure */
59 #define _COMPONENT ACPI_PROCESSOR
60 ACPI_MODULE_NAME("PROCESSOR")
63 struct resource *p_lvlx; /* Register to read to enter state. */
64 uint32_t type; /* C1-3 (C4 and up treated as C3). */
65 uint32_t trans_lat; /* Transition latency (usec). */
66 uint32_t power; /* Power consumed (mW). */
67 int res_type; /* Resource type for p_lvlx. */
69 #define MAX_CX_STATES 8
71 struct acpi_cpu_softc {
73 ACPI_HANDLE cpu_handle;
74 struct pcpu *cpu_pcpu;
75 uint32_t cpu_acpi_id; /* ACPI processor id */
76 uint32_t cpu_p_blk; /* ACPI P_BLK location */
77 uint32_t cpu_p_blk_len; /* P_BLK length (must be 6). */
78 struct acpi_cx cpu_cx_states[MAX_CX_STATES];
79 int cpu_cx_count; /* Number of valid Cx states. */
80 int cpu_prev_sleep;/* Last idle sleep duration. */
81 int cpu_features; /* Child driver supported features. */
83 int cpu_non_c3; /* Index of lowest non-C3 state. */
84 u_int cpu_cx_stats[MAX_CX_STATES];/* Cx usage history. */
85 /* Values for sysctl. */
86 struct sysctl_ctx_list cpu_sysctl_ctx;
87 struct sysctl_oid *cpu_sysctl_tree;
89 char cpu_cx_supported[64];
93 struct acpi_cpu_device {
94 struct resource_list ad_rl;
97 #define CPU_GET_REG(reg, width) \
98 (bus_space_read_ ## width(rman_get_bustag((reg)), \
99 rman_get_bushandle((reg)), 0))
100 #define CPU_SET_REG(reg, width, val) \
101 (bus_space_write_ ## width(rman_get_bustag((reg)), \
102 rman_get_bushandle((reg)), 0, (val)))
104 #define PM_USEC(x) ((x) >> 2) /* ~4 clocks per usec (3.57955 Mhz) */
106 #define ACPI_NOTIFY_CX_STATES 0x81 /* _CST changed. */
108 #define CPU_QUIRK_NO_C3 (1<<0) /* C3-type states are not usable. */
109 #define CPU_QUIRK_NO_BM_CTRL (1<<2) /* No bus mastering control. */
111 #define PCI_VENDOR_INTEL 0x8086
112 #define PCI_DEVICE_82371AB_3 0x7113 /* PIIX4 chipset for quirks. */
113 #define PCI_REVISION_A_STEP 0
114 #define PCI_REVISION_B_STEP 1
115 #define PCI_REVISION_4E 2
116 #define PCI_REVISION_4M 3
117 #define PIIX4_DEVACTB_REG 0x58
118 #define PIIX4_BRLD_EN_IRQ0 (1<<0)
119 #define PIIX4_BRLD_EN_IRQ (1<<1)
120 #define PIIX4_BRLD_EN_IRQ8 (1<<5)
121 #define PIIX4_STOP_BREAK_MASK (PIIX4_BRLD_EN_IRQ0 | PIIX4_BRLD_EN_IRQ | PIIX4_BRLD_EN_IRQ8)
122 #define PIIX4_PCNTRL_BST_EN (1<<10)
124 /* Allow users to ignore processor orders in MADT. */
125 static int cpu_unordered;
126 TUNABLE_INT("debug.acpi.cpu_unordered", &cpu_unordered);
127 SYSCTL_INT(_debug_acpi, OID_AUTO, cpu_unordered, CTLFLAG_RDTUN,
129 "Do not use the MADT to match ACPI Processor objects to CPUs.");
131 /* Platform hardware resource information. */
132 static uint32_t cpu_smi_cmd; /* Value to write to SMI_CMD. */
133 static uint8_t cpu_cst_cnt; /* Indicate we are _CST aware. */
134 static int cpu_quirks; /* Indicate any hardware bugs. */
137 static int cpu_disable_idle; /* Disable entry to idle function */
138 static int cpu_cx_count; /* Number of valid Cx states */
140 /* Values for sysctl. */
141 static struct sysctl_ctx_list cpu_sysctl_ctx;
142 static struct sysctl_oid *cpu_sysctl_tree;
143 static int cpu_cx_generic;
144 static int cpu_cx_lowest;
146 static device_t *cpu_devices;
147 static int cpu_ndevices;
148 static struct acpi_cpu_softc **cpu_softc;
149 ACPI_SERIAL_DECL(cpu, "ACPI CPU");
151 static int acpi_cpu_probe(device_t dev);
152 static int acpi_cpu_attach(device_t dev);
153 static int acpi_cpu_suspend(device_t dev);
154 static int acpi_cpu_resume(device_t dev);
155 static int acpi_pcpu_get_id(device_t dev, uint32_t *acpi_id,
157 static struct resource_list *acpi_cpu_get_rlist(device_t dev, device_t child);
158 static device_t acpi_cpu_add_child(device_t dev, u_int order, const char *name,
160 static int acpi_cpu_read_ivar(device_t dev, device_t child, int index,
162 static int acpi_cpu_shutdown(device_t dev);
163 static void acpi_cpu_cx_probe(struct acpi_cpu_softc *sc);
164 static void acpi_cpu_generic_cx_probe(struct acpi_cpu_softc *sc);
165 static int acpi_cpu_cx_cst(struct acpi_cpu_softc *sc);
166 static void acpi_cpu_startup(void *arg);
167 static void acpi_cpu_startup_cx(struct acpi_cpu_softc *sc);
168 static void acpi_cpu_cx_list(struct acpi_cpu_softc *sc);
169 static void acpi_cpu_idle(void);
170 static void acpi_cpu_notify(ACPI_HANDLE h, UINT32 notify, void *context);
171 static int acpi_cpu_quirks(void);
172 static int acpi_cpu_usage_sysctl(SYSCTL_HANDLER_ARGS);
173 static int acpi_cpu_set_cx_lowest(struct acpi_cpu_softc *sc, int val);
174 static int acpi_cpu_cx_lowest_sysctl(SYSCTL_HANDLER_ARGS);
175 static int acpi_cpu_global_cx_lowest_sysctl(SYSCTL_HANDLER_ARGS);
177 static device_method_t acpi_cpu_methods[] = {
178 /* Device interface */
179 DEVMETHOD(device_probe, acpi_cpu_probe),
180 DEVMETHOD(device_attach, acpi_cpu_attach),
181 DEVMETHOD(device_detach, bus_generic_detach),
182 DEVMETHOD(device_shutdown, acpi_cpu_shutdown),
183 DEVMETHOD(device_suspend, acpi_cpu_suspend),
184 DEVMETHOD(device_resume, acpi_cpu_resume),
187 DEVMETHOD(bus_add_child, acpi_cpu_add_child),
188 DEVMETHOD(bus_read_ivar, acpi_cpu_read_ivar),
189 DEVMETHOD(bus_get_resource_list, acpi_cpu_get_rlist),
190 DEVMETHOD(bus_get_resource, bus_generic_rl_get_resource),
191 DEVMETHOD(bus_set_resource, bus_generic_rl_set_resource),
192 DEVMETHOD(bus_alloc_resource, bus_generic_rl_alloc_resource),
193 DEVMETHOD(bus_release_resource, bus_generic_rl_release_resource),
194 DEVMETHOD(bus_activate_resource, bus_generic_activate_resource),
195 DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource),
196 DEVMETHOD(bus_setup_intr, bus_generic_setup_intr),
197 DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr),
202 static driver_t acpi_cpu_driver = {
205 sizeof(struct acpi_cpu_softc),
208 static devclass_t acpi_cpu_devclass;
209 DRIVER_MODULE(cpu, acpi, acpi_cpu_driver, acpi_cpu_devclass, 0, 0);
210 MODULE_DEPEND(cpu, acpi, 1, 1, 1);
213 acpi_cpu_probe(device_t dev)
221 if (acpi_disabled("cpu") || acpi_get_type(dev) != ACPI_TYPE_PROCESSOR)
224 handle = acpi_get_handle(dev);
225 if (cpu_softc == NULL)
226 cpu_softc = malloc(sizeof(struct acpi_cpu_softc *) *
227 (mp_maxid + 1), M_TEMP /* XXX */, M_WAITOK | M_ZERO);
229 /* Get our Processor object. */
231 buf.Length = ACPI_ALLOCATE_BUFFER;
232 status = AcpiEvaluateObject(handle, NULL, NULL, &buf);
233 if (ACPI_FAILURE(status)) {
234 device_printf(dev, "probe failed to get Processor obj - %s\n",
235 AcpiFormatException(status));
238 obj = (ACPI_OBJECT *)buf.Pointer;
239 if (obj->Type != ACPI_TYPE_PROCESSOR) {
240 device_printf(dev, "Processor object has bad type %d\n", obj->Type);
246 * Find the processor associated with our unit. We could use the
247 * ProcId as a key, however, some boxes do not have the same values
248 * in their Processor object as the ProcId values in the MADT.
250 acpi_id = obj->Processor.ProcId;
252 if (acpi_pcpu_get_id(dev, &acpi_id, &cpu_id) != 0)
256 * Check if we already probed this processor. We scan the bus twice
257 * so it's possible we've already seen this one.
259 if (cpu_softc[cpu_id] != NULL)
262 /* Mark this processor as in-use and save our derived id for attach. */
263 cpu_softc[cpu_id] = (void *)1;
264 acpi_set_private(dev, (void*)(intptr_t)cpu_id);
265 device_set_desc(dev, "ACPI CPU");
271 acpi_cpu_attach(device_t dev)
274 ACPI_OBJECT arg[4], *obj;
275 ACPI_OBJECT_LIST arglist;
276 struct pcpu *pcpu_data;
277 struct acpi_cpu_softc *sc;
278 struct acpi_softc *acpi_sc;
281 int cpu_id, drv_count, i;
285 /* UUID needed by _OSC evaluation */
286 static uint8_t cpu_oscuuid[16] = { 0x16, 0xA6, 0x77, 0x40, 0x0C, 0x29,
287 0xBE, 0x47, 0x9E, 0xBD, 0xD8, 0x70,
288 0x58, 0x71, 0x39, 0x53 };
290 ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__);
292 sc = device_get_softc(dev);
294 sc->cpu_handle = acpi_get_handle(dev);
295 cpu_id = (int)(intptr_t)acpi_get_private(dev);
296 cpu_softc[cpu_id] = sc;
297 pcpu_data = pcpu_find(cpu_id);
298 pcpu_data->pc_device = dev;
299 sc->cpu_pcpu = pcpu_data;
300 cpu_smi_cmd = AcpiGbl_FADT.SmiCommand;
301 cpu_cst_cnt = AcpiGbl_FADT.CstControl;
304 buf.Length = ACPI_ALLOCATE_BUFFER;
305 status = AcpiEvaluateObject(sc->cpu_handle, NULL, NULL, &buf);
306 if (ACPI_FAILURE(status)) {
307 device_printf(dev, "attach failed to get Processor obj - %s\n",
308 AcpiFormatException(status));
311 obj = (ACPI_OBJECT *)buf.Pointer;
312 sc->cpu_p_blk = obj->Processor.PblkAddress;
313 sc->cpu_p_blk_len = obj->Processor.PblkLength;
314 sc->cpu_acpi_id = obj->Processor.ProcId;
316 ACPI_DEBUG_PRINT((ACPI_DB_INFO, "acpi_cpu%d: P_BLK at %#x/%d\n",
317 device_get_unit(dev), sc->cpu_p_blk, sc->cpu_p_blk_len));
320 * If this is the first cpu we attach, create and initialize the generic
321 * resources that will be used by all acpi cpu devices.
323 if (device_get_unit(dev) == 0) {
324 /* Assume we won't be using generic Cx mode by default */
325 cpu_cx_generic = FALSE;
327 /* Install hw.acpi.cpu sysctl tree */
328 acpi_sc = acpi_device_get_parent_softc(dev);
329 sysctl_ctx_init(&cpu_sysctl_ctx);
330 cpu_sysctl_tree = SYSCTL_ADD_NODE(&cpu_sysctl_ctx,
331 SYSCTL_CHILDREN(acpi_sc->acpi_sysctl_tree), OID_AUTO, "cpu",
332 CTLFLAG_RD, 0, "node for CPU children");
334 /* Queue post cpu-probing task handler */
335 AcpiOsExecute(OSL_NOTIFY_HANDLER, acpi_cpu_startup, NULL);
339 * Before calling any CPU methods, collect child driver feature hints
340 * and notify ACPI of them. We support unified SMP power control
341 * so advertise this ourselves. Note this is not the same as independent
342 * SMP control where each CPU can have different settings.
344 sc->cpu_features = ACPI_CAP_SMP_SAME | ACPI_CAP_SMP_SAME_C3;
345 if (devclass_get_drivers(acpi_cpu_devclass, &drivers, &drv_count) == 0) {
346 for (i = 0; i < drv_count; i++) {
347 if (ACPI_GET_FEATURES(drivers[i], &features) == 0)
348 sc->cpu_features |= features;
350 free(drivers, M_TEMP);
354 * CPU capabilities are specified in
355 * Intel Processor Vendor-Specific ACPI Interface Specification.
357 if (sc->cpu_features) {
358 arglist.Pointer = arg;
360 arg[0].Type = ACPI_TYPE_BUFFER;
361 arg[0].Buffer.Length = sizeof(cpu_oscuuid);
362 arg[0].Buffer.Pointer = cpu_oscuuid; /* UUID */
363 arg[1].Type = ACPI_TYPE_INTEGER;
364 arg[1].Integer.Value = 1; /* revision */
365 arg[2].Type = ACPI_TYPE_INTEGER;
366 arg[2].Integer.Value = 1; /* count */
367 arg[3].Type = ACPI_TYPE_BUFFER;
368 arg[3].Buffer.Length = sizeof(cap_set); /* Capabilities buffer */
369 arg[3].Buffer.Pointer = (uint8_t *)cap_set;
370 cap_set[0] = 0; /* status */
371 cap_set[1] = sc->cpu_features;
372 status = AcpiEvaluateObject(sc->cpu_handle, "_OSC", &arglist, NULL);
373 if (ACPI_SUCCESS(status)) {
375 device_printf(dev, "_OSC returned status %#x\n", cap_set[0]);
378 arglist.Pointer = arg;
380 arg[0].Type = ACPI_TYPE_BUFFER;
381 arg[0].Buffer.Length = sizeof(cap_set);
382 arg[0].Buffer.Pointer = (uint8_t *)cap_set;
383 cap_set[0] = 1; /* revision */
384 cap_set[1] = 1; /* number of capabilities integers */
385 cap_set[2] = sc->cpu_features;
386 AcpiEvaluateObject(sc->cpu_handle, "_PDC", &arglist, NULL);
390 /* Probe for Cx state support. */
391 acpi_cpu_cx_probe(sc);
397 acpi_cpu_postattach(void *unused __unused)
403 err = devclass_get_devices(acpi_cpu_devclass, &devices, &n);
405 printf("devclass_get_devices(acpi_cpu_devclass) failed\n");
408 for (i = 0; i < n; i++)
409 bus_generic_probe(devices[i]);
410 for (i = 0; i < n; i++)
411 bus_generic_attach(devices[i]);
412 free(devices, M_TEMP);
415 SYSINIT(acpi_cpu, SI_SUB_CONFIGURE, SI_ORDER_MIDDLE,
416 acpi_cpu_postattach, NULL);
419 * Disable any entry to the idle function during suspend and re-enable it
423 acpi_cpu_suspend(device_t dev)
427 error = bus_generic_suspend(dev);
430 cpu_disable_idle = TRUE;
435 acpi_cpu_resume(device_t dev)
438 cpu_disable_idle = FALSE;
439 return (bus_generic_resume(dev));
443 * Find the processor associated with a given ACPI ID. By default,
444 * use the MADT to map ACPI IDs to APIC IDs and use that to locate a
445 * processor. Some systems have inconsistent ASL and MADT however.
446 * For these systems the cpu_unordered tunable can be set in which
447 * case we assume that Processor objects are listed in the same order
448 * in both the MADT and ASL.
451 acpi_pcpu_get_id(device_t dev, uint32_t *acpi_id, uint32_t *cpu_id)
456 KASSERT(acpi_id != NULL, ("Null acpi_id"));
457 KASSERT(cpu_id != NULL, ("Null cpu_id"));
458 idx = device_get_unit(dev);
461 * If pc_acpi_id for CPU 0 is not initialized (e.g. a non-APIC
462 * UP box) use the ACPI ID from the first processor we find.
464 if (idx == 0 && mp_ncpus == 1) {
466 if (pc->pc_acpi_id == 0xffffffff)
467 pc->pc_acpi_id = *acpi_id;
474 KASSERT(pc != NULL, ("no pcpu data for %d", i));
478 * If pc_acpi_id doesn't match the ACPI ID from the
479 * ASL, prefer the MADT-derived value.
481 if (pc->pc_acpi_id != *acpi_id)
482 *acpi_id = pc->pc_acpi_id;
483 *cpu_id = pc->pc_cpuid;
487 if (pc->pc_acpi_id == *acpi_id) {
490 "Processor %s (ACPI ID %u) -> APIC ID %d\n",
491 acpi_name(acpi_get_handle(dev)), *acpi_id,
493 *cpu_id = pc->pc_cpuid;
500 printf("ACPI: Processor %s (ACPI ID %u) ignored\n",
501 acpi_name(acpi_get_handle(dev)), *acpi_id);
506 static struct resource_list *
507 acpi_cpu_get_rlist(device_t dev, device_t child)
509 struct acpi_cpu_device *ad;
511 ad = device_get_ivars(child);
518 acpi_cpu_add_child(device_t dev, u_int order, const char *name, int unit)
520 struct acpi_cpu_device *ad;
523 if ((ad = malloc(sizeof(*ad), M_TEMP, M_NOWAIT | M_ZERO)) == NULL)
526 resource_list_init(&ad->ad_rl);
528 child = device_add_child_ordered(dev, order, name, unit);
530 device_set_ivars(child, ad);
537 acpi_cpu_read_ivar(device_t dev, device_t child, int index, uintptr_t *result)
539 struct acpi_cpu_softc *sc;
541 sc = device_get_softc(dev);
543 case ACPI_IVAR_HANDLE:
544 *result = (uintptr_t)sc->cpu_handle;
547 *result = (uintptr_t)sc->cpu_pcpu;
556 acpi_cpu_shutdown(device_t dev)
558 ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__);
560 /* Allow children to shutdown first. */
561 bus_generic_shutdown(dev);
564 * Disable any entry to the idle function. There is a small race where
565 * an idle thread have passed this check but not gone to sleep. This
566 * is ok since device_shutdown() does not free the softc, otherwise
567 * we'd have to be sure all threads were evicted before returning.
569 cpu_disable_idle = TRUE;
575 acpi_cpu_cx_probe(struct acpi_cpu_softc *sc)
577 ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__);
579 /* Use initial sleep value of 1 sec. to start with lowest idle state. */
580 sc->cpu_prev_sleep = 1000000;
581 sc->cpu_cx_lowest = 0;
584 * Check for the ACPI 2.0 _CST sleep states object. If we can't find
585 * any, we'll revert to generic FADT/P_BLK Cx control method which will
586 * be handled by acpi_cpu_startup. We need to defer to after having
587 * probed all the cpus in the system before probing for generic Cx
588 * states as we may already have found cpus with valid _CST packages
590 if (!cpu_cx_generic && acpi_cpu_cx_cst(sc) != 0) {
592 * We were unable to find a _CST package for this cpu or there
593 * was an error parsing it. Switch back to generic mode.
595 cpu_cx_generic = TRUE;
597 device_printf(sc->cpu_dev, "switching to generic Cx mode\n");
601 * TODO: _CSD Package should be checked here.
606 acpi_cpu_generic_cx_probe(struct acpi_cpu_softc *sc)
608 ACPI_GENERIC_ADDRESS gas;
609 struct acpi_cx *cx_ptr;
611 sc->cpu_cx_count = 0;
612 cx_ptr = sc->cpu_cx_states;
614 /* Use initial sleep value of 1 sec. to start with lowest idle state. */
615 sc->cpu_prev_sleep = 1000000;
617 /* C1 has been required since just after ACPI 1.0 */
618 cx_ptr->type = ACPI_STATE_C1;
619 cx_ptr->trans_lat = 0;
624 * The spec says P_BLK must be 6 bytes long. However, some systems
625 * use it to indicate a fractional set of features present so we
626 * take 5 as C2. Some may also have a value of 7 to indicate
627 * another C3 but most use _CST for this (as required) and having
628 * "only" C1-C3 is not a hardship.
630 if (sc->cpu_p_blk_len < 5)
633 /* Validate and allocate resources for C2 (P_LVL2). */
634 gas.SpaceId = ACPI_ADR_SPACE_SYSTEM_IO;
636 if (AcpiGbl_FADT.C2Latency <= 100) {
637 gas.Address = sc->cpu_p_blk + 4;
638 acpi_bus_alloc_gas(sc->cpu_dev, &cx_ptr->res_type, &sc->cpu_rid,
639 &gas, &cx_ptr->p_lvlx, RF_SHAREABLE);
640 if (cx_ptr->p_lvlx != NULL) {
642 cx_ptr->type = ACPI_STATE_C2;
643 cx_ptr->trans_lat = AcpiGbl_FADT.C2Latency;
648 if (sc->cpu_p_blk_len < 6)
651 /* Validate and allocate resources for C3 (P_LVL3). */
652 if (AcpiGbl_FADT.C3Latency <= 1000 && !(cpu_quirks & CPU_QUIRK_NO_C3)) {
653 gas.Address = sc->cpu_p_blk + 5;
654 acpi_bus_alloc_gas(sc->cpu_dev, &cx_ptr->res_type, &sc->cpu_rid, &gas,
655 &cx_ptr->p_lvlx, RF_SHAREABLE);
656 if (cx_ptr->p_lvlx != NULL) {
658 cx_ptr->type = ACPI_STATE_C3;
659 cx_ptr->trans_lat = AcpiGbl_FADT.C3Latency;
667 * Parse a _CST package and set up its Cx states. Since the _CST object
668 * can change dynamically, our notify handler may call this function
669 * to clean up and probe the new _CST package.
672 acpi_cpu_cx_cst(struct acpi_cpu_softc *sc)
674 struct acpi_cx *cx_ptr;
682 ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__);
685 buf.Length = ACPI_ALLOCATE_BUFFER;
686 status = AcpiEvaluateObject(sc->cpu_handle, "_CST", NULL, &buf);
687 if (ACPI_FAILURE(status))
690 /* _CST is a package with a count and at least one Cx package. */
691 top = (ACPI_OBJECT *)buf.Pointer;
692 if (!ACPI_PKG_VALID(top, 2) || acpi_PkgInt32(top, 0, &count) != 0) {
693 device_printf(sc->cpu_dev, "invalid _CST package\n");
694 AcpiOsFree(buf.Pointer);
697 if (count != top->Package.Count - 1) {
698 device_printf(sc->cpu_dev, "invalid _CST state count (%d != %d)\n",
699 count, top->Package.Count - 1);
700 count = top->Package.Count - 1;
702 if (count > MAX_CX_STATES) {
703 device_printf(sc->cpu_dev, "_CST has too many states (%d)\n", count);
704 count = MAX_CX_STATES;
707 /* Set up all valid states. */
708 sc->cpu_cx_count = 0;
709 cx_ptr = sc->cpu_cx_states;
710 for (i = 0; i < count; i++) {
711 pkg = &top->Package.Elements[i + 1];
712 if (!ACPI_PKG_VALID(pkg, 4) ||
713 acpi_PkgInt32(pkg, 1, &cx_ptr->type) != 0 ||
714 acpi_PkgInt32(pkg, 2, &cx_ptr->trans_lat) != 0 ||
715 acpi_PkgInt32(pkg, 3, &cx_ptr->power) != 0) {
717 device_printf(sc->cpu_dev, "skipping invalid Cx state package\n");
721 /* Validate the state to see if we should use it. */
722 switch (cx_ptr->type) {
733 if ((cpu_quirks & CPU_QUIRK_NO_C3) != 0) {
734 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
735 "acpi_cpu%d: C3[%d] not available.\n",
736 device_get_unit(sc->cpu_dev), i));
743 /* Free up any previous register. */
744 if (cx_ptr->p_lvlx != NULL) {
745 bus_release_resource(sc->cpu_dev, 0, 0, cx_ptr->p_lvlx);
746 cx_ptr->p_lvlx = NULL;
750 /* Allocate the control register for C2 or C3. */
751 acpi_PkgGas(sc->cpu_dev, pkg, 0, &cx_ptr->res_type, &sc->cpu_rid,
752 &cx_ptr->p_lvlx, RF_SHAREABLE);
753 if (cx_ptr->p_lvlx) {
755 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
756 "acpi_cpu%d: Got C%d - %d latency\n",
757 device_get_unit(sc->cpu_dev), cx_ptr->type,
763 AcpiOsFree(buf.Pointer);
769 * Call this *after* all CPUs have been attached.
772 acpi_cpu_startup(void *arg)
774 struct acpi_cpu_softc *sc;
777 /* Get set of CPU devices */
778 devclass_get_devices(acpi_cpu_devclass, &cpu_devices, &cpu_ndevices);
781 * Setup any quirks that might necessary now that we have probed
787 if (cpu_cx_generic) {
789 * We are using generic Cx mode, probe for available Cx states
790 * for all processors.
792 for (i = 0; i < cpu_ndevices; i++) {
793 sc = device_get_softc(cpu_devices[i]);
794 acpi_cpu_generic_cx_probe(sc);
795 if (sc->cpu_cx_count > cpu_cx_count)
796 cpu_cx_count = sc->cpu_cx_count;
800 * Find the highest Cx state common to all CPUs
801 * in the system, taking quirks into account.
803 for (i = 0; i < cpu_ndevices; i++) {
804 sc = device_get_softc(cpu_devices[i]);
805 if (sc->cpu_cx_count < cpu_cx_count)
806 cpu_cx_count = sc->cpu_cx_count;
810 * We are using _CST mode, remove C3 state if necessary.
811 * Update the largest Cx state supported in the global cpu_cx_count.
812 * It will be used in the global Cx sysctl handler.
813 * As we now know for sure that we will be using _CST mode
814 * install our notify handler.
816 for (i = 0; i < cpu_ndevices; i++) {
817 sc = device_get_softc(cpu_devices[i]);
818 if (cpu_quirks & CPU_QUIRK_NO_C3) {
819 sc->cpu_cx_count = sc->cpu_non_c3 + 1;
821 if (sc->cpu_cx_count > cpu_cx_count)
822 cpu_cx_count = sc->cpu_cx_count;
823 AcpiInstallNotifyHandler(sc->cpu_handle, ACPI_DEVICE_NOTIFY,
824 acpi_cpu_notify, sc);
828 /* Perform Cx final initialization. */
829 for (i = 0; i < cpu_ndevices; i++) {
830 sc = device_get_softc(cpu_devices[i]);
831 acpi_cpu_startup_cx(sc);
834 /* Add a sysctl handler to handle global Cx lowest setting */
835 SYSCTL_ADD_PROC(&cpu_sysctl_ctx, SYSCTL_CHILDREN(cpu_sysctl_tree),
836 OID_AUTO, "cx_lowest", CTLTYPE_STRING | CTLFLAG_RW,
837 NULL, 0, acpi_cpu_global_cx_lowest_sysctl, "A",
838 "Global lowest Cx sleep state to use");
840 /* Take over idling from cpu_idle_default(). */
842 cpu_disable_idle = FALSE;
843 cpu_idle_hook = acpi_cpu_idle;
847 acpi_cpu_cx_list(struct acpi_cpu_softc *sc)
853 * Set up the list of Cx states
856 sbuf_new(&sb, sc->cpu_cx_supported, sizeof(sc->cpu_cx_supported),
858 for (i = 0; i < sc->cpu_cx_count; i++) {
859 sbuf_printf(&sb, "C%d/%d ", i + 1, sc->cpu_cx_states[i].trans_lat);
860 if (sc->cpu_cx_states[i].type < ACPI_STATE_C3)
868 acpi_cpu_startup_cx(struct acpi_cpu_softc *sc)
870 acpi_cpu_cx_list(sc);
872 SYSCTL_ADD_STRING(&sc->cpu_sysctl_ctx,
873 SYSCTL_CHILDREN(device_get_sysctl_tree(sc->cpu_dev)),
874 OID_AUTO, "cx_supported", CTLFLAG_RD,
875 sc->cpu_cx_supported, 0,
876 "Cx/microsecond values for supported Cx states");
877 SYSCTL_ADD_PROC(&sc->cpu_sysctl_ctx,
878 SYSCTL_CHILDREN(device_get_sysctl_tree(sc->cpu_dev)),
879 OID_AUTO, "cx_lowest", CTLTYPE_STRING | CTLFLAG_RW,
880 (void *)sc, 0, acpi_cpu_cx_lowest_sysctl, "A",
881 "lowest Cx sleep state to use");
882 SYSCTL_ADD_PROC(&sc->cpu_sysctl_ctx,
883 SYSCTL_CHILDREN(device_get_sysctl_tree(sc->cpu_dev)),
884 OID_AUTO, "cx_usage", CTLTYPE_STRING | CTLFLAG_RD,
885 (void *)sc, 0, acpi_cpu_usage_sysctl, "A",
886 "percent usage for each Cx state");
889 /* Signal platform that we can handle _CST notification. */
890 if (!cpu_cx_generic && cpu_cst_cnt != 0) {
892 AcpiOsWritePort(cpu_smi_cmd, cpu_cst_cnt, 8);
899 * Idle the CPU in the lowest state possible. This function is called with
900 * interrupts disabled. Note that once it re-enables interrupts, a task
901 * switch can occur so do not access shared data (i.e. the softc) after
902 * interrupts are re-enabled.
907 struct acpi_cpu_softc *sc;
908 struct acpi_cx *cx_next;
909 uint32_t start_time, end_time;
910 int bm_active, cx_next_idx, i;
912 /* If disabled, return immediately. */
913 if (cpu_disable_idle) {
919 * Look up our CPU id to get our softc. If it's NULL, we'll use C1
920 * since there is no ACPI processor object for this CPU. This occurs
921 * for logical CPUs in the HTT case.
923 sc = cpu_softc[PCPU_GET(cpuid)];
929 /* Find the lowest state that has small enough latency. */
931 for (i = sc->cpu_cx_lowest; i >= 0; i--) {
932 if (sc->cpu_cx_states[i].trans_lat * 3 <= sc->cpu_prev_sleep) {
939 * Check for bus master activity. If there was activity, clear
940 * the bit and use the lowest non-C3 state. Note that the USB
941 * driver polling for new devices keeps this bit set all the
942 * time if USB is loaded.
944 if ((cpu_quirks & CPU_QUIRK_NO_BM_CTRL) == 0) {
945 AcpiReadBitRegister(ACPI_BITREG_BUS_MASTER_STATUS, &bm_active);
946 if (bm_active != 0) {
947 AcpiWriteBitRegister(ACPI_BITREG_BUS_MASTER_STATUS, 1);
948 cx_next_idx = min(cx_next_idx, sc->cpu_non_c3);
952 /* Select the next state and update statistics. */
953 cx_next = &sc->cpu_cx_states[cx_next_idx];
954 sc->cpu_cx_stats[cx_next_idx]++;
955 KASSERT(cx_next->type != ACPI_STATE_C0, ("acpi_cpu_idle: C0 sleep"));
958 * Execute HLT (or equivalent) and wait for an interrupt. We can't
959 * precisely calculate the time spent in C1 since the place we wake up
960 * is an ISR. Assume we slept no more then half of quantum.
962 if (cx_next->type == ACPI_STATE_C1) {
963 AcpiHwRead(&start_time, &AcpiGbl_FADT.XPmTimerBlock);
965 AcpiHwRead(&end_time, &AcpiGbl_FADT.XPmTimerBlock);
966 end_time = acpi_TimerDelta(end_time, start_time);
967 sc->cpu_prev_sleep = (sc->cpu_prev_sleep * 3 +
968 min(PM_USEC(end_time), 500000 / hz)) / 4;
973 * For C3, disable bus master arbitration and enable bus master wake
974 * if BM control is available, otherwise flush the CPU cache.
976 if (cx_next->type == ACPI_STATE_C3) {
977 if ((cpu_quirks & CPU_QUIRK_NO_BM_CTRL) == 0) {
978 AcpiWriteBitRegister(ACPI_BITREG_ARB_DISABLE, 1);
979 AcpiWriteBitRegister(ACPI_BITREG_BUS_MASTER_RLD, 1);
981 ACPI_FLUSH_CPU_CACHE();
985 * Read from P_LVLx to enter C2(+), checking time spent asleep.
986 * Use the ACPI timer for measuring sleep time. Since we need to
987 * get the time very close to the CPU start/stop clock logic, this
988 * is the only reliable time source.
990 AcpiHwRead(&start_time, &AcpiGbl_FADT.XPmTimerBlock);
991 CPU_GET_REG(cx_next->p_lvlx, 1);
994 * Read the end time twice. Since it may take an arbitrary time
995 * to enter the idle state, the first read may be executed before
996 * the processor has stopped. Doing it again provides enough
997 * margin that we are certain to have a correct value.
999 AcpiHwRead(&end_time, &AcpiGbl_FADT.XPmTimerBlock);
1000 AcpiHwRead(&end_time, &AcpiGbl_FADT.XPmTimerBlock);
1002 /* Enable bus master arbitration and disable bus master wakeup. */
1003 if (cx_next->type == ACPI_STATE_C3 &&
1004 (cpu_quirks & CPU_QUIRK_NO_BM_CTRL) == 0) {
1005 AcpiWriteBitRegister(ACPI_BITREG_ARB_DISABLE, 0);
1006 AcpiWriteBitRegister(ACPI_BITREG_BUS_MASTER_RLD, 0);
1010 /* Find the actual time asleep in microseconds. */
1011 end_time = acpi_TimerDelta(end_time, start_time);
1012 sc->cpu_prev_sleep = (sc->cpu_prev_sleep * 3 + PM_USEC(end_time)) / 4;
1016 * Re-evaluate the _CST object when we are notified that it changed.
1018 * XXX Re-evaluation disabled until locking is done.
1021 acpi_cpu_notify(ACPI_HANDLE h, UINT32 notify, void *context)
1023 struct acpi_cpu_softc *sc = (struct acpi_cpu_softc *)context;
1024 struct acpi_cpu_softc *isc;
1027 if (notify != ACPI_NOTIFY_CX_STATES)
1030 /* Update the list of Cx states. */
1031 acpi_cpu_cx_cst(sc);
1032 acpi_cpu_cx_list(sc);
1034 /* Update the new lowest useable Cx state for all CPUs. */
1035 ACPI_SERIAL_BEGIN(cpu);
1037 for (i = 0; i < cpu_ndevices; i++) {
1038 isc = device_get_softc(cpu_devices[i]);
1039 if (isc->cpu_cx_count > cpu_cx_count)
1040 cpu_cx_count = isc->cpu_cx_count;
1042 if (sc->cpu_cx_lowest < cpu_cx_lowest)
1043 acpi_cpu_set_cx_lowest(sc, min(cpu_cx_lowest, sc->cpu_cx_count - 1));
1044 ACPI_SERIAL_END(cpu);
1048 acpi_cpu_quirks(void)
1053 ACPI_FUNCTION_TRACE((char *)(uintptr_t)__func__);
1056 * Bus mastering arbitration control is needed to keep caches coherent
1057 * while sleeping in C3. If it's not present but a working flush cache
1058 * instruction is present, flush the caches before entering C3 instead.
1059 * Otherwise, just disable C3 completely.
1061 if (AcpiGbl_FADT.Pm2ControlBlock == 0 ||
1062 AcpiGbl_FADT.Pm2ControlLength == 0) {
1063 if ((AcpiGbl_FADT.Flags & ACPI_FADT_WBINVD) &&
1064 (AcpiGbl_FADT.Flags & ACPI_FADT_WBINVD_FLUSH) == 0) {
1065 cpu_quirks |= CPU_QUIRK_NO_BM_CTRL;
1066 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
1067 "acpi_cpu: no BM control, using flush cache method\n"));
1069 cpu_quirks |= CPU_QUIRK_NO_C3;
1070 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
1071 "acpi_cpu: no BM control, C3 not available\n"));
1076 * If we are using generic Cx mode, C3 on multiple CPUs requires using
1077 * the expensive flush cache instruction.
1079 if (cpu_cx_generic && mp_ncpus > 1) {
1080 cpu_quirks |= CPU_QUIRK_NO_BM_CTRL;
1081 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
1082 "acpi_cpu: SMP, using flush cache mode for C3\n"));
1085 /* Look for various quirks of the PIIX4 part. */
1086 acpi_dev = pci_find_device(PCI_VENDOR_INTEL, PCI_DEVICE_82371AB_3);
1087 if (acpi_dev != NULL) {
1088 switch (pci_get_revid(acpi_dev)) {
1090 * Disable C3 support for all PIIX4 chipsets. Some of these parts
1091 * do not report the BMIDE status to the BM status register and
1092 * others have a livelock bug if Type-F DMA is enabled. Linux
1093 * works around the BMIDE bug by reading the BM status directly
1094 * but we take the simpler approach of disabling C3 for these
1097 * See erratum #18 ("C3 Power State/BMIDE and Type-F DMA
1098 * Livelock") from the January 2002 PIIX4 specification update.
1099 * Applies to all PIIX4 models.
1101 * Also, make sure that all interrupts cause a "Stop Break"
1102 * event to exit from C2 state.
1103 * Also, BRLD_EN_BM (ACPI_BITREG_BUS_MASTER_RLD in ACPI-speak)
1104 * should be set to zero, otherwise it causes C2 to short-sleep.
1105 * PIIX4 doesn't properly support C3 and bus master activity
1106 * need not break out of C2.
1108 case PCI_REVISION_A_STEP:
1109 case PCI_REVISION_B_STEP:
1110 case PCI_REVISION_4E:
1111 case PCI_REVISION_4M:
1112 cpu_quirks |= CPU_QUIRK_NO_C3;
1113 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
1114 "acpi_cpu: working around PIIX4 bug, disabling C3\n"));
1116 val = pci_read_config(acpi_dev, PIIX4_DEVACTB_REG, 4);
1117 if ((val & PIIX4_STOP_BREAK_MASK) != PIIX4_STOP_BREAK_MASK) {
1118 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
1119 "acpi_cpu: PIIX4: enabling IRQs to generate Stop Break\n"));
1120 val |= PIIX4_STOP_BREAK_MASK;
1121 pci_write_config(acpi_dev, PIIX4_DEVACTB_REG, val, 4);
1123 AcpiReadBitRegister(ACPI_BITREG_BUS_MASTER_RLD, &val);
1125 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
1126 "acpi_cpu: PIIX4: reset BRLD_EN_BM\n"));
1127 AcpiWriteBitRegister(ACPI_BITREG_BUS_MASTER_RLD, 0);
1139 acpi_cpu_usage_sysctl(SYSCTL_HANDLER_ARGS)
1141 struct acpi_cpu_softc *sc;
1145 uintmax_t fract, sum, whole;
1147 sc = (struct acpi_cpu_softc *) arg1;
1149 for (i = 0; i < sc->cpu_cx_count; i++)
1150 sum += sc->cpu_cx_stats[i];
1151 sbuf_new(&sb, buf, sizeof(buf), SBUF_FIXEDLEN);
1152 for (i = 0; i < sc->cpu_cx_count; i++) {
1154 whole = (uintmax_t)sc->cpu_cx_stats[i] * 100;
1155 fract = (whole % sum) * 100;
1156 sbuf_printf(&sb, "%u.%02u%% ", (u_int)(whole / sum),
1157 (u_int)(fract / sum));
1159 sbuf_printf(&sb, "0.00%% ");
1161 sbuf_printf(&sb, "last %dus", sc->cpu_prev_sleep);
1164 sysctl_handle_string(oidp, sbuf_data(&sb), sbuf_len(&sb), req);
1171 acpi_cpu_set_cx_lowest(struct acpi_cpu_softc *sc, int val)
1175 ACPI_SERIAL_ASSERT(cpu);
1176 sc->cpu_cx_lowest = val;
1178 /* If not disabling, cache the new lowest non-C3 state. */
1180 for (i = sc->cpu_cx_lowest; i >= 0; i--) {
1181 if (sc->cpu_cx_states[i].type < ACPI_STATE_C3) {
1187 /* Reset the statistics counters. */
1188 bzero(sc->cpu_cx_stats, sizeof(sc->cpu_cx_stats));
1193 acpi_cpu_cx_lowest_sysctl(SYSCTL_HANDLER_ARGS)
1195 struct acpi_cpu_softc *sc;
1199 sc = (struct acpi_cpu_softc *) arg1;
1200 snprintf(state, sizeof(state), "C%d", sc->cpu_cx_lowest + 1);
1201 error = sysctl_handle_string(oidp, state, sizeof(state), req);
1202 if (error != 0 || req->newptr == NULL)
1204 if (strlen(state) < 2 || toupper(state[0]) != 'C')
1206 val = (int) strtol(state + 1, NULL, 10) - 1;
1207 if (val < 0 || val > sc->cpu_cx_count - 1)
1210 ACPI_SERIAL_BEGIN(cpu);
1211 acpi_cpu_set_cx_lowest(sc, val);
1212 ACPI_SERIAL_END(cpu);
1218 acpi_cpu_global_cx_lowest_sysctl(SYSCTL_HANDLER_ARGS)
1220 struct acpi_cpu_softc *sc;
1224 snprintf(state, sizeof(state), "C%d", cpu_cx_lowest + 1);
1225 error = sysctl_handle_string(oidp, state, sizeof(state), req);
1226 if (error != 0 || req->newptr == NULL)
1228 if (strlen(state) < 2 || toupper(state[0]) != 'C')
1230 val = (int) strtol(state + 1, NULL, 10) - 1;
1231 if (val < 0 || val > cpu_cx_count - 1)
1233 cpu_cx_lowest = val;
1235 /* Update the new lowest useable Cx state for all CPUs. */
1236 ACPI_SERIAL_BEGIN(cpu);
1237 for (i = 0; i < cpu_ndevices; i++) {
1238 sc = device_get_softc(cpu_devices[i]);
1239 acpi_cpu_set_cx_lowest(sc, min(val, sc->cpu_cx_count - 1));
1241 ACPI_SERIAL_END(cpu);