sys/dev/ata/ata-all.c

   1 /*-
   2  * Copyright (c) 1998 - 2008 Søren Schmidt <sos@FreeBSD.org>
   3  * All rights reserved.
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification, are permitted provided that the following conditions
   7  * are met:
   8  * 1. Redistributions of source code must retain the above copyright
   9  *    notice, this list of conditions and the following disclaimer,
  10  *    without modification, immediately at the beginning of the file.
  11  * 2. Redistributions in binary form must reproduce the above copyright
  12  *    notice, this list of conditions and the following disclaimer in the
  13  *    documentation and/or other materials provided with the distribution.
  14  *
  15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
  16  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  17  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  18  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  19  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  20  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  21  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  22  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  23  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  24  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  25  */
  26
  27 #include <sys/cdefs.h>
  28 __FBSDID("$FreeBSD$");
  29
  30 #include <sys/param.h>
  31 #include <sys/systm.h>
  32 #include <sys/ata.h>
  33 #include <sys/kernel.h>
  34 #include <sys/module.h>
  35 #include <sys/endian.h>
  36 #include <sys/ctype.h>
  37 #include <sys/conf.h>
  38 #include <sys/bus.h>
  39 #include <sys/bio.h>
  40 #include <sys/malloc.h>
  41 #include <sys/sysctl.h>
  42 #include <sys/sema.h>
  43 #include <sys/taskqueue.h>
  44 #include <vm/uma.h>
  45 #include <machine/stdarg.h>
  46 #include <machine/resource.h>
  47 #include <machine/bus.h>
  48 #include <sys/rman.h>
  49 #include <dev/ata/ata-all.h>
  50 #include <dev/pci/pcivar.h>
  51 #include <ata_if.h>
  52
  53 #include <cam/cam.h>
  54 #include <cam/cam_ccb.h>
  55 #include <cam/cam_sim.h>
  56 #include <cam/cam_xpt_sim.h>
  57 #include <cam/cam_debug.h>
  58
  59 /* prototypes */
  60 static void ataaction(struct cam_sim *sim, union ccb *ccb);
  61 static void atapoll(struct cam_sim *sim);
  62 static void ata_cam_begin_transaction(device_t dev, union ccb *ccb);
  63 static void ata_cam_end_transaction(device_t dev, struct ata_request *request);
  64 static void ata_cam_request_sense(device_t dev, struct ata_request *request);
  65 static int ata_check_ids(device_t dev, union ccb *ccb);
  66 static void ata_conn_event(void *context, int dummy);
  67 static void ata_interrupt_locked(void *data);
  68 static int ata_module_event_handler(module_t mod, int what, void *arg);
  69 static void ata_periodic_poll(void *data);
  70 static int ata_str2mode(const char *str);
  71
  72 /* global vars */
  73 MALLOC_DEFINE(M_ATA, "ata_generic", "ATA driver generic layer");
  74 int (*ata_raid_ioctl_func)(u_long cmd, caddr_t data) = NULL;
  75 devclass_t ata_devclass;
  76 int ata_dma_check_80pin = 1;
  77
  78 /* sysctl vars */
  79 static SYSCTL_NODE(_hw, OID_AUTO, ata, CTLFLAG_RD, 0, "ATA driver parameters");
  80 TUNABLE_INT("hw.ata.ata_dma_check_80pin", &ata_dma_check_80pin);
  81 SYSCTL_INT(_hw_ata, OID_AUTO, ata_dma_check_80pin,
  82            CTLFLAG_RW, &ata_dma_check_80pin, 1,
  83            "Check for 80pin cable before setting ATA DMA mode");
  84 FEATURE(ata_cam, "ATA devices are accessed through the cam(4) driver");
  85
  86 /*
  87  * newbus device interface related functions
  88  */
  89 int
  90 ata_probe(device_t dev)
  91 {
  92     return (BUS_PROBE_LOW_PRIORITY);
  93 }
  94
  95 int
  96 ata_attach(device_t dev)
  97 {
  98     struct ata_channel *ch = device_get_softc(dev);
  99     int error, rid;
 100     struct cam_devq *devq;
 101     const char *res;
 102     char buf[64];
 103     int i, mode;
 104
 105     /* check that we have a virgin channel to attach */
 106     if (ch->r_irq)
 107         return EEXIST;
 108
 109     /* initialize the softc basics */
 110     ch->dev = dev;
 111     ch->state = ATA_IDLE;
 112     bzero(&ch->state_mtx, sizeof(struct mtx));
 113     mtx_init(&ch->state_mtx, "ATA state lock", NULL, MTX_DEF);
 114     TASK_INIT(&ch->conntask, 0, ata_conn_event, dev);
 115         for (i = 0; i < 16; i++) {
 116                 ch->user[i].revision = 0;
 117                 snprintf(buf, sizeof(buf), "dev%d.sata_rev", i);
 118                 if (resource_int_value(device_get_name(dev),
 119                     device_get_unit(dev), buf, &mode) != 0 &&
 120                     resource_int_value(device_get_name(dev),
 121                     device_get_unit(dev), "sata_rev", &mode) != 0)
 122                         mode = -1;
 123                 if (mode >= 0)
 124                         ch->user[i].revision = mode;
 125                 ch->user[i].mode = 0;
 126                 snprintf(buf, sizeof(buf), "dev%d.mode", i);
 127                 if (resource_string_value(device_get_name(dev),
 128                     device_get_unit(dev), buf, &res) == 0)
 129                         mode = ata_str2mode(res);
 130                 else if (resource_string_value(device_get_name(dev),
 131                     device_get_unit(dev), "mode", &res) == 0)
 132                         mode = ata_str2mode(res);
 133                 else
 134                         mode = -1;
 135                 if (mode >= 0)
 136                         ch->user[i].mode = mode;
 137                 if (ch->flags & ATA_SATA)
 138                         ch->user[i].bytecount = 8192;
 139                 else
 140                         ch->user[i].bytecount = MAXPHYS;
 141                 ch->user[i].caps = 0;
 142                 ch->curr[i] = ch->user[i];
 143                 if (ch->flags & ATA_SATA) {
 144                         if (ch->pm_level > 0)
 145                                 ch->user[i].caps |= CTS_SATA_CAPS_H_PMREQ;
 146                         if (ch->pm_level > 1)
 147                                 ch->user[i].caps |= CTS_SATA_CAPS_D_PMREQ;
 148                 } else {
 149                         if (!(ch->flags & ATA_NO_48BIT_DMA))
 150                                 ch->user[i].caps |= CTS_ATA_CAPS_H_DMA48;
 151                 }
 152         }
 153         callout_init(&ch->poll_callout, 1);
 154
 155     /* allocate DMA resources if DMA HW present*/
 156     if (ch->dma.alloc)
 157         ch->dma.alloc(dev);
 158
 159     /* setup interrupt delivery */
 160     rid = ATA_IRQ_RID;
 161     ch->r_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid,
 162                                        RF_SHAREABLE | RF_ACTIVE);
 163     if (!ch->r_irq) {
 164         device_printf(dev, "unable to allocate interrupt\n");
 165         return ENXIO;
 166     }
 167     if ((error = bus_setup_intr(dev, ch->r_irq, ATA_INTR_FLAGS, NULL,
 168                                 ata_interrupt, ch, &ch->ih))) {
 169         bus_release_resource(dev, SYS_RES_IRQ, rid, ch->r_irq);
 170         device_printf(dev, "unable to setup interrupt\n");
 171         return error;
 172     }
 173
 174         if (ch->flags & ATA_PERIODIC_POLL)
 175                 callout_reset(&ch->poll_callout, hz, ata_periodic_poll, ch);
 176         mtx_lock(&ch->state_mtx);
 177         /* Create the device queue for our SIM. */
 178         devq = cam_simq_alloc(1);
 179         if (devq == NULL) {
 180                 device_printf(dev, "Unable to allocate simq\n");
 181                 error = ENOMEM;
 182                 goto err1;
 183         }
 184         /* Construct SIM entry */
 185         ch->sim = cam_sim_alloc(ataaction, atapoll, "ata", ch,
 186             device_get_unit(dev), &ch->state_mtx, 1, 0, devq);
 187         if (ch->sim == NULL) {
 188                 device_printf(dev, "unable to allocate sim\n");
 189                 cam_simq_free(devq);
 190                 error = ENOMEM;
 191                 goto err1;
 192         }
 193         if (xpt_bus_register(ch->sim, dev, 0) != CAM_SUCCESS) {
 194                 device_printf(dev, "unable to register xpt bus\n");
 195                 error = ENXIO;
 196                 goto err2;
 197         }
 198         if (xpt_create_path(&ch->path, /*periph*/NULL, cam_sim_path(ch->sim),
 199             CAM_TARGET_WILDCARD, CAM_LUN_WILDCARD) != CAM_REQ_CMP) {
 200                 device_printf(dev, "unable to create path\n");
 201                 error = ENXIO;
 202                 goto err3;
 203         }
 204         mtx_unlock(&ch->state_mtx);
 205         return (0);
 206
 207 err3:
 208         xpt_bus_deregister(cam_sim_path(ch->sim));
 209 err2:
 210         cam_sim_free(ch->sim, /*free_devq*/TRUE);
 211         ch->sim = NULL;
 212 err1:
 213         bus_release_resource(dev, SYS_RES_IRQ, rid, ch->r_irq);
 214         mtx_unlock(&ch->state_mtx);
 215         if (ch->flags & ATA_PERIODIC_POLL)
 216                 callout_drain(&ch->poll_callout);
 217         return (error);
 218 }
 219
 220 int
 221 ata_detach(device_t dev)
 222 {
 223     struct ata_channel *ch = device_get_softc(dev);
 224
 225     /* check that we have a valid channel to detach */
 226     if (!ch->r_irq)
 227         return ENXIO;
 228
 229     /* grap the channel lock so no new requests gets launched */
 230     mtx_lock(&ch->state_mtx);
 231     ch->state |= ATA_STALL_QUEUE;
 232     mtx_unlock(&ch->state_mtx);
 233     if (ch->flags & ATA_PERIODIC_POLL)
 234         callout_drain(&ch->poll_callout);
 235
 236     taskqueue_drain(taskqueue_thread, &ch->conntask);
 237
 238         mtx_lock(&ch->state_mtx);
 239         xpt_async(AC_LOST_DEVICE, ch->path, NULL);
 240         xpt_free_path(ch->path);
 241         xpt_bus_deregister(cam_sim_path(ch->sim));
 242         cam_sim_free(ch->sim, /*free_devq*/TRUE);
 243         ch->sim = NULL;
 244         mtx_unlock(&ch->state_mtx);
 245
 246     /* release resources */
 247     bus_teardown_intr(dev, ch->r_irq, ch->ih);
 248     bus_release_resource(dev, SYS_RES_IRQ, ATA_IRQ_RID, ch->r_irq);
 249     ch->r_irq = NULL;
 250
 251     /* free DMA resources if DMA HW present*/
 252     if (ch->dma.free)
 253         ch->dma.free(dev);
 254
 255     mtx_destroy(&ch->state_mtx);
 256     return 0;
 257 }
 258
 259 static void
 260 ata_conn_event(void *context, int dummy)
 261 {
 262         device_t dev = (device_t)context;
 263         struct ata_channel *ch = device_get_softc(dev);
 264         union ccb *ccb;
 265
 266         mtx_lock(&ch->state_mtx);
 267         if (ch->sim == NULL) {
 268                 mtx_unlock(&ch->state_mtx);
 269                 return;
 270         }
 271         ata_reinit(dev);
 272         if ((ccb = xpt_alloc_ccb_nowait()) == NULL)
 273                 return;
 274         if (xpt_create_path(&ccb->ccb_h.path, NULL,
 275             cam_sim_path(ch->sim),
 276             CAM_TARGET_WILDCARD, CAM_LUN_WILDCARD) != CAM_REQ_CMP) {
 277                 xpt_free_ccb(ccb);
 278                 return;
 279         }
 280         xpt_rescan(ccb);
 281         mtx_unlock(&ch->state_mtx);
 282 }
 283
 284 int
 285 ata_reinit(device_t dev)
 286 {
 287     struct ata_channel *ch = device_get_softc(dev);
 288     struct ata_request *request;
 289
 290         xpt_freeze_simq(ch->sim, 1);
 291         if ((request = ch->running)) {
 292                 ch->running = NULL;
 293                 if (ch->state == ATA_ACTIVE)
 294                     ch->state = ATA_IDLE;
 295                 callout_stop(&request->callout);
 296                 if (ch->dma.unload)
 297                     ch->dma.unload(request);
 298                 request->result = ERESTART;
 299                 ata_cam_end_transaction(dev, request);
 300         }
 301         /* reset the controller HW, the channel and device(s) */
 302         ATA_RESET(dev);
 303         /* Tell the XPT about the event */
 304         xpt_async(AC_BUS_RESET, ch->path, NULL);
 305         xpt_release_simq(ch->sim, TRUE);
 306         return(0);
 307 }
 308
 309 int
 310 ata_suspend(device_t dev)
 311 {
 312     struct ata_channel *ch;
 313
 314     /* check for valid device */
 315     if (!dev || !(ch = device_get_softc(dev)))
 316         return ENXIO;
 317
 318         if (ch->flags & ATA_PERIODIC_POLL)
 319                 callout_drain(&ch->poll_callout);
 320         mtx_lock(&ch->state_mtx);
 321         xpt_freeze_simq(ch->sim, 1);
 322         while (ch->state != ATA_IDLE)
 323                 msleep(ch, &ch->state_mtx, PRIBIO, "atasusp", hz/100);
 324         mtx_unlock(&ch->state_mtx);
 325     return(0);
 326 }
 327
 328 int
 329 ata_resume(device_t dev)
 330 {
 331     struct ata_channel *ch;
 332     int error;
 333
 334     /* check for valid device */
 335     if (!dev || !(ch = device_get_softc(dev)))
 336         return ENXIO;
 337
 338         mtx_lock(&ch->state_mtx);
 339         error = ata_reinit(dev);
 340         xpt_release_simq(ch->sim, TRUE);
 341         mtx_unlock(&ch->state_mtx);
 342         if (ch->flags & ATA_PERIODIC_POLL)
 343                 callout_reset(&ch->poll_callout, hz, ata_periodic_poll, ch);
 344     return error;
 345 }
 346
 347 void
 348 ata_interrupt(void *data)
 349 {
 350     struct ata_channel *ch = (struct ata_channel *)data;
 351
 352     mtx_lock(&ch->state_mtx);
 353     ata_interrupt_locked(data);
 354     mtx_unlock(&ch->state_mtx);
 355 }
 356
 357 static void
 358 ata_interrupt_locked(void *data)
 359 {
 360         struct ata_channel *ch = (struct ata_channel *)data;
 361         struct ata_request *request;
 362
 363         /* ignore interrupt if its not for us */
 364         if (ch->hw.status && !ch->hw.status(ch->dev))
 365                 return;
 366
 367         /* do we have a running request */
 368         if (!(request = ch->running))
 369                 return;
 370
 371         ATA_DEBUG_RQ(request, "interrupt");
 372
 373         /* safetycheck for the right state */
 374         if (ch->state == ATA_IDLE) {
 375                 device_printf(request->dev, "interrupt on idle channel ignored\n");
 376                 return;
 377         }
 378
 379         /*
 380          * we have the HW locks, so end the transaction for this request
 381          * if it finishes immediately otherwise wait for next interrupt
 382          */
 383         if (ch->hw.end_transaction(request) == ATA_OP_FINISHED) {
 384                 ch->running = NULL;
 385                 if (ch->state == ATA_ACTIVE)
 386                         ch->state = ATA_IDLE;
 387                 ata_cam_end_transaction(ch->dev, request);
 388                 return;
 389         }
 390 }
 391
 392 static void
 393 ata_periodic_poll(void *data)
 394 {
 395     struct ata_channel *ch = (struct ata_channel *)data;
 396
 397     callout_reset(&ch->poll_callout, hz, ata_periodic_poll, ch);
 398     ata_interrupt(ch);
 399 }
 400
 401 void
 402 ata_print_cable(device_t dev, u_int8_t *who)
 403 {
 404     device_printf(dev,
 405                   "DMA limited to UDMA33, %s found non-ATA66 cable\n", who);
 406 }
 407
 408 /*
 409  * misc support functions
 410  */
 411 void
 412 ata_default_registers(device_t dev)
 413 {
 414     struct ata_channel *ch = device_get_softc(dev);
 415
 416     /* fill in the defaults from whats setup already */
 417     ch->r_io[ATA_ERROR].res = ch->r_io[ATA_FEATURE].res;
 418     ch->r_io[ATA_ERROR].offset = ch->r_io[ATA_FEATURE].offset;
 419     ch->r_io[ATA_IREASON].res = ch->r_io[ATA_COUNT].res;
 420     ch->r_io[ATA_IREASON].offset = ch->r_io[ATA_COUNT].offset;
 421     ch->r_io[ATA_STATUS].res = ch->r_io[ATA_COMMAND].res;
 422     ch->r_io[ATA_STATUS].offset = ch->r_io[ATA_COMMAND].offset;
 423     ch->r_io[ATA_ALTSTAT].res = ch->r_io[ATA_CONTROL].res;
 424     ch->r_io[ATA_ALTSTAT].offset = ch->r_io[ATA_CONTROL].offset;
 425 }
 426
 427 void
 428 ata_udelay(int interval)
 429 {
 430     /* for now just use DELAY, the timer/sleep subsytems are not there yet */
 431     if (1 || interval < (1000000/hz) || ata_delayed_attach)
 432         DELAY(interval);
 433     else
 434         pause("ataslp", interval/(1000000/hz));
 435 }
 436
 437 const char *
 438 ata_cmd2str(struct ata_request *request)
 439 {
 440         static char buffer[20];
 441
 442         if (request->flags & ATA_R_ATAPI) {
 443                 switch (request->u.atapi.sense.key ?
 444                     request->u.atapi.saved_cmd : request->u.atapi.ccb[0]) {
 445                 case 0x00: return ("TEST_UNIT_READY");
 446                 case 0x01: return ("REZERO");
 447                 case 0x03: return ("REQUEST_SENSE");
 448                 case 0x04: return ("FORMAT");
 449                 case 0x08: return ("READ");
 450                 case 0x0a: return ("WRITE");
 451                 case 0x10: return ("WEOF");
 452                 case 0x11: return ("SPACE");
 453                 case 0x12: return ("INQUIRY");
 454                 case 0x15: return ("MODE_SELECT");
 455                 case 0x19: return ("ERASE");
 456                 case 0x1a: return ("MODE_SENSE");
 457                 case 0x1b: return ("START_STOP");
 458                 case 0x1e: return ("PREVENT_ALLOW");
 459                 case 0x23: return ("ATAPI_READ_FORMAT_CAPACITIES");
 460                 case 0x25: return ("READ_CAPACITY");
 461                 case 0x28: return ("READ_BIG");
 462                 case 0x2a: return ("WRITE_BIG");
 463                 case 0x2b: return ("LOCATE");
 464                 case 0x34: return ("READ_POSITION");
 465                 case 0x35: return ("SYNCHRONIZE_CACHE");
 466                 case 0x3b: return ("WRITE_BUFFER");
 467                 case 0x3c: return ("READ_BUFFER");
 468                 case 0x42: return ("READ_SUBCHANNEL");
 469                 case 0x43: return ("READ_TOC");
 470                 case 0x45: return ("PLAY_10");
 471                 case 0x47: return ("PLAY_MSF");
 472                 case 0x48: return ("PLAY_TRACK");
 473                 case 0x4b: return ("PAUSE");
 474                 case 0x51: return ("READ_DISK_INFO");
 475                 case 0x52: return ("READ_TRACK_INFO");
 476                 case 0x53: return ("RESERVE_TRACK");
 477                 case 0x54: return ("SEND_OPC_INFO");
 478                 case 0x55: return ("MODE_SELECT_BIG");
 479                 case 0x58: return ("REPAIR_TRACK");
 480                 case 0x59: return ("READ_MASTER_CUE");
 481                 case 0x5a: return ("MODE_SENSE_BIG");
 482                 case 0x5b: return ("CLOSE_TRACK/SESSION");
 483                 case 0x5c: return ("READ_BUFFER_CAPACITY");
 484                 case 0x5d: return ("SEND_CUE_SHEET");
 485                 case 0x96: return ("SERVICE_ACTION_IN");
 486                 case 0xa1: return ("BLANK_CMD");
 487                 case 0xa3: return ("SEND_KEY");
 488                 case 0xa4: return ("REPORT_KEY");
 489                 case 0xa5: return ("PLAY_12");
 490                 case 0xa6: return ("LOAD_UNLOAD");
 491                 case 0xad: return ("READ_DVD_STRUCTURE");
 492                 case 0xb4: return ("PLAY_CD");
 493                 case 0xbb: return ("SET_SPEED");
 494                 case 0xbd: return ("MECH_STATUS");
 495                 case 0xbe: return ("READ_CD");
 496                 case 0xff: return ("POLL_DSC");
 497                 }
 498         } else {
 499                 switch (request->u.ata.command) {
 500                 case 0x00:
 501                         switch (request->u.ata.feature) {
 502                         case 0x00: return ("NOP FLUSHQUEUE");
 503                         case 0x01: return ("NOP AUTOPOLL");
 504                         }
 505                         return ("NOP");
 506                 case 0x03: return ("CFA_REQUEST_EXTENDED_ERROR");
 507                 case 0x06:
 508                         switch (request->u.ata.feature) {
 509                         case 0x01: return ("DSM TRIM");
 510                         }
 511                         return "DSM";
 512                 case 0x08: return ("DEVICE_RESET");
 513                 case 0x20: return ("READ");
 514                 case 0x24: return ("READ48");
 515                 case 0x25: return ("READ_DMA48");
 516                 case 0x26: return ("READ_DMA_QUEUED48");
 517                 case 0x27: return ("READ_NATIVE_MAX_ADDRESS48");
 518                 case 0x29: return ("READ_MUL48");
 519                 case 0x2a: return ("READ_STREAM_DMA48");
 520                 case 0x2b: return ("READ_STREAM48");
 521                 case 0x2f: return ("READ_LOG_EXT");
 522                 case 0x30: return ("WRITE");
 523                 case 0x34: return ("WRITE48");
 524                 case 0x35: return ("WRITE_DMA48");
 525                 case 0x36: return ("WRITE_DMA_QUEUED48");
 526                 case 0x37: return ("SET_MAX_ADDRESS48");
 527                 case 0x39: return ("WRITE_MUL48");
 528                 case 0x3a: return ("WRITE_STREAM_DMA48");
 529                 case 0x3b: return ("WRITE_STREAM48");
 530                 case 0x3d: return ("WRITE_DMA_FUA48");
 531                 case 0x3e: return ("WRITE_DMA_QUEUED_FUA48");
 532                 case 0x3f: return ("WRITE_LOG_EXT");
 533                 case 0x40: return ("READ_VERIFY");
 534                 case 0x42: return ("READ_VERIFY48");
 535                 case 0x45:
 536                         switch (request->u.ata.feature) {
 537                         case 0x55: return ("WRITE_UNCORRECTABLE48 PSEUDO");
 538                         case 0xaa: return ("WRITE_UNCORRECTABLE48 FLAGGED");
 539                         }
 540                         return "WRITE_UNCORRECTABLE48";
 541                 case 0x51: return ("CONFIGURE_STREAM");
 542                 case 0x60: return ("READ_FPDMA_QUEUED");
 543                 case 0x61: return ("WRITE_FPDMA_QUEUED");
 544                 case 0x63: return ("NCQ_NON_DATA");
 545                 case 0x64: return ("SEND_FPDMA_QUEUED");
 546                 case 0x65: return ("RECEIVE_FPDMA_QUEUED");
 547                 case 0x67:
 548                         if (request->u.ata.feature == 0xec)
 549                                 return ("SEP_ATTN IDENTIFY");
 550                         switch (request->u.ata.lba) {
 551                         case 0x00: return ("SEP_ATTN READ BUFFER");
 552                         case 0x02: return ("SEP_ATTN RECEIVE DIAGNOSTIC RESULTS");
 553                         case 0x80: return ("SEP_ATTN WRITE BUFFER");
 554                         case 0x82: return ("SEP_ATTN SEND DIAGNOSTIC");
 555                         }
 556                         return ("SEP_ATTN");
 557                 case 0x70: return ("SEEK");
 558                 case 0x87: return ("CFA_TRANSLATE_SECTOR");
 559                 case 0x90: return ("EXECUTE_DEVICE_DIAGNOSTIC");
 560                 case 0x92: return ("DOWNLOAD_MICROCODE");
 561                 case 0xa0: return ("PACKET");
 562                 case 0xa1: return ("ATAPI_IDENTIFY");
 563                 case 0xa2: return ("SERVICE");
 564                 case 0xb0:
 565                         switch(request->u.ata.feature) {
 566                         case 0xd0: return ("SMART READ ATTR VALUES");
 567                         case 0xd1: return ("SMART READ ATTR THRESHOLDS");
 568                         case 0xd3: return ("SMART SAVE ATTR VALUES");
 569                         case 0xd4: return ("SMART EXECUTE OFFLINE IMMEDIATE");
 570                         case 0xd5: return ("SMART READ LOG DATA");
 571                         case 0xd8: return ("SMART ENABLE OPERATION");
 572                         case 0xd9: return ("SMART DISABLE OPERATION");
 573                         case 0xda: return ("SMART RETURN STATUS");
 574                         }
 575                         return ("SMART");
 576                 case 0xb1: return ("DEVICE CONFIGURATION");
 577                 case 0xc0: return ("CFA_ERASE");
 578                 case 0xc4: return ("READ_MUL");
 579                 case 0xc5: return ("WRITE_MUL");
 580                 case 0xc6: return ("SET_MULTI");
 581                 case 0xc7: return ("READ_DMA_QUEUED");
 582                 case 0xc8: return ("READ_DMA");
 583                 case 0xca: return ("WRITE_DMA");
 584                 case 0xcc: return ("WRITE_DMA_QUEUED");
 585                 case 0xcd: return ("CFA_WRITE_MULTIPLE_WITHOUT_ERASE");
 586                 case 0xce: return ("WRITE_MUL_FUA48");
 587                 case 0xd1: return ("CHECK_MEDIA_CARD_TYPE");
 588                 case 0xda: return ("GET_MEDIA_STATUS");
 589                 case 0xde: return ("MEDIA_LOCK");
 590                 case 0xdf: return ("MEDIA_UNLOCK");
 591                 case 0xe0: return ("STANDBY_IMMEDIATE");
 592                 case 0xe1: return ("IDLE_IMMEDIATE");
 593                 case 0xe2: return ("STANDBY");
 594                 case 0xe3: return ("IDLE");
 595                 case 0xe4: return ("READ_BUFFER/PM");
 596                 case 0xe5: return ("CHECK_POWER_MODE");
 597                 case 0xe6: return ("SLEEP");
 598                 case 0xe7: return ("FLUSHCACHE");
 599                 case 0xe8: return ("WRITE_PM");
 600                 case 0xea: return ("FLUSHCACHE48");
 601                 case 0xec: return ("ATA_IDENTIFY");
 602                 case 0xed: return ("MEDIA_EJECT");
 603                 case 0xef:
 604                         switch (request->u.ata.feature) {
 605                         case 0x03: return ("SETFEATURES SET TRANSFER MODE");
 606                         case 0x02: return ("SETFEATURES ENABLE WCACHE");
 607                         case 0x82: return ("SETFEATURES DISABLE WCACHE");
 608                         case 0x06: return ("SETFEATURES ENABLE PUIS");
 609                         case 0x86: return ("SETFEATURES DISABLE PUIS");
 610                         case 0x07: return ("SETFEATURES SPIN-UP");
 611                         case 0x10: return ("SETFEATURES ENABLE SATA FEATURE");
 612                         case 0x90: return ("SETFEATURES DISABLE SATA FEATURE");
 613                         case 0xaa: return ("SETFEATURES ENABLE RCACHE");
 614                         case 0x55: return ("SETFEATURES DISABLE RCACHE");
 615                         case 0x5d: return ("SETFEATURES ENABLE RELIRQ");
 616                         case 0xdd: return ("SETFEATURES DISABLE RELIRQ");
 617                         case 0x5e: return ("SETFEATURES ENABLE SRVIRQ");
 618                         case 0xde: return ("SETFEATURES DISABLE SRVIRQ");
 619                         }
 620                         return "SETFEATURES";
 621                 case 0xf1: return ("SECURITY_SET_PASSWORD");
 622                 case 0xf2: return ("SECURITY_UNLOCK");
 623                 case 0xf3: return ("SECURITY_ERASE_PREPARE");
 624                 case 0xf4: return ("SECURITY_ERASE_UNIT");
 625                 case 0xf5: return ("SECURITY_FREEZE_LOCK");
 626                 case 0xf6: return ("SECURITY_DISABLE_PASSWORD");
 627                 case 0xf8: return ("READ_NATIVE_MAX_ADDRESS");
 628                 case 0xf9: return ("SET_MAX_ADDRESS");
 629                 }
 630         }
 631         sprintf(buffer, "unknown CMD (0x%02x)", request->u.ata.command);
 632         return (buffer);
 633 }
 634
 635 const char *
 636 ata_mode2str(int mode)
 637 {
 638     switch (mode) {
 639     case -1: return "UNSUPPORTED";
 640     case ATA_PIO0: return "PIO0";
 641     case ATA_PIO1: return "PIO1";
 642     case ATA_PIO2: return "PIO2";
 643     case ATA_PIO3: return "PIO3";
 644     case ATA_PIO4: return "PIO4";
 645     case ATA_WDMA0: return "WDMA0";
 646     case ATA_WDMA1: return "WDMA1";
 647     case ATA_WDMA2: return "WDMA2";
 648     case ATA_UDMA0: return "UDMA16";
 649     case ATA_UDMA1: return "UDMA25";
 650     case ATA_UDMA2: return "UDMA33";
 651     case ATA_UDMA3: return "UDMA40";
 652     case ATA_UDMA4: return "UDMA66";
 653     case ATA_UDMA5: return "UDMA100";
 654     case ATA_UDMA6: return "UDMA133";
 655     case ATA_SA150: return "SATA150";
 656     case ATA_SA300: return "SATA300";
 657     case ATA_SA600: return "SATA600";
 658     default:
 659         if (mode & ATA_DMA_MASK)
 660             return "BIOSDMA";
 661         else
 662             return "BIOSPIO";
 663     }
 664 }
 665
 666 static int
 667 ata_str2mode(const char *str)
 668 {
 669
 670         if (!strcasecmp(str, "PIO0")) return (ATA_PIO0);
 671         if (!strcasecmp(str, "PIO1")) return (ATA_PIO1);
 672         if (!strcasecmp(str, "PIO2")) return (ATA_PIO2);
 673         if (!strcasecmp(str, "PIO3")) return (ATA_PIO3);
 674         if (!strcasecmp(str, "PIO4")) return (ATA_PIO4);
 675         if (!strcasecmp(str, "WDMA0")) return (ATA_WDMA0);
 676         if (!strcasecmp(str, "WDMA1")) return (ATA_WDMA1);
 677         if (!strcasecmp(str, "WDMA2")) return (ATA_WDMA2);
 678         if (!strcasecmp(str, "UDMA0")) return (ATA_UDMA0);
 679         if (!strcasecmp(str, "UDMA16")) return (ATA_UDMA0);
 680         if (!strcasecmp(str, "UDMA1")) return (ATA_UDMA1);
 681         if (!strcasecmp(str, "UDMA25")) return (ATA_UDMA1);
 682         if (!strcasecmp(str, "UDMA2")) return (ATA_UDMA2);
 683         if (!strcasecmp(str, "UDMA33")) return (ATA_UDMA2);
 684         if (!strcasecmp(str, "UDMA3")) return (ATA_UDMA3);
 685         if (!strcasecmp(str, "UDMA44")) return (ATA_UDMA3);
 686         if (!strcasecmp(str, "UDMA4")) return (ATA_UDMA4);
 687         if (!strcasecmp(str, "UDMA66")) return (ATA_UDMA4);
 688         if (!strcasecmp(str, "UDMA5")) return (ATA_UDMA5);
 689         if (!strcasecmp(str, "UDMA100")) return (ATA_UDMA5);
 690         if (!strcasecmp(str, "UDMA6")) return (ATA_UDMA6);
 691         if (!strcasecmp(str, "UDMA133")) return (ATA_UDMA6);
 692         return (-1);
 693 }
 694
 695 int
 696 ata_atapi(device_t dev, int target)
 697 {
 698     struct ata_channel *ch = device_get_softc(dev);
 699
 700     return (ch->devices & (ATA_ATAPI_MASTER << target));
 701 }
 702
 703 void
 704 ata_timeout(struct ata_request *request)
 705 {
 706         struct ata_channel *ch;
 707
 708         ch = device_get_softc(request->parent);
 709         //request->flags |= ATA_R_DEBUG;
 710         ATA_DEBUG_RQ(request, "timeout");
 711
 712         /*
 713          * If we have an ATA_ACTIVE request running, we flag the request
 714          * ATA_R_TIMEOUT so ata_cam_end_transaction() will handle it correctly.
 715          * Also, NULL out the running request so we wont loose the race with
 716          * an eventual interrupt arriving late.
 717          */
 718         if (ch->state == ATA_ACTIVE) {
 719                 request->flags |= ATA_R_TIMEOUT;
 720                 if (ch->dma.unload)
 721                         ch->dma.unload(request);
 722                 ch->running = NULL;
 723                 ch->state = ATA_IDLE;
 724                 ata_cam_end_transaction(ch->dev, request);
 725         }
 726         mtx_unlock(&ch->state_mtx);
 727 }
 728
 729 static void
 730 ata_cam_begin_transaction(device_t dev, union ccb *ccb)
 731 {
 732         struct ata_channel *ch = device_get_softc(dev);
 733         struct ata_request *request;
 734
 735         request = &ch->request;
 736         bzero(request, sizeof(*request));
 737
 738         /* setup request */
 739         request->dev = NULL;
 740         request->parent = dev;
 741         request->unit = ccb->ccb_h.target_id;
 742         if (ccb->ccb_h.func_code == XPT_ATA_IO) {
 743                 request->data = ccb->ataio.data_ptr;
 744                 request->bytecount = ccb->ataio.dxfer_len;
 745                 request->u.ata.command = ccb->ataio.cmd.command;
 746                 request->u.ata.feature = ((uint16_t)ccb->ataio.cmd.features_exp << 8) |
 747                                           (uint16_t)ccb->ataio.cmd.features;
 748                 request->u.ata.count = ((uint16_t)ccb->ataio.cmd.sector_count_exp << 8) |
 749                                         (uint16_t)ccb->ataio.cmd.sector_count;
 750                 if (ccb->ataio.cmd.flags & CAM_ATAIO_48BIT) {
 751                         request->flags |= ATA_R_48BIT;
 752                         request->u.ata.lba =
 753                                      ((uint64_t)ccb->ataio.cmd.lba_high_exp << 40) |
 754                                      ((uint64_t)ccb->ataio.cmd.lba_mid_exp << 32) |
 755                                      ((uint64_t)ccb->ataio.cmd.lba_low_exp << 24);
 756                 } else {
 757                         request->u.ata.lba =
 758                                      ((uint64_t)(ccb->ataio.cmd.device & 0x0f) << 24);
 759                 }
 760                 request->u.ata.lba |= ((uint64_t)ccb->ataio.cmd.lba_high << 16) |
 761                                       ((uint64_t)ccb->ataio.cmd.lba_mid << 8) |
 762                                        (uint64_t)ccb->ataio.cmd.lba_low;
 763                 if (ccb->ataio.cmd.flags & CAM_ATAIO_NEEDRESULT)
 764                         request->flags |= ATA_R_NEEDRESULT;
 765                 if ((ccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE &&
 766                     ccb->ataio.cmd.flags & CAM_ATAIO_DMA)
 767                         request->flags |= ATA_R_DMA;
 768                 if ((ccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN)
 769                         request->flags |= ATA_R_READ;
 770                 if ((ccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_OUT)
 771                         request->flags |= ATA_R_WRITE;
 772                 if (ccb->ataio.cmd.command == ATA_READ_MUL ||
 773                     ccb->ataio.cmd.command == ATA_READ_MUL48 ||
 774                     ccb->ataio.cmd.command == ATA_WRITE_MUL ||
 775                     ccb->ataio.cmd.command == ATA_WRITE_MUL48) {
 776                         request->transfersize = min(request->bytecount,
 777                             ch->curr[ccb->ccb_h.target_id].bytecount);
 778                 } else
 779                         request->transfersize = min(request->bytecount, 512);
 780         } else {
 781                 request->data = ccb->csio.data_ptr;
 782                 request->bytecount = ccb->csio.dxfer_len;
 783                 bcopy((ccb->ccb_h.flags & CAM_CDB_POINTER) ?
 784                     ccb->csio.cdb_io.cdb_ptr : ccb->csio.cdb_io.cdb_bytes,
 785                     request->u.atapi.ccb, ccb->csio.cdb_len);
 786                 request->flags |= ATA_R_ATAPI;
 787                 if (ch->curr[ccb->ccb_h.target_id].atapi == 16)
 788                         request->flags |= ATA_R_ATAPI16;
 789                 if ((ccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE &&
 790                     ch->curr[ccb->ccb_h.target_id].mode >= ATA_DMA)
 791                         request->flags |= ATA_R_DMA;
 792                 if ((ccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN)
 793                         request->flags |= ATA_R_READ;
 794                 if ((ccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_OUT)
 795                         request->flags |= ATA_R_WRITE;
 796                 request->transfersize = min(request->bytecount,
 797                     ch->curr[ccb->ccb_h.target_id].bytecount);
 798         }
 799         request->retries = 0;
 800         request->timeout = (ccb->ccb_h.timeout + 999) / 1000;
 801         callout_init_mtx(&request->callout, &ch->state_mtx, CALLOUT_RETURNUNLOCKED);
 802         request->ccb = ccb;
 803         request->flags |= ATA_R_DATA_IN_CCB;
 804
 805         ch->running = request;
 806         ch->state = ATA_ACTIVE;
 807         if (ch->hw.begin_transaction(request) == ATA_OP_FINISHED) {
 808             ch->running = NULL;
 809             ch->state = ATA_IDLE;
 810             ata_cam_end_transaction(dev, request);
 811             return;
 812         }
 813 }
 814
 815 static void
 816 ata_cam_request_sense(device_t dev, struct ata_request *request)
 817 {
 818         struct ata_channel *ch = device_get_softc(dev);
 819         union ccb *ccb = request->ccb;
 820
 821         ch->requestsense = 1;
 822
 823         bzero(request, sizeof(*request));
 824         request->dev = NULL;
 825         request->parent = dev;
 826         request->unit = ccb->ccb_h.target_id;
 827         request->data = (void *)&ccb->csio.sense_data;
 828         request->bytecount = ccb->csio.sense_len;
 829         request->u.atapi.ccb[0] = ATAPI_REQUEST_SENSE;
 830         request->u.atapi.ccb[4] = ccb->csio.sense_len;
 831         request->flags |= ATA_R_ATAPI;
 832         if (ch->curr[ccb->ccb_h.target_id].atapi == 16)
 833                 request->flags |= ATA_R_ATAPI16;
 834         if (ch->curr[ccb->ccb_h.target_id].mode >= ATA_DMA)
 835                 request->flags |= ATA_R_DMA;
 836         request->flags |= ATA_R_READ;
 837         request->transfersize = min(request->bytecount,
 838             ch->curr[ccb->ccb_h.target_id].bytecount);
 839         request->retries = 0;
 840         request->timeout = (ccb->ccb_h.timeout + 999) / 1000;
 841         callout_init_mtx(&request->callout, &ch->state_mtx, CALLOUT_RETURNUNLOCKED);
 842         request->ccb = ccb;
 843
 844         ch->running = request;
 845         ch->state = ATA_ACTIVE;
 846         if (ch->hw.begin_transaction(request) == ATA_OP_FINISHED) {
 847                 ch->running = NULL;
 848                 ch->state = ATA_IDLE;
 849                 ata_cam_end_transaction(dev, request);
 850                 return;
 851         }
 852 }
 853
 854 static void
 855 ata_cam_process_sense(device_t dev, struct ata_request *request)
 856 {
 857         struct ata_channel *ch = device_get_softc(dev);
 858         union ccb *ccb = request->ccb;
 859         int fatalerr = 0;
 860
 861         ch->requestsense = 0;
 862
 863         if (request->flags & ATA_R_TIMEOUT)
 864                 fatalerr = 1;
 865         if ((request->flags & ATA_R_TIMEOUT) == 0 &&
 866             (request->status & ATA_S_ERROR) == 0 &&
 867             request->result == 0) {
 868                 ccb->ccb_h.status |= CAM_AUTOSNS_VALID;
 869         } else {
 870                 ccb->ccb_h.status &= ~CAM_STATUS_MASK;
 871                 ccb->ccb_h.status |= CAM_AUTOSENSE_FAIL;
 872         }
 873
 874         xpt_done(ccb);
 875         /* Do error recovery if needed. */
 876         if (fatalerr)
 877                 ata_reinit(dev);
 878 }
 879
 880 static void
 881 ata_cam_end_transaction(device_t dev, struct ata_request *request)
 882 {
 883         struct ata_channel *ch = device_get_softc(dev);
 884         union ccb *ccb = request->ccb;
 885         int fatalerr = 0;
 886
 887         if (ch->requestsense) {
 888                 ata_cam_process_sense(dev, request);
 889                 return;
 890         }
 891
 892         ccb->ccb_h.status &= ~CAM_STATUS_MASK;
 893         if (request->flags & ATA_R_TIMEOUT) {
 894                 xpt_freeze_simq(ch->sim, 1);
 895                 ccb->ccb_h.status &= ~CAM_STATUS_MASK;
 896                 ccb->ccb_h.status |= CAM_CMD_TIMEOUT | CAM_RELEASE_SIMQ;
 897                 fatalerr = 1;
 898         } else if (request->status & ATA_S_ERROR) {
 899                 if (ccb->ccb_h.func_code == XPT_ATA_IO) {
 900                         ccb->ccb_h.status |= CAM_ATA_STATUS_ERROR;
 901                 } else {
 902                         ccb->ccb_h.status |= CAM_SCSI_STATUS_ERROR;
 903                         ccb->csio.scsi_status = SCSI_STATUS_CHECK_COND;
 904                 }
 905         } else if (request->result == ERESTART)
 906                 ccb->ccb_h.status |= CAM_REQUEUE_REQ;
 907         else if (request->result != 0)
 908                 ccb->ccb_h.status |= CAM_REQ_CMP_ERR;
 909         else
 910                 ccb->ccb_h.status |= CAM_REQ_CMP;
 911         if ((ccb->ccb_h.status & CAM_STATUS_MASK) != CAM_REQ_CMP &&
 912             !(ccb->ccb_h.status & CAM_DEV_QFRZN)) {
 913                 xpt_freeze_devq(ccb->ccb_h.path, 1);
 914                 ccb->ccb_h.status |= CAM_DEV_QFRZN;
 915         }
 916         if (ccb->ccb_h.func_code == XPT_ATA_IO &&
 917             ((request->status & ATA_S_ERROR) ||
 918             (ccb->ataio.cmd.flags & CAM_ATAIO_NEEDRESULT))) {
 919                 struct ata_res *res = &ccb->ataio.res;
 920                 res->status = request->status;
 921                 res->error = request->error;
 922                 res->lba_low = request->u.ata.lba;
 923                 res->lba_mid = request->u.ata.lba >> 8;
 924                 res->lba_high = request->u.ata.lba >> 16;
 925                 res->device = request->u.ata.lba >> 24;
 926                 res->lba_low_exp = request->u.ata.lba >> 24;
 927                 res->lba_mid_exp = request->u.ata.lba >> 32;
 928                 res->lba_high_exp = request->u.ata.lba >> 40;
 929                 res->sector_count = request->u.ata.count;
 930                 res->sector_count_exp = request->u.ata.count >> 8;
 931         }
 932         if ((ccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE) {
 933                 if (ccb->ccb_h.func_code == XPT_ATA_IO) {
 934                         ccb->ataio.resid =
 935                             ccb->ataio.dxfer_len - request->donecount;
 936                 } else {
 937                         ccb->csio.resid =
 938                             ccb->csio.dxfer_len - request->donecount;
 939                 }
 940         }
 941         if ((ccb->ccb_h.status & CAM_STATUS_MASK) == CAM_SCSI_STATUS_ERROR &&
 942             (ccb->ccb_h.flags & CAM_DIS_AUTOSENSE) == 0)
 943                 ata_cam_request_sense(dev, request);
 944         else
 945                 xpt_done(ccb);
 946         /* Do error recovery if needed. */
 947         if (fatalerr)
 948                 ata_reinit(dev);
 949 }
 950
 951 static int
 952 ata_check_ids(device_t dev, union ccb *ccb)
 953 {
 954         struct ata_channel *ch = device_get_softc(dev);
 955
 956         if (ccb->ccb_h.target_id > ((ch->flags & ATA_NO_SLAVE) ? 0 : 1)) {
 957                 ccb->ccb_h.status = CAM_TID_INVALID;
 958                 xpt_done(ccb);
 959                 return (-1);
 960         }
 961         if (ccb->ccb_h.target_lun != 0) {
 962                 ccb->ccb_h.status = CAM_LUN_INVALID;
 963                 xpt_done(ccb);
 964                 return (-1);
 965         }
 966         return (0);
 967 }
 968
 969 static void
 970 ataaction(struct cam_sim *sim, union ccb *ccb)
 971 {
 972         device_t dev, parent;
 973         struct ata_channel *ch;
 974
 975         CAM_DEBUG(ccb->ccb_h.path, CAM_DEBUG_TRACE, ("ataaction func_code=%x\n",
 976             ccb->ccb_h.func_code));
 977
 978         ch = (struct ata_channel *)cam_sim_softc(sim);
 979         dev = ch->dev;
 980         switch (ccb->ccb_h.func_code) {
 981         /* Common cases first */
 982         case XPT_ATA_IO:        /* Execute the requested I/O operation */
 983         case XPT_SCSI_IO:
 984                 if (ata_check_ids(dev, ccb))
 985                         return;
 986                 if ((ch->devices & ((ATA_ATA_MASTER | ATA_ATAPI_MASTER)
 987                     << ccb->ccb_h.target_id)) == 0) {
 988                         ccb->ccb_h.status = CAM_SEL_TIMEOUT;
 989                         break;
 990                 }
 991                 if (ch->running)
 992                         device_printf(dev, "already running!\n");
 993                 if (ccb->ccb_h.func_code == XPT_ATA_IO &&
 994                     (ccb->ataio.cmd.flags & CAM_ATAIO_CONTROL) &&
 995                     (ccb->ataio.cmd.control & ATA_A_RESET)) {
 996                         struct ata_res *res = &ccb->ataio.res;
 997
 998                         bzero(res, sizeof(*res));
 999                         if (ch->devices & (ATA_ATA_MASTER << ccb->ccb_h.target_id)) {
1000                                 res->lba_high = 0;
1001                                 res->lba_mid = 0;
1002                         } else {
1003                                 res->lba_high = 0xeb;
1004                                 res->lba_mid = 0x14;
1005                         }
1006                         ccb->ccb_h.status = CAM_REQ_CMP;
1007                         break;
1008                 }
1009                 ata_cam_begin_transaction(dev, ccb);
1010                 return;
1011         case XPT_EN_LUN:                /* Enable LUN as a target */
1012         case XPT_TARGET_IO:             /* Execute target I/O request */
1013         case XPT_ACCEPT_TARGET_IO:      /* Accept Host Target Mode CDB */
1014         case XPT_CONT_TARGET_IO:        /* Continue Host Target I/O Connection*/
1015         case XPT_ABORT:                 /* Abort the specified CCB */
1016                 /* XXX Implement */
1017                 ccb->ccb_h.status = CAM_REQ_INVALID;
1018                 break;
1019         case XPT_SET_TRAN_SETTINGS:
1020         {
1021                 struct  ccb_trans_settings *cts = &ccb->cts;
1022                 struct  ata_cam_device *d;
1023
1024                 if (ata_check_ids(dev, ccb))
1025                         return;
1026                 if (cts->type == CTS_TYPE_CURRENT_SETTINGS)
1027                         d = &ch->curr[ccb->ccb_h.target_id];
1028                 else
1029                         d = &ch->user[ccb->ccb_h.target_id];
1030                 if (ch->flags & ATA_SATA) {
1031                         if (cts->xport_specific.sata.valid & CTS_SATA_VALID_REVISION)
1032                                 d->revision = cts->xport_specific.sata.revision;
1033                         if (cts->xport_specific.sata.valid & CTS_SATA_VALID_MODE) {
1034                                 if (cts->type == CTS_TYPE_CURRENT_SETTINGS) {
1035                                         d->mode = ATA_SETMODE(ch->dev,
1036                                             ccb->ccb_h.target_id,
1037                                             cts->xport_specific.sata.mode);
1038                                 } else
1039                                         d->mode = cts->xport_specific.sata.mode;
1040                         }
1041                         if (cts->xport_specific.sata.valid & CTS_SATA_VALID_BYTECOUNT)
1042                                 d->bytecount = min(8192, cts->xport_specific.sata.bytecount);
1043                         if (cts->xport_specific.sata.valid & CTS_SATA_VALID_ATAPI)
1044                                 d->atapi = cts->xport_specific.sata.atapi;
1045                         if (cts->xport_specific.sata.valid & CTS_SATA_VALID_CAPS)
1046                                 d->caps = cts->xport_specific.sata.caps;
1047                 } else {
1048                         if (cts->xport_specific.ata.valid & CTS_ATA_VALID_MODE) {
1049                                 if (cts->type == CTS_TYPE_CURRENT_SETTINGS) {
1050                                         d->mode = ATA_SETMODE(ch->dev,
1051                                             ccb->ccb_h.target_id,
1052                                             cts->xport_specific.ata.mode);
1053                                 } else
1054                                         d->mode = cts->xport_specific.ata.mode;
1055                         }
1056                         if (cts->xport_specific.ata.valid & CTS_ATA_VALID_BYTECOUNT)
1057                                 d->bytecount = cts->xport_specific.ata.bytecount;
1058                         if (cts->xport_specific.ata.valid & CTS_ATA_VALID_ATAPI)
1059                                 d->atapi = cts->xport_specific.ata.atapi;
1060                         if (cts->xport_specific.ata.valid & CTS_ATA_VALID_CAPS)
1061                                 d->caps = cts->xport_specific.ata.caps;
1062                 }
1063                 ccb->ccb_h.status = CAM_REQ_CMP;
1064                 break;
1065         }
1066         case XPT_GET_TRAN_SETTINGS:
1067         {
1068                 struct  ccb_trans_settings *cts = &ccb->cts;
1069                 struct  ata_cam_device *d;
1070
1071                 if (ata_check_ids(dev, ccb))
1072                         return;
1073                 if (cts->type == CTS_TYPE_CURRENT_SETTINGS)
1074                         d = &ch->curr[ccb->ccb_h.target_id];
1075                 else
1076                         d = &ch->user[ccb->ccb_h.target_id];
1077                 cts->protocol = PROTO_UNSPECIFIED;
1078                 cts->protocol_version = PROTO_VERSION_UNSPECIFIED;
1079                 if (ch->flags & ATA_SATA) {
1080                         cts->transport = XPORT_SATA;
1081                         cts->transport_version = XPORT_VERSION_UNSPECIFIED;
1082                         cts->xport_specific.sata.valid = 0;
1083                         cts->xport_specific.sata.mode = d->mode;
1084                         cts->xport_specific.sata.valid |= CTS_SATA_VALID_MODE;
1085                         cts->xport_specific.sata.bytecount = d->bytecount;
1086                         cts->xport_specific.sata.valid |= CTS_SATA_VALID_BYTECOUNT;
1087                         if (cts->type == CTS_TYPE_CURRENT_SETTINGS) {
1088                                 cts->xport_specific.sata.revision =
1089                                     ATA_GETREV(dev, ccb->ccb_h.target_id);
1090                                 if (cts->xport_specific.sata.revision != 0xff) {
1091                                         cts->xport_specific.sata.valid |=
1092                                             CTS_SATA_VALID_REVISION;
1093                                 }
1094                                 cts->xport_specific.sata.caps =
1095                                     d->caps & CTS_SATA_CAPS_D;
1096                                 if (ch->pm_level) {
1097                                         cts->xport_specific.sata.caps |=
1098                                             CTS_SATA_CAPS_H_PMREQ;
1099                                 }
1100                                 cts->xport_specific.sata.caps &=
1101                                     ch->user[ccb->ccb_h.target_id].caps;
1102                         } else {
1103                                 cts->xport_specific.sata.revision = d->revision;
1104                                 cts->xport_specific.sata.valid |= CTS_SATA_VALID_REVISION;
1105                                 cts->xport_specific.sata.caps = d->caps;
1106                         }
1107                         cts->xport_specific.sata.valid |= CTS_SATA_VALID_CAPS;
1108                         cts->xport_specific.sata.atapi = d->atapi;
1109                         cts->xport_specific.sata.valid |= CTS_SATA_VALID_ATAPI;
1110                 } else {
1111                         cts->transport = XPORT_ATA;
1112                         cts->transport_version = XPORT_VERSION_UNSPECIFIED;
1113                         cts->xport_specific.ata.valid = 0;
1114                         cts->xport_specific.ata.mode = d->mode;
1115                         cts->xport_specific.ata.valid |= CTS_ATA_VALID_MODE;
1116                         cts->xport_specific.ata.bytecount = d->bytecount;
1117                         cts->xport_specific.ata.valid |= CTS_ATA_VALID_BYTECOUNT;
1118                         if (cts->type == CTS_TYPE_CURRENT_SETTINGS) {
1119                                 cts->xport_specific.ata.caps =
1120                                     d->caps & CTS_ATA_CAPS_D;
1121                                 if (!(ch->flags & ATA_NO_48BIT_DMA))
1122                                         cts->xport_specific.ata.caps |=
1123                                             CTS_ATA_CAPS_H_DMA48;
1124                                 cts->xport_specific.ata.caps &=
1125                                     ch->user[ccb->ccb_h.target_id].caps;
1126                         } else
1127                                 cts->xport_specific.ata.caps = d->caps;
1128                         cts->xport_specific.ata.valid |= CTS_ATA_VALID_CAPS;
1129                         cts->xport_specific.ata.atapi = d->atapi;
1130                         cts->xport_specific.ata.valid |= CTS_ATA_VALID_ATAPI;
1131                 }
1132                 ccb->ccb_h.status = CAM_REQ_CMP;
1133                 break;
1134         }
1135         case XPT_RESET_BUS:             /* Reset the specified SCSI bus */
1136         case XPT_RESET_DEV:     /* Bus Device Reset the specified SCSI device */
1137                 ata_reinit(dev);
1138                 ccb->ccb_h.status = CAM_REQ_CMP;
1139                 break;
1140         case XPT_TERM_IO:               /* Terminate the I/O process */
1141                 /* XXX Implement */
1142                 ccb->ccb_h.status = CAM_REQ_INVALID;
1143                 break;
1144         case XPT_PATH_INQ:              /* Path routing inquiry */
1145         {
1146                 struct ccb_pathinq *cpi = &ccb->cpi;
1147
1148                 parent = device_get_parent(dev);
1149                 cpi->version_num = 1; /* XXX??? */
1150                 cpi->hba_inquiry = PI_SDTR_ABLE;
1151                 cpi->target_sprt = 0;
1152                 cpi->hba_misc = PIM_SEQSCAN;
1153                 cpi->hba_eng_cnt = 0;
1154                 if (ch->flags & ATA_NO_SLAVE)
1155                         cpi->max_target = 0;
1156                 else
1157                         cpi->max_target = 1;
1158                 cpi->max_lun = 0;
1159                 cpi->initiator_id = 0;
1160                 cpi->bus_id = cam_sim_bus(sim);
1161                 if (ch->flags & ATA_SATA)
1162                         cpi->base_transfer_speed = 150000;
1163                 else
1164                         cpi->base_transfer_speed = 3300;
1165                 strlcpy(cpi->sim_vid, "FreeBSD", SIM_IDLEN);
1166                 strlcpy(cpi->hba_vid, "ATA", HBA_IDLEN);
1167                 strlcpy(cpi->dev_name, cam_sim_name(sim), DEV_IDLEN);
1168                 cpi->unit_number = cam_sim_unit(sim);
1169                 if (ch->flags & ATA_SATA)
1170                         cpi->transport = XPORT_SATA;
1171                 else
1172                         cpi->transport = XPORT_ATA;
1173                 cpi->transport_version = XPORT_VERSION_UNSPECIFIED;
1174                 cpi->protocol = PROTO_ATA;
1175                 cpi->protocol_version = PROTO_VERSION_UNSPECIFIED;
1176                 cpi->maxio = ch->dma.max_iosize ? ch->dma.max_iosize : DFLTPHYS;
1177                 if (device_get_devclass(device_get_parent(parent)) ==
1178                     devclass_find("pci")) {
1179                         cpi->hba_vendor = pci_get_vendor(parent);
1180                         cpi->hba_device = pci_get_device(parent);
1181                         cpi->hba_subvendor = pci_get_subvendor(parent);
1182                         cpi->hba_subdevice = pci_get_subdevice(parent);
1183                 }
1184                 cpi->ccb_h.status = CAM_REQ_CMP;
1185                 break;
1186         }
1187         default:
1188                 ccb->ccb_h.status = CAM_REQ_INVALID;
1189                 break;
1190         }
1191         xpt_done(ccb);
1192 }
1193
1194 static void
1195 atapoll(struct cam_sim *sim)
1196 {
1197         struct ata_channel *ch = (struct ata_channel *)cam_sim_softc(sim);
1198
1199         ata_interrupt_locked(ch);
1200 }
1201
1202 /*
1203  * module handeling
1204  */
1205 static int
1206 ata_module_event_handler(module_t mod, int what, void *arg)
1207 {
1208
1209     switch (what) {
1210     case MOD_LOAD:
1211         return 0;
1212
1213     case MOD_UNLOAD:
1214         return 0;
1215
1216     default:
1217         return EOPNOTSUPP;
1218     }
1219 }
1220
1221 static moduledata_t ata_moduledata = { "ata", ata_module_event_handler, NULL };
1222 DECLARE_MODULE(ata, ata_moduledata, SI_SUB_CONFIGURE, SI_ORDER_SECOND);
1223 MODULE_VERSION(ata, 1);
1224 MODULE_DEPEND(ata, cam, 1, 1, 1);