2 * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting
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6 * modification, are permitted provided that the following conditions
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33 * Ioctl-related defintions for the Atheros Wireless LAN controller driver.
35 #ifndef _DEV_ATH_ATHIOCTL_H
36 #define _DEV_ATH_ATHIOCTL_H
39 u_int32_t ast_watchdog; /* device reset by watchdog */
40 u_int32_t ast_hardware; /* fatal hardware error interrupts */
41 u_int32_t ast_bmiss; /* beacon miss interrupts */
42 u_int32_t ast_bmiss_phantom;/* beacon miss interrupts */
43 u_int32_t ast_bstuck; /* beacon stuck interrupts */
44 u_int32_t ast_rxorn; /* rx overrun interrupts */
45 u_int32_t ast_rxeol; /* rx eol interrupts */
46 u_int32_t ast_txurn; /* tx underrun interrupts */
47 u_int32_t ast_mib; /* mib interrupts */
48 u_int32_t ast_intrcoal; /* interrupts coalesced */
49 u_int32_t ast_tx_packets; /* packet sent on the interface */
50 u_int32_t ast_tx_mgmt; /* management frames transmitted */
51 u_int32_t ast_tx_discard; /* frames discarded prior to assoc */
52 u_int32_t ast_tx_qstop; /* output stopped 'cuz no buffer */
53 u_int32_t ast_tx_encap; /* tx encapsulation failed */
54 u_int32_t ast_tx_nonode; /* tx failed 'cuz no node */
55 u_int32_t ast_tx_nombuf; /* tx failed 'cuz no mbuf */
56 u_int32_t ast_tx_nomcl; /* tx failed 'cuz no cluster */
57 u_int32_t ast_tx_linear; /* tx linearized to cluster */
58 u_int32_t ast_tx_nodata; /* tx discarded empty frame */
59 u_int32_t ast_tx_busdma; /* tx failed for dma resrcs */
60 u_int32_t ast_tx_xretries;/* tx failed 'cuz too many retries */
61 u_int32_t ast_tx_fifoerr; /* tx failed 'cuz FIFO underrun */
62 u_int32_t ast_tx_filtered;/* tx failed 'cuz xmit filtered */
63 u_int32_t ast_tx_shortretry;/* tx on-chip retries (short) */
64 u_int32_t ast_tx_longretry;/* tx on-chip retries (long) */
65 u_int32_t ast_tx_badrate; /* tx failed 'cuz bogus xmit rate */
66 u_int32_t ast_tx_noack; /* tx frames with no ack marked */
67 u_int32_t ast_tx_rts; /* tx frames with rts enabled */
68 u_int32_t ast_tx_cts; /* tx frames with cts enabled */
69 u_int32_t ast_tx_shortpre;/* tx frames with short preamble */
70 u_int32_t ast_tx_altrate; /* tx frames with alternate rate */
71 u_int32_t ast_tx_protect; /* tx frames with protection */
72 u_int32_t ast_tx_ctsburst;/* tx frames with cts and bursting */
73 u_int32_t ast_tx_ctsext; /* tx frames with cts extension */
74 u_int32_t ast_rx_nombuf; /* rx setup failed 'cuz no mbuf */
75 u_int32_t ast_rx_busdma; /* rx setup failed for dma resrcs */
76 u_int32_t ast_rx_orn; /* rx failed 'cuz of desc overrun */
77 u_int32_t ast_rx_crcerr; /* rx failed 'cuz of bad CRC */
78 u_int32_t ast_rx_fifoerr; /* rx failed 'cuz of FIFO overrun */
79 u_int32_t ast_rx_badcrypt;/* rx failed 'cuz decryption */
80 u_int32_t ast_rx_badmic; /* rx failed 'cuz MIC failure */
81 u_int32_t ast_rx_phyerr; /* rx failed 'cuz of PHY err */
82 u_int32_t ast_rx_phy[64]; /* rx PHY error per-code counts */
83 u_int32_t ast_rx_tooshort;/* rx discarded 'cuz frame too short */
84 u_int32_t ast_rx_toobig; /* rx discarded 'cuz frame too large */
85 u_int32_t ast_rx_packets; /* packet recv on the interface */
86 u_int32_t ast_rx_mgt; /* management frames received */
87 u_int32_t ast_rx_ctl; /* rx discarded 'cuz ctl frame */
88 int8_t ast_tx_rssi; /* tx rssi of last ack */
89 int8_t ast_rx_rssi; /* rx rssi from histogram */
90 u_int8_t ast_tx_rate; /* IEEE rate of last unicast tx */
91 u_int32_t ast_be_xmit; /* beacons transmitted */
92 u_int32_t ast_be_nombuf; /* beacon setup failed 'cuz no mbuf */
93 u_int32_t ast_per_cal; /* periodic calibration calls */
94 u_int32_t ast_per_calfail;/* periodic calibration failed */
95 u_int32_t ast_per_rfgain; /* periodic calibration rfgain reset */
96 u_int32_t ast_rate_calls; /* rate control checks */
97 u_int32_t ast_rate_raise; /* rate control raised xmit rate */
98 u_int32_t ast_rate_drop; /* rate control dropped xmit rate */
99 u_int32_t ast_ant_defswitch;/* rx/default antenna switches */
100 u_int32_t ast_ant_txswitch;/* tx antenna switches */
101 u_int32_t ast_ant_rx[8]; /* rx frames with antenna */
102 u_int32_t ast_ant_tx[8]; /* tx frames with antenna */
103 u_int32_t ast_cabq_xmit; /* cabq frames transmitted */
104 u_int32_t ast_cabq_busy; /* cabq found busy */
105 u_int32_t ast_tx_raw; /* tx frames through raw api */
106 u_int32_t ast_ff_txok; /* fast frames tx'd successfully */
107 u_int32_t ast_ff_txerr; /* fast frames tx'd w/ error */
108 u_int32_t ast_ff_rx; /* fast frames rx'd */
109 u_int32_t ast_ff_flush; /* fast frames flushed from staging q */
110 u_int32_t ast_tx_qfull; /* tx dropped 'cuz of queue limit */
111 int8_t ast_rx_noise; /* rx noise floor */
112 u_int32_t ast_tx_nobuf; /* tx dropped 'cuz no ath buffer */
113 u_int32_t ast_tdma_update;/* TDMA slot timing updates */
114 u_int32_t ast_tdma_timers;/* TDMA slot update set beacon timers */
115 u_int32_t ast_tdma_tsf; /* TDMA slot update set TSF */
116 u_int16_t ast_tdma_tsfadjp;/* TDMA slot adjust+ (usec, smoothed)*/
117 u_int16_t ast_tdma_tsfadjm;/* TDMA slot adjust- (usec, smoothed)*/
118 u_int32_t ast_tdma_ack; /* TDMA tx failed 'cuz ACK required */
119 u_int32_t ast_tx_raw_fail;/* raw tx failed 'cuz h/w down */
120 u_int32_t ast_tx_nofrag; /* tx dropped 'cuz no ath frag buffer */
121 u_int32_t ast_be_missed; /* missed beacons */
122 u_int32_t ast_ani_cal; /* ANI calibrations performed */
123 u_int32_t ast_rx_agg; /* number of aggregate frames RX'ed */
124 u_int32_t ast_rx_halfgi; /* RX half-GI */
125 u_int32_t ast_rx_2040; /* RX 40mhz frame */
126 u_int32_t ast_rx_pre_crc_err; /* RX pre-delimiter CRC error */
127 u_int32_t ast_rx_post_crc_err; /* RX post-delimiter CRC error */
128 u_int32_t ast_rx_decrypt_busy_err; /* RX decrypt engine busy error */
129 u_int32_t ast_rx_hi_rx_chain;
130 u_int32_t ast_tx_htprotect; /* HT tx frames with protection */
131 u_int32_t ast_rx_hitqueueend; /* RX hit descr queue end */
132 u_int32_t ast_tx_timeout; /* Global TX timeout */
133 u_int32_t ast_tx_cst; /* Carrier sense timeout */
134 u_int32_t ast_tx_xtxop; /* tx exceeded TXOP */
135 u_int32_t ast_tx_timerexpired; /* tx exceeded TX_TIMER */
136 u_int32_t ast_tx_desccfgerr; /* tx desc cfg error */
137 u_int32_t ast_pad[13];
140 #define SIOCGATHSTATS _IOWR('i', 137, struct ifreq)
141 #define SIOCZATHSTATS _IOWR('i', 139, struct ifreq)
144 char ad_name[IFNAMSIZ]; /* if name, e.g. "ath0" */
146 #define ATH_DIAG_DYN 0x8000 /* allocate buffer in caller */
147 #define ATH_DIAG_IN 0x4000 /* copy in parameters */
148 #define ATH_DIAG_OUT 0x0000 /* copy out results (always) */
149 #define ATH_DIAG_ID 0x0fff
150 u_int16_t ad_in_size; /* pack to fit, yech */
156 #define SIOCGATHDIAG _IOWR('i', 138, struct ath_diag)
157 #define SIOCGATHPHYERR _IOWR('i', 140, struct ath_diag)
160 * Radio capture format.
162 #define ATH_RX_RADIOTAP_PRESENT ( \
163 (1 << IEEE80211_RADIOTAP_TSFT) | \
164 (1 << IEEE80211_RADIOTAP_FLAGS) | \
165 (1 << IEEE80211_RADIOTAP_RATE) | \
166 (1 << IEEE80211_RADIOTAP_ANTENNA) | \
167 (1 << IEEE80211_RADIOTAP_DBM_ANTSIGNAL) | \
168 (1 << IEEE80211_RADIOTAP_DBM_ANTNOISE) | \
169 (1 << IEEE80211_RADIOTAP_XCHANNEL) | \
172 struct ath_rx_radiotap_header {
173 struct ieee80211_radiotap_header wr_ihdr;
181 u_int32_t wr_chan_flags;
182 u_int16_t wr_chan_freq;
183 u_int8_t wr_chan_ieee;
184 int8_t wr_chan_maxpow;
187 #define ATH_TX_RADIOTAP_PRESENT ( \
188 (1 << IEEE80211_RADIOTAP_TSFT) | \
189 (1 << IEEE80211_RADIOTAP_FLAGS) | \
190 (1 << IEEE80211_RADIOTAP_RATE) | \
191 (1 << IEEE80211_RADIOTAP_DBM_TX_POWER) | \
192 (1 << IEEE80211_RADIOTAP_ANTENNA) | \
193 (1 << IEEE80211_RADIOTAP_XCHANNEL) | \
196 struct ath_tx_radiotap_header {
197 struct ieee80211_radiotap_header wt_ihdr;
203 u_int32_t wt_chan_flags;
204 u_int16_t wt_chan_freq;
205 u_int8_t wt_chan_ieee;
206 int8_t wt_chan_maxpow;
213 #define DFS_SET_THRESH 2
214 #define DFS_GET_THRESH 3
215 #define DFS_RADARDETECTS 6
218 * DFS ioctl parameter types
220 #define DFS_PARAM_FIRPWR 1
221 #define DFS_PARAM_RRSSI 2
222 #define DFS_PARAM_HEIGHT 3
223 #define DFS_PARAM_PRSSI 4
224 #define DFS_PARAM_INBAND 5
225 #define DFS_PARAM_NOL 6 /* XXX not used in FreeBSD */
226 #define DFS_PARAM_RELSTEP_EN 7
227 #define DFS_PARAM_RELSTEP 8
228 #define DFS_PARAM_RELPWR_EN 9
229 #define DFS_PARAM_RELPWR 10
230 #define DFS_PARAM_MAXLEN 11
231 #define DFS_PARAM_USEFIR128 12
232 #define DFS_PARAM_BLOCKRADAR 13
233 #define DFS_PARAM_MAXRSSI_EN 14
235 /* FreeBSD-specific start at 32 */
236 #define DFS_PARAM_ENABLE 32
237 #define DFS_PARAM_EN_EXTCH 33
239 #endif /* _DEV_ATH_ATHIOCTL_H */