2 * DDK (Driver Development Kit) for Cronyx Tau32-PCI adapter.
4 * Copyright (C) 2003-2006 Cronyx Engineering, http://www.cronyx.ru
7 * Author: Leo Yuriev <ly@cronyx.ru>, http://leo.yuriev.ru
9 * $Cronyx: tau32-ddk.h,v 1.2 2006/02/01 09:14:40 ly Exp $
10 * $Rik: tau32-ddk.h,v 1.7 2006/02/28 22:33:29 rik Exp $
14 #if defined(__GNUC__) || defined(__TURBOC__)
19 # define __int16 short
25 # define __int64 long long
29 #if !defined(BOOLEAN) && !defined(_NTDDK_)
33 #if defined(__GNUC__) && !defined(__stdcall)
34 # define __stdcall __attribute__((stdcall))
37 #if defined(__GNUC__) && !defined(__cdecl)
38 # define __cdecl __attribute__((cdecl))
41 #ifndef TAU32_CALLBACK_TYPE
42 # if defined(__WINDOWS__) || defined(_MSC_VER) || defined(WIN32) || defined(WIN64)
43 # define TAU32_CALLBACK_TYPE __stdcall
45 # define TAU32_CALLBACK_TYPE __cdecl
49 #ifndef TAU32_CALL_TYPE
50 # if defined(__WINDOWS__) || defined(_MSC_VER) || defined(WIN32) || defined(WIN64)
51 # define TAU32_CALL_TYPE __stdcall
53 # define TAU32_CALL_TYPE __cdecl
57 #ifndef PCI_PHYSICAL_ADDRESS
59 # error PCI64 currently is not supported
61 # define PCI_PHYSICAL_ADDRESS unsigned __int32
65 #define TAU32_PCI_VENDOR_ID 0x110A
66 #define TAU32_PCI_DEVICE_ID 0x2101
67 #define TAU32_PCI_IO_BAR1_SIZE 0x0100
68 #define TAU32_PCI_RESET_ADDRESS 0x004C
69 #define TAU32_PCI_RESET_ON 0xF00F0000ul /*0xFFFFFFFFul */
70 #define TAU32_PCI_RESET_OFF 0
71 #define TAU32_PCI_RESET_LENGTH 4
74 #define TAU32_ERROR (-1)
75 #define TAU32_UNKNOWN 0
80 /* TAU32_INIT_ERRORS */
81 #define TAU32_IE_OK 0x0000u
82 #define TAU32_IE_FIRMWARE 0x0001u
83 #define TAU32_IE_MODEL 0x0002u
84 #define TAU32_IE_E1_A 0x0004u
85 #define TAU32_IE_E1_B 0x0008u
86 #define TAU32_IE_INTERNAL_BUS 0x0010u
87 #define TAU32_IE_HDLC 0x0020u
88 #define TAU32_IE_ADPCM 0x0040u
89 #define TAU32_IE_CLOCK 0x0080u
90 #define TAU32_IE_DXC 0x0100u
91 #define TAU32_IE_XIRQ 0x0200u
93 /* TAU32_INTERFACES */
94 #define TAU32_E1_ALL (-1)
99 #define TAU32_CHANNELS 32
100 #define TAU32_TIMESLOTS 32
101 #define TAU32_MAX_INTERFACES 2
102 #define TAU32_MTU 8184
103 #define TAU32_FLAT_MTU 4096
104 #define TAU32_IO_QUEUE 4
105 #define TAU32_IO_QUEUE_BYTES 128
106 #define TAU32_MAX_REQUESTS 512
107 #define TAU32_MAX_BUFFERS 256
108 #define TAU32_FIFO_SIZE 256
110 /* TAU32_REQUEST_COMMANDS */
111 #define TAU32_Tx_Start 0x0001u
112 #define TAU32_Tx_Stop 0x0002u
113 /*#define TAU32_Tx_Flush 0x0004u // yet not implemented */
114 #define TAU32_Tx_Data 0x0008u
115 #define TAU32_Rx_Start 0x0010u
116 #define TAU32_Rx_Stop 0x0020u
117 #define TAU32_Rx_Data 0x0080u
118 #define TAU32_Configure_Channel 0x0100u
119 #define TAU32_Timeslots_Complete 0x0200u
120 #define TAU32_Timeslots_Map 0x0400u
121 #define TAU32_Timeslots_Channel 0x0800u
122 #define TAU32_ConfigureDigitalLoop 0x1000u
123 #define TAU32_Configure_Commit 0x2000u
124 #define TAU32_Tx_FrameEnd 0x4000u
125 #define TAU32_Tx_NoCrc 0x8000u
126 #define TAU32_Configure_E1 0x0040u
129 #define TAU32_NOERROR 0x000000ul
130 #define TAU32_SUCCESSFUL 0x000000ul
131 #define TAU32_ERROR_ALLOCATION 0x000001ul /* not enough tx/rx descriptors */
132 #define TAU32_ERROR_BUS 0x000002ul /* PEB could not access to host memory by PCI bus for load/store information */
133 #define TAU32_ERROR_FAIL 0x000004ul /* PEB action request failed */
134 #define TAU32_ERROR_TIMEOUT 0x000008ul /* PEB action request timeout */
135 #define TAU32_ERROR_CANCELLED 0x000010ul
136 #define TAU32_ERROR_TX_UNDERFLOW 0x000020ul /* transmission underflow */
137 #define TAU32_ERROR_TX_PROTOCOL 0x000040ul /* reserved */
138 #define TAU32_ERROR_RX_OVERFLOW 0x000080ul
139 #define TAU32_ERROR_RX_ABORT 0x000100ul
140 #define TAU32_ERROR_RX_CRC 0x000200ul
141 #define TAU32_ERROR_RX_SHORT 0x000400ul
142 #define TAU32_ERROR_RX_SYNC 0x000800ul
143 #define TAU32_ERROR_RX_FRAME 0x001000ul
144 #define TAU32_ERROR_RX_LONG 0x002000ul
145 #define TAU32_ERROR_RX_SPLIT 0x004000ul /* frame has splitted between two requests due rx-gap allocation */
146 #define TAU32_ERROR_RX_UNFIT 0x008000ul /* frame can't be fit into request buffer */
147 #define TAU32_ERROR_TSP 0x010000ul
148 #define TAU32_ERROR_RSP 0x020000ul
149 #define TAU32_ERROR_INT_OVER_TX 0x040000ul
150 #define TAU32_ERROR_INT_OVER_RX 0x080000ul
151 #define TAU32_ERROR_INT_STORM 0x100000ul
152 #define TAU32_ERROR_INT_E1LOST 0x200000ul
153 #define TAU32_WARN_TX_JUMP 0x400000ul
154 #define TAU32_WARN_RX_JUMP 0x800000ul
156 /* TAU32_CHANNEL_MODES */
158 #define TAU32_V110_x30 1
163 /* TAU32_SYNC_MODES */
164 #define TAU32_SYNC_INTERNAL 0
165 #define TAU32_SYNC_RCV_A 1
166 #define TAU32_SYNC_RCV_B 2
167 #define TAU32_SYNC_LYGEN 3
168 #define TAU32_LYGEN_RESET 0
170 /* TAU32_CHANNEL_CONFIG_BITS */
171 #define TAU32_channel_mode_mask 0x0000000Ful
172 #define TAU32_data_inversion 0x00000010ul
173 #define TAU32_fr_rx_splitcheck 0x00000020ul
174 #define TAU32_fr_rx_fitcheck 0x00000040ul
175 #define TAU32_fr_tx_auto 0x00000080ul
176 #define TAU32_hdlc_crc32 0x00000100ul
177 #define TAU32_hdlc_adjustment 0x00000200ul
178 #define TAU32_hdlc_interframe_fill 0x00000400ul
179 #define TAU32_hdlc_nocrc 0x00000800ul
180 #define TAU32_tma_flag_filtering 0x00001000ul
181 #define TAU32_tma_nopack 0x00002000ul
182 #define TAU32_tma_flags_mask 0x00FF0000ul
183 #define TAU32_tma_flags_shift 16u
184 #define TAU32_v110_x30_tr_mask 0x03000000ul
185 #define TAU32_v110_x30_tr_shift 24u
187 typedef struct tag_TAU32_TimeslotAssignment
189 unsigned __int8 TxChannel, RxChannel;
190 unsigned __int8 TxFillmask, RxFillmask;
191 } TAU32_TimeslotAssignment;
193 #define TAU32_CROSS_WIDTH 96
194 #define TAU32_CROSS_OFF 127
195 typedef unsigned __int8 TAU32_CrossMatrix[TAU32_CROSS_WIDTH];
197 /* TAU32_INTERFACE_CONFIG_BITS */
198 #define TAU32_LineOff (0ul << 0)
199 #define TAU32_LineLoopInt (1ul << 0)
200 #define TAU32_LineLoopExt (2ul << 0)
201 #define TAU32_LineNormal (3ul << 0)
202 #define TAU32_LineAIS (4ul << 0)
203 #define TAU32_line_mode_mask 0x0000000Ful
204 #define TAU32_unframed_64 (0ul << 4)
205 #define TAU32_unframed_128 (1ul << 4)
206 #define TAU32_unframed_256 (2ul << 4)
207 #define TAU32_unframed_512 (3ul << 4)
208 #define TAU32_unframed_1024 (4ul << 4)
209 #define TAU32_unframed_2048 (5ul << 4)
210 #define TAU32_unframed TAU32_unframed_2048
211 #define TAU32_framed_no_cas (6ul << 4)
212 #define TAU32_framed_cas_set (7ul << 4)
213 #define TAU32_framed_cas_pass (8ul << 4)
214 #define TAU32_framed_cas_cross (9ul << 4)
215 #define TAU32_framing_mode_mask 0x000000F0ul
216 #define TAU32_monitor 0x00000100ul
217 #define TAU32_higain 0x00000200ul
218 #define TAU32_sa_bypass 0x00000400ul
219 #define TAU32_si_bypass 0x00000800ul
220 #define TAU32_cas_fe 0x00001000ul
221 #define TAU32_ais_on_loss 0x00002000ul
222 #define TAU32_cas_all_ones 0x00004000ul
223 #define TAU32_cas_io 0x00008000ul
224 #define TAU32_fas_io 0x00010000ul
225 #define TAU32_fas8_io 0x00020000ul
226 #define TAU32_auto_ais 0x00040000ul
227 #define TAU32_not_auto_ra 0x00080000ul
228 #define TAU32_not_auto_dmra 0x00100000ul
229 #define TAU32_ra 0x00200000ul
230 #define TAU32_dmra 0x00400000ul
231 #define TAU32_scrambler 0x00800000ul
232 #define TAU32_tx_ami 0x01000000ul
233 #define TAU32_rx_ami 0x02000000ul
234 #define TAU32_ja_tx 0x04000000ul
235 #define TAU32_crc4_mf_tx 0x08000000ul
236 #define TAU32_crc4_mf_rx 0x10000000ul
237 #define TAU32_crc4_mf (TAU32_crc4_mf_rx | TAU32_crc4_mf_tx)
239 /* TAU32_SA_CROSS_VALUES */
240 #define TAU32_SaDisable 0u
241 #define TAU32_SaSystem 1u
242 #define TAU32_SaIntA 2u
243 #define TAU32_SaIntB 3u
244 #define TAU32_SaAllZeros 4u
246 typedef struct tag_TAU32_SaCross
248 unsigned __int8 InterfaceA, InterfaceB;
249 unsigned __int8 SystemEnableTs0;
252 /* TAU32_INTERFACE_STATUS_BITS */
253 #define TAU32_RCL 0x0001u /* receive carrier lost */
254 #define TAU32_RLOS 0x0002u /* receive sync lost */
255 #define TAU32_RUA1 0x0004u /* received unframed all ones */
256 #define TAU32_RRA 0x0008u /* receive remote alarm */
257 #define TAU32_RSA1 0x0010u /* receive signaling all ones */
258 #define TAU32_RSA0 0x0020u /* receive signaling all zeros */
259 #define TAU32_RDMA 0x0040u /* receive distant multiframe alarm */
260 #define TAU32_LOTC 0x0080u /* transmit clock lost */
261 #define TAU32_RSLIP 0x0100u /* receiver slip event */
262 #define TAU32_TSLIP 0x0200u /* transmitter slip event */
263 #define TAU32_RFAS 0x0400u /* receiver lost and searching for FAS */
264 #define TAU32_RCRC4 0x0800u /* receiver lost and searching for CRC4 MF */
265 #define TAU32_RCAS 0x1000u /* received lost and searching for CAS MF */
266 #define TAU32_JITTER 0x2000u /* jitter attenuator limit */
267 #define TAU32_RCRC4LONG 0x4000u /* G.706 400ms limit of searching for CRC4 */
268 #define TAU32_E1OFF 0x8000u /* E1 line power-off */
269 #define TAU32_LOS TAU32_RLOS
270 #define TAU32_AIS TAU32_RUA1
271 #define TAU32_LOF TAU32_RFAS
272 #define TAU32_AIS16 TAU32_RSA1
273 #define TAU32_LOFM TAU32_RCAS
274 #define TAU32_FLOFM TAU32_RDMA
277 #define TAU32_FRLOFM 0x0001u /* CAS framer searching for CAS MF */
278 #define TAU32_CMWAITING 0x0002u /* Connection memory swap waiting */
279 #define TAU32_CMPENDING 0x0004u /* Connection memory swap pending */
280 #define TAU32_LED 0x0008u /* Led status (on/off) */
282 typedef struct tag_TAU32_Controller TAU32_Controller;
283 typedef struct tag_TAU32_UserRequest TAU32_UserRequest;
284 typedef struct tag_TAU32_UserContext TAU32_UserContext;
285 typedef union tag_TAU32_tsc TAU32_tsc;
286 typedef struct tag_TAU32_FlatIoContext TAU32_FlatIoContext;
287 typedef void(TAU32_CALLBACK_TYPE *TAU32_RequestCallback)(TAU32_UserContext *pContext, TAU32_UserRequest *pUserRequest);
288 typedef void(TAU32_CALLBACK_TYPE *TAU32_NotifyCallback)(TAU32_UserContext *pContext, int Item, unsigned NotifyBits);
289 typedef void(TAU32_CALLBACK_TYPE *TAU32_FifoTrigger)(TAU32_UserContext *pContext, int Interface, unsigned FifoId, unsigned Level);
290 typedef void(TAU32_CALLBACK_TYPE *TAU32_FlatIoCallback)(TAU32_UserContext *pContext, TAU32_FlatIoContext *pFlatIoContext);
294 unsigned __int32 osc, sync;
297 struct tag_TAU32_FlatIoContext
300 PCI_PHYSICAL_ADDRESS PhysicalBufferAddress;
301 unsigned Channel, ItemsCount, EachItemBufferSize;
302 unsigned Received, ActualOffset, Errors;
305 void SetupCallback(PKDEFERRED_ROUTINE DeferredCallbackRoutine, void* pContext)
307 CallbackDpc.DeferredRoutine = DeferredCallbackRoutine;
308 CallbackDpc.DeferredContext = pContext;
310 void SetupCallback(TAU32_FlatIoCallback pCallback)
312 CallbackDpc.DeferredRoutine = (PKDEFERRED_ROUTINE) pCallback;
313 CallbackDpc.DeferredContext = 0;
316 TAU32_FlatIoCallback pCallback;
321 #define TAU32_FifoId_CasRx 0u
322 #define TAU32_FifoId_CasTx 1u
323 #define TAU32_FifoId_FasRx 2u
324 #define TAU32_FifoId_FasTx 3u
325 #define TAU32_FifoId_Max 4u
327 typedef struct tag_TAU32_E1_State
329 unsigned __int32 TickCounter;
330 unsigned __int32 RxViolations;
331 unsigned __int32 Crc4Errors;
332 unsigned __int32 FarEndBlockErrors;
333 unsigned __int32 FasErrors;
334 unsigned __int32 TransmitSlips;
335 unsigned __int32 ReceiveSlips;
336 unsigned __int32 Status;
337 unsigned __int32 FifoSlip[TAU32_FifoId_Max];
340 struct tag_TAU32_UserContext
342 /* fields provided by user for for TAU32_Initiaize() */
343 TAU32_Controller *pControllerObject;
344 PCI_PHYSICAL_ADDRESS ControllerObjectPhysicalAddress;
345 void *PciBar1VirtualAddress;
346 TAU32_NotifyCallback pErrorNotifyCallback;
347 TAU32_NotifyCallback pStatusNotifyCallback;
349 PKINTERRUPT InterruptObject;
351 /* TODO: remove from release */
352 #define TAU32_CUSTOM_FIRMWARE
353 #ifdef TAU32_CUSTOM_FIRMWARE
354 void *pCustomFirmware;
355 unsigned CustomFirmwareSize;
357 /* fields filled by TAU32_Initiaize() */
361 unsigned __int32 DeadBits;
363 /* fields managed by DDK */
364 unsigned AdapterStatus;
365 unsigned CasIoLofCount;
366 unsigned E1IntLostCount;
367 unsigned CableTypeJumpers;
368 TAU32_E1_State InterfacesInfo[TAU32_MAX_INTERFACES];
370 /* fields which are't used by DDK, but nice for user */
371 #ifdef TAU32_UserContext_Add
372 TAU32_UserContext_Add
376 struct tag_TAU32_UserRequest
378 /* required fields */
379 void *pInternal; /* internal */
380 unsigned Command; /* in */
383 void SetupCallback(PKDEFERRED_ROUTINE DeferredCallbackRoutine, void* pContext)
385 CallbackDpc.DeferredRoutine = DeferredCallbackRoutine;
386 CallbackDpc.DeferredContext = pContext;
388 void SetupCallback(TAU32_RequestCallback pCallback)
390 CallbackDpc.DeferredRoutine = (PKDEFERRED_ROUTINE) pCallback;
391 CallbackDpc.DeferredContext = 0;
394 TAU32_RequestCallback pCallback; /* in */
396 unsigned __int32 ErrorCode; /* out */
400 unsigned ChannelNumber; /* just common field */
404 unsigned Channel; /* in */
405 unsigned __int32 Config; /* in */
406 unsigned __int32 AssignedTsMask; /* build channel from timeslots which is selected by mask */
412 unsigned __int32 Config; /* in */
413 unsigned __int32 UnframedTsMask;
418 unsigned Channel; /* in */
419 PCI_PHYSICAL_ADDRESS PhysicalDataAddress; /* in */
420 unsigned DataLength; /* in */
421 unsigned Transmitted; /* out */
426 unsigned Channel; /* in */
427 PCI_PHYSICAL_ADDRESS PhysicalDataAddress; /* in */
428 unsigned BufferLength; /* in */
429 unsigned Received; /* out */
430 BOOLEAN FrameEnd; /* out */
433 BOOLEAN DigitalLoop; /* in, loop by PEB */
437 TAU32_TimeslotAssignment Complete[TAU32_TIMESLOTS];
438 unsigned __int32 Map[TAU32_CHANNELS];
439 } TimeslotsAssignment;
442 /* fields which are't used by DDK, but nice for user */
443 #ifdef TAU32_UserRequest_Add
444 TAU32_UserRequest_Add
448 #define TAU32_IS_REQUEST_RUNNING(pUserRequest) ((pUserRequest)->pInternal != NULL)
449 #define TAU32_IS_REQUEST_NOT_RUNNING(pUserRequest) ((pUserRequest)->pInternal == NULL)
451 #ifndef TAU32_DDK_DLL
452 # if defined(_NTDDK_)
453 # ifdef TAU32_DDK_IMP
454 # define TAU32_DDK_DLL __declspec(dllexport)
456 # define TAU32_DDK_DLL __declspec(dllimport)
459 # define TAU32_DDK_DLL
467 void TAU32_DDK_DLL TAU32_CALL_TYPE TAU32_BeforeReset(TAU32_UserContext *pUserContext);
468 BOOLEAN TAU32_DDK_DLL TAU32_CALL_TYPE TAU32_Initialize(TAU32_UserContext *pUserContext, BOOLEAN CronyxDiag);
469 void TAU32_DDK_DLL TAU32_CALL_TYPE TAU32_DestructiveHalt(TAU32_Controller *pControllerObject, BOOLEAN CancelRequests);
470 BOOLEAN TAU32_DDK_DLL TAU32_CALL_TYPE TAU32_IsInterruptPending(TAU32_Controller *pControllerObject);
471 BOOLEAN TAU32_DDK_DLL TAU32_CALL_TYPE TAU32_HandleInterrupt(TAU32_Controller *pControllerObject);
472 extern unsigned const TAU32_ControllerObjectSize;
474 /* LY: ×ÓÅ ÆÕÎËÃÉÉ ÎÉÖÅ, ÍÏÇÕÔ ÒÅÅÎÔÅÒÁÂÅÌØÎÏ ×ÙÚÙ×ÁÔØÓÑ ÉÚ callback-Ï× */
475 void TAU32_DDK_DLL TAU32_CALL_TYPE TAU32_EnableInterrupts(TAU32_Controller *pControllerObject);
476 void TAU32_DDK_DLL TAU32_CALL_TYPE TAU32_DisableInterrupts(TAU32_Controller *pControllerObject);
477 BOOLEAN TAU32_DDK_DLL TAU32_CALL_TYPE TAU32_SubmitRequest(TAU32_Controller *pControllerObject, TAU32_UserRequest *pRequest);
478 BOOLEAN TAU32_DDK_DLL TAU32_CALL_TYPE TAU32_CancelRequest(TAU32_Controller *pControllerObject, TAU32_UserRequest *pRequest, BOOLEAN BreakIfRunning);
479 void TAU32_DDK_DLL TAU32_CALL_TYPE TAU32_LedBlink(TAU32_Controller *pControllerObject);
480 void TAU32_DDK_DLL TAU32_CALL_TYPE TAU32_LedSet(TAU32_Controller *pControllerObject, BOOLEAN On);
481 BOOLEAN TAU32_DDK_DLL TAU32_CALL_TYPE TAU32_SetCasIo(TAU32_Controller *pControllerObject, BOOLEAN Enabled);
482 unsigned __int64 TAU32_DDK_DLL TAU32_CALL_TYPE TAU32_ProbeGeneratorFrequency(unsigned __int64 Frequency);
483 unsigned __int64 TAU32_DDK_DLL TAU32_CALL_TYPE TAU32_SetGeneratorFrequency(TAU32_Controller *pControllerObject, unsigned __int64 Frequency);
484 BOOLEAN TAU32_DDK_DLL TAU32_CALL_TYPE TAU32_SetSyncMode(TAU32_Controller *pControllerObject, unsigned Mode);
485 BOOLEAN TAU32_DDK_DLL TAU32_CALL_TYPE TAU32_SetCrossMatrix(TAU32_Controller *pControllerObject, unsigned __int8 *pCrossMatrix, unsigned __int32 ReverseMask);
486 BOOLEAN TAU32_DDK_DLL TAU32_CALL_TYPE TAU32_SetIdleCodes(TAU32_Controller *pControllerObject, unsigned __int8 *pIdleCodes);
487 BOOLEAN TAU32_DDK_DLL TAU32_CALL_TYPE TAU32_UpdateIdleCodes(TAU32_Controller *pControllerObject, int Interface, unsigned __int32 TimeslotMask, unsigned __int8 IdleCode);
488 BOOLEAN TAU32_DDK_DLL TAU32_CALL_TYPE TAU32_SetSaCross(TAU32_Controller *pControllerObject, TAU32_SaCross SaCross);
489 int TAU32_DDK_DLL TAU32_CALL_TYPE TAU32_FifoPutCasAppend(TAU32_Controller *pControllerObject, int Interface, unsigned __int8 *pBuffer, unsigned Length);
490 int TAU32_DDK_DLL TAU32_CALL_TYPE TAU32_FifoPutCasAhead(TAU32_Controller *pControllerObject, int Interface, unsigned __int8 *pBuffer, unsigned Length);
491 int TAU32_DDK_DLL TAU32_CALL_TYPE TAU32_FifoGetCas(TAU32_Controller *pControllerObject, int Interface, unsigned __int8 *pBuffer, unsigned Length);
492 int TAU32_DDK_DLL TAU32_CALL_TYPE TAU32_FifoPutFasAppend(TAU32_Controller *pControllerObject, int Interface, unsigned __int8 *pBuffer, unsigned Length);
493 int TAU32_DDK_DLL TAU32_CALL_TYPE TAU32_FifoPutFasAhead(TAU32_Controller *pControllerObject, int Interface, unsigned __int8 *pBuffer, unsigned Length);
494 int TAU32_DDK_DLL TAU32_CALL_TYPE TAU32_FifoGetFas(TAU32_Controller *pControllerObject, int Interface, unsigned __int8 *pBuffer, unsigned Length);
495 BOOLEAN TAU32_DDK_DLL TAU32_CALL_TYPE TAU32_SetFifoTrigger(TAU32_Controller *pControllerObject, int Interface, unsigned FifoId, unsigned Level, TAU32_FifoTrigger Trigger);
496 void TAU32_DDK_DLL TAU32_CALL_TYPE TAU32_ReadTsc(TAU32_Controller *pControllerObject, TAU32_tsc *pResult);
498 /* for Cronyx Engineering use only !!! */
499 #define TAU32_CRONYX_P 0
500 #define TAU32_CRONYX_PS 1
501 #define TAU32_CRONYX_PA 2
502 #define TAU32_CRONYX_PB 3
503 #define TAU32_CRONYX_I 4
504 #define TAU32_CRONYX_O 5
505 #define TAU32_CRONYX_U 6
506 #define TAU32_CRONYX_R 7
507 #define TAU32_CRONYX_W 8
508 #define TAU32_CRONYX_RW 9
509 #define TAU32_CRONYX_WR 10
510 #define TAU32_CRONYX_S 11
511 #define TAU32_CRONYX_G 12
512 unsigned __int32 TAU32_CALL_TYPE TAU32_Diag(TAU32_Controller *pControllerObject, unsigned Operation, unsigned __int32 Data);