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30 #ifndef __T4_REGS_VALUES_H__
31 #define __T4_REGS_VALUES_H__
34 * This file contains definitions for various T4 register value hardware
35 * constants. The types of values encoded here are predominantly those for
36 * register fields which control "modal" behavior. For the most part, we do
37 * not include definitions for register fields which are simple numeric
40 * These new "modal values" use a naming convention which matches the
41 * currently existing macros in t4_reg.h. For register field FOO which would
42 * have S_FOO, M_FOO, V_FOO() and G_FOO() macros, we introduce X_FOO_{MODE}
43 * definitions. These can be used as V_FOO(X_FOO_MODE) or as (G_FOO(x) ==
46 * Note that this should all be part of t4_regs.h but the toolset used to
47 * generate that file doesn't [yet] have the capability of collecting these
57 * SGE register field values.
60 /* CONTROL register */
61 #define X_FLSPLITMODE_FLSPLITMIN 0
62 #define X_FLSPLITMODE_ETHHDR 1
63 #define X_FLSPLITMODE_IPHDR 2
64 #define X_FLSPLITMODE_TCPHDR 3
66 #define X_DCASYSTYPE_FSB 0
67 #define X_DCASYSTYPE_CSI 1
69 #define X_EGSTATPAGESIZE_64B 0
70 #define X_EGSTATPAGESIZE_128B 1
72 #define X_RXPKTCPLMODE_DATA 0
73 #define X_RXPKTCPLMODE_SPLIT 1
75 #define X_INGPCIEBOUNDARY_SHIFT 5
76 #define X_INGPCIEBOUNDARY_32B 0
77 #define X_INGPCIEBOUNDARY_64B 1
78 #define X_INGPCIEBOUNDARY_128B 2
79 #define X_INGPCIEBOUNDARY_256B 3
80 #define X_INGPCIEBOUNDARY_512B 4
81 #define X_INGPCIEBOUNDARY_1024B 5
82 #define X_INGPCIEBOUNDARY_2048B 6
83 #define X_INGPCIEBOUNDARY_4096B 7
85 #define X_T6_INGPADBOUNDARY_SHIFT 3
86 #define X_T6_INGPADBOUNDARY_8B 0
87 #define X_T6_INGPADBOUNDARY_16B 1
88 #define X_T6_INGPADBOUNDARY_32B 2
89 #define X_T6_INGPADBOUNDARY_64B 3
90 #define X_T6_INGPADBOUNDARY_128B 4
91 #define X_T6_INGPADBOUNDARY_256B 5
92 #define X_T6_INGPADBOUNDARY_512B 6
93 #define X_T6_INGPADBOUNDARY_1024B 7
95 #define X_INGPADBOUNDARY_SHIFT 5
96 #define X_INGPADBOUNDARY_32B 0
97 #define X_INGPADBOUNDARY_64B 1
98 #define X_INGPADBOUNDARY_128B 2
99 #define X_INGPADBOUNDARY_256B 3
100 #define X_INGPADBOUNDARY_512B 4
101 #define X_INGPADBOUNDARY_1024B 5
102 #define X_INGPADBOUNDARY_2048B 6
103 #define X_INGPADBOUNDARY_4096B 7
105 #define X_EGRPCIEBOUNDARY_SHIFT 5
106 #define X_EGRPCIEBOUNDARY_32B 0
107 #define X_EGRPCIEBOUNDARY_64B 1
108 #define X_EGRPCIEBOUNDARY_128B 2
109 #define X_EGRPCIEBOUNDARY_256B 3
110 #define X_EGRPCIEBOUNDARY_512B 4
111 #define X_EGRPCIEBOUNDARY_1024B 5
112 #define X_EGRPCIEBOUNDARY_2048B 6
113 #define X_EGRPCIEBOUNDARY_4096B 7
115 /* CONTROL2 register */
116 #define X_INGPACKBOUNDARY_SHIFT 5 // *most* of the values ...
117 #define X_INGPACKBOUNDARY_16B 0 // Note weird value!
118 #define X_INGPACKBOUNDARY_64B 1
119 #define X_INGPACKBOUNDARY_128B 2
120 #define X_INGPACKBOUNDARY_256B 3
121 #define X_INGPACKBOUNDARY_512B 4
122 #define X_INGPACKBOUNDARY_1024B 5
123 #define X_INGPACKBOUNDARY_2048B 6
124 #define X_INGPACKBOUNDARY_4096B 7
127 #define SGE_TIMERREGS 6
128 #define X_TIMERREG_COUNTER0 0
129 #define X_TIMERREG_COUNTER1 1
130 #define X_TIMERREG_COUNTER2 2
131 #define X_TIMERREG_COUNTER3 3
132 #define X_TIMERREG_COUNTER4 4
133 #define X_TIMERREG_COUNTER5 5
134 #define X_TIMERREG_RESTART_COUNTER 6
135 #define X_TIMERREG_UPDATE_CIDX 7
138 * Egress Context field values
140 #define EC_WR_UNITS 16
142 #define X_FETCHBURSTMIN_SHIFT 4
143 #define X_FETCHBURSTMIN_16B 0
144 #define X_FETCHBURSTMIN_32B 1
145 #define X_FETCHBURSTMIN_64B 2
146 #define X_FETCHBURSTMIN_128B 3
148 #define X_FETCHBURSTMAX_SHIFT 6
149 #define X_FETCHBURSTMAX_64B 0
150 #define X_FETCHBURSTMAX_128B 1
151 #define X_FETCHBURSTMAX_256B 2
152 #define X_FETCHBURSTMAX_512B 3
154 #define X_HOSTFCMODE_NONE 0
155 #define X_HOSTFCMODE_INGRESS_QUEUE 1
156 #define X_HOSTFCMODE_STATUS_PAGE 2
157 #define X_HOSTFCMODE_BOTH 3
159 #define X_HOSTFCOWNER_UP 0
160 #define X_HOSTFCOWNER_SGE 1
162 #define X_CIDXFLUSHTHRESH_1 0
163 #define X_CIDXFLUSHTHRESH_2 1
164 #define X_CIDXFLUSHTHRESH_4 2
165 #define X_CIDXFLUSHTHRESH_8 3
166 #define X_CIDXFLUSHTHRESH_16 4
167 #define X_CIDXFLUSHTHRESH_32 5
168 #define X_CIDXFLUSHTHRESH_64 6
169 #define X_CIDXFLUSHTHRESH_128 7
171 #define X_IDXSIZE_UNIT 64
173 #define X_BASEADDRESS_ALIGN 512
176 * Ingress Context field values
178 #define X_UPDATESCHEDULING_TIMER 0
179 #define X_UPDATESCHEDULING_COUNTER_OPTTIMER 1
181 #define X_UPDATEDELIVERY_NONE 0
182 #define X_UPDATEDELIVERY_INTERRUPT 1
183 #define X_UPDATEDELIVERY_STATUS_PAGE 2
184 #define X_UPDATEDELIVERY_BOTH 3
186 #define X_INTERRUPTDESTINATION_PCIE 0
187 #define X_INTERRUPTDESTINATION_IQ 1
189 #define X_QUEUEENTRYSIZE_16B 0
190 #define X_QUEUEENTRYSIZE_32B 1
191 #define X_QUEUEENTRYSIZE_64B 2
192 #define X_QUEUEENTRYSIZE_128B 3
194 #define IC_SIZE_UNIT 16
195 #define IC_BASEADDRESS_ALIGN 512
197 #define X_RSPD_TYPE_FLBUF 0
198 #define X_RSPD_TYPE_CPL 1
199 #define X_RSPD_TYPE_INTR 2
202 * Context field definitions. This is by no means a complete list of SGE
203 * Context fields. In the vast majority of cases the firmware initializes
204 * things the way they need to be set up. But in a few small cases, we need
205 * to compute new values and ship them off to the firmware to be applied to
206 * the SGE Conexts ...
210 * Congestion Manager Definitions.
212 #define S_CONMCTXT_CNGTPMODE 19
213 #define M_CONMCTXT_CNGTPMODE 0x3
214 #define V_CONMCTXT_CNGTPMODE(x) ((x) << S_CONMCTXT_CNGTPMODE)
215 #define G_CONMCTXT_CNGTPMODE(x) \
216 (((x) >> S_CONMCTXT_CNGTPMODE) & M_CONMCTXT_CNGTPMODE)
217 #define S_CONMCTXT_CNGCHMAP 0
218 #define M_CONMCTXT_CNGCHMAP 0xffff
219 #define V_CONMCTXT_CNGCHMAP(x) ((x) << S_CONMCTXT_CNGCHMAP)
220 #define G_CONMCTXT_CNGCHMAP(x) \
221 (((x) >> S_CONMCTXT_CNGCHMAP) & M_CONMCTXT_CNGCHMAP)
223 #define X_CONMCTXT_CNGTPMODE_DISABLE 0
224 #define X_CONMCTXT_CNGTPMODE_QUEUE 1
225 #define X_CONMCTXT_CNGTPMODE_CHANNEL 2
226 #define X_CONMCTXT_CNGTPMODE_BOTH 3
229 * T5 and later support a new BAR2-based doorbell mechanism for Egress Queues.
230 * The User Doorbells are each 128 bytes in length with a Simple Doorbell at
231 * offsets 8x and a Write Combining single 64-byte Egress Queue Unit
232 * (X_IDXSIZE_UNIT) Gather Buffer interface at offset 64. For Ingress Queues,
233 * we have a Going To Sleep register at offsets 8x+4.
235 * As noted above, we have many instances of the Simple Doorbell and Going To
236 * Sleep registers at offsets 8x and 8x+4, respectively. We want to use a
237 * non-64-byte aligned offset for the Simple Doorbell in order to attempt to
238 * avoid buffering of the writes to the Simple Doorbell and we want to use a
239 * non-contiguous offset for the Going To Sleep writes in order to avoid
240 * possible combining between them.
242 #define SGE_UDB_SIZE 128
243 #define SGE_UDB_KDOORBELL 8
244 #define SGE_UDB_GTS 20
245 #define SGE_UDB_WCDOORBELL 64
253 * CIM register field values.
255 #define X_MBOWNER_NONE 0
256 #define X_MBOWNER_FW 1
257 #define X_MBOWNER_PL 2
258 #define X_MBOWNER_FW_DEFERRED 3
265 #define X_WINDOW_SHIFT 10
266 #define X_PCIEOFST_SHIFT 10
274 * TP_VLAN_PRI_MAP controls which subset of fields will be present in the
275 * Compressed Filter Tuple for LE filters. Each bit set in TP_VLAN_PRI_MAP
276 * selects for a particular field being present. These fields, when present
277 * in the Compressed Filter Tuple, have the following widths in bits.
279 #define S_FT_FIRST S_FCOE
280 #define S_FT_LAST S_FRAGMENTATION
284 #define W_FT_VNIC_ID 17
287 #define W_FT_PROTOCOL 8
288 #define W_FT_ETHERTYPE 16
289 #define W_FT_MACMATCH 9
290 #define W_FT_MPSHITTYPE 3
291 #define W_FT_FRAGMENTATION 1
294 * Some of the Compressed Filter Tuple fields have internal structure. These
295 * bit shifts/masks describe those structures. All shifts are relative to the
296 * base position of the fields within the Compressed Filter Tuple
298 #define S_FT_VLAN_VLD 16
299 #define V_FT_VLAN_VLD(x) ((x) << S_FT_VLAN_VLD)
300 #define F_FT_VLAN_VLD V_FT_VLAN_VLD(1U)
302 #define S_FT_VNID_ID_VF 0
303 #define M_FT_VNID_ID_VF 0x7fU
304 #define V_FT_VNID_ID_VF(x) ((x) << S_FT_VNID_ID_VF)
305 #define G_FT_VNID_ID_VF(x) (((x) >> S_FT_VNID_ID_VF) & M_FT_VNID_ID_VF)
307 #define S_FT_VNID_ID_PF 7
308 #define M_FT_VNID_ID_PF 0x7U
309 #define V_FT_VNID_ID_PF(x) ((x) << S_FT_VNID_ID_PF)
310 #define G_FT_VNID_ID_PF(x) (((x) >> S_FT_VNID_ID_PF) & M_FT_VNID_ID_PF)
312 #define S_FT_VNID_ID_VLD 16
313 #define V_FT_VNID_ID_VLD(x) ((x) << S_FT_VNID_ID_VLD)
314 #define F_FT_VNID_ID_VLD(x) V_FT_VNID_ID_VLD(1U)
316 #endif /* __T4_REGS_VALUES_H__ */