2 * Copyright (c) 2011 Chelsio Communications, Inc.
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
30 /* This file is automatically generated --- changes will be lost */
32 #ifndef _T4_TCB_DEFS_H
33 #define _T4_TCB_DEFS_H
36 #define W_TCB_ULP_TYPE 0
37 #define S_TCB_ULP_TYPE 0
38 #define M_TCB_ULP_TYPE 0xfULL
39 #define V_TCB_ULP_TYPE(x) ((x) << S_TCB_ULP_TYPE)
42 #define W_TCB_ULP_RAW 0
43 #define S_TCB_ULP_RAW 4
44 #define M_TCB_ULP_RAW 0xffULL
45 #define V_TCB_ULP_RAW(x) ((x) << S_TCB_ULP_RAW)
48 #define W_TCB_L2T_IX 0
49 #define S_TCB_L2T_IX 12
50 #define M_TCB_L2T_IX 0xfffULL
51 #define V_TCB_L2T_IX(x) ((x) << S_TCB_L2T_IX)
54 #define W_TCB_SMAC_SEL 0
55 #define S_TCB_SMAC_SEL 24
56 #define M_TCB_SMAC_SEL 0xffULL
57 #define V_TCB_SMAC_SEL(x) ((x) << S_TCB_SMAC_SEL)
60 #define W_TCB_T_FLAGS 1
61 #define S_TCB_T_FLAGS 0
62 #define M_TCB_T_FLAGS 0xffffffffffffffffULL
63 #define V_TCB_T_FLAGS(x) ((__u64)(x) << S_TCB_T_FLAGS)
66 #define W_TCB_RSS_INFO 3
67 #define S_TCB_RSS_INFO 0
68 #define M_TCB_RSS_INFO 0x3ffULL
69 #define V_TCB_RSS_INFO(x) ((x) << S_TCB_RSS_INFO)
74 #define M_TCB_TOS 0x3fULL
75 #define V_TCB_TOS(x) ((x) << S_TCB_TOS)
78 #define W_TCB_T_STATE 3
79 #define S_TCB_T_STATE 16
80 #define M_TCB_T_STATE 0xfULL
81 #define V_TCB_T_STATE(x) ((x) << S_TCB_T_STATE)
84 #define W_TCB_MAX_RT 3
85 #define S_TCB_MAX_RT 20
86 #define M_TCB_MAX_RT 0xfULL
87 #define V_TCB_MAX_RT(x) ((x) << S_TCB_MAX_RT)
90 #define W_TCB_T_MAXSEG 3
91 #define S_TCB_T_MAXSEG 24
92 #define M_TCB_T_MAXSEG 0xfULL
93 #define V_TCB_T_MAXSEG(x) ((x) << S_TCB_T_MAXSEG)
96 #define W_TCB_SND_SCALE 3
97 #define S_TCB_SND_SCALE 28
98 #define M_TCB_SND_SCALE 0xfULL
99 #define V_TCB_SND_SCALE(x) ((x) << S_TCB_SND_SCALE)
102 #define W_TCB_RCV_SCALE 4
103 #define S_TCB_RCV_SCALE 0
104 #define M_TCB_RCV_SCALE 0xfULL
105 #define V_TCB_RCV_SCALE(x) ((x) << S_TCB_RCV_SCALE)
108 #define W_TCB_T_RXTSHIFT 4
109 #define S_TCB_T_RXTSHIFT 4
110 #define M_TCB_T_RXTSHIFT 0xfULL
111 #define V_TCB_T_RXTSHIFT(x) ((x) << S_TCB_T_RXTSHIFT)
114 #define W_TCB_T_DUPACKS 4
115 #define S_TCB_T_DUPACKS 8
116 #define M_TCB_T_DUPACKS 0xfULL
117 #define V_TCB_T_DUPACKS(x) ((x) << S_TCB_T_DUPACKS)
120 #define W_TCB_TIMESTAMP_OFFSET 4
121 #define S_TCB_TIMESTAMP_OFFSET 12
122 #define M_TCB_TIMESTAMP_OFFSET 0xfULL
123 #define V_TCB_TIMESTAMP_OFFSET(x) ((x) << S_TCB_TIMESTAMP_OFFSET)
126 #define W_TCB_RCV_ADV 4
127 #define S_TCB_RCV_ADV 16
128 #define M_TCB_RCV_ADV 0xffffULL
129 #define V_TCB_RCV_ADV(x) ((x) << S_TCB_RCV_ADV)
132 #define W_TCB_TIMESTAMP 5
133 #define S_TCB_TIMESTAMP 0
134 #define M_TCB_TIMESTAMP 0xffffffffULL
135 #define V_TCB_TIMESTAMP(x) ((x) << S_TCB_TIMESTAMP)
138 #define W_TCB_T_RTT_TS_RECENT_AGE 6
139 #define S_TCB_T_RTT_TS_RECENT_AGE 0
140 #define M_TCB_T_RTT_TS_RECENT_AGE 0xffffffffULL
141 #define V_TCB_T_RTT_TS_RECENT_AGE(x) ((x) << S_TCB_T_RTT_TS_RECENT_AGE)
144 #define W_TCB_T_RTSEQ_RECENT 7
145 #define S_TCB_T_RTSEQ_RECENT 0
146 #define M_TCB_T_RTSEQ_RECENT 0xffffffffULL
147 #define V_TCB_T_RTSEQ_RECENT(x) ((x) << S_TCB_T_RTSEQ_RECENT)
150 #define W_TCB_T_SRTT 8
151 #define S_TCB_T_SRTT 0
152 #define M_TCB_T_SRTT 0xffffULL
153 #define V_TCB_T_SRTT(x) ((x) << S_TCB_T_SRTT)
156 #define W_TCB_T_RTTVAR 8
157 #define S_TCB_T_RTTVAR 16
158 #define M_TCB_T_RTTVAR 0xffffULL
159 #define V_TCB_T_RTTVAR(x) ((x) << S_TCB_T_RTTVAR)
162 #define W_TCB_TX_MAX 9
163 #define S_TCB_TX_MAX 0
164 #define M_TCB_TX_MAX 0xffffffffULL
165 #define V_TCB_TX_MAX(x) ((x) << S_TCB_TX_MAX)
168 #define W_TCB_SND_UNA_RAW 10
169 #define S_TCB_SND_UNA_RAW 0
170 #define M_TCB_SND_UNA_RAW 0xfffffffULL
171 #define V_TCB_SND_UNA_RAW(x) ((x) << S_TCB_SND_UNA_RAW)
174 #define W_TCB_SND_NXT_RAW 10
175 #define S_TCB_SND_NXT_RAW 28
176 #define M_TCB_SND_NXT_RAW 0xfffffffULL
177 #define V_TCB_SND_NXT_RAW(x) ((__u64)(x) << S_TCB_SND_NXT_RAW)
180 #define W_TCB_SND_MAX_RAW 11
181 #define S_TCB_SND_MAX_RAW 24
182 #define M_TCB_SND_MAX_RAW 0xfffffffULL
183 #define V_TCB_SND_MAX_RAW(x) ((__u64)(x) << S_TCB_SND_MAX_RAW)
186 #define W_TCB_SND_REC_RAW 12
187 #define S_TCB_SND_REC_RAW 20
188 #define M_TCB_SND_REC_RAW 0xfffffffULL
189 #define V_TCB_SND_REC_RAW(x) ((__u64)(x) << S_TCB_SND_REC_RAW)
192 #define W_TCB_SND_CWND 13
193 #define S_TCB_SND_CWND 16
194 #define M_TCB_SND_CWND 0xfffffffULL
195 #define V_TCB_SND_CWND(x) ((__u64)(x) << S_TCB_SND_CWND)
198 #define W_TCB_SND_SSTHRESH 14
199 #define S_TCB_SND_SSTHRESH 12
200 #define M_TCB_SND_SSTHRESH 0xfffffffULL
201 #define V_TCB_SND_SSTHRESH(x) ((__u64)(x) << S_TCB_SND_SSTHRESH)
204 #define W_TCB_TX_HDR_PTR_RAW 15
205 #define S_TCB_TX_HDR_PTR_RAW 8
206 #define M_TCB_TX_HDR_PTR_RAW 0x1ffffULL
207 #define V_TCB_TX_HDR_PTR_RAW(x) ((x) << S_TCB_TX_HDR_PTR_RAW)
210 #define W_TCB_TX_LAST_PTR_RAW 15
211 #define S_TCB_TX_LAST_PTR_RAW 25
212 #define M_TCB_TX_LAST_PTR_RAW 0x1ffffULL
213 #define V_TCB_TX_LAST_PTR_RAW(x) ((__u64)(x) << S_TCB_TX_LAST_PTR_RAW)
216 #define W_TCB_RCV_NXT 16
217 #define S_TCB_RCV_NXT 10
218 #define M_TCB_RCV_NXT 0xffffffffULL
219 #define V_TCB_RCV_NXT(x) ((__u64)(x) << S_TCB_RCV_NXT)
222 #define W_TCB_RCV_WND 17
223 #define S_TCB_RCV_WND 10
224 #define M_TCB_RCV_WND 0xfffffffULL
225 #define V_TCB_RCV_WND(x) ((__u64)(x) << S_TCB_RCV_WND)
228 #define W_TCB_RX_HDR_OFFSET 18
229 #define S_TCB_RX_HDR_OFFSET 6
230 #define M_TCB_RX_HDR_OFFSET 0xfffffffULL
231 #define V_TCB_RX_HDR_OFFSET(x) ((__u64)(x) << S_TCB_RX_HDR_OFFSET)
234 #define W_TCB_TS_LAST_ACK_SENT_RAW 19
235 #define S_TCB_TS_LAST_ACK_SENT_RAW 2
236 #define M_TCB_TS_LAST_ACK_SENT_RAW 0xfffffffULL
237 #define V_TCB_TS_LAST_ACK_SENT_RAW(x) ((x) << S_TCB_TS_LAST_ACK_SENT_RAW)
240 #define W_TCB_RX_FRAG0_START_IDX_RAW 19
241 #define S_TCB_RX_FRAG0_START_IDX_RAW 30
242 #define M_TCB_RX_FRAG0_START_IDX_RAW 0xfffffffULL
243 #define V_TCB_RX_FRAG0_START_IDX_RAW(x) ((__u64)(x) << S_TCB_RX_FRAG0_START_IDX_RAW)
246 #define W_TCB_RX_FRAG1_START_IDX_OFFSET 20
247 #define S_TCB_RX_FRAG1_START_IDX_OFFSET 26
248 #define M_TCB_RX_FRAG1_START_IDX_OFFSET 0xfffffffULL
249 #define V_TCB_RX_FRAG1_START_IDX_OFFSET(x) ((__u64)(x) << S_TCB_RX_FRAG1_START_IDX_OFFSET)
252 #define W_TCB_RX_FRAG0_LEN 21
253 #define S_TCB_RX_FRAG0_LEN 22
254 #define M_TCB_RX_FRAG0_LEN 0xfffffffULL
255 #define V_TCB_RX_FRAG0_LEN(x) ((__u64)(x) << S_TCB_RX_FRAG0_LEN)
258 #define W_TCB_RX_FRAG1_LEN 22
259 #define S_TCB_RX_FRAG1_LEN 18
260 #define M_TCB_RX_FRAG1_LEN 0xfffffffULL
261 #define V_TCB_RX_FRAG1_LEN(x) ((__u64)(x) << S_TCB_RX_FRAG1_LEN)
264 #define W_TCB_PDU_LEN 23
265 #define S_TCB_PDU_LEN 14
266 #define M_TCB_PDU_LEN 0xffffULL
267 #define V_TCB_PDU_LEN(x) ((x) << S_TCB_PDU_LEN)
270 #define W_TCB_RX_PTR_RAW 23
271 #define S_TCB_RX_PTR_RAW 30
272 #define M_TCB_RX_PTR_RAW 0x1ffffULL
273 #define V_TCB_RX_PTR_RAW(x) ((__u64)(x) << S_TCB_RX_PTR_RAW)
276 #define W_TCB_RX_FRAG1_PTR_RAW 24
277 #define S_TCB_RX_FRAG1_PTR_RAW 15
278 #define M_TCB_RX_FRAG1_PTR_RAW 0x1ffffULL
279 #define V_TCB_RX_FRAG1_PTR_RAW(x) ((x) << S_TCB_RX_FRAG1_PTR_RAW)
282 #define W_TCB_MAIN_SLUSH 25
283 #define S_TCB_MAIN_SLUSH 0
284 #define M_TCB_MAIN_SLUSH 0xffffffffULL
285 #define V_TCB_MAIN_SLUSH(x) ((x) << S_TCB_MAIN_SLUSH)
288 #define W_TCB_AUX1_SLUSH0 26
289 #define S_TCB_AUX1_SLUSH0 0
290 #define M_TCB_AUX1_SLUSH0 0x7fffULL
291 #define V_TCB_AUX1_SLUSH0(x) ((x) << S_TCB_AUX1_SLUSH0)
294 #define W_TCB_RX_FRAG2_START_IDX_OFFSET_RAW 26
295 #define S_TCB_RX_FRAG2_START_IDX_OFFSET_RAW 15
296 #define M_TCB_RX_FRAG2_START_IDX_OFFSET_RAW 0xfffffffULL
297 #define V_TCB_RX_FRAG2_START_IDX_OFFSET_RAW(x) ((__u64)(x) << S_TCB_RX_FRAG2_START_IDX_OFFSET_RAW)
300 #define W_TCB_RX_FRAG2_PTR_RAW 27
301 #define S_TCB_RX_FRAG2_PTR_RAW 11
302 #define M_TCB_RX_FRAG2_PTR_RAW 0x1ffffULL
303 #define V_TCB_RX_FRAG2_PTR_RAW(x) ((x) << S_TCB_RX_FRAG2_PTR_RAW)
306 #define W_TCB_RX_FRAG2_LEN_RAW 27
307 #define S_TCB_RX_FRAG2_LEN_RAW 28
308 #define M_TCB_RX_FRAG2_LEN_RAW 0xfffffffULL
309 #define V_TCB_RX_FRAG2_LEN_RAW(x) ((__u64)(x) << S_TCB_RX_FRAG2_LEN_RAW)
312 #define W_TCB_RX_FRAG3_PTR_RAW 28
313 #define S_TCB_RX_FRAG3_PTR_RAW 24
314 #define M_TCB_RX_FRAG3_PTR_RAW 0x1ffffULL
315 #define V_TCB_RX_FRAG3_PTR_RAW(x) ((__u64)(x) << S_TCB_RX_FRAG3_PTR_RAW)
318 #define W_TCB_RX_FRAG3_LEN_RAW 29
319 #define S_TCB_RX_FRAG3_LEN_RAW 9
320 #define M_TCB_RX_FRAG3_LEN_RAW 0xfffffffULL
321 #define V_TCB_RX_FRAG3_LEN_RAW(x) ((__u64)(x) << S_TCB_RX_FRAG3_LEN_RAW)
324 #define W_TCB_RX_FRAG3_START_IDX_OFFSET_RAW 30
325 #define S_TCB_RX_FRAG3_START_IDX_OFFSET_RAW 5
326 #define M_TCB_RX_FRAG3_START_IDX_OFFSET_RAW 0xfffffffULL
327 #define V_TCB_RX_FRAG3_START_IDX_OFFSET_RAW(x) ((__u64)(x) << S_TCB_RX_FRAG3_START_IDX_OFFSET_RAW)
330 #define W_TCB_PDU_HDR_LEN 31
331 #define S_TCB_PDU_HDR_LEN 1
332 #define M_TCB_PDU_HDR_LEN 0xffULL
333 #define V_TCB_PDU_HDR_LEN(x) ((x) << S_TCB_PDU_HDR_LEN)
336 #define W_TCB_AUX1_SLUSH1 31
337 #define S_TCB_AUX1_SLUSH1 9
338 #define M_TCB_AUX1_SLUSH1 0x7fffffULL
339 #define V_TCB_AUX1_SLUSH1(x) ((x) << S_TCB_AUX1_SLUSH1)
342 #define W_TCB_IRS_ULP 26
343 #define S_TCB_IRS_ULP 0
344 #define M_TCB_IRS_ULP 0x1ffULL
345 #define V_TCB_IRS_ULP(x) ((x) << S_TCB_IRS_ULP)
348 #define W_TCB_ISS_ULP 26
349 #define S_TCB_ISS_ULP 9
350 #define M_TCB_ISS_ULP 0x1ffULL
351 #define V_TCB_ISS_ULP(x) ((x) << S_TCB_ISS_ULP)
354 #define W_TCB_TX_PDU_LEN 26
355 #define S_TCB_TX_PDU_LEN 18
356 #define M_TCB_TX_PDU_LEN 0x3fffULL
357 #define V_TCB_TX_PDU_LEN(x) ((x) << S_TCB_TX_PDU_LEN)
360 #define W_TCB_CQ_IDX_SQ 27
361 #define S_TCB_CQ_IDX_SQ 0
362 #define M_TCB_CQ_IDX_SQ 0xffffULL
363 #define V_TCB_CQ_IDX_SQ(x) ((x) << S_TCB_CQ_IDX_SQ)
366 #define W_TCB_CQ_IDX_RQ 27
367 #define S_TCB_CQ_IDX_RQ 16
368 #define M_TCB_CQ_IDX_RQ 0xffffULL
369 #define V_TCB_CQ_IDX_RQ(x) ((x) << S_TCB_CQ_IDX_RQ)
372 #define W_TCB_QP_ID 28
373 #define S_TCB_QP_ID 0
374 #define M_TCB_QP_ID 0xffffULL
375 #define V_TCB_QP_ID(x) ((x) << S_TCB_QP_ID)
378 #define W_TCB_PD_ID 28
379 #define S_TCB_PD_ID 16
380 #define M_TCB_PD_ID 0xffffULL
381 #define V_TCB_PD_ID(x) ((x) << S_TCB_PD_ID)
384 #define W_TCB_STAG 29
386 #define M_TCB_STAG 0xffffffffULL
387 #define V_TCB_STAG(x) ((x) << S_TCB_STAG)
390 #define W_TCB_RQ_START 30
391 #define S_TCB_RQ_START 0
392 #define M_TCB_RQ_START 0x3ffffffULL
393 #define V_TCB_RQ_START(x) ((x) << S_TCB_RQ_START)
396 #define W_TCB_RQ_MSN 30
397 #define S_TCB_RQ_MSN 26
398 #define M_TCB_RQ_MSN 0x1fffULL
399 #define V_TCB_RQ_MSN(x) ((__u64)(x) << S_TCB_RQ_MSN)
402 #define W_TCB_RQ_MAX_OFFSET 31
403 #define S_TCB_RQ_MAX_OFFSET 7
404 #define M_TCB_RQ_MAX_OFFSET 0xfULL
405 #define V_TCB_RQ_MAX_OFFSET(x) ((x) << S_TCB_RQ_MAX_OFFSET)
408 #define W_TCB_RQ_WRITE_PTR 31
409 #define S_TCB_RQ_WRITE_PTR 11
410 #define M_TCB_RQ_WRITE_PTR 0x1fffULL
411 #define V_TCB_RQ_WRITE_PTR(x) ((x) << S_TCB_RQ_WRITE_PTR)
414 #define W_TCB_RDMAP_OPCODE 31
415 #define S_TCB_RDMAP_OPCODE 24
416 #define M_TCB_RDMAP_OPCODE 0xfULL
417 #define V_TCB_RDMAP_OPCODE(x) ((x) << S_TCB_RDMAP_OPCODE)
420 #define W_TCB_ORD_L_BIT_VLD 31
421 #define S_TCB_ORD_L_BIT_VLD 28
422 #define M_TCB_ORD_L_BIT_VLD 0x1ULL
423 #define V_TCB_ORD_L_BIT_VLD(x) ((x) << S_TCB_ORD_L_BIT_VLD)
426 #define W_TCB_TX_FLUSH 31
427 #define S_TCB_TX_FLUSH 29
428 #define M_TCB_TX_FLUSH 0x1ULL
429 #define V_TCB_TX_FLUSH(x) ((x) << S_TCB_TX_FLUSH)
432 #define W_TCB_TX_OOS_RXMT 31
433 #define S_TCB_TX_OOS_RXMT 30
434 #define M_TCB_TX_OOS_RXMT 0x1ULL
435 #define V_TCB_TX_OOS_RXMT(x) ((x) << S_TCB_TX_OOS_RXMT)
438 #define W_TCB_TX_OOS_TXMT 31
439 #define S_TCB_TX_OOS_TXMT 31
440 #define M_TCB_TX_OOS_TXMT 0x1ULL
441 #define V_TCB_TX_OOS_TXMT(x) ((x) << S_TCB_TX_OOS_TXMT)
444 #define W_TCB_RX_DDP_BUF0_OFFSET 26
445 #define S_TCB_RX_DDP_BUF0_OFFSET 0
446 #define M_TCB_RX_DDP_BUF0_OFFSET 0xffffffULL
447 #define V_TCB_RX_DDP_BUF0_OFFSET(x) ((x) << S_TCB_RX_DDP_BUF0_OFFSET)
450 #define W_TCB_RX_DDP_BUF0_LEN 26
451 #define S_TCB_RX_DDP_BUF0_LEN 24
452 #define M_TCB_RX_DDP_BUF0_LEN 0xffffffULL
453 #define V_TCB_RX_DDP_BUF0_LEN(x) ((__u64)(x) << S_TCB_RX_DDP_BUF0_LEN)
456 #define W_TCB_RX_DDP_FLAGS 27
457 #define S_TCB_RX_DDP_FLAGS 16
458 #define M_TCB_RX_DDP_FLAGS 0xffffffULL
459 #define V_TCB_RX_DDP_FLAGS(x) ((__u64)(x) << S_TCB_RX_DDP_FLAGS)
462 #define W_TCB_RX_DDP_BUF1_OFFSET 28
463 #define S_TCB_RX_DDP_BUF1_OFFSET 8
464 #define M_TCB_RX_DDP_BUF1_OFFSET 0xffffffULL
465 #define V_TCB_RX_DDP_BUF1_OFFSET(x) ((x) << S_TCB_RX_DDP_BUF1_OFFSET)
468 #define W_TCB_RX_DDP_BUF1_LEN 29
469 #define S_TCB_RX_DDP_BUF1_LEN 0
470 #define M_TCB_RX_DDP_BUF1_LEN 0xffffffULL
471 #define V_TCB_RX_DDP_BUF1_LEN(x) ((x) << S_TCB_RX_DDP_BUF1_LEN)
474 #define W_TCB_AUX3_SLUSH 29
475 #define S_TCB_AUX3_SLUSH 24
476 #define M_TCB_AUX3_SLUSH 0xffULL
477 #define V_TCB_AUX3_SLUSH(x) ((x) << S_TCB_AUX3_SLUSH)
480 #define W_TCB_RX_DDP_BUF0_TAG 30
481 #define S_TCB_RX_DDP_BUF0_TAG 0
482 #define M_TCB_RX_DDP_BUF0_TAG 0xffffffffULL
483 #define V_TCB_RX_DDP_BUF0_TAG(x) ((x) << S_TCB_RX_DDP_BUF0_TAG)
486 #define W_TCB_RX_DDP_BUF1_TAG 31
487 #define S_TCB_RX_DDP_BUF1_TAG 0
488 #define M_TCB_RX_DDP_BUF1_TAG 0xffffffffULL
489 #define V_TCB_RX_DDP_BUF1_TAG(x) ((x) << S_TCB_RX_DDP_BUF1_TAG)
491 #define S_TF_MIGRATING 0
492 #define V_TF_MIGRATING(x) ((x) << S_TF_MIGRATING)
494 #define S_TF_NON_OFFLOAD 1
495 #define V_TF_NON_OFFLOAD(x) ((x) << S_TF_NON_OFFLOAD)
497 #define S_TF_LOCK_TID 2
498 #define V_TF_LOCK_TID(x) ((x) << S_TF_LOCK_TID)
500 #define S_TF_KEEPALIVE 3
501 #define V_TF_KEEPALIVE(x) ((x) << S_TF_KEEPALIVE)
504 #define V_TF_DACK(x) ((x) << S_TF_DACK)
506 #define S_TF_DACK_MSS 5
507 #define V_TF_DACK_MSS(x) ((x) << S_TF_DACK_MSS)
509 #define S_TF_DACK_NOT_ACKED 6
510 #define V_TF_DACK_NOT_ACKED(x) ((x) << S_TF_DACK_NOT_ACKED)
513 #define V_TF_NAGLE(x) ((x) << S_TF_NAGLE)
515 #define S_TF_SSWS_DISABLED 8
516 #define V_TF_SSWS_DISABLED(x) ((x) << S_TF_SSWS_DISABLED)
518 #define S_TF_RX_FLOW_CONTROL_DDP 9
519 #define V_TF_RX_FLOW_CONTROL_DDP(x) ((x) << S_TF_RX_FLOW_CONTROL_DDP)
521 #define S_TF_RX_FLOW_CONTROL_DISABLE 10
522 #define V_TF_RX_FLOW_CONTROL_DISABLE(x) ((x) << S_TF_RX_FLOW_CONTROL_DISABLE)
524 #define S_TF_RX_CHANNEL 11
525 #define V_TF_RX_CHANNEL(x) ((x) << S_TF_RX_CHANNEL)
527 #define S_TF_TX_CHANNEL0 12
528 #define V_TF_TX_CHANNEL0(x) ((x) << S_TF_TX_CHANNEL0)
530 #define S_TF_TX_CHANNEL1 13
531 #define V_TF_TX_CHANNEL1(x) ((x) << S_TF_TX_CHANNEL1)
533 #define S_TF_TX_QUIESCE 14
534 #define V_TF_TX_QUIESCE(x) ((x) << S_TF_TX_QUIESCE)
536 #define S_TF_RX_QUIESCE 15
537 #define V_TF_RX_QUIESCE(x) ((x) << S_TF_RX_QUIESCE)
539 #define S_TF_TX_PACE_AUTO 16
540 #define V_TF_TX_PACE_AUTO(x) ((x) << S_TF_TX_PACE_AUTO)
542 #define S_TF_MASK_HASH 16
543 #define V_TF_MASK_HASH(x) ((x) << S_TF_MASK_HASH)
545 #define S_TF_TX_PACE_FIXED 17
546 #define V_TF_TX_PACE_FIXED(x) ((x) << S_TF_TX_PACE_FIXED)
548 #define S_TF_DIRECT_STEER_HASH 17
549 #define V_TF_DIRECT_STEER_HASH(x) ((x) << S_TF_DIRECT_STEER_HASH)
551 #define S_TF_TX_QUEUE 18
552 #define M_TF_TX_QUEUE 0x7ULL
553 #define V_TF_TX_QUEUE(x) ((x) << S_TF_TX_QUEUE)
555 #define S_TF_TURBO 21
556 #define V_TF_TURBO(x) ((x) << S_TF_TURBO)
558 #define S_TF_REPORT_TID 21
559 #define V_TF_REPORT_TID(x) ((x) << S_TF_REPORT_TID)
561 #define S_TF_CCTRL_SEL0 22
562 #define V_TF_CCTRL_SEL0(x) ((x) << S_TF_CCTRL_SEL0)
565 #define V_TF_DROP(x) ((x) << S_TF_DROP)
567 #define S_TF_CCTRL_SEL1 23
568 #define V_TF_CCTRL_SEL1(x) ((x) << S_TF_CCTRL_SEL1)
570 #define S_TF_DIRECT_STEER 23
571 #define V_TF_DIRECT_STEER(x) ((x) << S_TF_DIRECT_STEER)
573 #define S_TF_CORE_FIN 24
574 #define V_TF_CORE_FIN(x) ((x) << S_TF_CORE_FIN)
576 #define S_TF_CORE_URG 25
577 #define V_TF_CORE_URG(x) ((x) << S_TF_CORE_URG)
579 #define S_TF_CORE_MORE 26
580 #define V_TF_CORE_MORE(x) ((x) << S_TF_CORE_MORE)
582 #define S_TF_CORE_PUSH 27
583 #define V_TF_CORE_PUSH(x) ((x) << S_TF_CORE_PUSH)
585 #define S_TF_CORE_FLUSH 28
586 #define V_TF_CORE_FLUSH(x) ((x) << S_TF_CORE_FLUSH)
588 #define S_TF_RCV_COALESCE_ENABLE 29
589 #define V_TF_RCV_COALESCE_ENABLE(x) ((x) << S_TF_RCV_COALESCE_ENABLE)
591 #define S_TF_RCV_COALESCE_PUSH 30
592 #define V_TF_RCV_COALESCE_PUSH(x) ((x) << S_TF_RCV_COALESCE_PUSH)
594 #define S_TF_RCV_COALESCE_LAST_PSH 31
595 #define V_TF_RCV_COALESCE_LAST_PSH(x) ((x) << S_TF_RCV_COALESCE_LAST_PSH)
597 #define S_TF_RCV_COALESCE_HEARTBEAT 32
598 #define V_TF_RCV_COALESCE_HEARTBEAT(x) ((__u64)(x) << S_TF_RCV_COALESCE_HEARTBEAT)
601 #define V_TF_INIT(x) ((__u64)(x) << S_TF_INIT)
603 #define S_TF_ACTIVE_OPEN 34
604 #define V_TF_ACTIVE_OPEN(x) ((__u64)(x) << S_TF_ACTIVE_OPEN)
606 #define S_TF_ASK_MODE 35
607 #define V_TF_ASK_MODE(x) ((__u64)(x) << S_TF_ASK_MODE)
609 #define S_TF_MOD_SCHD_REASON0 36
610 #define V_TF_MOD_SCHD_REASON0(x) ((__u64)(x) << S_TF_MOD_SCHD_REASON0)
612 #define S_TF_MOD_SCHD_REASON1 37
613 #define V_TF_MOD_SCHD_REASON1(x) ((__u64)(x) << S_TF_MOD_SCHD_REASON1)
615 #define S_TF_MOD_SCHD_REASON2 38
616 #define V_TF_MOD_SCHD_REASON2(x) ((__u64)(x) << S_TF_MOD_SCHD_REASON2)
618 #define S_TF_MOD_SCHD_TX 39
619 #define V_TF_MOD_SCHD_TX(x) ((__u64)(x) << S_TF_MOD_SCHD_TX)
621 #define S_TF_MOD_SCHD_RX 40
622 #define V_TF_MOD_SCHD_RX(x) ((__u64)(x) << S_TF_MOD_SCHD_RX)
624 #define S_TF_TIMER 41
625 #define V_TF_TIMER(x) ((__u64)(x) << S_TF_TIMER)
627 #define S_TF_DACK_TIMER 42
628 #define V_TF_DACK_TIMER(x) ((__u64)(x) << S_TF_DACK_TIMER)
630 #define S_TF_PEER_FIN 43
631 #define V_TF_PEER_FIN(x) ((__u64)(x) << S_TF_PEER_FIN)
633 #define S_TF_TX_COMPACT 44
634 #define V_TF_TX_COMPACT(x) ((__u64)(x) << S_TF_TX_COMPACT)
636 #define S_TF_RX_COMPACT 45
637 #define V_TF_RX_COMPACT(x) ((__u64)(x) << S_TF_RX_COMPACT)
639 #define S_TF_RDMA_ERROR 46
640 #define V_TF_RDMA_ERROR(x) ((__u64)(x) << S_TF_RDMA_ERROR)
642 #define S_TF_RDMA_FLM_ERROR 47
643 #define V_TF_RDMA_FLM_ERROR(x) ((__u64)(x) << S_TF_RDMA_FLM_ERROR)
645 #define S_TF_TX_PDU_OUT 48
646 #define V_TF_TX_PDU_OUT(x) ((__u64)(x) << S_TF_TX_PDU_OUT)
648 #define S_TF_RX_PDU_OUT 49
649 #define V_TF_RX_PDU_OUT(x) ((__u64)(x) << S_TF_RX_PDU_OUT)
651 #define S_TF_DUPACK_COUNT_ODD 50
652 #define V_TF_DUPACK_COUNT_ODD(x) ((__u64)(x) << S_TF_DUPACK_COUNT_ODD)
654 #define S_TF_FAST_RECOVERY 51
655 #define V_TF_FAST_RECOVERY(x) ((__u64)(x) << S_TF_FAST_RECOVERY)
657 #define S_TF_RECV_SCALE 52
658 #define V_TF_RECV_SCALE(x) ((__u64)(x) << S_TF_RECV_SCALE)
660 #define S_TF_RECV_TSTMP 53
661 #define V_TF_RECV_TSTMP(x) ((__u64)(x) << S_TF_RECV_TSTMP)
663 #define S_TF_RECV_SACK 54
664 #define V_TF_RECV_SACK(x) ((__u64)(x) << S_TF_RECV_SACK)
666 #define S_TF_PEND_CTL0 55
667 #define V_TF_PEND_CTL0(x) ((__u64)(x) << S_TF_PEND_CTL0)
669 #define S_TF_PEND_CTL1 56
670 #define V_TF_PEND_CTL1(x) ((__u64)(x) << S_TF_PEND_CTL1)
672 #define S_TF_PEND_CTL2 57
673 #define V_TF_PEND_CTL2(x) ((__u64)(x) << S_TF_PEND_CTL2)
675 #define S_TF_IP_VERSION 58
676 #define V_TF_IP_VERSION(x) ((__u64)(x) << S_TF_IP_VERSION)
678 #define S_TF_CCTRL_ECN 59
679 #define V_TF_CCTRL_ECN(x) ((__u64)(x) << S_TF_CCTRL_ECN)
682 #define V_TF_LPBK(x) ((__u64)(x) << S_TF_LPBK)
684 #define S_TF_CCTRL_ECE 60
685 #define V_TF_CCTRL_ECE(x) ((__u64)(x) << S_TF_CCTRL_ECE)
687 #define S_TF_REWRITE_DMAC 60
688 #define V_TF_REWRITE_DMAC(x) ((__u64)(x) << S_TF_REWRITE_DMAC)
690 #define S_TF_CCTRL_CWR 61
691 #define V_TF_CCTRL_CWR(x) ((__u64)(x) << S_TF_CCTRL_CWR)
693 #define S_TF_REWRITE_SMAC 61
694 #define V_TF_REWRITE_SMAC(x) ((__u64)(x) << S_TF_REWRITE_SMAC)
696 #define S_TF_CCTRL_RFR 62
697 #define V_TF_CCTRL_RFR(x) ((__u64)(x) << S_TF_CCTRL_RFR)
699 #define S_TF_DDP_INDICATE_OUT 16
700 #define V_TF_DDP_INDICATE_OUT(x) ((x) << S_TF_DDP_INDICATE_OUT)
702 #define S_TF_DDP_ACTIVE_BUF 17
703 #define V_TF_DDP_ACTIVE_BUF(x) ((x) << S_TF_DDP_ACTIVE_BUF)
705 #define S_TF_DDP_OFF 18
706 #define V_TF_DDP_OFF(x) ((x) << S_TF_DDP_OFF)
708 #define S_TF_DDP_WAIT_FRAG 19
709 #define V_TF_DDP_WAIT_FRAG(x) ((x) << S_TF_DDP_WAIT_FRAG)
711 #define S_TF_DDP_BUF_INF 20
712 #define V_TF_DDP_BUF_INF(x) ((x) << S_TF_DDP_BUF_INF)
714 #define S_TF_DDP_RX2TX 21
715 #define V_TF_DDP_RX2TX(x) ((x) << S_TF_DDP_RX2TX)
717 #define S_TF_DDP_BUF0_VALID 24
718 #define V_TF_DDP_BUF0_VALID(x) ((x) << S_TF_DDP_BUF0_VALID)
720 #define S_TF_DDP_BUF0_INDICATE 25
721 #define V_TF_DDP_BUF0_INDICATE(x) ((x) << S_TF_DDP_BUF0_INDICATE)
723 #define S_TF_DDP_BUF0_FLUSH 26
724 #define V_TF_DDP_BUF0_FLUSH(x) ((x) << S_TF_DDP_BUF0_FLUSH)
726 #define S_TF_DDP_PSHF_ENABLE_0 27
727 #define V_TF_DDP_PSHF_ENABLE_0(x) ((x) << S_TF_DDP_PSHF_ENABLE_0)
729 #define S_TF_DDP_PUSH_DISABLE_0 28
730 #define V_TF_DDP_PUSH_DISABLE_0(x) ((x) << S_TF_DDP_PUSH_DISABLE_0)
732 #define S_TF_DDP_PSH_NO_INVALIDATE0 29
733 #define V_TF_DDP_PSH_NO_INVALIDATE0(x) ((x) << S_TF_DDP_PSH_NO_INVALIDATE0)
735 #define S_TF_DDP_BUF1_VALID 32
736 #define V_TF_DDP_BUF1_VALID(x) ((__u64)(x) << S_TF_DDP_BUF1_VALID)
738 #define S_TF_DDP_BUF1_INDICATE 33
739 #define V_TF_DDP_BUF1_INDICATE(x) ((__u64)(x) << S_TF_DDP_BUF1_INDICATE)
741 #define S_TF_DDP_BUF1_FLUSH 34
742 #define V_TF_DDP_BUF1_FLUSH(x) ((__u64)(x) << S_TF_DDP_BUF1_FLUSH)
744 #define S_TF_DDP_PSHF_ENABLE_1 35
745 #define V_TF_DDP_PSHF_ENABLE_1(x) ((__u64)(x) << S_TF_DDP_PSHF_ENABLE_1)
747 #define S_TF_DDP_PUSH_DISABLE_1 36
748 #define V_TF_DDP_PUSH_DISABLE_1(x) ((__u64)(x) << S_TF_DDP_PUSH_DISABLE_1)
750 #define S_TF_DDP_PSH_NO_INVALIDATE1 37
751 #define V_TF_DDP_PSH_NO_INVALIDATE1(x) ((__u64)(x) << S_TF_DDP_PSH_NO_INVALIDATE1)
753 #endif /* _T4_TCB_DEFS_H */