2 * Copyright (c) 2011 Chelsio Communications, Inc.
4 * Written by: Navdeep Parhar <np@FreeBSD.org>
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28 #include <sys/cdefs.h>
29 __FBSDID("$FreeBSD$");
32 #include "opt_inet6.h"
34 #include <sys/types.h>
36 #include <sys/socket.h>
37 #include <sys/kernel.h>
39 #include <sys/malloc.h>
40 #include <sys/queue.h>
42 #include <sys/taskqueue.h>
44 #include <sys/sysctl.h>
46 #include <sys/counter.h>
48 #include <net/ethernet.h>
50 #include <net/if_vlan_var.h>
51 #include <netinet/in.h>
52 #include <netinet/ip.h>
53 #include <netinet/ip6.h>
54 #include <netinet/tcp.h>
55 #include <machine/md_var.h>
59 #include "common/common.h"
60 #include "common/t4_regs.h"
61 #include "common/t4_regs_values.h"
62 #include "common/t4_msg.h"
64 #ifdef T4_PKT_TIMESTAMP
65 #define RX_COPY_THRESHOLD (MINCLSIZE - 8)
67 #define RX_COPY_THRESHOLD MINCLSIZE
71 * Ethernet frames are DMA'd at this byte offset into the freelist buffer.
72 * 0-7 are valid values.
74 static int fl_pktshift = 2;
75 TUNABLE_INT("hw.cxgbe.fl_pktshift", &fl_pktshift);
78 * Pad ethernet payload up to this boundary.
79 * -1: driver should figure out a good value.
81 * Any power of 2 from 32 to 4096 (both inclusive) is also a valid value.
83 static int fl_pad = -1;
84 TUNABLE_INT("hw.cxgbe.fl_pad", &fl_pad);
88 * -1: driver should figure out a good value.
89 * 64 or 128 are the only other valid values.
91 static int spg_len = -1;
92 TUNABLE_INT("hw.cxgbe.spg_len", &spg_len);
96 * -1: no congestion feedback (not recommended).
97 * 0: backpressure the channel instead of dropping packets right away.
98 * 1: no backpressure, drop packets for the congested queue immediately.
100 static int cong_drop = 0;
101 TUNABLE_INT("hw.cxgbe.cong_drop", &cong_drop);
104 * Deliver multiple frames in the same free list buffer if they fit.
105 * -1: let the driver decide whether to enable buffer packing or not.
106 * 0: disable buffer packing.
107 * 1: enable buffer packing.
109 static int buffer_packing = -1;
110 TUNABLE_INT("hw.cxgbe.buffer_packing", &buffer_packing);
113 * Start next frame in a packed buffer at this boundary.
114 * -1: driver should figure out a good value.
118 * value specified here will be overridden by fl_pad.
120 * power of 2 from 32 to 4096 (both inclusive) is a valid value here.
123 * 16, or a power of 2 from 64 to 4096 (both inclusive) is a valid value.
125 static int fl_pack = -1;
126 static int t4_fl_pack;
127 static int t5_fl_pack;
128 TUNABLE_INT("hw.cxgbe.fl_pack", &fl_pack);
131 * Allow the driver to create mbuf(s) in a cluster allocated for rx.
132 * 0: never; always allocate mbufs from the zone_mbuf UMA zone.
133 * 1: ok to create mbuf(s) within a cluster if there is room.
135 static int allow_mbufs_in_cluster = 1;
136 TUNABLE_INT("hw.cxgbe.allow_mbufs_in_cluster", &allow_mbufs_in_cluster);
139 * Largest rx cluster size that the driver is allowed to allocate.
141 static int largest_rx_cluster = MJUM16BYTES;
142 TUNABLE_INT("hw.cxgbe.largest_rx_cluster", &largest_rx_cluster);
145 * Size of cluster allocation that's most likely to succeed. The driver will
146 * fall back to this size if it fails to allocate clusters larger than this.
148 static int safest_rx_cluster = PAGE_SIZE;
149 TUNABLE_INT("hw.cxgbe.safest_rx_cluster", &safest_rx_cluster);
151 /* Used to track coalesced tx work request */
153 uint64_t *flitp; /* ptr to flit where next pkt should start */
154 uint8_t npkt; /* # of packets in this work request */
155 uint8_t nflits; /* # of flits used by this work request */
156 uint16_t plen; /* total payload (sum of all packets) */
159 /* A packet's SGL. This + m_pkthdr has all info needed for tx */
161 int nsegs; /* # of segments in the SGL, 0 means imm. tx */
162 int nflits; /* # of flits needed for the SGL */
163 bus_dma_segment_t seg[TX_SGL_SEGS];
166 static int service_iq(struct sge_iq *, int);
167 static struct mbuf *get_fl_payload(struct adapter *, struct sge_fl *, uint32_t,
169 static int t4_eth_rx(struct sge_iq *, const struct rss_header *, struct mbuf *);
170 static inline void init_iq(struct sge_iq *, struct adapter *, int, int, int,
172 static inline void init_fl(struct adapter *, struct sge_fl *, int, int, int,
174 static inline void init_eq(struct sge_eq *, int, int, uint8_t, uint16_t,
176 static int alloc_ring(struct adapter *, size_t, bus_dma_tag_t *, bus_dmamap_t *,
177 bus_addr_t *, void **);
178 static int free_ring(struct adapter *, bus_dma_tag_t, bus_dmamap_t, bus_addr_t,
180 static int alloc_iq_fl(struct port_info *, struct sge_iq *, struct sge_fl *,
182 static int free_iq_fl(struct port_info *, struct sge_iq *, struct sge_fl *);
183 static void add_fl_sysctls(struct sysctl_ctx_list *, struct sysctl_oid *,
185 static int alloc_fwq(struct adapter *);
186 static int free_fwq(struct adapter *);
187 static int alloc_mgmtq(struct adapter *);
188 static int free_mgmtq(struct adapter *);
189 static int alloc_rxq(struct port_info *, struct sge_rxq *, int, int,
190 struct sysctl_oid *);
191 static int free_rxq(struct port_info *, struct sge_rxq *);
193 static int alloc_ofld_rxq(struct port_info *, struct sge_ofld_rxq *, int, int,
194 struct sysctl_oid *);
195 static int free_ofld_rxq(struct port_info *, struct sge_ofld_rxq *);
197 static int ctrl_eq_alloc(struct adapter *, struct sge_eq *);
198 static int eth_eq_alloc(struct adapter *, struct port_info *, struct sge_eq *);
200 static int ofld_eq_alloc(struct adapter *, struct port_info *, struct sge_eq *);
202 static int alloc_eq(struct adapter *, struct port_info *, struct sge_eq *);
203 static int free_eq(struct adapter *, struct sge_eq *);
204 static int alloc_wrq(struct adapter *, struct port_info *, struct sge_wrq *,
205 struct sysctl_oid *);
206 static int free_wrq(struct adapter *, struct sge_wrq *);
207 static int alloc_txq(struct port_info *, struct sge_txq *, int,
208 struct sysctl_oid *);
209 static int free_txq(struct port_info *, struct sge_txq *);
210 static void oneseg_dma_callback(void *, bus_dma_segment_t *, int, int);
211 static inline bool is_new_response(const struct sge_iq *, struct rsp_ctrl **);
212 static inline void iq_next(struct sge_iq *);
213 static inline void ring_fl_db(struct adapter *, struct sge_fl *);
214 static int refill_fl(struct adapter *, struct sge_fl *, int);
215 static void refill_sfl(void *);
216 static int alloc_fl_sdesc(struct sge_fl *);
217 static void free_fl_sdesc(struct adapter *, struct sge_fl *);
218 static void find_best_refill_source(struct adapter *, struct sge_fl *, int);
219 static void find_safe_refill_source(struct adapter *, struct sge_fl *);
220 static void add_fl_to_sfl(struct adapter *, struct sge_fl *);
222 static int get_pkt_sgl(struct sge_txq *, struct mbuf **, struct sgl *, int);
223 static int free_pkt_sgl(struct sge_txq *, struct sgl *);
224 static int write_txpkt_wr(struct port_info *, struct sge_txq *, struct mbuf *,
226 static int add_to_txpkts(struct port_info *, struct sge_txq *, struct txpkts *,
227 struct mbuf *, struct sgl *);
228 static void write_txpkts_wr(struct sge_txq *, struct txpkts *);
229 static inline void write_ulp_cpl_sgl(struct port_info *, struct sge_txq *,
230 struct txpkts *, struct mbuf *, struct sgl *);
231 static int write_sgl_to_txd(struct sge_eq *, struct sgl *, caddr_t *);
232 static inline void copy_to_txd(struct sge_eq *, caddr_t, caddr_t *, int);
233 static inline void ring_eq_db(struct adapter *, struct sge_eq *);
234 static inline int reclaimable(struct sge_eq *);
235 static int reclaim_tx_descs(struct sge_txq *, int, int);
236 static void write_eqflush_wr(struct sge_eq *);
237 static __be64 get_flit(bus_dma_segment_t *, int, int);
238 static int handle_sge_egr_update(struct sge_iq *, const struct rss_header *,
240 static int handle_fw_msg(struct sge_iq *, const struct rss_header *,
243 static int sysctl_uint16(SYSCTL_HANDLER_ARGS);
244 static int sysctl_bufsizes(SYSCTL_HANDLER_ARGS);
246 static counter_u64_t extfree_refs;
247 static counter_u64_t extfree_rels;
250 * Called on MOD_LOAD. Validates and calculates the SGE tunables.
257 /* set pad to a reasonable powerof2 between 16 and 4096 (inclusive) */
258 #if defined(__i386__) || defined(__amd64__)
259 pad = max(cpu_clflush_line_size, 16);
261 pad = max(CACHE_LINE_SIZE, 16);
263 pad = min(pad, 4096);
265 if (fl_pktshift < 0 || fl_pktshift > 7) {
266 printf("Invalid hw.cxgbe.fl_pktshift value (%d),"
267 " using 2 instead.\n", fl_pktshift);
272 (fl_pad < 32 || fl_pad > 4096 || !powerof2(fl_pad))) {
275 printf("Invalid hw.cxgbe.fl_pad value (%d),"
276 " using %d instead.\n", fl_pad, max(pad, 32));
278 fl_pad = max(pad, 32);
282 * T4 has the same pad and pack boundary. If a pad boundary is set,
283 * pack boundary must be set to the same value. Otherwise take the
284 * specified value or auto-calculate something reasonable.
288 else if (fl_pack < 32 || fl_pack > 4096 || !powerof2(fl_pack))
289 t4_fl_pack = max(pad, 32);
291 t4_fl_pack = fl_pack;
293 /* T5's pack boundary is independent of the pad boundary. */
294 if (fl_pack < 16 || fl_pack == 32 || fl_pack > 4096 ||
296 t5_fl_pack = max(pad, CACHE_LINE_SIZE);
298 t5_fl_pack = fl_pack;
300 if (spg_len != 64 && spg_len != 128) {
303 #if defined(__i386__) || defined(__amd64__)
304 len = cpu_clflush_line_size > 64 ? 128 : 64;
309 printf("Invalid hw.cxgbe.spg_len value (%d),"
310 " using %d instead.\n", spg_len, len);
315 if (cong_drop < -1 || cong_drop > 1) {
316 printf("Invalid hw.cxgbe.cong_drop value (%d),"
317 " using 0 instead.\n", cong_drop);
321 extfree_refs = counter_u64_alloc(M_WAITOK);
322 extfree_rels = counter_u64_alloc(M_WAITOK);
323 counter_u64_zero(extfree_refs);
324 counter_u64_zero(extfree_rels);
328 t4_sge_modunload(void)
331 counter_u64_free(extfree_refs);
332 counter_u64_free(extfree_rels);
336 t4_sge_extfree_refs(void)
340 rels = counter_u64_fetch(extfree_rels);
341 refs = counter_u64_fetch(extfree_refs);
343 return (refs - rels);
347 t4_init_sge_cpl_handlers(struct adapter *sc)
350 t4_register_cpl_handler(sc, CPL_FW4_MSG, handle_fw_msg);
351 t4_register_cpl_handler(sc, CPL_FW6_MSG, handle_fw_msg);
352 t4_register_cpl_handler(sc, CPL_SGE_EGR_UPDATE, handle_sge_egr_update);
353 t4_register_cpl_handler(sc, CPL_RX_PKT, t4_eth_rx);
354 t4_register_fw_msg_handler(sc, FW6_TYPE_CMD_RPL, t4_handle_fw_rpl);
358 * adap->params.vpd.cclk must be set up before this is called.
361 t4_tweak_chip_settings(struct adapter *sc)
365 int intr_timer[SGE_NTIMERS] = {1, 5, 10, 50, 100, 200};
366 int timer_max = M_TIMERVALUE0 * 1000 / sc->params.vpd.cclk;
367 int intr_pktcount[SGE_NCOUNTERS] = {1, 8, 16, 32}; /* 63 max */
368 uint16_t indsz = min(RX_COPY_THRESHOLD - 1, M_INDICATESIZE);
369 static int sge_flbuf_sizes[] = {
371 #if MJUMPAGESIZE != MCLBYTES
373 MJUMPAGESIZE - CL_METADATA_SIZE,
374 MJUMPAGESIZE - 2 * MSIZE - CL_METADATA_SIZE,
378 MCLBYTES - MSIZE - CL_METADATA_SIZE,
379 MJUM9BYTES - CL_METADATA_SIZE,
380 MJUM16BYTES - CL_METADATA_SIZE,
383 KASSERT(sc->flags & MASTER_PF,
384 ("%s: trying to change chip settings when not master.", __func__));
386 m = V_PKTSHIFT(M_PKTSHIFT) | F_RXPKTCPLMODE | F_EGRSTATUSPAGESIZE;
387 v = V_PKTSHIFT(fl_pktshift) | F_RXPKTCPLMODE |
388 V_EGRSTATUSPAGESIZE(spg_len == 128);
389 if (is_t4(sc) && (fl_pad || buffer_packing)) {
390 /* t4_fl_pack has the correct value even when fl_pad = 0 */
391 m |= V_INGPADBOUNDARY(M_INGPADBOUNDARY);
392 v |= V_INGPADBOUNDARY(ilog2(t4_fl_pack) - 5);
393 } else if (is_t5(sc) && fl_pad) {
394 m |= V_INGPADBOUNDARY(M_INGPADBOUNDARY);
395 v |= V_INGPADBOUNDARY(ilog2(fl_pad) - 5);
397 t4_set_reg_field(sc, A_SGE_CONTROL, m, v);
399 if (is_t5(sc) && buffer_packing) {
400 m = V_INGPACKBOUNDARY(M_INGPACKBOUNDARY);
401 if (t5_fl_pack == 16)
402 v = V_INGPACKBOUNDARY(0);
404 v = V_INGPACKBOUNDARY(ilog2(t5_fl_pack) - 5);
405 t4_set_reg_field(sc, A_SGE_CONTROL2, m, v);
408 v = V_HOSTPAGESIZEPF0(PAGE_SHIFT - 10) |
409 V_HOSTPAGESIZEPF1(PAGE_SHIFT - 10) |
410 V_HOSTPAGESIZEPF2(PAGE_SHIFT - 10) |
411 V_HOSTPAGESIZEPF3(PAGE_SHIFT - 10) |
412 V_HOSTPAGESIZEPF4(PAGE_SHIFT - 10) |
413 V_HOSTPAGESIZEPF5(PAGE_SHIFT - 10) |
414 V_HOSTPAGESIZEPF6(PAGE_SHIFT - 10) |
415 V_HOSTPAGESIZEPF7(PAGE_SHIFT - 10);
416 t4_write_reg(sc, A_SGE_HOST_PAGE_SIZE, v);
418 KASSERT(nitems(sge_flbuf_sizes) <= SGE_FLBUF_SIZES,
419 ("%s: hw buffer size table too big", __func__));
420 for (i = 0; i < min(nitems(sge_flbuf_sizes), SGE_FLBUF_SIZES); i++) {
421 t4_write_reg(sc, A_SGE_FL_BUFFER_SIZE0 + (4 * i),
425 v = V_THRESHOLD_0(intr_pktcount[0]) | V_THRESHOLD_1(intr_pktcount[1]) |
426 V_THRESHOLD_2(intr_pktcount[2]) | V_THRESHOLD_3(intr_pktcount[3]);
427 t4_write_reg(sc, A_SGE_INGRESS_RX_THRESHOLD, v);
429 KASSERT(intr_timer[0] <= timer_max,
430 ("%s: not a single usable timer (%d, %d)", __func__, intr_timer[0],
432 for (i = 1; i < nitems(intr_timer); i++) {
433 KASSERT(intr_timer[i] >= intr_timer[i - 1],
434 ("%s: timers not listed in increasing order (%d)",
437 while (intr_timer[i] > timer_max) {
438 if (i == nitems(intr_timer) - 1) {
439 intr_timer[i] = timer_max;
442 intr_timer[i] += intr_timer[i - 1];
447 v = V_TIMERVALUE0(us_to_core_ticks(sc, intr_timer[0])) |
448 V_TIMERVALUE1(us_to_core_ticks(sc, intr_timer[1]));
449 t4_write_reg(sc, A_SGE_TIMER_VALUE_0_AND_1, v);
450 v = V_TIMERVALUE2(us_to_core_ticks(sc, intr_timer[2])) |
451 V_TIMERVALUE3(us_to_core_ticks(sc, intr_timer[3]));
452 t4_write_reg(sc, A_SGE_TIMER_VALUE_2_AND_3, v);
453 v = V_TIMERVALUE4(us_to_core_ticks(sc, intr_timer[4])) |
454 V_TIMERVALUE5(us_to_core_ticks(sc, intr_timer[5]));
455 t4_write_reg(sc, A_SGE_TIMER_VALUE_4_AND_5, v);
457 if (cong_drop == 0) {
458 m = F_TUNNELCNGDROP0 | F_TUNNELCNGDROP1 | F_TUNNELCNGDROP2 |
460 t4_set_reg_field(sc, A_TP_PARA_REG3, m, 0);
463 /* 4K, 16K, 64K, 256K DDP "page sizes" */
464 v = V_HPZ0(0) | V_HPZ1(2) | V_HPZ2(4) | V_HPZ3(6);
465 t4_write_reg(sc, A_ULP_RX_TDDP_PSZ, v);
467 m = v = F_TDDPTAGTCB;
468 t4_set_reg_field(sc, A_ULP_RX_CTL, m, v);
470 m = V_INDICATESIZE(M_INDICATESIZE) | F_REARMDDPOFFSET |
472 v = V_INDICATESIZE(indsz) | F_REARMDDPOFFSET | F_RESETDDPOFFSET;
473 t4_set_reg_field(sc, A_TP_PARA_REG5, m, v);
477 * SGE wants the buffer to be at least 64B and then a multiple of the pad
478 * boundary or 16, whichever is greater.
483 int mask = max(fl_pad, 16) - 1;
485 return (hwsz >= 64 && (hwsz & mask) == 0);
489 * XXX: driver really should be able to deal with unexpected settings.
492 t4_read_chip_settings(struct adapter *sc)
494 struct sge *s = &sc->sge;
497 uint16_t indsz = min(RX_COPY_THRESHOLD - 1, M_INDICATESIZE);
498 static int sw_buf_sizes[] = { /* Sorted by size */
500 #if MJUMPAGESIZE != MCLBYTES
506 struct sw_zone_info *swz, *safe_swz;
507 struct hw_buf_info *hwb;
509 m = V_PKTSHIFT(M_PKTSHIFT) | F_RXPKTCPLMODE | F_EGRSTATUSPAGESIZE;
510 v = V_PKTSHIFT(fl_pktshift) | F_RXPKTCPLMODE |
511 V_EGRSTATUSPAGESIZE(spg_len == 128);
512 if (is_t4(sc) && (fl_pad || buffer_packing)) {
513 m |= V_INGPADBOUNDARY(M_INGPADBOUNDARY);
514 v |= V_INGPADBOUNDARY(ilog2(t4_fl_pack) - 5);
515 } else if (is_t5(sc) && fl_pad) {
516 m |= V_INGPADBOUNDARY(M_INGPADBOUNDARY);
517 v |= V_INGPADBOUNDARY(ilog2(fl_pad) - 5);
519 r = t4_read_reg(sc, A_SGE_CONTROL);
521 device_printf(sc->dev, "invalid SGE_CONTROL(0x%x)\n", r);
525 if (is_t5(sc) && buffer_packing) {
526 m = V_INGPACKBOUNDARY(M_INGPACKBOUNDARY);
527 if (t5_fl_pack == 16)
528 v = V_INGPACKBOUNDARY(0);
530 v = V_INGPACKBOUNDARY(ilog2(t5_fl_pack) - 5);
531 r = t4_read_reg(sc, A_SGE_CONTROL2);
533 device_printf(sc->dev,
534 "invalid SGE_CONTROL2(0x%x)\n", r);
538 s->pack_boundary = is_t4(sc) ? t4_fl_pack : t5_fl_pack;
540 v = V_HOSTPAGESIZEPF0(PAGE_SHIFT - 10) |
541 V_HOSTPAGESIZEPF1(PAGE_SHIFT - 10) |
542 V_HOSTPAGESIZEPF2(PAGE_SHIFT - 10) |
543 V_HOSTPAGESIZEPF3(PAGE_SHIFT - 10) |
544 V_HOSTPAGESIZEPF4(PAGE_SHIFT - 10) |
545 V_HOSTPAGESIZEPF5(PAGE_SHIFT - 10) |
546 V_HOSTPAGESIZEPF6(PAGE_SHIFT - 10) |
547 V_HOSTPAGESIZEPF7(PAGE_SHIFT - 10);
548 r = t4_read_reg(sc, A_SGE_HOST_PAGE_SIZE);
550 device_printf(sc->dev, "invalid SGE_HOST_PAGE_SIZE(0x%x)\n", r);
554 /* Filter out unusable hw buffer sizes entirely (mark with -2). */
555 hwb = &s->hw_buf_info[0];
556 for (i = 0; i < nitems(s->hw_buf_info); i++, hwb++) {
557 r = t4_read_reg(sc, A_SGE_FL_BUFFER_SIZE0 + (4 * i));
559 hwb->zidx = hwsz_ok(r) ? -1 : -2;
564 * Create a sorted list in decreasing order of hw buffer sizes (and so
565 * increasing order of spare area) for each software zone.
567 n = 0; /* no usable buffer size to begin with */
568 swz = &s->sw_zone_info[0];
570 for (i = 0; i < SW_ZONE_SIZES; i++, swz++) {
571 int8_t head = -1, tail = -1;
573 swz->size = sw_buf_sizes[i];
574 swz->zone = m_getzone(swz->size);
575 swz->type = m_gettype(swz->size);
577 if (swz->size == safest_rx_cluster)
580 hwb = &s->hw_buf_info[0];
581 for (j = 0; j < SGE_FLBUF_SIZES; j++, hwb++) {
582 if (hwb->zidx != -1 || hwb->size > swz->size)
587 else if (hwb->size < s->hw_buf_info[tail].size) {
588 s->hw_buf_info[tail].next = j;
592 struct hw_buf_info *t;
594 for (cur = &head; *cur != -1; cur = &t->next) {
595 t = &s->hw_buf_info[*cur];
596 if (hwb->size == t->size) {
600 if (hwb->size > t->size) {
608 swz->head_hwidx = head;
609 swz->tail_hwidx = tail;
613 if (swz->size - s->hw_buf_info[tail].size >=
615 sc->flags |= BUF_PACKING_OK;
619 device_printf(sc->dev, "no usable SGE FL buffer size.\n");
625 if (safe_swz != NULL) {
626 s->safe_hwidx1 = safe_swz->head_hwidx;
627 for (i = safe_swz->head_hwidx; i != -1; i = hwb->next) {
630 hwb = &s->hw_buf_info[i];
631 spare = safe_swz->size - hwb->size;
632 if (spare < CL_METADATA_SIZE)
634 if (s->safe_hwidx2 == -1 ||
635 spare == CL_METADATA_SIZE + MSIZE)
637 if (spare >= CL_METADATA_SIZE + MSIZE)
642 r = t4_read_reg(sc, A_SGE_INGRESS_RX_THRESHOLD);
643 s->counter_val[0] = G_THRESHOLD_0(r);
644 s->counter_val[1] = G_THRESHOLD_1(r);
645 s->counter_val[2] = G_THRESHOLD_2(r);
646 s->counter_val[3] = G_THRESHOLD_3(r);
648 r = t4_read_reg(sc, A_SGE_TIMER_VALUE_0_AND_1);
649 s->timer_val[0] = G_TIMERVALUE0(r) / core_ticks_per_usec(sc);
650 s->timer_val[1] = G_TIMERVALUE1(r) / core_ticks_per_usec(sc);
651 r = t4_read_reg(sc, A_SGE_TIMER_VALUE_2_AND_3);
652 s->timer_val[2] = G_TIMERVALUE2(r) / core_ticks_per_usec(sc);
653 s->timer_val[3] = G_TIMERVALUE3(r) / core_ticks_per_usec(sc);
654 r = t4_read_reg(sc, A_SGE_TIMER_VALUE_4_AND_5);
655 s->timer_val[4] = G_TIMERVALUE4(r) / core_ticks_per_usec(sc);
656 s->timer_val[5] = G_TIMERVALUE5(r) / core_ticks_per_usec(sc);
658 if (cong_drop == 0) {
659 m = F_TUNNELCNGDROP0 | F_TUNNELCNGDROP1 | F_TUNNELCNGDROP2 |
661 r = t4_read_reg(sc, A_TP_PARA_REG3);
663 device_printf(sc->dev,
664 "invalid TP_PARA_REG3(0x%x)\n", r);
669 v = V_HPZ0(0) | V_HPZ1(2) | V_HPZ2(4) | V_HPZ3(6);
670 r = t4_read_reg(sc, A_ULP_RX_TDDP_PSZ);
672 device_printf(sc->dev, "invalid ULP_RX_TDDP_PSZ(0x%x)\n", r);
676 m = v = F_TDDPTAGTCB;
677 r = t4_read_reg(sc, A_ULP_RX_CTL);
679 device_printf(sc->dev, "invalid ULP_RX_CTL(0x%x)\n", r);
683 m = V_INDICATESIZE(M_INDICATESIZE) | F_REARMDDPOFFSET |
685 v = V_INDICATESIZE(indsz) | F_REARMDDPOFFSET | F_RESETDDPOFFSET;
686 r = t4_read_reg(sc, A_TP_PARA_REG5);
688 device_printf(sc->dev, "invalid TP_PARA_REG5(0x%x)\n", r);
692 r = t4_read_reg(sc, A_SGE_CONM_CTRL);
693 s->fl_starve_threshold = G_EGRTHRESHOLD(r) * 2 + 1;
695 s->fl_starve_threshold2 = s->fl_starve_threshold;
697 s->fl_starve_threshold2 = G_EGRTHRESHOLDPACKING(r) * 2 + 1;
699 /* egress queues: log2 of # of doorbells per BAR2 page */
700 r = t4_read_reg(sc, A_SGE_EGRESS_QUEUES_PER_PAGE_PF);
701 r >>= S_QUEUESPERPAGEPF0 +
702 (S_QUEUESPERPAGEPF1 - S_QUEUESPERPAGEPF0) * sc->pf;
703 s->eq_s_qpp = r & M_QUEUESPERPAGEPF0;
705 /* ingress queues: log2 of # of doorbells per BAR2 page */
706 r = t4_read_reg(sc, A_SGE_INGRESS_QUEUES_PER_PAGE_PF);
707 r >>= S_QUEUESPERPAGEPF0 +
708 (S_QUEUESPERPAGEPF1 - S_QUEUESPERPAGEPF0) * sc->pf;
709 s->iq_s_qpp = r & M_QUEUESPERPAGEPF0;
711 t4_init_tp_params(sc);
713 t4_read_mtu_tbl(sc, sc->params.mtus, NULL);
714 t4_load_mtus(sc, sc->params.mtus, sc->params.a_wnd, sc->params.b_wnd);
720 t4_create_dma_tag(struct adapter *sc)
724 rc = bus_dma_tag_create(bus_get_dma_tag(sc->dev), 1, 0,
725 BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR, NULL, NULL, BUS_SPACE_MAXSIZE,
726 BUS_SPACE_UNRESTRICTED, BUS_SPACE_MAXSIZE, BUS_DMA_ALLOCNOW, NULL,
729 device_printf(sc->dev,
730 "failed to create main DMA tag: %d\n", rc);
737 enable_buffer_packing(struct adapter *sc)
740 if (sc->flags & BUF_PACKING_OK &&
741 ((is_t5(sc) && buffer_packing) || /* 1 or -1 both ok for T5 */
742 (is_t4(sc) && buffer_packing == 1)))
748 t4_sge_sysctls(struct adapter *sc, struct sysctl_ctx_list *ctx,
749 struct sysctl_oid_list *children)
752 SYSCTL_ADD_PROC(ctx, children, OID_AUTO, "buffer_sizes",
753 CTLTYPE_STRING | CTLFLAG_RD, &sc->sge, 0, sysctl_bufsizes, "A",
754 "freelist buffer sizes");
756 SYSCTL_ADD_INT(ctx, children, OID_AUTO, "fl_pktshift", CTLFLAG_RD,
757 NULL, fl_pktshift, "payload DMA offset in rx buffer (bytes)");
759 SYSCTL_ADD_INT(ctx, children, OID_AUTO, "fl_pad", CTLFLAG_RD,
760 NULL, fl_pad, "payload pad boundary (bytes)");
762 SYSCTL_ADD_INT(ctx, children, OID_AUTO, "spg_len", CTLFLAG_RD,
763 NULL, spg_len, "status page size (bytes)");
765 SYSCTL_ADD_INT(ctx, children, OID_AUTO, "cong_drop", CTLFLAG_RD,
766 NULL, cong_drop, "congestion drop setting");
768 SYSCTL_ADD_INT(ctx, children, OID_AUTO, "buffer_packing", CTLFLAG_RD,
769 NULL, enable_buffer_packing(sc),
770 "pack multiple frames in one fl buffer");
772 SYSCTL_ADD_INT(ctx, children, OID_AUTO, "fl_pack", CTLFLAG_RD,
773 NULL, sc->sge.pack_boundary, "payload pack boundary (bytes)");
777 t4_destroy_dma_tag(struct adapter *sc)
780 bus_dma_tag_destroy(sc->dmat);
786 * Allocate and initialize the firmware event queue and the management queue.
788 * Returns errno on failure. Resources allocated up to that point may still be
789 * allocated. Caller is responsible for cleanup in case this function fails.
792 t4_setup_adapter_queues(struct adapter *sc)
796 ADAPTER_LOCK_ASSERT_NOTOWNED(sc);
798 sysctl_ctx_init(&sc->ctx);
799 sc->flags |= ADAP_SYSCTL_CTX;
802 * Firmware event queue
809 * Management queue. This is just a control queue that uses the fwq as
812 rc = alloc_mgmtq(sc);
821 t4_teardown_adapter_queues(struct adapter *sc)
824 ADAPTER_LOCK_ASSERT_NOTOWNED(sc);
826 /* Do this before freeing the queue */
827 if (sc->flags & ADAP_SYSCTL_CTX) {
828 sysctl_ctx_free(&sc->ctx);
829 sc->flags &= ~ADAP_SYSCTL_CTX;
839 first_vector(struct port_info *pi)
841 struct adapter *sc = pi->adapter;
842 int rc = T4_EXTRA_INTR, i;
844 if (sc->intr_count == 1)
847 for_each_port(sc, i) {
848 struct port_info *p = sc->port[i];
850 if (i == pi->port_id)
854 if (sc->flags & INTR_DIRECT)
855 rc += p->nrxq + p->nofldrxq;
857 rc += max(p->nrxq, p->nofldrxq);
860 * Not compiled with offload support and intr_count > 1. Only
861 * NIC queues exist and they'd better be taking direct
864 KASSERT(sc->flags & INTR_DIRECT,
865 ("%s: intr_count %d, !INTR_DIRECT", __func__,
876 * Given an arbitrary "index," come up with an iq that can be used by other
877 * queues (of this port) for interrupt forwarding, SGE egress updates, etc.
878 * The iq returned is guaranteed to be something that takes direct interrupts.
880 static struct sge_iq *
881 port_intr_iq(struct port_info *pi, int idx)
883 struct adapter *sc = pi->adapter;
884 struct sge *s = &sc->sge;
885 struct sge_iq *iq = NULL;
887 if (sc->intr_count == 1)
888 return (&sc->sge.fwq);
891 if (sc->flags & INTR_DIRECT) {
892 idx %= pi->nrxq + pi->nofldrxq;
894 if (idx >= pi->nrxq) {
896 iq = &s->ofld_rxq[pi->first_ofld_rxq + idx].iq;
898 iq = &s->rxq[pi->first_rxq + idx].iq;
901 idx %= max(pi->nrxq, pi->nofldrxq);
903 if (pi->nrxq >= pi->nofldrxq)
904 iq = &s->rxq[pi->first_rxq + idx].iq;
906 iq = &s->ofld_rxq[pi->first_ofld_rxq + idx].iq;
910 * Not compiled with offload support and intr_count > 1. Only NIC
911 * queues exist and they'd better be taking direct interrupts.
913 KASSERT(sc->flags & INTR_DIRECT,
914 ("%s: intr_count %d, !INTR_DIRECT", __func__, sc->intr_count));
917 iq = &s->rxq[pi->first_rxq + idx].iq;
920 KASSERT(iq->flags & IQ_INTR, ("%s: EDOOFUS", __func__));
924 /* Maximum payload that can be delivered with a single iq descriptor */
926 mtu_to_max_payload(struct adapter *sc, int mtu, const int toe)
932 payload = sc->tt.rx_coalesce ?
933 G_RXCOALESCESIZE(t4_read_reg(sc, A_TP_PARA_REG2)) : mtu;
936 /* large enough even when hw VLAN extraction is disabled */
937 payload = fl_pktshift + ETHER_HDR_LEN + ETHER_VLAN_ENCAP_LEN +
942 payload = roundup2(payload, fl_pad);
948 t4_setup_port_queues(struct port_info *pi)
950 int rc = 0, i, j, intr_idx, iqid;
953 struct sge_wrq *ctrlq;
955 struct sge_ofld_rxq *ofld_rxq;
956 struct sge_wrq *ofld_txq;
957 struct sysctl_oid *oid2 = NULL;
960 struct adapter *sc = pi->adapter;
961 struct ifnet *ifp = pi->ifp;
962 struct sysctl_oid *oid = device_get_sysctl_tree(pi->dev);
963 struct sysctl_oid_list *children = SYSCTL_CHILDREN(oid);
964 int maxp, pack, mtu = ifp->if_mtu;
966 oid = SYSCTL_ADD_NODE(&pi->ctx, children, OID_AUTO, "rxq", CTLFLAG_RD,
970 if (is_offload(sc)) {
971 oid2 = SYSCTL_ADD_NODE(&pi->ctx, children, OID_AUTO, "ofld_rxq",
973 "rx queues for offloaded TCP connections");
977 /* Interrupt vector to start from (when using multiple vectors) */
978 intr_idx = first_vector(pi);
981 * First pass over all rx queues (NIC and TOE):
982 * a) initialize iq and fl
983 * b) allocate queue iff it will take direct interrupts.
985 maxp = mtu_to_max_payload(sc, mtu, 0);
986 pack = enable_buffer_packing(sc);
987 for_each_rxq(pi, i, rxq) {
989 init_iq(&rxq->iq, sc, pi->tmr_idx, pi->pktc_idx, pi->qsize_rxq,
992 snprintf(name, sizeof(name), "%s rxq%d-fl",
993 device_get_nameunit(pi->dev), i);
994 init_fl(sc, &rxq->fl, pi->qsize_rxq / 8, maxp, pack, name);
996 if (sc->flags & INTR_DIRECT
998 || (sc->intr_count > 1 && pi->nrxq >= pi->nofldrxq)
1001 rxq->iq.flags |= IQ_INTR;
1002 rc = alloc_rxq(pi, rxq, intr_idx, i, oid);
1010 maxp = mtu_to_max_payload(sc, mtu, 1);
1011 for_each_ofld_rxq(pi, i, ofld_rxq) {
1013 init_iq(&ofld_rxq->iq, sc, pi->tmr_idx, pi->pktc_idx,
1014 pi->qsize_rxq, RX_IQ_ESIZE);
1016 snprintf(name, sizeof(name), "%s ofld_rxq%d-fl",
1017 device_get_nameunit(pi->dev), i);
1018 init_fl(sc, &ofld_rxq->fl, pi->qsize_rxq / 8, maxp, pack, name);
1020 if (sc->flags & INTR_DIRECT ||
1021 (sc->intr_count > 1 && pi->nofldrxq > pi->nrxq)) {
1022 ofld_rxq->iq.flags |= IQ_INTR;
1023 rc = alloc_ofld_rxq(pi, ofld_rxq, intr_idx, i, oid2);
1032 * Second pass over all rx queues (NIC and TOE). The queues forwarding
1033 * their interrupts are allocated now.
1036 for_each_rxq(pi, i, rxq) {
1037 if (rxq->iq.flags & IQ_INTR)
1040 intr_idx = port_intr_iq(pi, j)->abs_id;
1042 rc = alloc_rxq(pi, rxq, intr_idx, i, oid);
1049 for_each_ofld_rxq(pi, i, ofld_rxq) {
1050 if (ofld_rxq->iq.flags & IQ_INTR)
1053 intr_idx = port_intr_iq(pi, j)->abs_id;
1055 rc = alloc_ofld_rxq(pi, ofld_rxq, intr_idx, i, oid2);
1063 * Now the tx queues. Only one pass needed.
1065 oid = SYSCTL_ADD_NODE(&pi->ctx, children, OID_AUTO, "txq", CTLFLAG_RD,
1068 for_each_txq(pi, i, txq) {
1071 iqid = port_intr_iq(pi, j)->cntxt_id;
1073 snprintf(name, sizeof(name), "%s txq%d",
1074 device_get_nameunit(pi->dev), i);
1075 init_eq(&txq->eq, EQ_ETH, pi->qsize_txq, pi->tx_chan, iqid,
1078 rc = alloc_txq(pi, txq, i, oid);
1085 oid = SYSCTL_ADD_NODE(&pi->ctx, children, OID_AUTO, "ofld_txq",
1086 CTLFLAG_RD, NULL, "tx queues for offloaded TCP connections");
1087 for_each_ofld_txq(pi, i, ofld_txq) {
1090 iqid = port_intr_iq(pi, j)->cntxt_id;
1092 snprintf(name, sizeof(name), "%s ofld_txq%d",
1093 device_get_nameunit(pi->dev), i);
1094 init_eq(&ofld_txq->eq, EQ_OFLD, pi->qsize_txq, pi->tx_chan,
1097 snprintf(name, sizeof(name), "%d", i);
1098 oid2 = SYSCTL_ADD_NODE(&pi->ctx, SYSCTL_CHILDREN(oid), OID_AUTO,
1099 name, CTLFLAG_RD, NULL, "offload tx queue");
1101 rc = alloc_wrq(sc, pi, ofld_txq, oid2);
1109 * Finally, the control queue.
1111 oid = SYSCTL_ADD_NODE(&pi->ctx, children, OID_AUTO, "ctrlq", CTLFLAG_RD,
1112 NULL, "ctrl queue");
1113 ctrlq = &sc->sge.ctrlq[pi->port_id];
1114 iqid = port_intr_iq(pi, 0)->cntxt_id;
1115 snprintf(name, sizeof(name), "%s ctrlq", device_get_nameunit(pi->dev));
1116 init_eq(&ctrlq->eq, EQ_CTRL, CTRL_EQ_QSIZE, pi->tx_chan, iqid, name);
1117 rc = alloc_wrq(sc, pi, ctrlq, oid);
1121 t4_teardown_port_queues(pi);
1130 t4_teardown_port_queues(struct port_info *pi)
1133 struct adapter *sc = pi->adapter;
1134 struct sge_rxq *rxq;
1135 struct sge_txq *txq;
1137 struct sge_ofld_rxq *ofld_rxq;
1138 struct sge_wrq *ofld_txq;
1141 /* Do this before freeing the queues */
1142 if (pi->flags & PORT_SYSCTL_CTX) {
1143 sysctl_ctx_free(&pi->ctx);
1144 pi->flags &= ~PORT_SYSCTL_CTX;
1148 * Take down all the tx queues first, as they reference the rx queues
1149 * (for egress updates, etc.).
1152 free_wrq(sc, &sc->sge.ctrlq[pi->port_id]);
1154 for_each_txq(pi, i, txq) {
1159 for_each_ofld_txq(pi, i, ofld_txq) {
1160 free_wrq(sc, ofld_txq);
1165 * Then take down the rx queues that forward their interrupts, as they
1166 * reference other rx queues.
1169 for_each_rxq(pi, i, rxq) {
1170 if ((rxq->iq.flags & IQ_INTR) == 0)
1175 for_each_ofld_rxq(pi, i, ofld_rxq) {
1176 if ((ofld_rxq->iq.flags & IQ_INTR) == 0)
1177 free_ofld_rxq(pi, ofld_rxq);
1182 * Then take down the rx queues that take direct interrupts.
1185 for_each_rxq(pi, i, rxq) {
1186 if (rxq->iq.flags & IQ_INTR)
1191 for_each_ofld_rxq(pi, i, ofld_rxq) {
1192 if (ofld_rxq->iq.flags & IQ_INTR)
1193 free_ofld_rxq(pi, ofld_rxq);
1201 * Deals with errors and the firmware event queue. All data rx queues forward
1202 * their interrupt to the firmware event queue.
1205 t4_intr_all(void *arg)
1207 struct adapter *sc = arg;
1208 struct sge_iq *fwq = &sc->sge.fwq;
1211 if (atomic_cmpset_int(&fwq->state, IQS_IDLE, IQS_BUSY)) {
1213 atomic_cmpset_int(&fwq->state, IQS_BUSY, IQS_IDLE);
1217 /* Deals with error interrupts */
1219 t4_intr_err(void *arg)
1221 struct adapter *sc = arg;
1223 t4_write_reg(sc, MYPF_REG(A_PCIE_PF_CLI), 0);
1224 t4_slow_intr_handler(sc);
1228 t4_intr_evt(void *arg)
1230 struct sge_iq *iq = arg;
1232 if (atomic_cmpset_int(&iq->state, IQS_IDLE, IQS_BUSY)) {
1234 atomic_cmpset_int(&iq->state, IQS_BUSY, IQS_IDLE);
1241 struct sge_iq *iq = arg;
1243 if (atomic_cmpset_int(&iq->state, IQS_IDLE, IQS_BUSY)) {
1245 atomic_cmpset_int(&iq->state, IQS_BUSY, IQS_IDLE);
1250 * Deals with anything and everything on the given ingress queue.
1253 service_iq(struct sge_iq *iq, int budget)
1256 struct sge_rxq *rxq = iq_to_rxq(iq); /* Use iff iq is part of rxq */
1257 struct sge_fl *fl = &rxq->fl; /* Use iff IQ_HAS_FL */
1258 struct adapter *sc = iq->adapter;
1259 struct rsp_ctrl *ctrl;
1260 const struct rss_header *rss;
1261 int ndescs = 0, limit, fl_bufs_used = 0;
1265 STAILQ_HEAD(, sge_iq) iql = STAILQ_HEAD_INITIALIZER(iql);
1266 #if defined(INET) || defined(INET6)
1267 const struct timeval lro_timeout = {0, sc->lro_timeout};
1270 limit = budget ? budget : iq->qsize / 8;
1272 KASSERT(iq->state == IQS_BUSY, ("%s: iq %p not BUSY", __func__, iq));
1275 * We always come back and check the descriptor ring for new indirect
1276 * interrupts and other responses after running a single handler.
1279 while (is_new_response(iq, &ctrl)) {
1284 rsp_type = G_RSPD_TYPE(ctrl->u.type_gen);
1285 lq = be32toh(ctrl->pldbuflen_qid);
1286 rss = (const void *)iq->cdesc;
1289 case X_RSPD_TYPE_FLBUF:
1291 KASSERT(iq->flags & IQ_HAS_FL,
1292 ("%s: data for an iq (%p) with no freelist",
1295 m0 = get_fl_payload(sc, fl, lq, &fl_bufs_used);
1296 if (__predict_false(m0 == NULL))
1298 #ifdef T4_PKT_TIMESTAMP
1300 * 60 bit timestamp for the payload is
1301 * *(uint64_t *)m0->m_pktdat. Note that it is
1302 * in the leading free-space in the mbuf. The
1303 * kernel can clobber it during a pullup,
1304 * m_copymdata, etc. You need to make sure that
1305 * the mbuf reaches you unmolested if you care
1306 * about the timestamp.
1308 *(uint64_t *)m0->m_pktdat =
1309 be64toh(ctrl->u.last_flit) &
1315 case X_RSPD_TYPE_CPL:
1316 KASSERT(rss->opcode < NUM_CPL_CMDS,
1317 ("%s: bad opcode %02x.", __func__,
1319 sc->cpl_handler[rss->opcode](iq, rss, m0);
1322 case X_RSPD_TYPE_INTR:
1325 * Interrupts should be forwarded only to queues
1326 * that are not forwarding their interrupts.
1327 * This means service_iq can recurse but only 1
1330 KASSERT(budget == 0,
1331 ("%s: budget %u, rsp_type %u", __func__,
1335 * There are 1K interrupt-capable queues (qids 0
1336 * through 1023). A response type indicating a
1337 * forwarded interrupt with a qid >= 1K is an
1338 * iWARP async notification.
1341 sc->an_handler(iq, ctrl);
1345 q = sc->sge.iqmap[lq - sc->sge.iq_start];
1346 if (atomic_cmpset_int(&q->state, IQS_IDLE,
1348 if (service_iq(q, q->qsize / 8) == 0) {
1349 atomic_cmpset_int(&q->state,
1350 IQS_BUSY, IQS_IDLE);
1352 STAILQ_INSERT_TAIL(&iql, q,
1360 ("%s: illegal response type %d on iq %p",
1361 __func__, rsp_type, iq));
1363 "%s: illegal response type %d on iq %p",
1364 device_get_nameunit(sc->dev), rsp_type, iq);
1368 if (fl_bufs_used >= 16) {
1370 fl->needed += fl_bufs_used;
1371 refill_fl(sc, fl, 32);
1377 if (++ndescs == limit) {
1378 t4_write_reg(sc, MYPF_REG(A_SGE_PF_GTS),
1380 V_INGRESSQID(iq->cntxt_id) |
1381 V_SEINTARM(V_QINTR_TIMER_IDX(X_TIMERREG_UPDATE_CIDX)));
1384 #if defined(INET) || defined(INET6)
1385 if (iq->flags & IQ_LRO_ENABLED &&
1386 sc->lro_timeout != 0) {
1387 tcp_lro_flush_inactive(&rxq->lro,
1395 fl->needed += fl_bufs_used;
1396 refill_fl(sc, fl, 32);
1399 return (EINPROGRESS);
1405 if (STAILQ_EMPTY(&iql))
1409 * Process the head only, and send it to the back of the list if
1410 * it's still not done.
1412 q = STAILQ_FIRST(&iql);
1413 STAILQ_REMOVE_HEAD(&iql, link);
1414 if (service_iq(q, q->qsize / 8) == 0)
1415 atomic_cmpset_int(&q->state, IQS_BUSY, IQS_IDLE);
1417 STAILQ_INSERT_TAIL(&iql, q, link);
1420 #if defined(INET) || defined(INET6)
1421 if (iq->flags & IQ_LRO_ENABLED) {
1422 struct lro_ctrl *lro = &rxq->lro;
1423 struct lro_entry *l;
1425 while (!SLIST_EMPTY(&lro->lro_active)) {
1426 l = SLIST_FIRST(&lro->lro_active);
1427 SLIST_REMOVE_HEAD(&lro->lro_active, next);
1428 tcp_lro_flush(lro, l);
1433 t4_write_reg(sc, MYPF_REG(A_SGE_PF_GTS), V_CIDXINC(ndescs) |
1434 V_INGRESSQID((u32)iq->cntxt_id) | V_SEINTARM(iq->intr_params));
1436 if (iq->flags & IQ_HAS_FL) {
1440 fl->needed += fl_bufs_used;
1441 starved = refill_fl(sc, fl, 64);
1443 if (__predict_false(starved != 0))
1444 add_fl_to_sfl(sc, fl);
1451 cl_has_metadata(struct sge_fl *fl, struct cluster_layout *cll)
1453 int rc = fl->flags & FL_BUF_PACKING || cll->region1 > 0;
1456 MPASS(cll->region3 >= CL_METADATA_SIZE);
1461 static inline struct cluster_metadata *
1462 cl_metadata(struct adapter *sc, struct sge_fl *fl, struct cluster_layout *cll,
1466 if (cl_has_metadata(fl, cll)) {
1467 struct sw_zone_info *swz = &sc->sge.sw_zone_info[cll->zidx];
1469 return ((struct cluster_metadata *)(cl + swz->size) - 1);
1475 rxb_free(struct mbuf *m, void *arg1, void *arg2)
1477 uma_zone_t zone = arg1;
1480 uma_zfree(zone, cl);
1481 counter_u64_add(extfree_rels, 1);
1483 return (EXT_FREE_OK);
1487 * The mbuf returned by this function could be allocated from zone_mbuf or
1488 * constructed in spare room in the cluster.
1490 * The mbuf carries the payload in one of these ways
1491 * a) frame inside the mbuf (mbuf from zone_mbuf)
1492 * b) m_cljset (for clusters without metadata) zone_mbuf
1493 * c) m_extaddref (cluster with metadata) inline mbuf
1494 * d) m_extaddref (cluster with metadata) zone_mbuf
1496 static struct mbuf *
1497 get_scatter_segment(struct adapter *sc, struct sge_fl *fl, int total, int flags)
1500 struct fl_sdesc *sd = &fl->sdesc[fl->cidx];
1501 struct cluster_layout *cll = &sd->cll;
1502 struct sw_zone_info *swz = &sc->sge.sw_zone_info[cll->zidx];
1503 struct hw_buf_info *hwb = &sc->sge.hw_buf_info[cll->hwidx];
1504 struct cluster_metadata *clm = cl_metadata(sc, fl, cll, sd->cl);
1505 int len, padded_len;
1508 len = min(total, hwb->size - fl->rx_offset);
1509 padded_len = roundup2(len, fl_pad);
1510 payload = sd->cl + cll->region1 + fl->rx_offset;
1512 if (sc->sc_do_rxcopy && len < RX_COPY_THRESHOLD) {
1515 * Copy payload into a freshly allocated mbuf.
1518 m = flags & M_PKTHDR ?
1519 m_gethdr(M_NOWAIT, MT_DATA) : m_get(M_NOWAIT, MT_DATA);
1522 fl->mbuf_allocated++;
1523 #ifdef T4_PKT_TIMESTAMP
1524 /* Leave room for a timestamp */
1527 /* copy data to mbuf */
1528 bcopy(payload, mtod(m, caddr_t), len);
1530 } else if (sd->nmbuf * MSIZE < cll->region1) {
1533 * There's spare room in the cluster for an mbuf. Create one
1534 * and associate it with the payload that's in the cluster.
1538 m = (struct mbuf *)(sd->cl + sd->nmbuf * MSIZE);
1539 /* No bzero required */
1540 if (m_init(m, NULL, 0, M_NOWAIT, MT_DATA, flags | M_NOFREE))
1543 m_extaddref(m, payload, padded_len, &clm->refcount, rxb_free,
1545 if (sd->nmbuf++ == 0)
1546 counter_u64_add(extfree_refs, 1);
1551 * Grab an mbuf from zone_mbuf and associate it with the
1552 * payload in the cluster.
1555 m = flags & M_PKTHDR ?
1556 m_gethdr(M_NOWAIT, MT_DATA) : m_get(M_NOWAIT, MT_DATA);
1559 fl->mbuf_allocated++;
1561 m_extaddref(m, payload, padded_len, &clm->refcount,
1562 rxb_free, swz->zone, sd->cl);
1563 if (sd->nmbuf++ == 0)
1564 counter_u64_add(extfree_refs, 1);
1566 m_cljset(m, sd->cl, swz->type);
1567 sd->cl = NULL; /* consumed, not a recycle candidate */
1570 if (flags & M_PKTHDR)
1571 m->m_pkthdr.len = total;
1574 if (fl->flags & FL_BUF_PACKING) {
1575 fl->rx_offset += roundup2(padded_len, sc->sge.pack_boundary);
1576 MPASS(fl->rx_offset <= hwb->size);
1577 if (fl->rx_offset < hwb->size)
1578 return (m); /* without advancing the cidx */
1581 if (__predict_false(++fl->cidx == fl->cap))
1588 static struct mbuf *
1589 get_fl_payload(struct adapter *sc, struct sge_fl *fl, uint32_t len_newbuf,
1592 struct mbuf *m0, *m, **pnext;
1596 * No assertion for the fl lock because we don't need it. This routine
1597 * is called only from the rx interrupt handler and it only updates
1598 * fl->cidx. (Contrast that with fl->pidx/fl->needed which could be
1599 * updated in the rx interrupt handler or the starvation helper routine.
1600 * That's why code that manipulates fl->pidx/fl->needed needs the fl
1601 * lock but this routine does not).
1605 len = G_RSPD_LEN(len_newbuf);
1606 if (__predict_false(fl->m0 != NULL)) {
1607 M_ASSERTPKTHDR(fl->m0);
1608 MPASS(len == fl->m0->m_pkthdr.len);
1609 MPASS(fl->remaining < len);
1613 len = fl->remaining;
1618 if (fl->rx_offset > 0 && len_newbuf & F_RSPD_NEWBUF) {
1621 if (__predict_false(++fl->cidx == fl->cap))
1626 * Payload starts at rx_offset in the current hw buffer. Its length is
1627 * 'len' and it may span multiple hw buffers.
1630 m0 = get_scatter_segment(sc, fl, len, M_PKTHDR);
1634 pnext = &m0->m_next;
1638 MPASS(fl->rx_offset == 0);
1639 m = get_scatter_segment(sc, fl, len, 0);
1643 fl->remaining = len;
1652 if (fl->rx_offset == 0)
1655 (*fl_bufs_used) += nbuf;
1660 t4_eth_rx(struct sge_iq *iq, const struct rss_header *rss, struct mbuf *m0)
1662 struct sge_rxq *rxq = iq_to_rxq(iq);
1663 struct ifnet *ifp = rxq->ifp;
1664 const struct cpl_rx_pkt *cpl = (const void *)(rss + 1);
1665 #if defined(INET) || defined(INET6)
1666 struct lro_ctrl *lro = &rxq->lro;
1669 KASSERT(m0 != NULL, ("%s: no payload with opcode %02x", __func__,
1672 m0->m_pkthdr.len -= fl_pktshift;
1673 m0->m_len -= fl_pktshift;
1674 m0->m_data += fl_pktshift;
1676 m0->m_pkthdr.rcvif = ifp;
1677 m0->m_flags |= M_FLOWID;
1678 m0->m_pkthdr.flowid = be32toh(rss->hash_val);
1680 if (cpl->csum_calc && !cpl->err_vec) {
1681 if (ifp->if_capenable & IFCAP_RXCSUM &&
1682 cpl->l2info & htobe32(F_RXF_IP)) {
1683 m0->m_pkthdr.csum_flags = (CSUM_IP_CHECKED |
1684 CSUM_IP_VALID | CSUM_DATA_VALID | CSUM_PSEUDO_HDR);
1686 } else if (ifp->if_capenable & IFCAP_RXCSUM_IPV6 &&
1687 cpl->l2info & htobe32(F_RXF_IP6)) {
1688 m0->m_pkthdr.csum_flags = (CSUM_DATA_VALID_IPV6 |
1693 if (__predict_false(cpl->ip_frag))
1694 m0->m_pkthdr.csum_data = be16toh(cpl->csum);
1696 m0->m_pkthdr.csum_data = 0xffff;
1700 m0->m_pkthdr.ether_vtag = be16toh(cpl->vlan);
1701 m0->m_flags |= M_VLANTAG;
1702 rxq->vlan_extraction++;
1705 #if defined(INET) || defined(INET6)
1706 if (cpl->l2info & htobe32(F_RXF_LRO) &&
1707 iq->flags & IQ_LRO_ENABLED &&
1708 tcp_lro_rx(lro, m0, 0) == 0) {
1709 /* queued for LRO */
1712 ifp->if_input(ifp, m0);
1718 * Doesn't fail. Holds on to work requests it can't send right away.
1721 t4_wrq_tx_locked(struct adapter *sc, struct sge_wrq *wrq, struct wrqe *wr)
1723 struct sge_eq *eq = &wrq->eq;
1727 TXQ_LOCK_ASSERT_OWNED(wrq);
1729 KASSERT((eq->flags & EQ_TYPEMASK) == EQ_OFLD ||
1730 (eq->flags & EQ_TYPEMASK) == EQ_CTRL,
1731 ("%s: eq type %d", __func__, eq->flags & EQ_TYPEMASK));
1733 KASSERT((eq->flags & EQ_TYPEMASK) == EQ_CTRL,
1734 ("%s: eq type %d", __func__, eq->flags & EQ_TYPEMASK));
1737 if (__predict_true(wr != NULL))
1738 STAILQ_INSERT_TAIL(&wrq->wr_list, wr, link);
1740 can_reclaim = reclaimable(eq);
1741 if (__predict_false(eq->flags & EQ_STALLED)) {
1742 if (eq->avail + can_reclaim < tx_resume_threshold(eq))
1744 eq->flags &= ~EQ_STALLED;
1747 eq->cidx += can_reclaim;
1748 eq->avail += can_reclaim;
1749 if (__predict_false(eq->cidx >= eq->cap))
1750 eq->cidx -= eq->cap;
1752 while ((wr = STAILQ_FIRST(&wrq->wr_list)) != NULL) {
1755 if (__predict_false(wr->wr_len < 0 ||
1756 wr->wr_len > SGE_MAX_WR_LEN || (wr->wr_len & 0x7))) {
1759 panic("%s: work request with length %d", __func__,
1765 log(LOG_ERR, "%s: %s work request with length %d",
1766 device_get_nameunit(sc->dev), __func__, wr->wr_len);
1767 STAILQ_REMOVE_HEAD(&wrq->wr_list, link);
1772 ndesc = howmany(wr->wr_len, EQ_ESIZE);
1773 if (eq->avail < ndesc) {
1778 dst = (void *)&eq->desc[eq->pidx];
1779 copy_to_txd(eq, wrtod(wr), &dst, wr->wr_len);
1783 if (__predict_false(eq->pidx >= eq->cap))
1784 eq->pidx -= eq->cap;
1786 eq->pending += ndesc;
1787 if (eq->pending >= 8)
1791 STAILQ_REMOVE_HEAD(&wrq->wr_list, link);
1794 if (eq->avail < 8) {
1795 can_reclaim = reclaimable(eq);
1796 eq->cidx += can_reclaim;
1797 eq->avail += can_reclaim;
1798 if (__predict_false(eq->cidx >= eq->cap))
1799 eq->cidx -= eq->cap;
1807 eq->flags |= EQ_STALLED;
1808 if (callout_pending(&eq->tx_callout) == 0)
1809 callout_reset(&eq->tx_callout, 1, t4_tx_callout, eq);
1813 /* Per-packet header in a coalesced tx WR, before the SGL starts (in flits) */
1814 #define TXPKTS_PKT_HDR ((\
1815 sizeof(struct ulp_txpkt) + \
1816 sizeof(struct ulptx_idata) + \
1817 sizeof(struct cpl_tx_pkt_core) \
1820 /* Header of a coalesced tx WR, before SGL of first packet (in flits) */
1821 #define TXPKTS_WR_HDR (\
1822 sizeof(struct fw_eth_tx_pkts_wr) / 8 + \
1825 /* Header of a tx WR, before SGL of first packet (in flits) */
1826 #define TXPKT_WR_HDR ((\
1827 sizeof(struct fw_eth_tx_pkt_wr) + \
1828 sizeof(struct cpl_tx_pkt_core) \
1831 /* Header of a tx LSO WR, before SGL of first packet (in flits) */
1832 #define TXPKT_LSO_WR_HDR ((\
1833 sizeof(struct fw_eth_tx_pkt_wr) + \
1834 sizeof(struct cpl_tx_pkt_lso_core) + \
1835 sizeof(struct cpl_tx_pkt_core) \
1839 t4_eth_tx(struct ifnet *ifp, struct sge_txq *txq, struct mbuf *m)
1841 struct port_info *pi = (void *)ifp->if_softc;
1842 struct adapter *sc = pi->adapter;
1843 struct sge_eq *eq = &txq->eq;
1844 struct buf_ring *br = txq->br;
1846 int rc, coalescing, can_reclaim;
1847 struct txpkts txpkts;
1850 TXQ_LOCK_ASSERT_OWNED(txq);
1851 KASSERT(m, ("%s: called with nothing to do.", __func__));
1852 KASSERT((eq->flags & EQ_TYPEMASK) == EQ_ETH,
1853 ("%s: eq type %d", __func__, eq->flags & EQ_TYPEMASK));
1855 prefetch(&eq->desc[eq->pidx]);
1856 prefetch(&txq->sdesc[eq->pidx]);
1858 txpkts.npkt = 0;/* indicates there's nothing in txpkts */
1861 can_reclaim = reclaimable(eq);
1862 if (__predict_false(eq->flags & EQ_STALLED)) {
1863 if (eq->avail + can_reclaim < tx_resume_threshold(eq)) {
1867 eq->flags &= ~EQ_STALLED;
1871 if (__predict_false(eq->flags & EQ_DOOMED)) {
1873 while ((m = buf_ring_dequeue_sc(txq->br)) != NULL)
1878 if (eq->avail < 8 && can_reclaim)
1879 reclaim_tx_descs(txq, can_reclaim, 32);
1881 for (; m; m = next ? next : drbr_dequeue(ifp, br)) {
1886 next = m->m_nextpkt;
1887 m->m_nextpkt = NULL;
1889 if (next || buf_ring_peek(br))
1892 rc = get_pkt_sgl(txq, &m, &sgl, coalescing);
1896 /* Short of resources, suspend tx */
1898 m->m_nextpkt = next;
1903 * Unrecoverable error for this packet, throw it away
1904 * and move on to the next. get_pkt_sgl may already
1905 * have freed m (it will be NULL in that case and the
1906 * m_freem here is still safe).
1914 add_to_txpkts(pi, txq, &txpkts, m, &sgl) == 0) {
1916 /* Successfully absorbed into txpkts */
1918 write_ulp_cpl_sgl(pi, txq, &txpkts, m, &sgl);
1923 * We weren't coalescing to begin with, or current frame could
1924 * not be coalesced (add_to_txpkts flushes txpkts if a frame
1925 * given to it can't be coalesced). Either way there should be
1926 * nothing in txpkts.
1928 KASSERT(txpkts.npkt == 0,
1929 ("%s: txpkts not empty: %d", __func__, txpkts.npkt));
1931 /* We're sending out individual packets now */
1935 reclaim_tx_descs(txq, 0, 8);
1936 rc = write_txpkt_wr(pi, txq, m, &sgl);
1939 /* Short of hardware descriptors, suspend tx */
1942 * This is an unlikely but expensive failure. We've
1943 * done all the hard work (DMA mappings etc.) and now we
1944 * can't send out the packet. What's worse, we have to
1945 * spend even more time freeing up everything in sgl.
1948 free_pkt_sgl(txq, &sgl);
1950 m->m_nextpkt = next;
1954 ETHER_BPF_MTAP(ifp, m);
1958 if (eq->pending >= 8)
1961 can_reclaim = reclaimable(eq);
1962 if (can_reclaim >= 32)
1963 reclaim_tx_descs(txq, can_reclaim, 64);
1966 if (txpkts.npkt > 0)
1967 write_txpkts_wr(txq, &txpkts);
1970 * m not NULL means there was an error but we haven't thrown it away.
1971 * This can happen when we're short of tx descriptors (no_desc) or maybe
1972 * even DMA maps (no_dmamap). Either way, a credit flush and reclaim
1973 * will get things going again.
1975 if (m && !(eq->flags & EQ_CRFLUSHED)) {
1976 struct tx_sdesc *txsd = &txq->sdesc[eq->pidx];
1979 * If EQ_CRFLUSHED is not set then we know we have at least one
1980 * available descriptor because any WR that reduces eq->avail to
1981 * 0 also sets EQ_CRFLUSHED.
1983 KASSERT(eq->avail > 0, ("%s: no space for eqflush.", __func__));
1985 txsd->desc_used = 1;
1987 write_eqflush_wr(eq);
1994 reclaim_tx_descs(txq, 0, 128);
1996 if (eq->flags & EQ_STALLED && callout_pending(&eq->tx_callout) == 0)
1997 callout_reset(&eq->tx_callout, 1, t4_tx_callout, eq);
2003 t4_update_fl_bufsize(struct ifnet *ifp)
2005 struct port_info *pi = ifp->if_softc;
2006 struct adapter *sc = pi->adapter;
2007 struct sge_rxq *rxq;
2009 struct sge_ofld_rxq *ofld_rxq;
2012 int i, maxp, mtu = ifp->if_mtu;
2014 maxp = mtu_to_max_payload(sc, mtu, 0);
2015 for_each_rxq(pi, i, rxq) {
2019 find_best_refill_source(sc, fl, maxp);
2023 maxp = mtu_to_max_payload(sc, mtu, 1);
2024 for_each_ofld_rxq(pi, i, ofld_rxq) {
2028 find_best_refill_source(sc, fl, maxp);
2035 can_resume_tx(struct sge_eq *eq)
2038 return (eq->avail + reclaimable(eq) >= tx_resume_threshold(eq));
2042 init_iq(struct sge_iq *iq, struct adapter *sc, int tmr_idx, int pktc_idx,
2043 int qsize, int esize)
2045 KASSERT(tmr_idx >= 0 && tmr_idx < SGE_NTIMERS,
2046 ("%s: bad tmr_idx %d", __func__, tmr_idx));
2047 KASSERT(pktc_idx < SGE_NCOUNTERS, /* -ve is ok, means don't use */
2048 ("%s: bad pktc_idx %d", __func__, pktc_idx));
2052 iq->intr_params = V_QINTR_TIMER_IDX(tmr_idx);
2053 iq->intr_pktc_idx = SGE_NCOUNTERS - 1;
2054 if (pktc_idx >= 0) {
2055 iq->intr_params |= F_QINTR_CNT_EN;
2056 iq->intr_pktc_idx = pktc_idx;
2058 iq->qsize = roundup2(qsize, 16); /* See FW_IQ_CMD/iqsize */
2059 iq->esize = max(esize, 16); /* See FW_IQ_CMD/iqesize */
2063 init_fl(struct adapter *sc, struct sge_fl *fl, int qsize, int maxp, int pack,
2068 strlcpy(fl->lockname, name, sizeof(fl->lockname));
2070 fl->flags |= FL_BUF_PACKING;
2071 find_best_refill_source(sc, fl, maxp);
2072 find_safe_refill_source(sc, fl);
2076 init_eq(struct sge_eq *eq, int eqtype, int qsize, uint8_t tx_chan,
2077 uint16_t iqid, char *name)
2079 KASSERT(tx_chan < NCHAN, ("%s: bad tx channel %d", __func__, tx_chan));
2080 KASSERT(eqtype <= EQ_TYPEMASK, ("%s: bad qtype %d", __func__, eqtype));
2082 eq->flags = eqtype & EQ_TYPEMASK;
2083 eq->tx_chan = tx_chan;
2086 strlcpy(eq->lockname, name, sizeof(eq->lockname));
2088 TASK_INIT(&eq->tx_task, 0, t4_tx_task, eq);
2089 callout_init(&eq->tx_callout, CALLOUT_MPSAFE);
2093 alloc_ring(struct adapter *sc, size_t len, bus_dma_tag_t *tag,
2094 bus_dmamap_t *map, bus_addr_t *pa, void **va)
2098 rc = bus_dma_tag_create(sc->dmat, 512, 0, BUS_SPACE_MAXADDR,
2099 BUS_SPACE_MAXADDR, NULL, NULL, len, 1, len, 0, NULL, NULL, tag);
2101 device_printf(sc->dev, "cannot allocate DMA tag: %d\n", rc);
2105 rc = bus_dmamem_alloc(*tag, va,
2106 BUS_DMA_WAITOK | BUS_DMA_COHERENT | BUS_DMA_ZERO, map);
2108 device_printf(sc->dev, "cannot allocate DMA memory: %d\n", rc);
2112 rc = bus_dmamap_load(*tag, *map, *va, len, oneseg_dma_callback, pa, 0);
2114 device_printf(sc->dev, "cannot load DMA map: %d\n", rc);
2119 free_ring(sc, *tag, *map, *pa, *va);
2125 free_ring(struct adapter *sc, bus_dma_tag_t tag, bus_dmamap_t map,
2126 bus_addr_t pa, void *va)
2129 bus_dmamap_unload(tag, map);
2131 bus_dmamem_free(tag, va, map);
2133 bus_dma_tag_destroy(tag);
2139 * Allocates the ring for an ingress queue and an optional freelist. If the
2140 * freelist is specified it will be allocated and then associated with the
2143 * Returns errno on failure. Resources allocated up to that point may still be
2144 * allocated. Caller is responsible for cleanup in case this function fails.
2146 * If the ingress queue will take interrupts directly (iq->flags & IQ_INTR) then
2147 * the intr_idx specifies the vector, starting from 0. Otherwise it specifies
2148 * the abs_id of the ingress queue to which its interrupts should be forwarded.
2151 alloc_iq_fl(struct port_info *pi, struct sge_iq *iq, struct sge_fl *fl,
2152 int intr_idx, int cong)
2154 int rc, i, cntxt_id;
2157 struct adapter *sc = iq->adapter;
2160 len = iq->qsize * iq->esize;
2161 rc = alloc_ring(sc, len, &iq->desc_tag, &iq->desc_map, &iq->ba,
2162 (void **)&iq->desc);
2166 bzero(&c, sizeof(c));
2167 c.op_to_vfn = htobe32(V_FW_CMD_OP(FW_IQ_CMD) | F_FW_CMD_REQUEST |
2168 F_FW_CMD_WRITE | F_FW_CMD_EXEC | V_FW_IQ_CMD_PFN(sc->pf) |
2169 V_FW_IQ_CMD_VFN(0));
2171 c.alloc_to_len16 = htobe32(F_FW_IQ_CMD_ALLOC | F_FW_IQ_CMD_IQSTART |
2174 /* Special handling for firmware event queue */
2175 if (iq == &sc->sge.fwq)
2176 v |= F_FW_IQ_CMD_IQASYNCH;
2178 if (iq->flags & IQ_INTR) {
2179 KASSERT(intr_idx < sc->intr_count,
2180 ("%s: invalid direct intr_idx %d", __func__, intr_idx));
2182 v |= F_FW_IQ_CMD_IQANDST;
2183 v |= V_FW_IQ_CMD_IQANDSTINDEX(intr_idx);
2185 c.type_to_iqandstindex = htobe32(v |
2186 V_FW_IQ_CMD_TYPE(FW_IQ_TYPE_FL_INT_CAP) |
2187 V_FW_IQ_CMD_VIID(pi->viid) |
2188 V_FW_IQ_CMD_IQANUD(X_UPDATEDELIVERY_INTERRUPT));
2189 c.iqdroprss_to_iqesize = htobe16(V_FW_IQ_CMD_IQPCIECH(pi->tx_chan) |
2190 F_FW_IQ_CMD_IQGTSMODE |
2191 V_FW_IQ_CMD_IQINTCNTTHRESH(iq->intr_pktc_idx) |
2192 V_FW_IQ_CMD_IQESIZE(ilog2(iq->esize) - 4));
2193 c.iqsize = htobe16(iq->qsize);
2194 c.iqaddr = htobe64(iq->ba);
2196 c.iqns_to_fl0congen = htobe32(F_FW_IQ_CMD_IQFLINTCONGEN);
2199 mtx_init(&fl->fl_lock, fl->lockname, NULL, MTX_DEF);
2201 len = fl->qsize * RX_FL_ESIZE;
2202 rc = alloc_ring(sc, len, &fl->desc_tag, &fl->desc_map,
2203 &fl->ba, (void **)&fl->desc);
2207 /* Allocate space for one software descriptor per buffer. */
2208 fl->cap = (fl->qsize - spg_len / RX_FL_ESIZE) * 8;
2209 rc = alloc_fl_sdesc(fl);
2211 device_printf(sc->dev,
2212 "failed to setup fl software descriptors: %d\n",
2216 fl->needed = fl->cap;
2217 fl->lowat = fl->flags & FL_BUF_PACKING ?
2218 roundup2(sc->sge.fl_starve_threshold2, 8) :
2219 roundup2(sc->sge.fl_starve_threshold, 8);
2221 c.iqns_to_fl0congen |=
2222 htobe32(V_FW_IQ_CMD_FL0HOSTFCMODE(X_HOSTFCMODE_NONE) |
2223 F_FW_IQ_CMD_FL0FETCHRO | F_FW_IQ_CMD_FL0DATARO |
2224 (fl_pad ? F_FW_IQ_CMD_FL0PADEN : 0) |
2225 (fl->flags & FL_BUF_PACKING ? F_FW_IQ_CMD_FL0PACKEN :
2228 c.iqns_to_fl0congen |=
2229 htobe32(V_FW_IQ_CMD_FL0CNGCHMAP(cong) |
2230 F_FW_IQ_CMD_FL0CONGCIF |
2231 F_FW_IQ_CMD_FL0CONGEN);
2233 c.fl0dcaen_to_fl0cidxfthresh =
2234 htobe16(V_FW_IQ_CMD_FL0FBMIN(X_FETCHBURSTMIN_64B) |
2235 V_FW_IQ_CMD_FL0FBMAX(X_FETCHBURSTMAX_512B));
2236 c.fl0size = htobe16(fl->qsize);
2237 c.fl0addr = htobe64(fl->ba);
2240 rc = -t4_wr_mbox(sc, sc->mbox, &c, sizeof(c), &c);
2242 device_printf(sc->dev,
2243 "failed to create ingress queue: %d\n", rc);
2247 iq->cdesc = iq->desc;
2250 iq->intr_next = iq->intr_params;
2251 iq->cntxt_id = be16toh(c.iqid);
2252 iq->abs_id = be16toh(c.physiqid);
2253 iq->flags |= IQ_ALLOCATED;
2255 cntxt_id = iq->cntxt_id - sc->sge.iq_start;
2256 if (cntxt_id >= sc->sge.niq) {
2257 panic ("%s: iq->cntxt_id (%d) more than the max (%d)", __func__,
2258 cntxt_id, sc->sge.niq - 1);
2260 sc->sge.iqmap[cntxt_id] = iq;
2263 fl->cntxt_id = be16toh(c.fl0id);
2264 fl->pidx = fl->cidx = 0;
2266 cntxt_id = fl->cntxt_id - sc->sge.eq_start;
2267 if (cntxt_id >= sc->sge.neq) {
2268 panic("%s: fl->cntxt_id (%d) more than the max (%d)",
2269 __func__, cntxt_id, sc->sge.neq - 1);
2271 sc->sge.eqmap[cntxt_id] = (void *)fl;
2274 /* Enough to make sure the SGE doesn't think it's starved */
2275 refill_fl(sc, fl, fl->lowat);
2278 iq->flags |= IQ_HAS_FL;
2281 if (is_t5(sc) && cong >= 0) {
2282 uint32_t param, val;
2284 param = V_FW_PARAMS_MNEM(FW_PARAMS_MNEM_DMAQ) |
2285 V_FW_PARAMS_PARAM_X(FW_PARAMS_PARAM_DMAQ_CONM_CTXT) |
2286 V_FW_PARAMS_PARAM_YZ(iq->cntxt_id);
2291 for (i = 0; i < 4; i++) {
2292 if (cong & (1 << i))
2293 val |= 1 << (i << 2);
2297 rc = -t4_set_params(sc, sc->mbox, sc->pf, 0, 1, ¶m, &val);
2299 /* report error but carry on */
2300 device_printf(sc->dev,
2301 "failed to set congestion manager context for "
2302 "ingress queue %d: %d\n", iq->cntxt_id, rc);
2306 /* Enable IQ interrupts */
2307 atomic_store_rel_int(&iq->state, IQS_IDLE);
2308 t4_write_reg(sc, MYPF_REG(A_SGE_PF_GTS), V_SEINTARM(iq->intr_params) |
2309 V_INGRESSQID(iq->cntxt_id));
2315 free_iq_fl(struct port_info *pi, struct sge_iq *iq, struct sge_fl *fl)
2318 struct adapter *sc = iq->adapter;
2322 return (0); /* nothing to do */
2324 dev = pi ? pi->dev : sc->dev;
2326 if (iq->flags & IQ_ALLOCATED) {
2327 rc = -t4_iq_free(sc, sc->mbox, sc->pf, 0,
2328 FW_IQ_TYPE_FL_INT_CAP, iq->cntxt_id,
2329 fl ? fl->cntxt_id : 0xffff, 0xffff);
2332 "failed to free queue %p: %d\n", iq, rc);
2335 iq->flags &= ~IQ_ALLOCATED;
2338 free_ring(sc, iq->desc_tag, iq->desc_map, iq->ba, iq->desc);
2340 bzero(iq, sizeof(*iq));
2343 free_ring(sc, fl->desc_tag, fl->desc_map, fl->ba,
2347 free_fl_sdesc(sc, fl);
2349 if (mtx_initialized(&fl->fl_lock))
2350 mtx_destroy(&fl->fl_lock);
2352 bzero(fl, sizeof(*fl));
2359 add_fl_sysctls(struct sysctl_ctx_list *ctx, struct sysctl_oid *oid,
2362 struct sysctl_oid_list *children = SYSCTL_CHILDREN(oid);
2364 oid = SYSCTL_ADD_NODE(ctx, children, OID_AUTO, "fl", CTLFLAG_RD, NULL,
2366 children = SYSCTL_CHILDREN(oid);
2368 SYSCTL_ADD_PROC(ctx, children, OID_AUTO, "cntxt_id",
2369 CTLTYPE_INT | CTLFLAG_RD, &fl->cntxt_id, 0, sysctl_uint16, "I",
2370 "SGE context id of the freelist");
2371 SYSCTL_ADD_UINT(ctx, children, OID_AUTO, "cidx", CTLFLAG_RD, &fl->cidx,
2372 0, "consumer index");
2373 if (fl->flags & FL_BUF_PACKING) {
2374 SYSCTL_ADD_UINT(ctx, children, OID_AUTO, "rx_offset",
2375 CTLFLAG_RD, &fl->rx_offset, 0, "packing rx offset");
2377 SYSCTL_ADD_UINT(ctx, children, OID_AUTO, "pidx", CTLFLAG_RD, &fl->pidx,
2378 0, "producer index");
2379 SYSCTL_ADD_UQUAD(ctx, children, OID_AUTO, "mbuf_allocated",
2380 CTLFLAG_RD, &fl->mbuf_allocated, "# of mbuf allocated");
2381 SYSCTL_ADD_UQUAD(ctx, children, OID_AUTO, "mbuf_inlined",
2382 CTLFLAG_RD, &fl->mbuf_inlined, "# of mbuf inlined in clusters");
2383 SYSCTL_ADD_UQUAD(ctx, children, OID_AUTO, "cluster_allocated",
2384 CTLFLAG_RD, &fl->cl_allocated, "# of clusters allocated");
2385 SYSCTL_ADD_UQUAD(ctx, children, OID_AUTO, "cluster_recycled",
2386 CTLFLAG_RD, &fl->cl_recycled, "# of clusters recycled");
2387 SYSCTL_ADD_UQUAD(ctx, children, OID_AUTO, "cluster_fast_recycled",
2388 CTLFLAG_RD, &fl->cl_fast_recycled, "# of clusters recycled (fast)");
2392 alloc_fwq(struct adapter *sc)
2395 struct sge_iq *fwq = &sc->sge.fwq;
2396 struct sysctl_oid *oid = device_get_sysctl_tree(sc->dev);
2397 struct sysctl_oid_list *children = SYSCTL_CHILDREN(oid);
2399 init_iq(fwq, sc, 0, 0, FW_IQ_QSIZE, FW_IQ_ESIZE);
2400 fwq->flags |= IQ_INTR; /* always */
2401 intr_idx = sc->intr_count > 1 ? 1 : 0;
2402 rc = alloc_iq_fl(sc->port[0], fwq, NULL, intr_idx, -1);
2404 device_printf(sc->dev,
2405 "failed to create firmware event queue: %d\n", rc);
2409 oid = SYSCTL_ADD_NODE(&sc->ctx, children, OID_AUTO, "fwq", CTLFLAG_RD,
2410 NULL, "firmware event queue");
2411 children = SYSCTL_CHILDREN(oid);
2413 SYSCTL_ADD_PROC(&sc->ctx, children, OID_AUTO, "abs_id",
2414 CTLTYPE_INT | CTLFLAG_RD, &fwq->abs_id, 0, sysctl_uint16, "I",
2415 "absolute id of the queue");
2416 SYSCTL_ADD_PROC(&sc->ctx, children, OID_AUTO, "cntxt_id",
2417 CTLTYPE_INT | CTLFLAG_RD, &fwq->cntxt_id, 0, sysctl_uint16, "I",
2418 "SGE context id of the queue");
2419 SYSCTL_ADD_PROC(&sc->ctx, children, OID_AUTO, "cidx",
2420 CTLTYPE_INT | CTLFLAG_RD, &fwq->cidx, 0, sysctl_uint16, "I",
2427 free_fwq(struct adapter *sc)
2429 return free_iq_fl(NULL, &sc->sge.fwq, NULL);
2433 alloc_mgmtq(struct adapter *sc)
2436 struct sge_wrq *mgmtq = &sc->sge.mgmtq;
2438 struct sysctl_oid *oid = device_get_sysctl_tree(sc->dev);
2439 struct sysctl_oid_list *children = SYSCTL_CHILDREN(oid);
2441 oid = SYSCTL_ADD_NODE(&sc->ctx, children, OID_AUTO, "mgmtq", CTLFLAG_RD,
2442 NULL, "management queue");
2444 snprintf(name, sizeof(name), "%s mgmtq", device_get_nameunit(sc->dev));
2445 init_eq(&mgmtq->eq, EQ_CTRL, CTRL_EQ_QSIZE, sc->port[0]->tx_chan,
2446 sc->sge.fwq.cntxt_id, name);
2447 rc = alloc_wrq(sc, NULL, mgmtq, oid);
2449 device_printf(sc->dev,
2450 "failed to create management queue: %d\n", rc);
2458 free_mgmtq(struct adapter *sc)
2461 return free_wrq(sc, &sc->sge.mgmtq);
2465 tnl_cong(struct port_info *pi)
2468 if (cong_drop == -1)
2470 else if (cong_drop == 1)
2473 return (pi->rx_chan_map);
2477 alloc_rxq(struct port_info *pi, struct sge_rxq *rxq, int intr_idx, int idx,
2478 struct sysctl_oid *oid)
2481 struct sysctl_oid_list *children;
2484 rc = alloc_iq_fl(pi, &rxq->iq, &rxq->fl, intr_idx, tnl_cong(pi));
2489 refill_fl(pi->adapter, &rxq->fl, rxq->fl.needed / 8);
2490 FL_UNLOCK(&rxq->fl);
2492 #if defined(INET) || defined(INET6)
2493 rc = tcp_lro_init(&rxq->lro);
2496 rxq->lro.ifp = pi->ifp; /* also indicates LRO init'ed */
2498 if (pi->ifp->if_capenable & IFCAP_LRO)
2499 rxq->iq.flags |= IQ_LRO_ENABLED;
2503 children = SYSCTL_CHILDREN(oid);
2505 snprintf(name, sizeof(name), "%d", idx);
2506 oid = SYSCTL_ADD_NODE(&pi->ctx, children, OID_AUTO, name, CTLFLAG_RD,
2508 children = SYSCTL_CHILDREN(oid);
2510 SYSCTL_ADD_PROC(&pi->ctx, children, OID_AUTO, "abs_id",
2511 CTLTYPE_INT | CTLFLAG_RD, &rxq->iq.abs_id, 0, sysctl_uint16, "I",
2512 "absolute id of the queue");
2513 SYSCTL_ADD_PROC(&pi->ctx, children, OID_AUTO, "cntxt_id",
2514 CTLTYPE_INT | CTLFLAG_RD, &rxq->iq.cntxt_id, 0, sysctl_uint16, "I",
2515 "SGE context id of the queue");
2516 SYSCTL_ADD_PROC(&pi->ctx, children, OID_AUTO, "cidx",
2517 CTLTYPE_INT | CTLFLAG_RD, &rxq->iq.cidx, 0, sysctl_uint16, "I",
2519 #if defined(INET) || defined(INET6)
2520 SYSCTL_ADD_INT(&pi->ctx, children, OID_AUTO, "lro_queued", CTLFLAG_RD,
2521 &rxq->lro.lro_queued, 0, NULL);
2522 SYSCTL_ADD_INT(&pi->ctx, children, OID_AUTO, "lro_flushed", CTLFLAG_RD,
2523 &rxq->lro.lro_flushed, 0, NULL);
2525 SYSCTL_ADD_UQUAD(&pi->ctx, children, OID_AUTO, "rxcsum", CTLFLAG_RD,
2526 &rxq->rxcsum, "# of times hardware assisted with checksum");
2527 SYSCTL_ADD_UQUAD(&pi->ctx, children, OID_AUTO, "vlan_extraction",
2528 CTLFLAG_RD, &rxq->vlan_extraction,
2529 "# of times hardware extracted 802.1Q tag");
2531 add_fl_sysctls(&pi->ctx, oid, &rxq->fl);
2537 free_rxq(struct port_info *pi, struct sge_rxq *rxq)
2541 #if defined(INET) || defined(INET6)
2543 tcp_lro_free(&rxq->lro);
2544 rxq->lro.ifp = NULL;
2548 rc = free_iq_fl(pi, &rxq->iq, &rxq->fl);
2550 bzero(rxq, sizeof(*rxq));
2557 alloc_ofld_rxq(struct port_info *pi, struct sge_ofld_rxq *ofld_rxq,
2558 int intr_idx, int idx, struct sysctl_oid *oid)
2561 struct sysctl_oid_list *children;
2564 rc = alloc_iq_fl(pi, &ofld_rxq->iq, &ofld_rxq->fl, intr_idx,
2569 children = SYSCTL_CHILDREN(oid);
2571 snprintf(name, sizeof(name), "%d", idx);
2572 oid = SYSCTL_ADD_NODE(&pi->ctx, children, OID_AUTO, name, CTLFLAG_RD,
2574 children = SYSCTL_CHILDREN(oid);
2576 SYSCTL_ADD_PROC(&pi->ctx, children, OID_AUTO, "abs_id",
2577 CTLTYPE_INT | CTLFLAG_RD, &ofld_rxq->iq.abs_id, 0, sysctl_uint16,
2578 "I", "absolute id of the queue");
2579 SYSCTL_ADD_PROC(&pi->ctx, children, OID_AUTO, "cntxt_id",
2580 CTLTYPE_INT | CTLFLAG_RD, &ofld_rxq->iq.cntxt_id, 0, sysctl_uint16,
2581 "I", "SGE context id of the queue");
2582 SYSCTL_ADD_PROC(&pi->ctx, children, OID_AUTO, "cidx",
2583 CTLTYPE_INT | CTLFLAG_RD, &ofld_rxq->iq.cidx, 0, sysctl_uint16, "I",
2586 add_fl_sysctls(&pi->ctx, oid, &ofld_rxq->fl);
2592 free_ofld_rxq(struct port_info *pi, struct sge_ofld_rxq *ofld_rxq)
2596 rc = free_iq_fl(pi, &ofld_rxq->iq, &ofld_rxq->fl);
2598 bzero(ofld_rxq, sizeof(*ofld_rxq));
2605 ctrl_eq_alloc(struct adapter *sc, struct sge_eq *eq)
2608 struct fw_eq_ctrl_cmd c;
2610 bzero(&c, sizeof(c));
2612 c.op_to_vfn = htobe32(V_FW_CMD_OP(FW_EQ_CTRL_CMD) | F_FW_CMD_REQUEST |
2613 F_FW_CMD_WRITE | F_FW_CMD_EXEC | V_FW_EQ_CTRL_CMD_PFN(sc->pf) |
2614 V_FW_EQ_CTRL_CMD_VFN(0));
2615 c.alloc_to_len16 = htobe32(F_FW_EQ_CTRL_CMD_ALLOC |
2616 F_FW_EQ_CTRL_CMD_EQSTART | FW_LEN16(c));
2617 c.cmpliqid_eqid = htonl(V_FW_EQ_CTRL_CMD_CMPLIQID(eq->iqid)); /* XXX */
2618 c.physeqid_pkd = htobe32(0);
2619 c.fetchszm_to_iqid =
2620 htobe32(V_FW_EQ_CTRL_CMD_HOSTFCMODE(X_HOSTFCMODE_STATUS_PAGE) |
2621 V_FW_EQ_CTRL_CMD_PCIECHN(eq->tx_chan) |
2622 F_FW_EQ_CTRL_CMD_FETCHRO | V_FW_EQ_CTRL_CMD_IQID(eq->iqid));
2624 htobe32(V_FW_EQ_CTRL_CMD_FBMIN(X_FETCHBURSTMIN_64B) |
2625 V_FW_EQ_CTRL_CMD_FBMAX(X_FETCHBURSTMAX_512B) |
2626 V_FW_EQ_CTRL_CMD_CIDXFTHRESH(X_CIDXFLUSHTHRESH_32) |
2627 V_FW_EQ_CTRL_CMD_EQSIZE(eq->qsize));
2628 c.eqaddr = htobe64(eq->ba);
2630 rc = -t4_wr_mbox(sc, sc->mbox, &c, sizeof(c), &c);
2632 device_printf(sc->dev,
2633 "failed to create control queue %d: %d\n", eq->tx_chan, rc);
2636 eq->flags |= EQ_ALLOCATED;
2638 eq->cntxt_id = G_FW_EQ_CTRL_CMD_EQID(be32toh(c.cmpliqid_eqid));
2639 cntxt_id = eq->cntxt_id - sc->sge.eq_start;
2640 if (cntxt_id >= sc->sge.neq)
2641 panic("%s: eq->cntxt_id (%d) more than the max (%d)", __func__,
2642 cntxt_id, sc->sge.neq - 1);
2643 sc->sge.eqmap[cntxt_id] = eq;
2649 eth_eq_alloc(struct adapter *sc, struct port_info *pi, struct sge_eq *eq)
2652 struct fw_eq_eth_cmd c;
2654 bzero(&c, sizeof(c));
2656 c.op_to_vfn = htobe32(V_FW_CMD_OP(FW_EQ_ETH_CMD) | F_FW_CMD_REQUEST |
2657 F_FW_CMD_WRITE | F_FW_CMD_EXEC | V_FW_EQ_ETH_CMD_PFN(sc->pf) |
2658 V_FW_EQ_ETH_CMD_VFN(0));
2659 c.alloc_to_len16 = htobe32(F_FW_EQ_ETH_CMD_ALLOC |
2660 F_FW_EQ_ETH_CMD_EQSTART | FW_LEN16(c));
2661 c.autoequiqe_to_viid = htobe32(V_FW_EQ_ETH_CMD_VIID(pi->viid));
2662 c.fetchszm_to_iqid =
2663 htobe32(V_FW_EQ_ETH_CMD_HOSTFCMODE(X_HOSTFCMODE_STATUS_PAGE) |
2664 V_FW_EQ_ETH_CMD_PCIECHN(eq->tx_chan) | F_FW_EQ_ETH_CMD_FETCHRO |
2665 V_FW_EQ_ETH_CMD_IQID(eq->iqid));
2666 c.dcaen_to_eqsize = htobe32(V_FW_EQ_ETH_CMD_FBMIN(X_FETCHBURSTMIN_64B) |
2667 V_FW_EQ_ETH_CMD_FBMAX(X_FETCHBURSTMAX_512B) |
2668 V_FW_EQ_ETH_CMD_CIDXFTHRESH(X_CIDXFLUSHTHRESH_32) |
2669 V_FW_EQ_ETH_CMD_EQSIZE(eq->qsize));
2670 c.eqaddr = htobe64(eq->ba);
2672 rc = -t4_wr_mbox(sc, sc->mbox, &c, sizeof(c), &c);
2674 device_printf(pi->dev,
2675 "failed to create Ethernet egress queue: %d\n", rc);
2678 eq->flags |= EQ_ALLOCATED;
2680 eq->cntxt_id = G_FW_EQ_ETH_CMD_EQID(be32toh(c.eqid_pkd));
2681 cntxt_id = eq->cntxt_id - sc->sge.eq_start;
2682 if (cntxt_id >= sc->sge.neq)
2683 panic("%s: eq->cntxt_id (%d) more than the max (%d)", __func__,
2684 cntxt_id, sc->sge.neq - 1);
2685 sc->sge.eqmap[cntxt_id] = eq;
2692 ofld_eq_alloc(struct adapter *sc, struct port_info *pi, struct sge_eq *eq)
2695 struct fw_eq_ofld_cmd c;
2697 bzero(&c, sizeof(c));
2699 c.op_to_vfn = htonl(V_FW_CMD_OP(FW_EQ_OFLD_CMD) | F_FW_CMD_REQUEST |
2700 F_FW_CMD_WRITE | F_FW_CMD_EXEC | V_FW_EQ_OFLD_CMD_PFN(sc->pf) |
2701 V_FW_EQ_OFLD_CMD_VFN(0));
2702 c.alloc_to_len16 = htonl(F_FW_EQ_OFLD_CMD_ALLOC |
2703 F_FW_EQ_OFLD_CMD_EQSTART | FW_LEN16(c));
2704 c.fetchszm_to_iqid =
2705 htonl(V_FW_EQ_OFLD_CMD_HOSTFCMODE(X_HOSTFCMODE_STATUS_PAGE) |
2706 V_FW_EQ_OFLD_CMD_PCIECHN(eq->tx_chan) |
2707 F_FW_EQ_OFLD_CMD_FETCHRO | V_FW_EQ_OFLD_CMD_IQID(eq->iqid));
2709 htobe32(V_FW_EQ_OFLD_CMD_FBMIN(X_FETCHBURSTMIN_64B) |
2710 V_FW_EQ_OFLD_CMD_FBMAX(X_FETCHBURSTMAX_512B) |
2711 V_FW_EQ_OFLD_CMD_CIDXFTHRESH(X_CIDXFLUSHTHRESH_32) |
2712 V_FW_EQ_OFLD_CMD_EQSIZE(eq->qsize));
2713 c.eqaddr = htobe64(eq->ba);
2715 rc = -t4_wr_mbox(sc, sc->mbox, &c, sizeof(c), &c);
2717 device_printf(pi->dev,
2718 "failed to create egress queue for TCP offload: %d\n", rc);
2721 eq->flags |= EQ_ALLOCATED;
2723 eq->cntxt_id = G_FW_EQ_OFLD_CMD_EQID(be32toh(c.eqid_pkd));
2724 cntxt_id = eq->cntxt_id - sc->sge.eq_start;
2725 if (cntxt_id >= sc->sge.neq)
2726 panic("%s: eq->cntxt_id (%d) more than the max (%d)", __func__,
2727 cntxt_id, sc->sge.neq - 1);
2728 sc->sge.eqmap[cntxt_id] = eq;
2735 alloc_eq(struct adapter *sc, struct port_info *pi, struct sge_eq *eq)
2740 mtx_init(&eq->eq_lock, eq->lockname, NULL, MTX_DEF);
2742 len = eq->qsize * EQ_ESIZE;
2743 rc = alloc_ring(sc, len, &eq->desc_tag, &eq->desc_map,
2744 &eq->ba, (void **)&eq->desc);
2748 eq->cap = eq->qsize - spg_len / EQ_ESIZE;
2749 eq->spg = (void *)&eq->desc[eq->cap];
2750 eq->avail = eq->cap - 1; /* one less to avoid cidx = pidx */
2751 eq->pidx = eq->cidx = 0;
2752 eq->doorbells = sc->doorbells;
2754 switch (eq->flags & EQ_TYPEMASK) {
2756 rc = ctrl_eq_alloc(sc, eq);
2760 rc = eth_eq_alloc(sc, pi, eq);
2765 rc = ofld_eq_alloc(sc, pi, eq);
2770 panic("%s: invalid eq type %d.", __func__,
2771 eq->flags & EQ_TYPEMASK);
2774 device_printf(sc->dev,
2775 "failed to allocate egress queue(%d): %d\n",
2776 eq->flags & EQ_TYPEMASK, rc);
2779 eq->tx_callout.c_cpu = eq->cntxt_id % mp_ncpus;
2781 if (isset(&eq->doorbells, DOORBELL_UDB) ||
2782 isset(&eq->doorbells, DOORBELL_UDBWC) ||
2783 isset(&eq->doorbells, DOORBELL_WCWR)) {
2784 uint32_t s_qpp = sc->sge.eq_s_qpp;
2785 uint32_t mask = (1 << s_qpp) - 1;
2786 volatile uint8_t *udb;
2788 udb = sc->udbs_base + UDBS_DB_OFFSET;
2789 udb += (eq->cntxt_id >> s_qpp) << PAGE_SHIFT; /* pg offset */
2790 eq->udb_qid = eq->cntxt_id & mask; /* id in page */
2791 if (eq->udb_qid > PAGE_SIZE / UDBS_SEG_SIZE)
2792 clrbit(&eq->doorbells, DOORBELL_WCWR);
2794 udb += eq->udb_qid << UDBS_SEG_SHIFT; /* seg offset */
2797 eq->udb = (volatile void *)udb;
2804 free_eq(struct adapter *sc, struct sge_eq *eq)
2808 if (eq->flags & EQ_ALLOCATED) {
2809 switch (eq->flags & EQ_TYPEMASK) {
2811 rc = -t4_ctrl_eq_free(sc, sc->mbox, sc->pf, 0,
2816 rc = -t4_eth_eq_free(sc, sc->mbox, sc->pf, 0,
2822 rc = -t4_ofld_eq_free(sc, sc->mbox, sc->pf, 0,
2828 panic("%s: invalid eq type %d.", __func__,
2829 eq->flags & EQ_TYPEMASK);
2832 device_printf(sc->dev,
2833 "failed to free egress queue (%d): %d\n",
2834 eq->flags & EQ_TYPEMASK, rc);
2837 eq->flags &= ~EQ_ALLOCATED;
2840 free_ring(sc, eq->desc_tag, eq->desc_map, eq->ba, eq->desc);
2842 if (mtx_initialized(&eq->eq_lock))
2843 mtx_destroy(&eq->eq_lock);
2845 bzero(eq, sizeof(*eq));
2850 alloc_wrq(struct adapter *sc, struct port_info *pi, struct sge_wrq *wrq,
2851 struct sysctl_oid *oid)
2854 struct sysctl_ctx_list *ctx = pi ? &pi->ctx : &sc->ctx;
2855 struct sysctl_oid_list *children = SYSCTL_CHILDREN(oid);
2857 rc = alloc_eq(sc, pi, &wrq->eq);
2862 STAILQ_INIT(&wrq->wr_list);
2864 SYSCTL_ADD_UINT(ctx, children, OID_AUTO, "cntxt_id", CTLFLAG_RD,
2865 &wrq->eq.cntxt_id, 0, "SGE context id of the queue");
2866 SYSCTL_ADD_PROC(ctx, children, OID_AUTO, "cidx",
2867 CTLTYPE_INT | CTLFLAG_RD, &wrq->eq.cidx, 0, sysctl_uint16, "I",
2869 SYSCTL_ADD_PROC(ctx, children, OID_AUTO, "pidx",
2870 CTLTYPE_INT | CTLFLAG_RD, &wrq->eq.pidx, 0, sysctl_uint16, "I",
2872 SYSCTL_ADD_UQUAD(ctx, children, OID_AUTO, "tx_wrs", CTLFLAG_RD,
2873 &wrq->tx_wrs, "# of work requests");
2874 SYSCTL_ADD_UINT(ctx, children, OID_AUTO, "no_desc", CTLFLAG_RD,
2876 "# of times queue ran out of hardware descriptors");
2877 SYSCTL_ADD_UINT(ctx, children, OID_AUTO, "unstalled", CTLFLAG_RD,
2878 &wrq->eq.unstalled, 0, "# of times queue recovered after stall");
2884 free_wrq(struct adapter *sc, struct sge_wrq *wrq)
2888 rc = free_eq(sc, &wrq->eq);
2892 bzero(wrq, sizeof(*wrq));
2897 alloc_txq(struct port_info *pi, struct sge_txq *txq, int idx,
2898 struct sysctl_oid *oid)
2901 struct adapter *sc = pi->adapter;
2902 struct sge_eq *eq = &txq->eq;
2904 struct sysctl_oid_list *children = SYSCTL_CHILDREN(oid);
2906 rc = alloc_eq(sc, pi, eq);
2912 txq->sdesc = malloc(eq->cap * sizeof(struct tx_sdesc), M_CXGBE,
2914 txq->br = buf_ring_alloc(eq->qsize, M_CXGBE, M_WAITOK, &eq->eq_lock);
2916 rc = bus_dma_tag_create(sc->dmat, 1, 0, BUS_SPACE_MAXADDR,
2917 BUS_SPACE_MAXADDR, NULL, NULL, 64 * 1024, TX_SGL_SEGS,
2918 BUS_SPACE_MAXSIZE, BUS_DMA_ALLOCNOW, NULL, NULL, &txq->tx_tag);
2920 device_printf(sc->dev,
2921 "failed to create tx DMA tag: %d\n", rc);
2926 * We can stuff ~10 frames in an 8-descriptor txpkts WR (8 is the SGE
2927 * limit for any WR). txq->no_dmamap events shouldn't occur if maps is
2928 * sized for the worst case.
2930 rc = t4_alloc_tx_maps(&txq->txmaps, txq->tx_tag, eq->qsize * 10 / 8,
2933 device_printf(sc->dev, "failed to setup tx DMA maps: %d\n", rc);
2937 snprintf(name, sizeof(name), "%d", idx);
2938 oid = SYSCTL_ADD_NODE(&pi->ctx, children, OID_AUTO, name, CTLFLAG_RD,
2940 children = SYSCTL_CHILDREN(oid);
2942 SYSCTL_ADD_UINT(&pi->ctx, children, OID_AUTO, "cntxt_id", CTLFLAG_RD,
2943 &eq->cntxt_id, 0, "SGE context id of the queue");
2944 SYSCTL_ADD_PROC(&pi->ctx, children, OID_AUTO, "cidx",
2945 CTLTYPE_INT | CTLFLAG_RD, &eq->cidx, 0, sysctl_uint16, "I",
2947 SYSCTL_ADD_PROC(&pi->ctx, children, OID_AUTO, "pidx",
2948 CTLTYPE_INT | CTLFLAG_RD, &eq->pidx, 0, sysctl_uint16, "I",
2951 SYSCTL_ADD_UQUAD(&pi->ctx, children, OID_AUTO, "txcsum", CTLFLAG_RD,
2952 &txq->txcsum, "# of times hardware assisted with checksum");
2953 SYSCTL_ADD_UQUAD(&pi->ctx, children, OID_AUTO, "vlan_insertion",
2954 CTLFLAG_RD, &txq->vlan_insertion,
2955 "# of times hardware inserted 802.1Q tag");
2956 SYSCTL_ADD_UQUAD(&pi->ctx, children, OID_AUTO, "tso_wrs", CTLFLAG_RD,
2957 &txq->tso_wrs, "# of TSO work requests");
2958 SYSCTL_ADD_UQUAD(&pi->ctx, children, OID_AUTO, "imm_wrs", CTLFLAG_RD,
2959 &txq->imm_wrs, "# of work requests with immediate data");
2960 SYSCTL_ADD_UQUAD(&pi->ctx, children, OID_AUTO, "sgl_wrs", CTLFLAG_RD,
2961 &txq->sgl_wrs, "# of work requests with direct SGL");
2962 SYSCTL_ADD_UQUAD(&pi->ctx, children, OID_AUTO, "txpkt_wrs", CTLFLAG_RD,
2963 &txq->txpkt_wrs, "# of txpkt work requests (one pkt/WR)");
2964 SYSCTL_ADD_UQUAD(&pi->ctx, children, OID_AUTO, "txpkts_wrs", CTLFLAG_RD,
2965 &txq->txpkts_wrs, "# of txpkts work requests (multiple pkts/WR)");
2966 SYSCTL_ADD_UQUAD(&pi->ctx, children, OID_AUTO, "txpkts_pkts", CTLFLAG_RD,
2967 &txq->txpkts_pkts, "# of frames tx'd using txpkts work requests");
2969 SYSCTL_ADD_UQUAD(&pi->ctx, children, OID_AUTO, "br_drops", CTLFLAG_RD,
2970 &txq->br->br_drops, "# of drops in the buf_ring for this queue");
2971 SYSCTL_ADD_UINT(&pi->ctx, children, OID_AUTO, "no_dmamap", CTLFLAG_RD,
2972 &txq->no_dmamap, 0, "# of times txq ran out of DMA maps");
2973 SYSCTL_ADD_UINT(&pi->ctx, children, OID_AUTO, "no_desc", CTLFLAG_RD,
2974 &txq->no_desc, 0, "# of times txq ran out of hardware descriptors");
2975 SYSCTL_ADD_UINT(&pi->ctx, children, OID_AUTO, "egr_update", CTLFLAG_RD,
2976 &eq->egr_update, 0, "egress update notifications from the SGE");
2977 SYSCTL_ADD_UINT(&pi->ctx, children, OID_AUTO, "unstalled", CTLFLAG_RD,
2978 &eq->unstalled, 0, "# of times txq recovered after stall");
2984 free_txq(struct port_info *pi, struct sge_txq *txq)
2987 struct adapter *sc = pi->adapter;
2988 struct sge_eq *eq = &txq->eq;
2990 rc = free_eq(sc, eq);
2994 free(txq->sdesc, M_CXGBE);
2996 if (txq->txmaps.maps)
2997 t4_free_tx_maps(&txq->txmaps, txq->tx_tag);
2999 buf_ring_free(txq->br, M_CXGBE);
3002 bus_dma_tag_destroy(txq->tx_tag);
3004 bzero(txq, sizeof(*txq));
3009 oneseg_dma_callback(void *arg, bus_dma_segment_t *segs, int nseg, int error)
3011 bus_addr_t *ba = arg;
3014 ("%s meant for single segment mappings only.", __func__));
3016 *ba = error ? 0 : segs->ds_addr;
3020 is_new_response(const struct sge_iq *iq, struct rsp_ctrl **ctrl)
3022 *ctrl = (void *)((uintptr_t)iq->cdesc +
3023 (iq->esize - sizeof(struct rsp_ctrl)));
3025 return (((*ctrl)->u.type_gen >> S_RSPD_GEN) == iq->gen);
3029 iq_next(struct sge_iq *iq)
3031 iq->cdesc = (void *) ((uintptr_t)iq->cdesc + iq->esize);
3032 if (__predict_false(++iq->cidx == iq->qsize - 1)) {
3035 iq->cdesc = iq->desc;
3039 #define FL_HW_IDX(x) ((x) >> 3)
3041 ring_fl_db(struct adapter *sc, struct sge_fl *fl)
3043 int ndesc = fl->pending / 8;
3046 if (FL_HW_IDX(fl->pidx) == FL_HW_IDX(fl->cidx))
3047 ndesc--; /* hold back one credit */
3050 return; /* nothing to do */
3052 v = F_DBPRIO | V_QID(fl->cntxt_id) | V_PIDX(ndesc);
3058 t4_write_reg(sc, MYPF_REG(A_SGE_PF_KDOORBELL), v);
3059 fl->pending -= ndesc * 8;
3063 * Fill up the freelist by upto nbufs and maybe ring its doorbell.
3065 * Returns non-zero to indicate that it should be added to the list of starving
3069 refill_fl(struct adapter *sc, struct sge_fl *fl, int nbufs)
3071 __be64 *d = &fl->desc[fl->pidx];
3072 struct fl_sdesc *sd = &fl->sdesc[fl->pidx];
3075 struct cluster_layout *cll = &fl->cll_def; /* default layout */
3076 struct sw_zone_info *swz = &sc->sge.sw_zone_info[cll->zidx];
3077 struct cluster_metadata *clm;
3079 FL_LOCK_ASSERT_OWNED(fl);
3081 if (nbufs > fl->needed)
3083 nbufs -= (fl->pidx + nbufs) % 8;
3087 if (sd->cl != NULL) {
3089 if (sd->nmbuf == 0) {
3091 * Fast recycle without involving any atomics on
3092 * the cluster's metadata (if the cluster has
3093 * metadata). This happens when all frames
3094 * received in the cluster were small enough to
3095 * fit within a single mbuf each.
3097 fl->cl_fast_recycled++;
3099 clm = cl_metadata(sc, fl, &sd->cll, sd->cl);
3101 MPASS(clm->refcount == 1);
3107 * Cluster is guaranteed to have metadata. Clusters
3108 * without metadata always take the fast recycle path
3109 * when they're recycled.
3111 clm = cl_metadata(sc, fl, &sd->cll, sd->cl);
3114 if (atomic_fetchadd_int(&clm->refcount, -1) == 1) {
3116 counter_u64_add(extfree_rels, 1);
3119 sd->cl = NULL; /* gave up my reference */
3121 MPASS(sd->cl == NULL);
3123 cl = uma_zalloc(swz->zone, M_NOWAIT);
3124 if (__predict_false(cl == NULL)) {
3125 if (cll == &fl->cll_alt || fl->cll_alt.zidx == -1 ||
3126 fl->cll_def.zidx == fl->cll_alt.zidx)
3129 /* fall back to the safe zone */
3131 swz = &sc->sge.sw_zone_info[cll->zidx];
3136 pa = pmap_kextract((vm_offset_t)cl);
3140 *d = htobe64(pa | cll->hwidx);
3141 clm = cl_metadata(sc, fl, cll, cl);
3155 if (__predict_false(++fl->pidx == fl->cap)) {
3162 if (fl->pending >= 8)
3165 return (FL_RUNNING_LOW(fl) && !(fl->flags & FL_STARVING));
3169 * Attempt to refill all starving freelists.
3172 refill_sfl(void *arg)
3174 struct adapter *sc = arg;
3175 struct sge_fl *fl, *fl_temp;
3177 mtx_lock(&sc->sfl_lock);
3178 TAILQ_FOREACH_SAFE(fl, &sc->sfl, link, fl_temp) {
3180 refill_fl(sc, fl, 64);
3181 if (FL_NOT_RUNNING_LOW(fl) || fl->flags & FL_DOOMED) {
3182 TAILQ_REMOVE(&sc->sfl, fl, link);
3183 fl->flags &= ~FL_STARVING;
3188 if (!TAILQ_EMPTY(&sc->sfl))
3189 callout_schedule(&sc->sfl_callout, hz / 5);
3190 mtx_unlock(&sc->sfl_lock);
3194 alloc_fl_sdesc(struct sge_fl *fl)
3197 fl->sdesc = malloc(fl->cap * sizeof(struct fl_sdesc), M_CXGBE,
3204 free_fl_sdesc(struct adapter *sc, struct sge_fl *fl)
3206 struct fl_sdesc *sd;
3207 struct cluster_metadata *clm;
3208 struct cluster_layout *cll;
3212 for (i = 0; i < fl->cap; i++, sd++) {
3217 clm = cl_metadata(sc, fl, cll, sd->cl);
3219 uma_zfree(sc->sge.sw_zone_info[cll->zidx].zone, sd->cl);
3220 else if (clm && atomic_fetchadd_int(&clm->refcount, -1) == 1) {
3221 uma_zfree(sc->sge.sw_zone_info[cll->zidx].zone, sd->cl);
3222 counter_u64_add(extfree_rels, 1);
3227 free(fl->sdesc, M_CXGBE);
3232 t4_alloc_tx_maps(struct tx_maps *txmaps, bus_dma_tag_t tx_tag, int count,
3238 txmaps->map_total = txmaps->map_avail = count;
3239 txmaps->map_cidx = txmaps->map_pidx = 0;
3241 txmaps->maps = malloc(count * sizeof(struct tx_map), M_CXGBE,
3245 for (i = 0; i < count; i++, txm++) {
3246 rc = bus_dmamap_create(tx_tag, 0, &txm->map);
3255 bus_dmamap_destroy(tx_tag, txm->map);
3257 KASSERT(txm == txmaps->maps, ("%s: EDOOFUS", __func__));
3259 free(txmaps->maps, M_CXGBE);
3260 txmaps->maps = NULL;
3266 t4_free_tx_maps(struct tx_maps *txmaps, bus_dma_tag_t tx_tag)
3272 for (i = 0; i < txmaps->map_total; i++, txm++) {
3275 bus_dmamap_unload(tx_tag, txm->map);
3280 bus_dmamap_destroy(tx_tag, txm->map);
3283 free(txmaps->maps, M_CXGBE);
3284 txmaps->maps = NULL;
3288 * We'll do immediate data tx for non-TSO, but only when not coalescing. We're
3289 * willing to use upto 2 hardware descriptors which means a maximum of 96 bytes
3290 * of immediate data.
3294 - sizeof(struct fw_eth_tx_pkt_wr) \
3295 - sizeof(struct cpl_tx_pkt_core))
3298 * Returns non-zero on failure, no need to cleanup anything in that case.
3300 * Note 1: We always try to defrag the mbuf if required and return EFBIG only
3301 * if the resulting chain still won't fit in a tx descriptor.
3303 * Note 2: We'll pullup the mbuf chain if TSO is requested and the first mbuf
3304 * does not have the TCP header in it.
3307 get_pkt_sgl(struct sge_txq *txq, struct mbuf **fp, struct sgl *sgl,
3310 struct mbuf *m = *fp;
3311 struct tx_maps *txmaps;
3313 int rc, defragged = 0, n;
3315 TXQ_LOCK_ASSERT_OWNED(txq);
3317 if (m->m_pkthdr.tso_segsz)
3318 sgl_only = 1; /* Do not allow immediate data with LSO */
3320 start: sgl->nsegs = 0;
3322 if (m->m_pkthdr.len <= IMM_LEN && !sgl_only)
3323 return (0); /* nsegs = 0 tells caller to use imm. tx */
3325 txmaps = &txq->txmaps;
3326 if (txmaps->map_avail == 0) {
3330 txm = &txmaps->maps[txmaps->map_pidx];
3332 if (m->m_pkthdr.tso_segsz && m->m_len < 50) {
3333 *fp = m_pullup(m, 50);
3339 rc = bus_dmamap_load_mbuf_sg(txq->tx_tag, txm->map, m, sgl->seg,
3340 &sgl->nsegs, BUS_DMA_NOWAIT);
3341 if (rc == EFBIG && defragged == 0) {
3342 m = m_defrag(m, M_NOWAIT);
3354 txmaps->map_avail--;
3355 if (++txmaps->map_pidx == txmaps->map_total)
3356 txmaps->map_pidx = 0;
3358 KASSERT(sgl->nsegs > 0 && sgl->nsegs <= TX_SGL_SEGS,
3359 ("%s: bad DMA mapping (%d segments)", __func__, sgl->nsegs));
3362 * Store the # of flits required to hold this frame's SGL in nflits. An
3363 * SGL has a (ULPTX header + len0, addr0) tuple optionally followed by
3364 * multiple (len0 + len1, addr0, addr1) tuples. If addr1 is not used
3365 * then len1 must be set to 0.
3368 sgl->nflits = (3 * n) / 2 + (n & 1) + 2;
3375 * Releases all the txq resources used up in the specified sgl.
3378 free_pkt_sgl(struct sge_txq *txq, struct sgl *sgl)
3380 struct tx_maps *txmaps;
3383 TXQ_LOCK_ASSERT_OWNED(txq);
3385 if (sgl->nsegs == 0)
3386 return (0); /* didn't use any map */
3388 txmaps = &txq->txmaps;
3390 /* 1 pkt uses exactly 1 map, back it out */
3392 txmaps->map_avail++;
3393 if (txmaps->map_pidx > 0)
3396 txmaps->map_pidx = txmaps->map_total - 1;
3398 txm = &txmaps->maps[txmaps->map_pidx];
3399 bus_dmamap_unload(txq->tx_tag, txm->map);
3406 write_txpkt_wr(struct port_info *pi, struct sge_txq *txq, struct mbuf *m,
3409 struct sge_eq *eq = &txq->eq;
3410 struct fw_eth_tx_pkt_wr *wr;
3411 struct cpl_tx_pkt_core *cpl;
3412 uint32_t ctrl; /* used in many unrelated places */
3414 int nflits, ndesc, pktlen;
3415 struct tx_sdesc *txsd;
3418 TXQ_LOCK_ASSERT_OWNED(txq);
3420 pktlen = m->m_pkthdr.len;
3423 * Do we have enough flits to send this frame out?
3425 ctrl = sizeof(struct cpl_tx_pkt_core);
3426 if (m->m_pkthdr.tso_segsz) {
3427 nflits = TXPKT_LSO_WR_HDR;
3428 ctrl += sizeof(struct cpl_tx_pkt_lso_core);
3430 nflits = TXPKT_WR_HDR;
3432 nflits += sgl->nflits;
3434 nflits += howmany(pktlen, 8);
3437 ndesc = howmany(nflits, 8);
3438 if (ndesc > eq->avail)
3441 /* Firmware work request header */
3442 wr = (void *)&eq->desc[eq->pidx];
3443 wr->op_immdlen = htobe32(V_FW_WR_OP(FW_ETH_TX_PKT_WR) |
3444 V_FW_ETH_TX_PKT_WR_IMMDLEN(ctrl));
3445 ctrl = V_FW_WR_LEN16(howmany(nflits, 2));
3446 if (eq->avail == ndesc) {
3447 if (!(eq->flags & EQ_CRFLUSHED)) {
3448 ctrl |= F_FW_WR_EQUEQ | F_FW_WR_EQUIQ;
3449 eq->flags |= EQ_CRFLUSHED;
3451 eq->flags |= EQ_STALLED;
3454 wr->equiq_to_len16 = htobe32(ctrl);
3457 if (m->m_pkthdr.tso_segsz) {
3458 struct cpl_tx_pkt_lso_core *lso = (void *)(wr + 1);
3459 struct ether_header *eh;
3461 #if defined(INET) || defined(INET6)
3466 ctrl = V_LSO_OPCODE(CPL_TX_PKT_LSO) | F_LSO_FIRST_SLICE |
3469 eh = mtod(m, struct ether_header *);
3470 eh_type = ntohs(eh->ether_type);
3471 if (eh_type == ETHERTYPE_VLAN) {
3472 struct ether_vlan_header *evh = (void *)eh;
3474 ctrl |= V_LSO_ETHHDR_LEN(1);
3476 eh_type = ntohs(evh->evl_proto);
3482 case ETHERTYPE_IPV6:
3484 struct ip6_hdr *ip6 = l3hdr;
3487 * XXX-BZ For now we do not pretend to support
3488 * IPv6 extension headers.
3490 KASSERT(ip6->ip6_nxt == IPPROTO_TCP, ("%s: CSUM_TSO "
3491 "with ip6_nxt != TCP: %u", __func__, ip6->ip6_nxt));
3492 tcp = (struct tcphdr *)(ip6 + 1);
3494 ctrl |= V_LSO_IPHDR_LEN(sizeof(*ip6) >> 2) |
3495 V_LSO_TCPHDR_LEN(tcp->th_off);
3502 struct ip *ip = l3hdr;
3504 tcp = (void *)((uintptr_t)ip + ip->ip_hl * 4);
3505 ctrl |= V_LSO_IPHDR_LEN(ip->ip_hl) |
3506 V_LSO_TCPHDR_LEN(tcp->th_off);
3511 panic("%s: CSUM_TSO but no supported IP version "
3512 "(0x%04x)", __func__, eh_type);
3515 lso->lso_ctrl = htobe32(ctrl);
3516 lso->ipid_ofst = htobe16(0);
3517 lso->mss = htobe16(m->m_pkthdr.tso_segsz);
3518 lso->seqno_offset = htobe32(0);
3519 lso->len = htobe32(pktlen);
3521 cpl = (void *)(lso + 1);
3525 cpl = (void *)(wr + 1);
3527 /* Checksum offload */
3529 if (!(m->m_pkthdr.csum_flags & (CSUM_IP | CSUM_TSO)))
3530 ctrl1 |= F_TXPKT_IPCSUM_DIS;
3531 if (!(m->m_pkthdr.csum_flags & (CSUM_TCP | CSUM_UDP | CSUM_UDP_IPV6 |
3532 CSUM_TCP_IPV6 | CSUM_TSO)))
3533 ctrl1 |= F_TXPKT_L4CSUM_DIS;
3534 if (m->m_pkthdr.csum_flags & (CSUM_IP | CSUM_TCP | CSUM_UDP |
3535 CSUM_UDP_IPV6 | CSUM_TCP_IPV6 | CSUM_TSO))
3536 txq->txcsum++; /* some hardware assistance provided */
3538 /* VLAN tag insertion */
3539 if (m->m_flags & M_VLANTAG) {
3540 ctrl1 |= F_TXPKT_VLAN_VLD | V_TXPKT_VLAN(m->m_pkthdr.ether_vtag);
3541 txq->vlan_insertion++;
3545 cpl->ctrl0 = htobe32(V_TXPKT_OPCODE(CPL_TX_PKT) |
3546 V_TXPKT_INTF(pi->tx_chan) | V_TXPKT_PF(pi->adapter->pf));
3548 cpl->len = htobe16(pktlen);
3549 cpl->ctrl1 = htobe64(ctrl1);
3551 /* Software descriptor */
3552 txsd = &txq->sdesc[eq->pidx];
3553 txsd->desc_used = ndesc;
3555 eq->pending += ndesc;
3558 if (eq->pidx >= eq->cap)
3559 eq->pidx -= eq->cap;
3562 dst = (void *)(cpl + 1);
3563 if (sgl->nsegs > 0) {
3566 write_sgl_to_txd(eq, sgl, &dst);
3570 for (; m; m = m->m_next) {
3571 copy_to_txd(eq, mtod(m, caddr_t), &dst, m->m_len);
3577 KASSERT(pktlen == 0, ("%s: %d bytes left.", __func__, pktlen));
3587 * Returns 0 to indicate that m has been accepted into a coalesced tx work
3588 * request. It has either been folded into txpkts or txpkts was flushed and m
3589 * has started a new coalesced work request (as the first frame in a fresh
3592 * Returns non-zero to indicate a failure - caller is responsible for
3593 * transmitting m, if there was anything in txpkts it has been flushed.
3596 add_to_txpkts(struct port_info *pi, struct sge_txq *txq, struct txpkts *txpkts,
3597 struct mbuf *m, struct sgl *sgl)
3599 struct sge_eq *eq = &txq->eq;
3601 struct tx_sdesc *txsd;
3604 TXQ_LOCK_ASSERT_OWNED(txq);
3606 KASSERT(sgl->nsegs, ("%s: can't coalesce imm data", __func__));
3608 if (txpkts->npkt > 0) {
3609 flits = TXPKTS_PKT_HDR + sgl->nflits;
3610 can_coalesce = m->m_pkthdr.tso_segsz == 0 &&
3611 txpkts->nflits + flits <= TX_WR_FLITS &&
3612 txpkts->nflits + flits <= eq->avail * 8 &&
3613 txpkts->plen + m->m_pkthdr.len < 65536;
3617 txpkts->nflits += flits;
3618 txpkts->plen += m->m_pkthdr.len;
3620 txsd = &txq->sdesc[eq->pidx];
3627 * Couldn't coalesce m into txpkts. The first order of business
3628 * is to send txpkts on its way. Then we'll revisit m.
3630 write_txpkts_wr(txq, txpkts);
3634 * Check if we can start a new coalesced tx work request with m as
3635 * the first packet in it.
3638 KASSERT(txpkts->npkt == 0, ("%s: txpkts not empty", __func__));
3640 flits = TXPKTS_WR_HDR + sgl->nflits;
3641 can_coalesce = m->m_pkthdr.tso_segsz == 0 &&
3642 flits <= eq->avail * 8 && flits <= TX_WR_FLITS;
3644 if (can_coalesce == 0)
3648 * Start a fresh coalesced tx WR with m as the first frame in it.
3651 txpkts->nflits = flits;
3652 txpkts->flitp = &eq->desc[eq->pidx].flit[2];
3653 txpkts->plen = m->m_pkthdr.len;
3655 txsd = &txq->sdesc[eq->pidx];
3662 * Note that write_txpkts_wr can never run out of hardware descriptors (but
3663 * write_txpkt_wr can). add_to_txpkts ensures that a frame is accepted for
3664 * coalescing only if sufficient hardware descriptors are available.
3667 write_txpkts_wr(struct sge_txq *txq, struct txpkts *txpkts)
3669 struct sge_eq *eq = &txq->eq;
3670 struct fw_eth_tx_pkts_wr *wr;
3671 struct tx_sdesc *txsd;
3675 TXQ_LOCK_ASSERT_OWNED(txq);
3677 ndesc = howmany(txpkts->nflits, 8);
3679 wr = (void *)&eq->desc[eq->pidx];
3680 wr->op_pkd = htobe32(V_FW_WR_OP(FW_ETH_TX_PKTS_WR));
3681 ctrl = V_FW_WR_LEN16(howmany(txpkts->nflits, 2));
3682 if (eq->avail == ndesc) {
3683 if (!(eq->flags & EQ_CRFLUSHED)) {
3684 ctrl |= F_FW_WR_EQUEQ | F_FW_WR_EQUIQ;
3685 eq->flags |= EQ_CRFLUSHED;
3687 eq->flags |= EQ_STALLED;
3689 wr->equiq_to_len16 = htobe32(ctrl);
3690 wr->plen = htobe16(txpkts->plen);
3691 wr->npkt = txpkts->npkt;
3692 wr->r3 = wr->type = 0;
3694 /* Everything else already written */
3696 txsd = &txq->sdesc[eq->pidx];
3697 txsd->desc_used = ndesc;
3699 KASSERT(eq->avail >= ndesc, ("%s: out of descriptors", __func__));
3701 eq->pending += ndesc;
3704 if (eq->pidx >= eq->cap)
3705 eq->pidx -= eq->cap;
3707 txq->txpkts_pkts += txpkts->npkt;
3709 txpkts->npkt = 0; /* emptied */
3713 write_ulp_cpl_sgl(struct port_info *pi, struct sge_txq *txq,
3714 struct txpkts *txpkts, struct mbuf *m, struct sgl *sgl)
3716 struct ulp_txpkt *ulpmc;
3717 struct ulptx_idata *ulpsc;
3718 struct cpl_tx_pkt_core *cpl;
3719 struct sge_eq *eq = &txq->eq;
3720 uintptr_t flitp, start, end;
3724 KASSERT(txpkts->npkt > 0, ("%s: txpkts is empty", __func__));
3726 start = (uintptr_t)eq->desc;
3727 end = (uintptr_t)eq->spg;
3729 /* Checksum offload */
3731 if (!(m->m_pkthdr.csum_flags & (CSUM_IP | CSUM_TSO)))
3732 ctrl |= F_TXPKT_IPCSUM_DIS;
3733 if (!(m->m_pkthdr.csum_flags & (CSUM_TCP | CSUM_UDP | CSUM_UDP_IPV6 |
3734 CSUM_TCP_IPV6 | CSUM_TSO)))
3735 ctrl |= F_TXPKT_L4CSUM_DIS;
3736 if (m->m_pkthdr.csum_flags & (CSUM_IP | CSUM_TCP | CSUM_UDP |
3737 CSUM_UDP_IPV6 | CSUM_TCP_IPV6 | CSUM_TSO))
3738 txq->txcsum++; /* some hardware assistance provided */
3740 /* VLAN tag insertion */
3741 if (m->m_flags & M_VLANTAG) {
3742 ctrl |= F_TXPKT_VLAN_VLD | V_TXPKT_VLAN(m->m_pkthdr.ether_vtag);
3743 txq->vlan_insertion++;
3747 * The previous packet's SGL must have ended at a 16 byte boundary (this
3748 * is required by the firmware/hardware). It follows that flitp cannot
3749 * wrap around between the ULPTX master command and ULPTX subcommand (8
3750 * bytes each), and that it can not wrap around in the middle of the
3751 * cpl_tx_pkt_core either.
3753 flitp = (uintptr_t)txpkts->flitp;
3754 KASSERT((flitp & 0xf) == 0,
3755 ("%s: last SGL did not end at 16 byte boundary: %p",
3756 __func__, txpkts->flitp));
3758 /* ULP master command */
3759 ulpmc = (void *)flitp;
3760 ulpmc->cmd_dest = htonl(V_ULPTX_CMD(ULP_TX_PKT) | V_ULP_TXPKT_DEST(0) |
3761 V_ULP_TXPKT_FID(eq->iqid));
3762 ulpmc->len = htonl(howmany(sizeof(*ulpmc) + sizeof(*ulpsc) +
3763 sizeof(*cpl) + 8 * sgl->nflits, 16));
3765 /* ULP subcommand */
3766 ulpsc = (void *)(ulpmc + 1);
3767 ulpsc->cmd_more = htobe32(V_ULPTX_CMD((u32)ULP_TX_SC_IMM) |
3769 ulpsc->len = htobe32(sizeof(struct cpl_tx_pkt_core));
3771 flitp += sizeof(*ulpmc) + sizeof(*ulpsc);
3776 cpl = (void *)flitp;
3777 cpl->ctrl0 = htobe32(V_TXPKT_OPCODE(CPL_TX_PKT) |
3778 V_TXPKT_INTF(pi->tx_chan) | V_TXPKT_PF(pi->adapter->pf));
3780 cpl->len = htobe16(m->m_pkthdr.len);
3781 cpl->ctrl1 = htobe64(ctrl);
3783 flitp += sizeof(*cpl);
3787 /* SGL for this frame */
3788 dst = (caddr_t)flitp;
3789 txpkts->nflits += write_sgl_to_txd(eq, sgl, &dst);
3790 txpkts->flitp = (void *)dst;
3792 KASSERT(((uintptr_t)dst & 0xf) == 0,
3793 ("%s: SGL ends at %p (not a 16 byte boundary)", __func__, dst));
3797 * If the SGL ends on an address that is not 16 byte aligned, this function will
3798 * add a 0 filled flit at the end. It returns 1 in that case.
3801 write_sgl_to_txd(struct sge_eq *eq, struct sgl *sgl, caddr_t *to)
3803 __be64 *flitp, *end;
3804 struct ulptx_sgl *usgl;
3805 bus_dma_segment_t *seg;
3808 KASSERT(sgl->nsegs > 0 && sgl->nflits > 0,
3809 ("%s: bad SGL - nsegs=%d, nflits=%d",
3810 __func__, sgl->nsegs, sgl->nflits));
3812 KASSERT(((uintptr_t)(*to) & 0xf) == 0,
3813 ("%s: SGL must start at a 16 byte boundary: %p", __func__, *to));
3815 flitp = (__be64 *)(*to);
3816 end = flitp + sgl->nflits;
3818 usgl = (void *)flitp;
3821 * We start at a 16 byte boundary somewhere inside the tx descriptor
3822 * ring, so we're at least 16 bytes away from the status page. There is
3823 * no chance of a wrap around in the middle of usgl (which is 16 bytes).
3826 usgl->cmd_nsge = htobe32(V_ULPTX_CMD(ULP_TX_SC_DSGL) |
3827 V_ULPTX_NSGE(sgl->nsegs));
3828 usgl->len0 = htobe32(seg->ds_len);
3829 usgl->addr0 = htobe64(seg->ds_addr);
3832 if ((uintptr_t)end <= (uintptr_t)eq->spg) {
3834 /* Won't wrap around at all */
3836 for (i = 0; i < sgl->nsegs - 1; i++, seg++) {
3837 usgl->sge[i / 2].len[i & 1] = htobe32(seg->ds_len);
3838 usgl->sge[i / 2].addr[i & 1] = htobe64(seg->ds_addr);
3841 usgl->sge[i / 2].len[1] = htobe32(0);
3844 /* Will wrap somewhere in the rest of the SGL */
3846 /* 2 flits already written, write the rest flit by flit */
3847 flitp = (void *)(usgl + 1);
3848 for (i = 0; i < sgl->nflits - 2; i++) {
3849 if ((uintptr_t)flitp == (uintptr_t)eq->spg)
3850 flitp = (void *)eq->desc;
3851 *flitp++ = get_flit(seg, sgl->nsegs - 1, i);
3856 if ((uintptr_t)end & 0xf) {
3857 *(uint64_t *)end = 0;
3863 if ((uintptr_t)end == (uintptr_t)eq->spg)
3864 *to = (void *)eq->desc;
3872 copy_to_txd(struct sge_eq *eq, caddr_t from, caddr_t *to, int len)
3874 if (__predict_true((uintptr_t)(*to) + len <= (uintptr_t)eq->spg)) {
3875 bcopy(from, *to, len);
3878 int portion = (uintptr_t)eq->spg - (uintptr_t)(*to);
3880 bcopy(from, *to, portion);
3882 portion = len - portion; /* remaining */
3883 bcopy(from, (void *)eq->desc, portion);
3884 (*to) = (caddr_t)eq->desc + portion;
3889 ring_eq_db(struct adapter *sc, struct sge_eq *eq)
3894 pending = eq->pending;
3896 clrbit(&db, DOORBELL_WCWR);
3900 switch (ffs(db) - 1) {
3902 *eq->udb = htole32(V_QID(eq->udb_qid) | V_PIDX(pending));
3905 case DOORBELL_WCWR: {
3906 volatile uint64_t *dst, *src;
3910 * Queues whose 128B doorbell segment fits in the page do not
3911 * use relative qid (udb_qid is always 0). Only queues with
3912 * doorbell segments can do WCWR.
3914 KASSERT(eq->udb_qid == 0 && pending == 1,
3915 ("%s: inappropriate doorbell (0x%x, %d, %d) for eq %p",
3916 __func__, eq->doorbells, pending, eq->pidx, eq));
3918 dst = (volatile void *)((uintptr_t)eq->udb + UDBS_WR_OFFSET -
3920 i = eq->pidx ? eq->pidx - 1 : eq->cap - 1;
3921 src = (void *)&eq->desc[i];
3922 while (src != (void *)&eq->desc[i + 1])
3928 case DOORBELL_UDBWC:
3929 *eq->udb = htole32(V_QID(eq->udb_qid) | V_PIDX(pending));
3934 t4_write_reg(sc, MYPF_REG(A_SGE_PF_KDOORBELL),
3935 V_QID(eq->cntxt_id) | V_PIDX(pending));
3941 reclaimable(struct sge_eq *eq)
3945 cidx = eq->spg->cidx; /* stable snapshot */
3946 cidx = be16toh(cidx);
3948 if (cidx >= eq->cidx)
3949 return (cidx - eq->cidx);
3951 return (cidx + eq->cap - eq->cidx);
3955 * There are "can_reclaim" tx descriptors ready to be reclaimed. Reclaim as
3956 * many as possible but stop when there are around "n" mbufs to free.
3958 * The actual number reclaimed is provided as the return value.
3961 reclaim_tx_descs(struct sge_txq *txq, int can_reclaim, int n)
3963 struct tx_sdesc *txsd;
3964 struct tx_maps *txmaps;
3966 unsigned int reclaimed, maps;
3967 struct sge_eq *eq = &txq->eq;
3969 TXQ_LOCK_ASSERT_OWNED(txq);
3971 if (can_reclaim == 0)
3972 can_reclaim = reclaimable(eq);
3974 maps = reclaimed = 0;
3975 while (can_reclaim && maps < n) {
3978 txsd = &txq->sdesc[eq->cidx];
3979 ndesc = txsd->desc_used;
3981 /* Firmware doesn't return "partial" credits. */
3982 KASSERT(can_reclaim >= ndesc,
3983 ("%s: unexpected number of credits: %d, %d",
3984 __func__, can_reclaim, ndesc));
3986 maps += txsd->credits;
3989 can_reclaim -= ndesc;
3992 if (__predict_false(eq->cidx >= eq->cap))
3993 eq->cidx -= eq->cap;
3996 txmaps = &txq->txmaps;
3997 txm = &txmaps->maps[txmaps->map_cidx];
4001 eq->avail += reclaimed;
4002 KASSERT(eq->avail < eq->cap, /* avail tops out at (cap - 1) */
4003 ("%s: too many descriptors available", __func__));
4005 txmaps->map_avail += maps;
4006 KASSERT(txmaps->map_avail <= txmaps->map_total,
4007 ("%s: too many maps available", __func__));
4010 struct tx_map *next;
4013 if (__predict_false(txmaps->map_cidx + 1 == txmaps->map_total))
4014 next = txmaps->maps;
4017 bus_dmamap_unload(txq->tx_tag, txm->map);
4022 if (__predict_false(++txmaps->map_cidx == txmaps->map_total))
4023 txmaps->map_cidx = 0;
4030 write_eqflush_wr(struct sge_eq *eq)
4032 struct fw_eq_flush_wr *wr;
4034 EQ_LOCK_ASSERT_OWNED(eq);
4035 KASSERT(eq->avail > 0, ("%s: no descriptors left.", __func__));
4036 KASSERT(!(eq->flags & EQ_CRFLUSHED), ("%s: flushed already", __func__));
4038 wr = (void *)&eq->desc[eq->pidx];
4039 bzero(wr, sizeof(*wr));
4040 wr->opcode = FW_EQ_FLUSH_WR;
4041 wr->equiq_to_len16 = htobe32(V_FW_WR_LEN16(sizeof(*wr) / 16) |
4042 F_FW_WR_EQUEQ | F_FW_WR_EQUIQ);
4044 eq->flags |= (EQ_CRFLUSHED | EQ_STALLED);
4047 if (++eq->pidx == eq->cap)
4052 get_flit(bus_dma_segment_t *sgl, int nsegs, int idx)
4054 int i = (idx / 3) * 2;
4060 rc = htobe32(sgl[i].ds_len);
4062 rc |= (uint64_t)htobe32(sgl[i + 1].ds_len) << 32;
4067 return htobe64(sgl[i].ds_addr);
4069 return htobe64(sgl[i + 1].ds_addr);
4076 find_best_refill_source(struct adapter *sc, struct sge_fl *fl, int maxp)
4078 int8_t zidx, hwidx, idx;
4079 uint16_t region1, region3;
4080 int spare, spare_needed, n;
4081 struct sw_zone_info *swz;
4082 struct hw_buf_info *hwb, *hwb_list = &sc->sge.hw_buf_info[0];
4085 * Buffer Packing: Look for PAGE_SIZE or larger zone which has a bufsize
4086 * large enough for the max payload and cluster metadata. Otherwise
4087 * settle for the largest bufsize that leaves enough room in the cluster
4090 * Without buffer packing: Look for the smallest zone which has a
4091 * bufsize large enough for the max payload. Settle for the largest
4092 * bufsize available if there's nothing big enough for max payload.
4094 spare_needed = fl->flags & FL_BUF_PACKING ? CL_METADATA_SIZE : 0;
4095 swz = &sc->sge.sw_zone_info[0];
4097 for (zidx = 0; zidx < SW_ZONE_SIZES; zidx++, swz++) {
4098 if (swz->size > largest_rx_cluster) {
4099 if (__predict_true(hwidx != -1))
4103 * This is a misconfiguration. largest_rx_cluster is
4104 * preventing us from finding a refill source. See
4105 * dev.t5nex.<n>.buffer_sizes to figure out why.
4107 device_printf(sc->dev, "largest_rx_cluster=%u leaves no"
4108 " refill source for fl %p (dma %u). Ignored.\n",
4109 largest_rx_cluster, fl, maxp);
4111 for (idx = swz->head_hwidx; idx != -1; idx = hwb->next) {
4112 hwb = &hwb_list[idx];
4113 spare = swz->size - hwb->size;
4114 if (spare < spare_needed)
4117 hwidx = idx; /* best option so far */
4118 if (hwb->size >= maxp) {
4120 if ((fl->flags & FL_BUF_PACKING) == 0)
4121 goto done; /* stop looking (not packing) */
4123 if (swz->size >= safest_rx_cluster)
4124 goto done; /* stop looking (packing) */
4126 break; /* keep looking, next zone */
4130 /* A usable hwidx has been located. */
4132 hwb = &hwb_list[hwidx];
4134 swz = &sc->sge.sw_zone_info[zidx];
4136 region3 = swz->size - hwb->size;
4139 * Stay within this zone and see if there is a better match when mbuf
4140 * inlining is allowed. Remember that the hwidx's are sorted in
4141 * decreasing order of size (so in increasing order of spare area).
4143 for (idx = hwidx; idx != -1; idx = hwb->next) {
4144 hwb = &hwb_list[idx];
4145 spare = swz->size - hwb->size;
4147 if (allow_mbufs_in_cluster == 0 || hwb->size < maxp)
4149 if (spare < CL_METADATA_SIZE + MSIZE)
4151 n = (spare - CL_METADATA_SIZE) / MSIZE;
4152 if (n > howmany(hwb->size, maxp))
4156 if (fl->flags & FL_BUF_PACKING) {
4157 region1 = n * MSIZE;
4158 region3 = spare - region1;
4161 region3 = spare - region1;
4166 KASSERT(zidx >= 0 && zidx < SW_ZONE_SIZES,
4167 ("%s: bad zone %d for fl %p, maxp %d", __func__, zidx, fl, maxp));
4168 KASSERT(hwidx >= 0 && hwidx <= SGE_FLBUF_SIZES,
4169 ("%s: bad hwidx %d for fl %p, maxp %d", __func__, hwidx, fl, maxp));
4170 KASSERT(region1 + sc->sge.hw_buf_info[hwidx].size + region3 ==
4171 sc->sge.sw_zone_info[zidx].size,
4172 ("%s: bad buffer layout for fl %p, maxp %d. "
4173 "cl %d; r1 %d, payload %d, r3 %d", __func__, fl, maxp,
4174 sc->sge.sw_zone_info[zidx].size, region1,
4175 sc->sge.hw_buf_info[hwidx].size, region3));
4176 if (fl->flags & FL_BUF_PACKING || region1 > 0) {
4177 KASSERT(region3 >= CL_METADATA_SIZE,
4178 ("%s: no room for metadata. fl %p, maxp %d; "
4179 "cl %d; r1 %d, payload %d, r3 %d", __func__, fl, maxp,
4180 sc->sge.sw_zone_info[zidx].size, region1,
4181 sc->sge.hw_buf_info[hwidx].size, region3));
4182 KASSERT(region1 % MSIZE == 0,
4183 ("%s: bad mbuf region for fl %p, maxp %d. "
4184 "cl %d; r1 %d, payload %d, r3 %d", __func__, fl, maxp,
4185 sc->sge.sw_zone_info[zidx].size, region1,
4186 sc->sge.hw_buf_info[hwidx].size, region3));
4189 fl->cll_def.zidx = zidx;
4190 fl->cll_def.hwidx = hwidx;
4191 fl->cll_def.region1 = region1;
4192 fl->cll_def.region3 = region3;
4196 find_safe_refill_source(struct adapter *sc, struct sge_fl *fl)
4198 struct sge *s = &sc->sge;
4199 struct hw_buf_info *hwb;
4200 struct sw_zone_info *swz;
4204 if (fl->flags & FL_BUF_PACKING)
4205 hwidx = s->safe_hwidx2; /* with room for metadata */
4206 else if (allow_mbufs_in_cluster && s->safe_hwidx2 != -1) {
4207 hwidx = s->safe_hwidx2;
4208 hwb = &s->hw_buf_info[hwidx];
4209 swz = &s->sw_zone_info[hwb->zidx];
4210 spare = swz->size - hwb->size;
4212 /* no good if there isn't room for an mbuf as well */
4213 if (spare < CL_METADATA_SIZE + MSIZE)
4214 hwidx = s->safe_hwidx1;
4216 hwidx = s->safe_hwidx1;
4219 /* No fallback source */
4220 fl->cll_alt.hwidx = -1;
4221 fl->cll_alt.zidx = -1;
4226 hwb = &s->hw_buf_info[hwidx];
4227 swz = &s->sw_zone_info[hwb->zidx];
4228 spare = swz->size - hwb->size;
4229 fl->cll_alt.hwidx = hwidx;
4230 fl->cll_alt.zidx = hwb->zidx;
4231 if (allow_mbufs_in_cluster)
4232 fl->cll_alt.region1 = ((spare - CL_METADATA_SIZE) / MSIZE) * MSIZE;
4234 fl->cll_alt.region1 = 0;
4235 fl->cll_alt.region3 = spare - fl->cll_alt.region1;
4239 add_fl_to_sfl(struct adapter *sc, struct sge_fl *fl)
4241 mtx_lock(&sc->sfl_lock);
4243 if ((fl->flags & FL_DOOMED) == 0) {
4244 fl->flags |= FL_STARVING;
4245 TAILQ_INSERT_TAIL(&sc->sfl, fl, link);
4246 callout_reset(&sc->sfl_callout, hz / 5, refill_sfl, sc);
4249 mtx_unlock(&sc->sfl_lock);
4253 handle_sge_egr_update(struct sge_iq *iq, const struct rss_header *rss,
4256 const struct cpl_sge_egr_update *cpl = (const void *)(rss + 1);
4257 unsigned int qid = G_EGR_QID(ntohl(cpl->opcode_qid));
4258 struct adapter *sc = iq->adapter;
4259 struct sge *s = &sc->sge;
4262 KASSERT(m == NULL, ("%s: payload with opcode %02x", __func__,
4265 eq = s->eqmap[qid - s->eq_start];
4267 KASSERT(eq->flags & EQ_CRFLUSHED,
4268 ("%s: unsolicited egress update", __func__));
4269 eq->flags &= ~EQ_CRFLUSHED;
4272 if (__predict_false(eq->flags & EQ_DOOMED))
4274 else if (eq->flags & EQ_STALLED && can_resume_tx(eq))
4275 taskqueue_enqueue(sc->tq[eq->tx_chan], &eq->tx_task);
4281 /* handle_fw_msg works for both fw4_msg and fw6_msg because this is valid */
4282 CTASSERT(offsetof(struct cpl_fw4_msg, data) == \
4283 offsetof(struct cpl_fw6_msg, data));
4286 handle_fw_msg(struct sge_iq *iq, const struct rss_header *rss, struct mbuf *m)
4288 struct adapter *sc = iq->adapter;
4289 const struct cpl_fw6_msg *cpl = (const void *)(rss + 1);
4291 KASSERT(m == NULL, ("%s: payload with opcode %02x", __func__,
4294 if (cpl->type == FW_TYPE_RSSCPL || cpl->type == FW6_TYPE_RSSCPL) {
4295 const struct rss_header *rss2;
4297 rss2 = (const struct rss_header *)&cpl->data[0];
4298 return (sc->cpl_handler[rss2->opcode](iq, rss2, m));
4301 return (sc->fw_msg_handler[cpl->type](sc, &cpl->data[0]));
4305 sysctl_uint16(SYSCTL_HANDLER_ARGS)
4307 uint16_t *id = arg1;
4310 return sysctl_handle_int(oidp, &i, 0, req);
4314 sysctl_bufsizes(SYSCTL_HANDLER_ARGS)
4316 struct sge *s = arg1;
4317 struct hw_buf_info *hwb = &s->hw_buf_info[0];
4318 struct sw_zone_info *swz = &s->sw_zone_info[0];
4323 sbuf_new(&sb, NULL, 32, SBUF_AUTOEXTEND);
4324 for (i = 0; i < SGE_FLBUF_SIZES; i++, hwb++) {
4325 if (hwb->zidx >= 0 && swz[hwb->zidx].size <= largest_rx_cluster)
4330 sbuf_printf(&sb, "%u%c ", hwb->size, c);
4334 rc = sysctl_handle_string(oidp, sbuf_data(&sb), sbuf_len(&sb), req);