2 * Copyright (c) 2011 Chelsio Communications, Inc.
4 * Written by: Navdeep Parhar <np@FreeBSD.org>
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28 #include <sys/cdefs.h>
29 __FBSDID("$FreeBSD$");
32 #include "opt_inet6.h"
34 #include <sys/types.h>
36 #include <sys/socket.h>
37 #include <sys/kernel.h>
39 #include <sys/malloc.h>
40 #include <sys/queue.h>
42 #include <sys/taskqueue.h>
43 #include <sys/sysctl.h>
46 #include <net/ethernet.h>
48 #include <net/if_vlan_var.h>
49 #include <netinet/in.h>
50 #include <netinet/ip.h>
51 #include <netinet/ip6.h>
52 #include <netinet/tcp.h>
53 #include <machine/md_var.h>
57 #include "common/common.h"
58 #include "common/t4_regs.h"
59 #include "common/t4_regs_values.h"
60 #include "common/t4_msg.h"
62 #ifdef T4_PKT_TIMESTAMP
63 #define RX_COPY_THRESHOLD (MINCLSIZE - 8)
65 #define RX_COPY_THRESHOLD MINCLSIZE
69 * Ethernet frames are DMA'd at this byte offset into the freelist buffer.
70 * 0-7 are valid values.
72 static int fl_pktshift = 2;
73 TUNABLE_INT("hw.cxgbe.fl_pktshift", &fl_pktshift);
76 * Pad ethernet payload up to this boundary.
77 * -1: driver should figure out a good value.
79 * Any power of 2 from 32 to 4096 (both inclusive) is also a valid value.
81 static int fl_pad = -1;
82 TUNABLE_INT("hw.cxgbe.fl_pad", &fl_pad);
86 * -1: driver should figure out a good value.
87 * 64 or 128 are the only other valid values.
89 static int spg_len = -1;
90 TUNABLE_INT("hw.cxgbe.spg_len", &spg_len);
94 * -1: no congestion feedback (not recommended).
95 * 0: backpressure the channel instead of dropping packets right away.
96 * 1: no backpressure, drop packets for the congested queue immediately.
98 static int cong_drop = 0;
99 TUNABLE_INT("hw.cxgbe.cong_drop", &cong_drop);
102 * Deliver multiple frames in the same free list buffer if they fit.
103 * -1: let the driver decide whether to enable buffer packing or not.
104 * 0: disable buffer packing.
105 * 1: enable buffer packing.
107 static int buffer_packing = -1;
108 TUNABLE_INT("hw.cxgbe.buffer_packing", &buffer_packing);
111 * Start next frame in a packed buffer at this boundary.
112 * -1: driver should figure out a good value.
116 * value specified here will be overridden by fl_pad.
118 * power of 2 from 32 to 4096 (both inclusive) is a valid value here.
121 * 16, or a power of 2 from 64 to 4096 (both inclusive) is a valid value.
123 static int fl_pack = -1;
124 static int t4_fl_pack;
125 static int t5_fl_pack;
126 TUNABLE_INT("hw.cxgbe.fl_pack", &fl_pack);
129 * Allow the driver to create mbuf(s) in a cluster allocated for rx.
130 * 0: never; always allocate mbufs from the zone_mbuf UMA zone.
131 * 1: ok to create mbuf(s) within a cluster if there is room.
133 static int allow_mbufs_in_cluster = 1;
134 TUNABLE_INT("hw.cxgbe.allow_mbufs_in_cluster", &allow_mbufs_in_cluster);
137 * Largest rx cluster size that the driver is allowed to allocate.
139 static int largest_rx_cluster = MJUM16BYTES;
140 TUNABLE_INT("hw.cxgbe.largest_rx_cluster", &largest_rx_cluster);
143 * Size of cluster allocation that's most likely to succeed. The driver will
144 * fall back to this size if it fails to allocate clusters larger than this.
146 static int safest_rx_cluster = PAGE_SIZE;
147 TUNABLE_INT("hw.cxgbe.safest_rx_cluster", &safest_rx_cluster);
149 /* Used to track coalesced tx work request */
151 uint64_t *flitp; /* ptr to flit where next pkt should start */
152 uint8_t npkt; /* # of packets in this work request */
153 uint8_t nflits; /* # of flits used by this work request */
154 uint16_t plen; /* total payload (sum of all packets) */
157 /* A packet's SGL. This + m_pkthdr has all info needed for tx */
159 int nsegs; /* # of segments in the SGL, 0 means imm. tx */
160 int nflits; /* # of flits needed for the SGL */
161 bus_dma_segment_t seg[TX_SGL_SEGS];
164 static int service_iq(struct sge_iq *, int);
165 static struct mbuf *get_fl_payload(struct adapter *, struct sge_fl *, uint32_t,
167 static int t4_eth_rx(struct sge_iq *, const struct rss_header *, struct mbuf *);
168 static inline void init_iq(struct sge_iq *, struct adapter *, int, int, int,
170 static inline void init_fl(struct adapter *, struct sge_fl *, int, int, int,
172 static inline void init_eq(struct sge_eq *, int, int, uint8_t, uint16_t,
174 static int alloc_ring(struct adapter *, size_t, bus_dma_tag_t *, bus_dmamap_t *,
175 bus_addr_t *, void **);
176 static int free_ring(struct adapter *, bus_dma_tag_t, bus_dmamap_t, bus_addr_t,
178 static int alloc_iq_fl(struct port_info *, struct sge_iq *, struct sge_fl *,
180 static int free_iq_fl(struct port_info *, struct sge_iq *, struct sge_fl *);
181 static void add_fl_sysctls(struct sysctl_ctx_list *, struct sysctl_oid *,
183 static int alloc_fwq(struct adapter *);
184 static int free_fwq(struct adapter *);
185 static int alloc_mgmtq(struct adapter *);
186 static int free_mgmtq(struct adapter *);
187 static int alloc_rxq(struct port_info *, struct sge_rxq *, int, int,
188 struct sysctl_oid *);
189 static int free_rxq(struct port_info *, struct sge_rxq *);
191 static int alloc_ofld_rxq(struct port_info *, struct sge_ofld_rxq *, int, int,
192 struct sysctl_oid *);
193 static int free_ofld_rxq(struct port_info *, struct sge_ofld_rxq *);
195 static int ctrl_eq_alloc(struct adapter *, struct sge_eq *);
196 static int eth_eq_alloc(struct adapter *, struct port_info *, struct sge_eq *);
198 static int ofld_eq_alloc(struct adapter *, struct port_info *, struct sge_eq *);
200 static int alloc_eq(struct adapter *, struct port_info *, struct sge_eq *);
201 static int free_eq(struct adapter *, struct sge_eq *);
202 static int alloc_wrq(struct adapter *, struct port_info *, struct sge_wrq *,
203 struct sysctl_oid *);
204 static int free_wrq(struct adapter *, struct sge_wrq *);
205 static int alloc_txq(struct port_info *, struct sge_txq *, int,
206 struct sysctl_oid *);
207 static int free_txq(struct port_info *, struct sge_txq *);
208 static void oneseg_dma_callback(void *, bus_dma_segment_t *, int, int);
209 static inline bool is_new_response(const struct sge_iq *, struct rsp_ctrl **);
210 static inline void iq_next(struct sge_iq *);
211 static inline void ring_fl_db(struct adapter *, struct sge_fl *);
212 static int refill_fl(struct adapter *, struct sge_fl *, int);
213 static void refill_sfl(void *);
214 static int alloc_fl_sdesc(struct sge_fl *);
215 static void free_fl_sdesc(struct adapter *, struct sge_fl *);
216 static void find_best_refill_source(struct adapter *, struct sge_fl *, int);
217 static void find_safe_refill_source(struct adapter *, struct sge_fl *);
218 static void add_fl_to_sfl(struct adapter *, struct sge_fl *);
220 static int get_pkt_sgl(struct sge_txq *, struct mbuf **, struct sgl *, int);
221 static int free_pkt_sgl(struct sge_txq *, struct sgl *);
222 static int write_txpkt_wr(struct port_info *, struct sge_txq *, struct mbuf *,
224 static int add_to_txpkts(struct port_info *, struct sge_txq *, struct txpkts *,
225 struct mbuf *, struct sgl *);
226 static void write_txpkts_wr(struct sge_txq *, struct txpkts *);
227 static inline void write_ulp_cpl_sgl(struct port_info *, struct sge_txq *,
228 struct txpkts *, struct mbuf *, struct sgl *);
229 static int write_sgl_to_txd(struct sge_eq *, struct sgl *, caddr_t *);
230 static inline void copy_to_txd(struct sge_eq *, caddr_t, caddr_t *, int);
231 static inline void ring_eq_db(struct adapter *, struct sge_eq *);
232 static inline int reclaimable(struct sge_eq *);
233 static int reclaim_tx_descs(struct sge_txq *, int, int);
234 static void write_eqflush_wr(struct sge_eq *);
235 static __be64 get_flit(bus_dma_segment_t *, int, int);
236 static int handle_sge_egr_update(struct sge_iq *, const struct rss_header *,
238 static int handle_fw_msg(struct sge_iq *, const struct rss_header *,
241 static int sysctl_uint16(SYSCTL_HANDLER_ARGS);
242 static int sysctl_bufsizes(SYSCTL_HANDLER_ARGS);
245 * Called on MOD_LOAD. Validates and calculates the SGE tunables.
252 /* set pad to a reasonable powerof2 between 16 and 4096 (inclusive) */
253 #if defined(__i386__) || defined(__amd64__)
254 pad = max(cpu_clflush_line_size, 16);
256 pad = max(CACHE_LINE_SIZE, 16);
258 pad = min(pad, 4096);
260 if (fl_pktshift < 0 || fl_pktshift > 7) {
261 printf("Invalid hw.cxgbe.fl_pktshift value (%d),"
262 " using 2 instead.\n", fl_pktshift);
267 (fl_pad < 32 || fl_pad > 4096 || !powerof2(fl_pad))) {
270 printf("Invalid hw.cxgbe.fl_pad value (%d),"
271 " using %d instead.\n", fl_pad, max(pad, 32));
273 fl_pad = max(pad, 32);
277 * T4 has the same pad and pack boundary. If a pad boundary is set,
278 * pack boundary must be set to the same value. Otherwise take the
279 * specified value or auto-calculate something reasonable.
283 else if (fl_pack < 32 || fl_pack > 4096 || !powerof2(fl_pack))
284 t4_fl_pack = max(pad, 32);
286 t4_fl_pack = fl_pack;
288 /* T5's pack boundary is independent of the pad boundary. */
289 if (fl_pack < 16 || fl_pack == 32 || fl_pack > 4096 ||
291 t5_fl_pack = max(pad, CACHE_LINE_SIZE);
293 t5_fl_pack = fl_pack;
295 if (spg_len != 64 && spg_len != 128) {
298 #if defined(__i386__) || defined(__amd64__)
299 len = cpu_clflush_line_size > 64 ? 128 : 64;
304 printf("Invalid hw.cxgbe.spg_len value (%d),"
305 " using %d instead.\n", spg_len, len);
310 if (cong_drop < -1 || cong_drop > 1) {
311 printf("Invalid hw.cxgbe.cong_drop value (%d),"
312 " using 0 instead.\n", cong_drop);
318 t4_init_sge_cpl_handlers(struct adapter *sc)
321 t4_register_cpl_handler(sc, CPL_FW4_MSG, handle_fw_msg);
322 t4_register_cpl_handler(sc, CPL_FW6_MSG, handle_fw_msg);
323 t4_register_cpl_handler(sc, CPL_SGE_EGR_UPDATE, handle_sge_egr_update);
324 t4_register_cpl_handler(sc, CPL_RX_PKT, t4_eth_rx);
326 t4_register_fw_msg_handler(sc, FW6_TYPE_CMD_RPL, t4_handle_fw_rpl);
330 * adap->params.vpd.cclk must be set up before this is called.
333 t4_tweak_chip_settings(struct adapter *sc)
337 int intr_timer[SGE_NTIMERS] = {1, 5, 10, 50, 100, 200};
338 int timer_max = M_TIMERVALUE0 * 1000 / sc->params.vpd.cclk;
339 int intr_pktcount[SGE_NCOUNTERS] = {1, 8, 16, 32}; /* 63 max */
340 uint16_t indsz = min(RX_COPY_THRESHOLD - 1, M_INDICATESIZE);
341 static int sge_flbuf_sizes[] = {
343 #if MJUMPAGESIZE != MCLBYTES
345 MJUMPAGESIZE - CL_METADATA_SIZE,
346 MJUMPAGESIZE - 2 * MSIZE - CL_METADATA_SIZE,
350 MCLBYTES - MSIZE - CL_METADATA_SIZE,
351 MJUM9BYTES - CL_METADATA_SIZE,
352 MJUM16BYTES - CL_METADATA_SIZE,
355 KASSERT(sc->flags & MASTER_PF,
356 ("%s: trying to change chip settings when not master.", __func__));
358 m = V_PKTSHIFT(M_PKTSHIFT) | F_RXPKTCPLMODE | F_EGRSTATUSPAGESIZE;
359 v = V_PKTSHIFT(fl_pktshift) | F_RXPKTCPLMODE |
360 V_EGRSTATUSPAGESIZE(spg_len == 128);
361 if (is_t4(sc) && (fl_pad || buffer_packing)) {
362 /* t4_fl_pack has the correct value even when fl_pad = 0 */
363 m |= V_INGPADBOUNDARY(M_INGPADBOUNDARY);
364 v |= V_INGPADBOUNDARY(ilog2(t4_fl_pack) - 5);
365 } else if (is_t5(sc) && fl_pad) {
366 m |= V_INGPADBOUNDARY(M_INGPADBOUNDARY);
367 v |= V_INGPADBOUNDARY(ilog2(fl_pad) - 5);
369 t4_set_reg_field(sc, A_SGE_CONTROL, m, v);
371 if (is_t5(sc) && buffer_packing) {
372 m = V_INGPACKBOUNDARY(M_INGPACKBOUNDARY);
373 if (t5_fl_pack == 16)
374 v = V_INGPACKBOUNDARY(0);
376 v = V_INGPACKBOUNDARY(ilog2(t5_fl_pack) - 5);
377 t4_set_reg_field(sc, A_SGE_CONTROL2, m, v);
380 v = V_HOSTPAGESIZEPF0(PAGE_SHIFT - 10) |
381 V_HOSTPAGESIZEPF1(PAGE_SHIFT - 10) |
382 V_HOSTPAGESIZEPF2(PAGE_SHIFT - 10) |
383 V_HOSTPAGESIZEPF3(PAGE_SHIFT - 10) |
384 V_HOSTPAGESIZEPF4(PAGE_SHIFT - 10) |
385 V_HOSTPAGESIZEPF5(PAGE_SHIFT - 10) |
386 V_HOSTPAGESIZEPF6(PAGE_SHIFT - 10) |
387 V_HOSTPAGESIZEPF7(PAGE_SHIFT - 10);
388 t4_write_reg(sc, A_SGE_HOST_PAGE_SIZE, v);
390 KASSERT(nitems(sge_flbuf_sizes) <= SGE_FLBUF_SIZES,
391 ("%s: hw buffer size table too big", __func__));
392 for (i = 0; i < min(nitems(sge_flbuf_sizes), SGE_FLBUF_SIZES); i++) {
393 t4_write_reg(sc, A_SGE_FL_BUFFER_SIZE0 + (4 * i),
397 v = V_THRESHOLD_0(intr_pktcount[0]) | V_THRESHOLD_1(intr_pktcount[1]) |
398 V_THRESHOLD_2(intr_pktcount[2]) | V_THRESHOLD_3(intr_pktcount[3]);
399 t4_write_reg(sc, A_SGE_INGRESS_RX_THRESHOLD, v);
401 KASSERT(intr_timer[0] <= timer_max,
402 ("%s: not a single usable timer (%d, %d)", __func__, intr_timer[0],
404 for (i = 1; i < nitems(intr_timer); i++) {
405 KASSERT(intr_timer[i] >= intr_timer[i - 1],
406 ("%s: timers not listed in increasing order (%d)",
409 while (intr_timer[i] > timer_max) {
410 if (i == nitems(intr_timer) - 1) {
411 intr_timer[i] = timer_max;
414 intr_timer[i] += intr_timer[i - 1];
419 v = V_TIMERVALUE0(us_to_core_ticks(sc, intr_timer[0])) |
420 V_TIMERVALUE1(us_to_core_ticks(sc, intr_timer[1]));
421 t4_write_reg(sc, A_SGE_TIMER_VALUE_0_AND_1, v);
422 v = V_TIMERVALUE2(us_to_core_ticks(sc, intr_timer[2])) |
423 V_TIMERVALUE3(us_to_core_ticks(sc, intr_timer[3]));
424 t4_write_reg(sc, A_SGE_TIMER_VALUE_2_AND_3, v);
425 v = V_TIMERVALUE4(us_to_core_ticks(sc, intr_timer[4])) |
426 V_TIMERVALUE5(us_to_core_ticks(sc, intr_timer[5]));
427 t4_write_reg(sc, A_SGE_TIMER_VALUE_4_AND_5, v);
429 if (cong_drop == 0) {
430 m = F_TUNNELCNGDROP0 | F_TUNNELCNGDROP1 | F_TUNNELCNGDROP2 |
432 t4_set_reg_field(sc, A_TP_PARA_REG3, m, 0);
435 /* 4K, 16K, 64K, 256K DDP "page sizes" */
436 v = V_HPZ0(0) | V_HPZ1(2) | V_HPZ2(4) | V_HPZ3(6);
437 t4_write_reg(sc, A_ULP_RX_TDDP_PSZ, v);
439 m = v = F_TDDPTAGTCB;
440 t4_set_reg_field(sc, A_ULP_RX_CTL, m, v);
442 m = V_INDICATESIZE(M_INDICATESIZE) | F_REARMDDPOFFSET |
444 v = V_INDICATESIZE(indsz) | F_REARMDDPOFFSET | F_RESETDDPOFFSET;
445 t4_set_reg_field(sc, A_TP_PARA_REG5, m, v);
449 * SGE wants the buffer to be at least 64B and then a multiple of the pad
450 * boundary or 16, whichever is greater.
455 int mask = max(fl_pad, 16) - 1;
457 return (hwsz >= 64 && (hwsz & mask) == 0);
461 * XXX: driver really should be able to deal with unexpected settings.
464 t4_read_chip_settings(struct adapter *sc)
466 struct sge *s = &sc->sge;
469 uint16_t indsz = min(RX_COPY_THRESHOLD - 1, M_INDICATESIZE);
470 static int sw_buf_sizes[] = { /* Sorted by size */
472 #if MJUMPAGESIZE != MCLBYTES
478 struct sw_zone_info *swz, *safe_swz;
479 struct hw_buf_info *hwb;
481 m = V_PKTSHIFT(M_PKTSHIFT) | F_RXPKTCPLMODE | F_EGRSTATUSPAGESIZE;
482 v = V_PKTSHIFT(fl_pktshift) | F_RXPKTCPLMODE |
483 V_EGRSTATUSPAGESIZE(spg_len == 128);
484 if (is_t4(sc) && (fl_pad || buffer_packing)) {
485 m |= V_INGPADBOUNDARY(M_INGPADBOUNDARY);
486 v |= V_INGPADBOUNDARY(ilog2(t4_fl_pack) - 5);
487 } else if (is_t5(sc) && fl_pad) {
488 m |= V_INGPADBOUNDARY(M_INGPADBOUNDARY);
489 v |= V_INGPADBOUNDARY(ilog2(fl_pad) - 5);
491 r = t4_read_reg(sc, A_SGE_CONTROL);
493 device_printf(sc->dev, "invalid SGE_CONTROL(0x%x)\n", r);
497 if (is_t5(sc) && buffer_packing) {
498 m = V_INGPACKBOUNDARY(M_INGPACKBOUNDARY);
499 if (t5_fl_pack == 16)
500 v = V_INGPACKBOUNDARY(0);
502 v = V_INGPACKBOUNDARY(ilog2(t5_fl_pack) - 5);
503 r = t4_read_reg(sc, A_SGE_CONTROL2);
505 device_printf(sc->dev,
506 "invalid SGE_CONTROL2(0x%x)\n", r);
510 s->pack_boundary = is_t4(sc) ? t4_fl_pack : t5_fl_pack;
512 v = V_HOSTPAGESIZEPF0(PAGE_SHIFT - 10) |
513 V_HOSTPAGESIZEPF1(PAGE_SHIFT - 10) |
514 V_HOSTPAGESIZEPF2(PAGE_SHIFT - 10) |
515 V_HOSTPAGESIZEPF3(PAGE_SHIFT - 10) |
516 V_HOSTPAGESIZEPF4(PAGE_SHIFT - 10) |
517 V_HOSTPAGESIZEPF5(PAGE_SHIFT - 10) |
518 V_HOSTPAGESIZEPF6(PAGE_SHIFT - 10) |
519 V_HOSTPAGESIZEPF7(PAGE_SHIFT - 10);
520 r = t4_read_reg(sc, A_SGE_HOST_PAGE_SIZE);
522 device_printf(sc->dev, "invalid SGE_HOST_PAGE_SIZE(0x%x)\n", r);
526 /* Filter out unusable hw buffer sizes entirely (mark with -2). */
527 hwb = &s->hw_buf_info[0];
528 for (i = 0; i < nitems(s->hw_buf_info); i++, hwb++) {
529 r = t4_read_reg(sc, A_SGE_FL_BUFFER_SIZE0 + (4 * i));
531 hwb->zidx = hwsz_ok(r) ? -1 : -2;
536 * Create a sorted list in decreasing order of hw buffer sizes (and so
537 * increasing order of spare area) for each software zone.
539 n = 0; /* no usable buffer size to begin with */
540 swz = &s->sw_zone_info[0];
542 for (i = 0; i < SW_ZONE_SIZES; i++, swz++) {
543 int8_t head = -1, tail = -1;
545 swz->size = sw_buf_sizes[i];
546 swz->zone = m_getzone(swz->size);
547 swz->type = m_gettype(swz->size);
549 if (swz->size == safest_rx_cluster)
552 hwb = &s->hw_buf_info[0];
553 for (j = 0; j < SGE_FLBUF_SIZES; j++, hwb++) {
554 if (hwb->zidx != -1 || hwb->size > swz->size)
559 else if (hwb->size < s->hw_buf_info[tail].size) {
560 s->hw_buf_info[tail].next = j;
564 struct hw_buf_info *t;
566 for (cur = &head; *cur != -1; cur = &t->next) {
567 t = &s->hw_buf_info[*cur];
568 if (hwb->size == t->size) {
572 if (hwb->size > t->size) {
580 swz->head_hwidx = head;
581 swz->tail_hwidx = tail;
585 if (swz->size - s->hw_buf_info[tail].size >=
587 sc->flags |= BUF_PACKING_OK;
591 device_printf(sc->dev, "no usable SGE FL buffer size.\n");
597 if (safe_swz != NULL) {
598 s->safe_hwidx1 = safe_swz->head_hwidx;
599 for (i = safe_swz->head_hwidx; i != -1; i = hwb->next) {
602 hwb = &s->hw_buf_info[i];
603 spare = safe_swz->size - hwb->size;
604 if (spare < CL_METADATA_SIZE)
606 if (s->safe_hwidx2 == -1 ||
607 spare == CL_METADATA_SIZE + MSIZE)
609 if (spare >= CL_METADATA_SIZE + MSIZE)
614 r = t4_read_reg(sc, A_SGE_INGRESS_RX_THRESHOLD);
615 s->counter_val[0] = G_THRESHOLD_0(r);
616 s->counter_val[1] = G_THRESHOLD_1(r);
617 s->counter_val[2] = G_THRESHOLD_2(r);
618 s->counter_val[3] = G_THRESHOLD_3(r);
620 r = t4_read_reg(sc, A_SGE_TIMER_VALUE_0_AND_1);
621 s->timer_val[0] = G_TIMERVALUE0(r) / core_ticks_per_usec(sc);
622 s->timer_val[1] = G_TIMERVALUE1(r) / core_ticks_per_usec(sc);
623 r = t4_read_reg(sc, A_SGE_TIMER_VALUE_2_AND_3);
624 s->timer_val[2] = G_TIMERVALUE2(r) / core_ticks_per_usec(sc);
625 s->timer_val[3] = G_TIMERVALUE3(r) / core_ticks_per_usec(sc);
626 r = t4_read_reg(sc, A_SGE_TIMER_VALUE_4_AND_5);
627 s->timer_val[4] = G_TIMERVALUE4(r) / core_ticks_per_usec(sc);
628 s->timer_val[5] = G_TIMERVALUE5(r) / core_ticks_per_usec(sc);
630 if (cong_drop == 0) {
631 m = F_TUNNELCNGDROP0 | F_TUNNELCNGDROP1 | F_TUNNELCNGDROP2 |
633 r = t4_read_reg(sc, A_TP_PARA_REG3);
635 device_printf(sc->dev,
636 "invalid TP_PARA_REG3(0x%x)\n", r);
641 v = V_HPZ0(0) | V_HPZ1(2) | V_HPZ2(4) | V_HPZ3(6);
642 r = t4_read_reg(sc, A_ULP_RX_TDDP_PSZ);
644 device_printf(sc->dev, "invalid ULP_RX_TDDP_PSZ(0x%x)\n", r);
648 m = v = F_TDDPTAGTCB;
649 r = t4_read_reg(sc, A_ULP_RX_CTL);
651 device_printf(sc->dev, "invalid ULP_RX_CTL(0x%x)\n", r);
655 m = V_INDICATESIZE(M_INDICATESIZE) | F_REARMDDPOFFSET |
657 v = V_INDICATESIZE(indsz) | F_REARMDDPOFFSET | F_RESETDDPOFFSET;
658 r = t4_read_reg(sc, A_TP_PARA_REG5);
660 device_printf(sc->dev, "invalid TP_PARA_REG5(0x%x)\n", r);
664 r = t4_read_reg(sc, A_SGE_CONM_CTRL);
665 s->fl_starve_threshold = G_EGRTHRESHOLD(r) * 2 + 1;
667 s->fl_starve_threshold2 = s->fl_starve_threshold;
669 s->fl_starve_threshold2 = G_EGRTHRESHOLDPACKING(r) * 2 + 1;
671 /* egress queues: log2 of # of doorbells per BAR2 page */
672 r = t4_read_reg(sc, A_SGE_EGRESS_QUEUES_PER_PAGE_PF);
673 r >>= S_QUEUESPERPAGEPF0 +
674 (S_QUEUESPERPAGEPF1 - S_QUEUESPERPAGEPF0) * sc->pf;
675 s->eq_s_qpp = r & M_QUEUESPERPAGEPF0;
677 /* ingress queues: log2 of # of doorbells per BAR2 page */
678 r = t4_read_reg(sc, A_SGE_INGRESS_QUEUES_PER_PAGE_PF);
679 r >>= S_QUEUESPERPAGEPF0 +
680 (S_QUEUESPERPAGEPF1 - S_QUEUESPERPAGEPF0) * sc->pf;
681 s->iq_s_qpp = r & M_QUEUESPERPAGEPF0;
683 t4_init_tp_params(sc);
685 t4_read_mtu_tbl(sc, sc->params.mtus, NULL);
686 t4_load_mtus(sc, sc->params.mtus, sc->params.a_wnd, sc->params.b_wnd);
692 t4_create_dma_tag(struct adapter *sc)
696 rc = bus_dma_tag_create(bus_get_dma_tag(sc->dev), 1, 0,
697 BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR, NULL, NULL, BUS_SPACE_MAXSIZE,
698 BUS_SPACE_UNRESTRICTED, BUS_SPACE_MAXSIZE, BUS_DMA_ALLOCNOW, NULL,
701 device_printf(sc->dev,
702 "failed to create main DMA tag: %d\n", rc);
709 enable_buffer_packing(struct adapter *sc)
712 if (sc->flags & BUF_PACKING_OK &&
713 ((is_t5(sc) && buffer_packing) || /* 1 or -1 both ok for T5 */
714 (is_t4(sc) && buffer_packing == 1)))
720 t4_sge_sysctls(struct adapter *sc, struct sysctl_ctx_list *ctx,
721 struct sysctl_oid_list *children)
724 SYSCTL_ADD_PROC(ctx, children, OID_AUTO, "buffer_sizes",
725 CTLTYPE_STRING | CTLFLAG_RD, &sc->sge, 0, sysctl_bufsizes, "A",
726 "freelist buffer sizes");
728 SYSCTL_ADD_INT(ctx, children, OID_AUTO, "fl_pktshift", CTLFLAG_RD,
729 NULL, fl_pktshift, "payload DMA offset in rx buffer (bytes)");
731 SYSCTL_ADD_INT(ctx, children, OID_AUTO, "fl_pad", CTLFLAG_RD,
732 NULL, fl_pad, "payload pad boundary (bytes)");
734 SYSCTL_ADD_INT(ctx, children, OID_AUTO, "spg_len", CTLFLAG_RD,
735 NULL, spg_len, "status page size (bytes)");
737 SYSCTL_ADD_INT(ctx, children, OID_AUTO, "cong_drop", CTLFLAG_RD,
738 NULL, cong_drop, "congestion drop setting");
740 SYSCTL_ADD_INT(ctx, children, OID_AUTO, "buffer_packing", CTLFLAG_RD,
741 NULL, enable_buffer_packing(sc),
742 "pack multiple frames in one fl buffer");
744 SYSCTL_ADD_INT(ctx, children, OID_AUTO, "fl_pack", CTLFLAG_RD,
745 NULL, sc->sge.pack_boundary, "payload pack boundary (bytes)");
749 t4_destroy_dma_tag(struct adapter *sc)
752 bus_dma_tag_destroy(sc->dmat);
758 * Allocate and initialize the firmware event queue and the management queue.
760 * Returns errno on failure. Resources allocated up to that point may still be
761 * allocated. Caller is responsible for cleanup in case this function fails.
764 t4_setup_adapter_queues(struct adapter *sc)
768 ADAPTER_LOCK_ASSERT_NOTOWNED(sc);
770 sysctl_ctx_init(&sc->ctx);
771 sc->flags |= ADAP_SYSCTL_CTX;
774 * Firmware event queue
781 * Management queue. This is just a control queue that uses the fwq as
784 rc = alloc_mgmtq(sc);
793 t4_teardown_adapter_queues(struct adapter *sc)
796 ADAPTER_LOCK_ASSERT_NOTOWNED(sc);
798 /* Do this before freeing the queue */
799 if (sc->flags & ADAP_SYSCTL_CTX) {
800 sysctl_ctx_free(&sc->ctx);
801 sc->flags &= ~ADAP_SYSCTL_CTX;
811 first_vector(struct port_info *pi)
813 struct adapter *sc = pi->adapter;
814 int rc = T4_EXTRA_INTR, i;
816 if (sc->intr_count == 1)
819 for_each_port(sc, i) {
820 struct port_info *p = sc->port[i];
822 if (i == pi->port_id)
826 if (sc->flags & INTR_DIRECT)
827 rc += p->nrxq + p->nofldrxq;
829 rc += max(p->nrxq, p->nofldrxq);
832 * Not compiled with offload support and intr_count > 1. Only
833 * NIC queues exist and they'd better be taking direct
836 KASSERT(sc->flags & INTR_DIRECT,
837 ("%s: intr_count %d, !INTR_DIRECT", __func__,
848 * Given an arbitrary "index," come up with an iq that can be used by other
849 * queues (of this port) for interrupt forwarding, SGE egress updates, etc.
850 * The iq returned is guaranteed to be something that takes direct interrupts.
852 static struct sge_iq *
853 port_intr_iq(struct port_info *pi, int idx)
855 struct adapter *sc = pi->adapter;
856 struct sge *s = &sc->sge;
857 struct sge_iq *iq = NULL;
859 if (sc->intr_count == 1)
860 return (&sc->sge.fwq);
863 if (sc->flags & INTR_DIRECT) {
864 idx %= pi->nrxq + pi->nofldrxq;
866 if (idx >= pi->nrxq) {
868 iq = &s->ofld_rxq[pi->first_ofld_rxq + idx].iq;
870 iq = &s->rxq[pi->first_rxq + idx].iq;
873 idx %= max(pi->nrxq, pi->nofldrxq);
875 if (pi->nrxq >= pi->nofldrxq)
876 iq = &s->rxq[pi->first_rxq + idx].iq;
878 iq = &s->ofld_rxq[pi->first_ofld_rxq + idx].iq;
882 * Not compiled with offload support and intr_count > 1. Only NIC
883 * queues exist and they'd better be taking direct interrupts.
885 KASSERT(sc->flags & INTR_DIRECT,
886 ("%s: intr_count %d, !INTR_DIRECT", __func__, sc->intr_count));
889 iq = &s->rxq[pi->first_rxq + idx].iq;
892 KASSERT(iq->flags & IQ_INTR, ("%s: EDOOFUS", __func__));
896 /* Maximum payload that can be delivered with a single iq descriptor */
898 mtu_to_max_payload(struct adapter *sc, int mtu, const int toe)
904 payload = sc->tt.rx_coalesce ?
905 G_RXCOALESCESIZE(t4_read_reg(sc, A_TP_PARA_REG2)) : mtu;
908 /* large enough even when hw VLAN extraction is disabled */
909 payload = fl_pktshift + ETHER_HDR_LEN + ETHER_VLAN_ENCAP_LEN +
914 payload = roundup2(payload, fl_pad);
920 t4_setup_port_queues(struct port_info *pi)
922 int rc = 0, i, j, intr_idx, iqid;
925 struct sge_wrq *ctrlq;
927 struct sge_ofld_rxq *ofld_rxq;
928 struct sge_wrq *ofld_txq;
929 struct sysctl_oid *oid2 = NULL;
932 struct adapter *sc = pi->adapter;
933 struct ifnet *ifp = pi->ifp;
934 struct sysctl_oid *oid = device_get_sysctl_tree(pi->dev);
935 struct sysctl_oid_list *children = SYSCTL_CHILDREN(oid);
936 int maxp, pack, mtu = ifp->if_mtu;
938 oid = SYSCTL_ADD_NODE(&pi->ctx, children, OID_AUTO, "rxq", CTLFLAG_RD,
942 if (is_offload(sc)) {
943 oid2 = SYSCTL_ADD_NODE(&pi->ctx, children, OID_AUTO, "ofld_rxq",
945 "rx queues for offloaded TCP connections");
949 /* Interrupt vector to start from (when using multiple vectors) */
950 intr_idx = first_vector(pi);
953 * First pass over all rx queues (NIC and TOE):
954 * a) initialize iq and fl
955 * b) allocate queue iff it will take direct interrupts.
957 maxp = mtu_to_max_payload(sc, mtu, 0);
958 pack = enable_buffer_packing(sc);
959 for_each_rxq(pi, i, rxq) {
961 init_iq(&rxq->iq, sc, pi->tmr_idx, pi->pktc_idx, pi->qsize_rxq,
964 snprintf(name, sizeof(name), "%s rxq%d-fl",
965 device_get_nameunit(pi->dev), i);
966 init_fl(sc, &rxq->fl, pi->qsize_rxq / 8, maxp, pack, name);
968 if (sc->flags & INTR_DIRECT
970 || (sc->intr_count > 1 && pi->nrxq >= pi->nofldrxq)
973 rxq->iq.flags |= IQ_INTR;
974 rc = alloc_rxq(pi, rxq, intr_idx, i, oid);
982 maxp = mtu_to_max_payload(sc, mtu, 1);
983 for_each_ofld_rxq(pi, i, ofld_rxq) {
985 init_iq(&ofld_rxq->iq, sc, pi->tmr_idx, pi->pktc_idx,
986 pi->qsize_rxq, RX_IQ_ESIZE);
988 snprintf(name, sizeof(name), "%s ofld_rxq%d-fl",
989 device_get_nameunit(pi->dev), i);
990 init_fl(sc, &ofld_rxq->fl, pi->qsize_rxq / 8, maxp, pack, name);
992 if (sc->flags & INTR_DIRECT ||
993 (sc->intr_count > 1 && pi->nofldrxq > pi->nrxq)) {
994 ofld_rxq->iq.flags |= IQ_INTR;
995 rc = alloc_ofld_rxq(pi, ofld_rxq, intr_idx, i, oid2);
1004 * Second pass over all rx queues (NIC and TOE). The queues forwarding
1005 * their interrupts are allocated now.
1008 for_each_rxq(pi, i, rxq) {
1009 if (rxq->iq.flags & IQ_INTR)
1012 intr_idx = port_intr_iq(pi, j)->abs_id;
1014 rc = alloc_rxq(pi, rxq, intr_idx, i, oid);
1021 for_each_ofld_rxq(pi, i, ofld_rxq) {
1022 if (ofld_rxq->iq.flags & IQ_INTR)
1025 intr_idx = port_intr_iq(pi, j)->abs_id;
1027 rc = alloc_ofld_rxq(pi, ofld_rxq, intr_idx, i, oid2);
1035 * Now the tx queues. Only one pass needed.
1037 oid = SYSCTL_ADD_NODE(&pi->ctx, children, OID_AUTO, "txq", CTLFLAG_RD,
1040 for_each_txq(pi, i, txq) {
1043 iqid = port_intr_iq(pi, j)->cntxt_id;
1045 snprintf(name, sizeof(name), "%s txq%d",
1046 device_get_nameunit(pi->dev), i);
1047 init_eq(&txq->eq, EQ_ETH, pi->qsize_txq, pi->tx_chan, iqid,
1050 rc = alloc_txq(pi, txq, i, oid);
1057 oid = SYSCTL_ADD_NODE(&pi->ctx, children, OID_AUTO, "ofld_txq",
1058 CTLFLAG_RD, NULL, "tx queues for offloaded TCP connections");
1059 for_each_ofld_txq(pi, i, ofld_txq) {
1062 iqid = port_intr_iq(pi, j)->cntxt_id;
1064 snprintf(name, sizeof(name), "%s ofld_txq%d",
1065 device_get_nameunit(pi->dev), i);
1066 init_eq(&ofld_txq->eq, EQ_OFLD, pi->qsize_txq, pi->tx_chan,
1069 snprintf(name, sizeof(name), "%d", i);
1070 oid2 = SYSCTL_ADD_NODE(&pi->ctx, SYSCTL_CHILDREN(oid), OID_AUTO,
1071 name, CTLFLAG_RD, NULL, "offload tx queue");
1073 rc = alloc_wrq(sc, pi, ofld_txq, oid2);
1081 * Finally, the control queue.
1083 oid = SYSCTL_ADD_NODE(&pi->ctx, children, OID_AUTO, "ctrlq", CTLFLAG_RD,
1084 NULL, "ctrl queue");
1085 ctrlq = &sc->sge.ctrlq[pi->port_id];
1086 iqid = port_intr_iq(pi, 0)->cntxt_id;
1087 snprintf(name, sizeof(name), "%s ctrlq", device_get_nameunit(pi->dev));
1088 init_eq(&ctrlq->eq, EQ_CTRL, CTRL_EQ_QSIZE, pi->tx_chan, iqid, name);
1089 rc = alloc_wrq(sc, pi, ctrlq, oid);
1093 t4_teardown_port_queues(pi);
1102 t4_teardown_port_queues(struct port_info *pi)
1105 struct adapter *sc = pi->adapter;
1106 struct sge_rxq *rxq;
1107 struct sge_txq *txq;
1109 struct sge_ofld_rxq *ofld_rxq;
1110 struct sge_wrq *ofld_txq;
1113 /* Do this before freeing the queues */
1114 if (pi->flags & PORT_SYSCTL_CTX) {
1115 sysctl_ctx_free(&pi->ctx);
1116 pi->flags &= ~PORT_SYSCTL_CTX;
1120 * Take down all the tx queues first, as they reference the rx queues
1121 * (for egress updates, etc.).
1124 free_wrq(sc, &sc->sge.ctrlq[pi->port_id]);
1126 for_each_txq(pi, i, txq) {
1131 for_each_ofld_txq(pi, i, ofld_txq) {
1132 free_wrq(sc, ofld_txq);
1137 * Then take down the rx queues that forward their interrupts, as they
1138 * reference other rx queues.
1141 for_each_rxq(pi, i, rxq) {
1142 if ((rxq->iq.flags & IQ_INTR) == 0)
1147 for_each_ofld_rxq(pi, i, ofld_rxq) {
1148 if ((ofld_rxq->iq.flags & IQ_INTR) == 0)
1149 free_ofld_rxq(pi, ofld_rxq);
1154 * Then take down the rx queues that take direct interrupts.
1157 for_each_rxq(pi, i, rxq) {
1158 if (rxq->iq.flags & IQ_INTR)
1163 for_each_ofld_rxq(pi, i, ofld_rxq) {
1164 if (ofld_rxq->iq.flags & IQ_INTR)
1165 free_ofld_rxq(pi, ofld_rxq);
1173 * Deals with errors and the firmware event queue. All data rx queues forward
1174 * their interrupt to the firmware event queue.
1177 t4_intr_all(void *arg)
1179 struct adapter *sc = arg;
1180 struct sge_iq *fwq = &sc->sge.fwq;
1183 if (atomic_cmpset_int(&fwq->state, IQS_IDLE, IQS_BUSY)) {
1185 atomic_cmpset_int(&fwq->state, IQS_BUSY, IQS_IDLE);
1189 /* Deals with error interrupts */
1191 t4_intr_err(void *arg)
1193 struct adapter *sc = arg;
1195 t4_write_reg(sc, MYPF_REG(A_PCIE_PF_CLI), 0);
1196 t4_slow_intr_handler(sc);
1200 t4_intr_evt(void *arg)
1202 struct sge_iq *iq = arg;
1204 if (atomic_cmpset_int(&iq->state, IQS_IDLE, IQS_BUSY)) {
1206 atomic_cmpset_int(&iq->state, IQS_BUSY, IQS_IDLE);
1213 struct sge_iq *iq = arg;
1215 if (atomic_cmpset_int(&iq->state, IQS_IDLE, IQS_BUSY)) {
1217 atomic_cmpset_int(&iq->state, IQS_BUSY, IQS_IDLE);
1222 * Deals with anything and everything on the given ingress queue.
1225 service_iq(struct sge_iq *iq, int budget)
1228 struct sge_rxq *rxq = iq_to_rxq(iq); /* Use iff iq is part of rxq */
1229 struct sge_fl *fl = &rxq->fl; /* Use iff IQ_HAS_FL */
1230 struct adapter *sc = iq->adapter;
1231 struct rsp_ctrl *ctrl;
1232 const struct rss_header *rss;
1233 int ndescs = 0, limit, fl_bufs_used = 0;
1237 STAILQ_HEAD(, sge_iq) iql = STAILQ_HEAD_INITIALIZER(iql);
1239 limit = budget ? budget : iq->qsize / 8;
1241 KASSERT(iq->state == IQS_BUSY, ("%s: iq %p not BUSY", __func__, iq));
1244 * We always come back and check the descriptor ring for new indirect
1245 * interrupts and other responses after running a single handler.
1248 while (is_new_response(iq, &ctrl)) {
1253 rsp_type = G_RSPD_TYPE(ctrl->u.type_gen);
1254 lq = be32toh(ctrl->pldbuflen_qid);
1255 rss = (const void *)iq->cdesc;
1258 case X_RSPD_TYPE_FLBUF:
1260 KASSERT(iq->flags & IQ_HAS_FL,
1261 ("%s: data for an iq (%p) with no freelist",
1264 m0 = get_fl_payload(sc, fl, lq, &fl_bufs_used);
1265 if (__predict_false(m0 == NULL))
1267 #ifdef T4_PKT_TIMESTAMP
1269 * 60 bit timestamp for the payload is
1270 * *(uint64_t *)m0->m_pktdat. Note that it is
1271 * in the leading free-space in the mbuf. The
1272 * kernel can clobber it during a pullup,
1273 * m_copymdata, etc. You need to make sure that
1274 * the mbuf reaches you unmolested if you care
1275 * about the timestamp.
1277 *(uint64_t *)m0->m_pktdat =
1278 be64toh(ctrl->u.last_flit) &
1284 case X_RSPD_TYPE_CPL:
1285 KASSERT(rss->opcode < NUM_CPL_CMDS,
1286 ("%s: bad opcode %02x.", __func__,
1288 sc->cpl_handler[rss->opcode](iq, rss, m0);
1291 case X_RSPD_TYPE_INTR:
1294 * Interrupts should be forwarded only to queues
1295 * that are not forwarding their interrupts.
1296 * This means service_iq can recurse but only 1
1299 KASSERT(budget == 0,
1300 ("%s: budget %u, rsp_type %u", __func__,
1303 q = sc->sge.iqmap[lq - sc->sge.iq_start];
1304 if (atomic_cmpset_int(&q->state, IQS_IDLE,
1306 if (service_iq(q, q->qsize / 8) == 0) {
1307 atomic_cmpset_int(&q->state,
1308 IQS_BUSY, IQS_IDLE);
1310 STAILQ_INSERT_TAIL(&iql, q,
1317 sc->an_handler(iq, ctrl);
1321 if (fl_bufs_used >= 16) {
1323 fl->needed += fl_bufs_used;
1324 refill_fl(sc, fl, 32);
1330 if (++ndescs == limit) {
1331 t4_write_reg(sc, MYPF_REG(A_SGE_PF_GTS),
1333 V_INGRESSQID(iq->cntxt_id) |
1334 V_SEINTARM(V_QINTR_TIMER_IDX(X_TIMERREG_UPDATE_CIDX)));
1340 fl->needed += fl_bufs_used;
1341 refill_fl(sc, fl, 32);
1344 return (EINPROGRESS);
1350 if (STAILQ_EMPTY(&iql))
1354 * Process the head only, and send it to the back of the list if
1355 * it's still not done.
1357 q = STAILQ_FIRST(&iql);
1358 STAILQ_REMOVE_HEAD(&iql, link);
1359 if (service_iq(q, q->qsize / 8) == 0)
1360 atomic_cmpset_int(&q->state, IQS_BUSY, IQS_IDLE);
1362 STAILQ_INSERT_TAIL(&iql, q, link);
1365 #if defined(INET) || defined(INET6)
1366 if (iq->flags & IQ_LRO_ENABLED) {
1367 struct lro_ctrl *lro = &rxq->lro;
1368 struct lro_entry *l;
1370 while (!SLIST_EMPTY(&lro->lro_active)) {
1371 l = SLIST_FIRST(&lro->lro_active);
1372 SLIST_REMOVE_HEAD(&lro->lro_active, next);
1373 tcp_lro_flush(lro, l);
1378 t4_write_reg(sc, MYPF_REG(A_SGE_PF_GTS), V_CIDXINC(ndescs) |
1379 V_INGRESSQID((u32)iq->cntxt_id) | V_SEINTARM(iq->intr_params));
1381 if (iq->flags & IQ_HAS_FL) {
1385 fl->needed += fl_bufs_used;
1386 starved = refill_fl(sc, fl, 64);
1388 if (__predict_false(starved != 0))
1389 add_fl_to_sfl(sc, fl);
1396 cl_has_metadata(struct sge_fl *fl, struct cluster_layout *cll)
1398 int rc = fl->flags & FL_BUF_PACKING || cll->region1 > 0;
1401 MPASS(cll->region3 >= CL_METADATA_SIZE);
1406 static inline struct cluster_metadata *
1407 cl_metadata(struct adapter *sc, struct sge_fl *fl, struct cluster_layout *cll,
1411 if (cl_has_metadata(fl, cll)) {
1412 struct sw_zone_info *swz = &sc->sge.sw_zone_info[cll->zidx];
1414 return ((struct cluster_metadata *)(cl + swz->size) - 1);
1420 rxb_free(void *arg1, void *arg2)
1422 uma_zone_t zone = arg1;
1425 uma_zfree(zone, cl);
1429 * The mbuf returned by this function could be allocated from zone_mbuf or
1430 * constructed in spare room in the cluster.
1432 * The mbuf carries the payload in one of these ways
1433 * a) frame inside the mbuf (mbuf from zone_mbuf)
1434 * b) m_cljset (for clusters without metadata) zone_mbuf
1435 * c) m_extaddref (cluster with metadata) inline mbuf
1436 * d) m_extaddref (cluster with metadata) zone_mbuf
1438 static struct mbuf *
1439 get_scatter_segment(struct adapter *sc, struct sge_fl *fl, int total, int flags)
1442 struct fl_sdesc *sd = &fl->sdesc[fl->cidx];
1443 struct cluster_layout *cll = &sd->cll;
1444 struct sw_zone_info *swz = &sc->sge.sw_zone_info[cll->zidx];
1445 struct hw_buf_info *hwb = &sc->sge.hw_buf_info[cll->hwidx];
1446 struct cluster_metadata *clm = cl_metadata(sc, fl, cll, sd->cl);
1447 int len, padded_len;
1450 len = min(total, hwb->size - fl->rx_offset);
1451 padded_len = roundup2(len, fl_pad);
1452 payload = sd->cl + cll->region1 + fl->rx_offset;
1454 if (sc->sc_do_rxcopy && len < RX_COPY_THRESHOLD) {
1457 * Copy payload into a freshly allocated mbuf.
1460 m = flags & M_PKTHDR ?
1461 m_gethdr(M_NOWAIT, MT_DATA) : m_get(M_NOWAIT, MT_DATA);
1464 fl->mbuf_allocated++;
1465 #ifdef T4_PKT_TIMESTAMP
1466 /* Leave room for a timestamp */
1469 /* copy data to mbuf */
1470 bcopy(payload, mtod(m, caddr_t), len);
1472 } else if (sd->nmbuf * MSIZE < cll->region1) {
1475 * There's spare room in the cluster for an mbuf. Create one
1476 * and associate it with the payload that's in the cluster too.
1480 m = (struct mbuf *)(sd->cl + sd->nmbuf * MSIZE);
1481 /* No bzero required */
1482 if (m_init(m, NULL, 0, M_NOWAIT, MT_DATA, flags | M_NOFREE))
1485 m_extaddref(m, payload, padded_len, &clm->refcount, rxb_free,
1492 * Grab an mbuf from zone_mbuf and associate it with the
1493 * payload in the cluster.
1496 m = flags & M_PKTHDR ?
1497 m_gethdr(M_NOWAIT, MT_DATA) : m_get(M_NOWAIT, MT_DATA);
1500 fl->mbuf_allocated++;
1502 m_extaddref(m, payload, padded_len, &clm->refcount,
1503 rxb_free, swz->zone, sd->cl);
1505 m_cljset(m, sd->cl, swz->type);
1506 sd->cl = NULL; /* consumed, not a recycle candidate */
1509 if (flags & M_PKTHDR)
1510 m->m_pkthdr.len = total;
1513 if (fl->flags & FL_BUF_PACKING) {
1514 fl->rx_offset += roundup2(padded_len, sc->sge.pack_boundary);
1515 MPASS(fl->rx_offset <= hwb->size);
1516 if (fl->rx_offset < hwb->size)
1517 return (m); /* without advancing the cidx */
1520 if (__predict_false(++fl->cidx == fl->cap))
1527 static struct mbuf *
1528 get_fl_payload(struct adapter *sc, struct sge_fl *fl, uint32_t len_newbuf,
1531 struct mbuf *m0, *m, **pnext;
1535 * No assertion for the fl lock because we don't need it. This routine
1536 * is called only from the rx interrupt handler and it only updates
1537 * fl->cidx. (Contrast that with fl->pidx/fl->needed which could be
1538 * updated in the rx interrupt handler or the starvation helper routine.
1539 * That's why code that manipulates fl->pidx/fl->needed needs the fl
1540 * lock but this routine does not).
1544 len = G_RSPD_LEN(len_newbuf);
1545 if (__predict_false(fl->m0 != NULL)) {
1546 M_ASSERTPKTHDR(fl->m0);
1547 MPASS(len == fl->m0->m_pkthdr.len);
1548 MPASS(fl->remaining < len);
1552 len = fl->remaining;
1557 if (fl->rx_offset > 0 && len_newbuf & F_RSPD_NEWBUF) {
1560 if (__predict_false(++fl->cidx == fl->cap))
1565 * Payload starts at rx_offset in the current hw buffer. Its length is
1566 * 'len' and it may span multiple hw buffers.
1569 m0 = get_scatter_segment(sc, fl, len, M_PKTHDR);
1573 pnext = &m0->m_next;
1577 MPASS(fl->rx_offset == 0);
1578 m = get_scatter_segment(sc, fl, len, 0);
1582 fl->remaining = len;
1591 if (fl->rx_offset == 0)
1594 (*fl_bufs_used) += nbuf;
1599 t4_eth_rx(struct sge_iq *iq, const struct rss_header *rss, struct mbuf *m0)
1601 struct sge_rxq *rxq = iq_to_rxq(iq);
1602 struct ifnet *ifp = rxq->ifp;
1603 const struct cpl_rx_pkt *cpl = (const void *)(rss + 1);
1604 #if defined(INET) || defined(INET6)
1605 struct lro_ctrl *lro = &rxq->lro;
1608 KASSERT(m0 != NULL, ("%s: no payload with opcode %02x", __func__,
1611 m0->m_pkthdr.len -= fl_pktshift;
1612 m0->m_len -= fl_pktshift;
1613 m0->m_data += fl_pktshift;
1615 m0->m_pkthdr.rcvif = ifp;
1616 m0->m_flags |= M_FLOWID;
1617 m0->m_pkthdr.flowid = be32toh(rss->hash_val);
1619 if (cpl->csum_calc && !cpl->err_vec) {
1620 if (ifp->if_capenable & IFCAP_RXCSUM &&
1621 cpl->l2info & htobe32(F_RXF_IP)) {
1622 m0->m_pkthdr.csum_flags = (CSUM_IP_CHECKED |
1623 CSUM_IP_VALID | CSUM_DATA_VALID | CSUM_PSEUDO_HDR);
1625 } else if (ifp->if_capenable & IFCAP_RXCSUM_IPV6 &&
1626 cpl->l2info & htobe32(F_RXF_IP6)) {
1627 m0->m_pkthdr.csum_flags = (CSUM_DATA_VALID_IPV6 |
1632 if (__predict_false(cpl->ip_frag))
1633 m0->m_pkthdr.csum_data = be16toh(cpl->csum);
1635 m0->m_pkthdr.csum_data = 0xffff;
1639 m0->m_pkthdr.ether_vtag = be16toh(cpl->vlan);
1640 m0->m_flags |= M_VLANTAG;
1641 rxq->vlan_extraction++;
1644 #if defined(INET) || defined(INET6)
1645 if (cpl->l2info & htobe32(F_RXF_LRO) &&
1646 iq->flags & IQ_LRO_ENABLED &&
1647 tcp_lro_rx(lro, m0, 0) == 0) {
1648 /* queued for LRO */
1651 ifp->if_input(ifp, m0);
1657 * Doesn't fail. Holds on to work requests it can't send right away.
1660 t4_wrq_tx_locked(struct adapter *sc, struct sge_wrq *wrq, struct wrqe *wr)
1662 struct sge_eq *eq = &wrq->eq;
1666 TXQ_LOCK_ASSERT_OWNED(wrq);
1668 KASSERT((eq->flags & EQ_TYPEMASK) == EQ_OFLD ||
1669 (eq->flags & EQ_TYPEMASK) == EQ_CTRL,
1670 ("%s: eq type %d", __func__, eq->flags & EQ_TYPEMASK));
1672 KASSERT((eq->flags & EQ_TYPEMASK) == EQ_CTRL,
1673 ("%s: eq type %d", __func__, eq->flags & EQ_TYPEMASK));
1676 if (__predict_true(wr != NULL))
1677 STAILQ_INSERT_TAIL(&wrq->wr_list, wr, link);
1679 can_reclaim = reclaimable(eq);
1680 if (__predict_false(eq->flags & EQ_STALLED)) {
1681 if (can_reclaim < tx_resume_threshold(eq))
1683 eq->flags &= ~EQ_STALLED;
1686 eq->cidx += can_reclaim;
1687 eq->avail += can_reclaim;
1688 if (__predict_false(eq->cidx >= eq->cap))
1689 eq->cidx -= eq->cap;
1691 while ((wr = STAILQ_FIRST(&wrq->wr_list)) != NULL) {
1694 if (__predict_false(wr->wr_len < 0 ||
1695 wr->wr_len > SGE_MAX_WR_LEN || (wr->wr_len & 0x7))) {
1698 panic("%s: work request with length %d", __func__,
1704 log(LOG_ERR, "%s: %s work request with length %d",
1705 device_get_nameunit(sc->dev), __func__, wr->wr_len);
1706 STAILQ_REMOVE_HEAD(&wrq->wr_list, link);
1711 ndesc = howmany(wr->wr_len, EQ_ESIZE);
1712 if (eq->avail < ndesc) {
1717 dst = (void *)&eq->desc[eq->pidx];
1718 copy_to_txd(eq, wrtod(wr), &dst, wr->wr_len);
1722 if (__predict_false(eq->pidx >= eq->cap))
1723 eq->pidx -= eq->cap;
1725 eq->pending += ndesc;
1726 if (eq->pending >= 8)
1730 STAILQ_REMOVE_HEAD(&wrq->wr_list, link);
1733 if (eq->avail < 8) {
1734 can_reclaim = reclaimable(eq);
1735 eq->cidx += can_reclaim;
1736 eq->avail += can_reclaim;
1737 if (__predict_false(eq->cidx >= eq->cap))
1738 eq->cidx -= eq->cap;
1746 eq->flags |= EQ_STALLED;
1747 if (callout_pending(&eq->tx_callout) == 0)
1748 callout_reset(&eq->tx_callout, 1, t4_tx_callout, eq);
1752 /* Per-packet header in a coalesced tx WR, before the SGL starts (in flits) */
1753 #define TXPKTS_PKT_HDR ((\
1754 sizeof(struct ulp_txpkt) + \
1755 sizeof(struct ulptx_idata) + \
1756 sizeof(struct cpl_tx_pkt_core) \
1759 /* Header of a coalesced tx WR, before SGL of first packet (in flits) */
1760 #define TXPKTS_WR_HDR (\
1761 sizeof(struct fw_eth_tx_pkts_wr) / 8 + \
1764 /* Header of a tx WR, before SGL of first packet (in flits) */
1765 #define TXPKT_WR_HDR ((\
1766 sizeof(struct fw_eth_tx_pkt_wr) + \
1767 sizeof(struct cpl_tx_pkt_core) \
1770 /* Header of a tx LSO WR, before SGL of first packet (in flits) */
1771 #define TXPKT_LSO_WR_HDR ((\
1772 sizeof(struct fw_eth_tx_pkt_wr) + \
1773 sizeof(struct cpl_tx_pkt_lso_core) + \
1774 sizeof(struct cpl_tx_pkt_core) \
1778 t4_eth_tx(struct ifnet *ifp, struct sge_txq *txq, struct mbuf *m)
1780 struct port_info *pi = (void *)ifp->if_softc;
1781 struct adapter *sc = pi->adapter;
1782 struct sge_eq *eq = &txq->eq;
1783 struct buf_ring *br = txq->br;
1785 int rc, coalescing, can_reclaim;
1786 struct txpkts txpkts;
1789 TXQ_LOCK_ASSERT_OWNED(txq);
1790 KASSERT(m, ("%s: called with nothing to do.", __func__));
1791 KASSERT((eq->flags & EQ_TYPEMASK) == EQ_ETH,
1792 ("%s: eq type %d", __func__, eq->flags & EQ_TYPEMASK));
1794 prefetch(&eq->desc[eq->pidx]);
1795 prefetch(&txq->sdesc[eq->pidx]);
1797 txpkts.npkt = 0;/* indicates there's nothing in txpkts */
1800 can_reclaim = reclaimable(eq);
1801 if (__predict_false(eq->flags & EQ_STALLED)) {
1802 if (can_reclaim < tx_resume_threshold(eq)) {
1806 eq->flags &= ~EQ_STALLED;
1810 if (__predict_false(eq->flags & EQ_DOOMED)) {
1812 while ((m = buf_ring_dequeue_sc(txq->br)) != NULL)
1817 if (eq->avail < 8 && can_reclaim)
1818 reclaim_tx_descs(txq, can_reclaim, 32);
1820 for (; m; m = next ? next : drbr_dequeue(ifp, br)) {
1825 next = m->m_nextpkt;
1826 m->m_nextpkt = NULL;
1828 if (next || buf_ring_peek(br))
1831 rc = get_pkt_sgl(txq, &m, &sgl, coalescing);
1835 /* Short of resources, suspend tx */
1837 m->m_nextpkt = next;
1842 * Unrecoverable error for this packet, throw it away
1843 * and move on to the next. get_pkt_sgl may already
1844 * have freed m (it will be NULL in that case and the
1845 * m_freem here is still safe).
1853 add_to_txpkts(pi, txq, &txpkts, m, &sgl) == 0) {
1855 /* Successfully absorbed into txpkts */
1857 write_ulp_cpl_sgl(pi, txq, &txpkts, m, &sgl);
1862 * We weren't coalescing to begin with, or current frame could
1863 * not be coalesced (add_to_txpkts flushes txpkts if a frame
1864 * given to it can't be coalesced). Either way there should be
1865 * nothing in txpkts.
1867 KASSERT(txpkts.npkt == 0,
1868 ("%s: txpkts not empty: %d", __func__, txpkts.npkt));
1870 /* We're sending out individual packets now */
1874 reclaim_tx_descs(txq, 0, 8);
1875 rc = write_txpkt_wr(pi, txq, m, &sgl);
1878 /* Short of hardware descriptors, suspend tx */
1881 * This is an unlikely but expensive failure. We've
1882 * done all the hard work (DMA mappings etc.) and now we
1883 * can't send out the packet. What's worse, we have to
1884 * spend even more time freeing up everything in sgl.
1887 free_pkt_sgl(txq, &sgl);
1889 m->m_nextpkt = next;
1893 ETHER_BPF_MTAP(ifp, m);
1897 if (eq->pending >= 8)
1900 can_reclaim = reclaimable(eq);
1901 if (can_reclaim >= 32)
1902 reclaim_tx_descs(txq, can_reclaim, 64);
1905 if (txpkts.npkt > 0)
1906 write_txpkts_wr(txq, &txpkts);
1909 * m not NULL means there was an error but we haven't thrown it away.
1910 * This can happen when we're short of tx descriptors (no_desc) or maybe
1911 * even DMA maps (no_dmamap). Either way, a credit flush and reclaim
1912 * will get things going again.
1914 if (m && !(eq->flags & EQ_CRFLUSHED)) {
1915 struct tx_sdesc *txsd = &txq->sdesc[eq->pidx];
1918 * If EQ_CRFLUSHED is not set then we know we have at least one
1919 * available descriptor because any WR that reduces eq->avail to
1920 * 0 also sets EQ_CRFLUSHED.
1922 KASSERT(eq->avail > 0, ("%s: no space for eqflush.", __func__));
1924 txsd->desc_used = 1;
1926 write_eqflush_wr(eq);
1933 reclaim_tx_descs(txq, 0, 128);
1935 if (eq->flags & EQ_STALLED && callout_pending(&eq->tx_callout) == 0)
1936 callout_reset(&eq->tx_callout, 1, t4_tx_callout, eq);
1942 t4_update_fl_bufsize(struct ifnet *ifp)
1944 struct port_info *pi = ifp->if_softc;
1945 struct adapter *sc = pi->adapter;
1946 struct sge_rxq *rxq;
1948 struct sge_ofld_rxq *ofld_rxq;
1951 int i, maxp, mtu = ifp->if_mtu;
1953 maxp = mtu_to_max_payload(sc, mtu, 0);
1954 for_each_rxq(pi, i, rxq) {
1958 find_best_refill_source(sc, fl, maxp);
1962 maxp = mtu_to_max_payload(sc, mtu, 1);
1963 for_each_ofld_rxq(pi, i, ofld_rxq) {
1967 find_best_refill_source(sc, fl, maxp);
1974 can_resume_tx(struct sge_eq *eq)
1976 return (reclaimable(eq) >= tx_resume_threshold(eq));
1980 init_iq(struct sge_iq *iq, struct adapter *sc, int tmr_idx, int pktc_idx,
1981 int qsize, int esize)
1983 KASSERT(tmr_idx >= 0 && tmr_idx < SGE_NTIMERS,
1984 ("%s: bad tmr_idx %d", __func__, tmr_idx));
1985 KASSERT(pktc_idx < SGE_NCOUNTERS, /* -ve is ok, means don't use */
1986 ("%s: bad pktc_idx %d", __func__, pktc_idx));
1990 iq->intr_params = V_QINTR_TIMER_IDX(tmr_idx);
1991 iq->intr_pktc_idx = SGE_NCOUNTERS - 1;
1992 if (pktc_idx >= 0) {
1993 iq->intr_params |= F_QINTR_CNT_EN;
1994 iq->intr_pktc_idx = pktc_idx;
1996 iq->qsize = roundup2(qsize, 16); /* See FW_IQ_CMD/iqsize */
1997 iq->esize = max(esize, 16); /* See FW_IQ_CMD/iqesize */
2001 init_fl(struct adapter *sc, struct sge_fl *fl, int qsize, int maxp, int pack,
2006 strlcpy(fl->lockname, name, sizeof(fl->lockname));
2008 fl->flags |= FL_BUF_PACKING;
2009 find_best_refill_source(sc, fl, maxp);
2010 find_safe_refill_source(sc, fl);
2014 init_eq(struct sge_eq *eq, int eqtype, int qsize, uint8_t tx_chan,
2015 uint16_t iqid, char *name)
2017 KASSERT(tx_chan < NCHAN, ("%s: bad tx channel %d", __func__, tx_chan));
2018 KASSERT(eqtype <= EQ_TYPEMASK, ("%s: bad qtype %d", __func__, eqtype));
2020 eq->flags = eqtype & EQ_TYPEMASK;
2021 eq->tx_chan = tx_chan;
2024 strlcpy(eq->lockname, name, sizeof(eq->lockname));
2026 TASK_INIT(&eq->tx_task, 0, t4_tx_task, eq);
2027 callout_init(&eq->tx_callout, CALLOUT_MPSAFE);
2031 alloc_ring(struct adapter *sc, size_t len, bus_dma_tag_t *tag,
2032 bus_dmamap_t *map, bus_addr_t *pa, void **va)
2036 rc = bus_dma_tag_create(sc->dmat, 512, 0, BUS_SPACE_MAXADDR,
2037 BUS_SPACE_MAXADDR, NULL, NULL, len, 1, len, 0, NULL, NULL, tag);
2039 device_printf(sc->dev, "cannot allocate DMA tag: %d\n", rc);
2043 rc = bus_dmamem_alloc(*tag, va,
2044 BUS_DMA_WAITOK | BUS_DMA_COHERENT | BUS_DMA_ZERO, map);
2046 device_printf(sc->dev, "cannot allocate DMA memory: %d\n", rc);
2050 rc = bus_dmamap_load(*tag, *map, *va, len, oneseg_dma_callback, pa, 0);
2052 device_printf(sc->dev, "cannot load DMA map: %d\n", rc);
2057 free_ring(sc, *tag, *map, *pa, *va);
2063 free_ring(struct adapter *sc, bus_dma_tag_t tag, bus_dmamap_t map,
2064 bus_addr_t pa, void *va)
2067 bus_dmamap_unload(tag, map);
2069 bus_dmamem_free(tag, va, map);
2071 bus_dma_tag_destroy(tag);
2077 * Allocates the ring for an ingress queue and an optional freelist. If the
2078 * freelist is specified it will be allocated and then associated with the
2081 * Returns errno on failure. Resources allocated up to that point may still be
2082 * allocated. Caller is responsible for cleanup in case this function fails.
2084 * If the ingress queue will take interrupts directly (iq->flags & IQ_INTR) then
2085 * the intr_idx specifies the vector, starting from 0. Otherwise it specifies
2086 * the abs_id of the ingress queue to which its interrupts should be forwarded.
2089 alloc_iq_fl(struct port_info *pi, struct sge_iq *iq, struct sge_fl *fl,
2090 int intr_idx, int cong)
2092 int rc, i, cntxt_id;
2095 struct adapter *sc = iq->adapter;
2098 len = iq->qsize * iq->esize;
2099 rc = alloc_ring(sc, len, &iq->desc_tag, &iq->desc_map, &iq->ba,
2100 (void **)&iq->desc);
2104 bzero(&c, sizeof(c));
2105 c.op_to_vfn = htobe32(V_FW_CMD_OP(FW_IQ_CMD) | F_FW_CMD_REQUEST |
2106 F_FW_CMD_WRITE | F_FW_CMD_EXEC | V_FW_IQ_CMD_PFN(sc->pf) |
2107 V_FW_IQ_CMD_VFN(0));
2109 c.alloc_to_len16 = htobe32(F_FW_IQ_CMD_ALLOC | F_FW_IQ_CMD_IQSTART |
2112 /* Special handling for firmware event queue */
2113 if (iq == &sc->sge.fwq)
2114 v |= F_FW_IQ_CMD_IQASYNCH;
2116 if (iq->flags & IQ_INTR) {
2117 KASSERT(intr_idx < sc->intr_count,
2118 ("%s: invalid direct intr_idx %d", __func__, intr_idx));
2120 v |= F_FW_IQ_CMD_IQANDST;
2121 v |= V_FW_IQ_CMD_IQANDSTINDEX(intr_idx);
2123 c.type_to_iqandstindex = htobe32(v |
2124 V_FW_IQ_CMD_TYPE(FW_IQ_TYPE_FL_INT_CAP) |
2125 V_FW_IQ_CMD_VIID(pi->viid) |
2126 V_FW_IQ_CMD_IQANUD(X_UPDATEDELIVERY_INTERRUPT));
2127 c.iqdroprss_to_iqesize = htobe16(V_FW_IQ_CMD_IQPCIECH(pi->tx_chan) |
2128 F_FW_IQ_CMD_IQGTSMODE |
2129 V_FW_IQ_CMD_IQINTCNTTHRESH(iq->intr_pktc_idx) |
2130 V_FW_IQ_CMD_IQESIZE(ilog2(iq->esize) - 4));
2131 c.iqsize = htobe16(iq->qsize);
2132 c.iqaddr = htobe64(iq->ba);
2134 c.iqns_to_fl0congen = htobe32(F_FW_IQ_CMD_IQFLINTCONGEN);
2137 mtx_init(&fl->fl_lock, fl->lockname, NULL, MTX_DEF);
2139 len = fl->qsize * RX_FL_ESIZE;
2140 rc = alloc_ring(sc, len, &fl->desc_tag, &fl->desc_map,
2141 &fl->ba, (void **)&fl->desc);
2145 /* Allocate space for one software descriptor per buffer. */
2146 fl->cap = (fl->qsize - spg_len / RX_FL_ESIZE) * 8;
2147 rc = alloc_fl_sdesc(fl);
2149 device_printf(sc->dev,
2150 "failed to setup fl software descriptors: %d\n",
2154 fl->needed = fl->cap;
2155 fl->lowat = fl->flags & FL_BUF_PACKING ?
2156 roundup2(sc->sge.fl_starve_threshold2, 8) :
2157 roundup2(sc->sge.fl_starve_threshold, 8);
2159 c.iqns_to_fl0congen |=
2160 htobe32(V_FW_IQ_CMD_FL0HOSTFCMODE(X_HOSTFCMODE_NONE) |
2161 F_FW_IQ_CMD_FL0FETCHRO | F_FW_IQ_CMD_FL0DATARO |
2162 (fl_pad ? F_FW_IQ_CMD_FL0PADEN : 0) |
2163 (fl->flags & FL_BUF_PACKING ? F_FW_IQ_CMD_FL0PACKEN :
2166 c.iqns_to_fl0congen |=
2167 htobe32(V_FW_IQ_CMD_FL0CNGCHMAP(cong) |
2168 F_FW_IQ_CMD_FL0CONGCIF |
2169 F_FW_IQ_CMD_FL0CONGEN);
2171 c.fl0dcaen_to_fl0cidxfthresh =
2172 htobe16(V_FW_IQ_CMD_FL0FBMIN(X_FETCHBURSTMIN_64B) |
2173 V_FW_IQ_CMD_FL0FBMAX(X_FETCHBURSTMAX_512B));
2174 c.fl0size = htobe16(fl->qsize);
2175 c.fl0addr = htobe64(fl->ba);
2178 rc = -t4_wr_mbox(sc, sc->mbox, &c, sizeof(c), &c);
2180 device_printf(sc->dev,
2181 "failed to create ingress queue: %d\n", rc);
2185 iq->cdesc = iq->desc;
2188 iq->intr_next = iq->intr_params;
2189 iq->cntxt_id = be16toh(c.iqid);
2190 iq->abs_id = be16toh(c.physiqid);
2191 iq->flags |= IQ_ALLOCATED;
2193 cntxt_id = iq->cntxt_id - sc->sge.iq_start;
2194 if (cntxt_id >= sc->sge.niq) {
2195 panic ("%s: iq->cntxt_id (%d) more than the max (%d)", __func__,
2196 cntxt_id, sc->sge.niq - 1);
2198 sc->sge.iqmap[cntxt_id] = iq;
2201 fl->cntxt_id = be16toh(c.fl0id);
2202 fl->pidx = fl->cidx = 0;
2204 cntxt_id = fl->cntxt_id - sc->sge.eq_start;
2205 if (cntxt_id >= sc->sge.neq) {
2206 panic("%s: fl->cntxt_id (%d) more than the max (%d)",
2207 __func__, cntxt_id, sc->sge.neq - 1);
2209 sc->sge.eqmap[cntxt_id] = (void *)fl;
2212 /* Enough to make sure the SGE doesn't think it's starved */
2213 refill_fl(sc, fl, fl->lowat);
2216 iq->flags |= IQ_HAS_FL;
2219 if (is_t5(sc) && cong >= 0) {
2220 uint32_t param, val;
2222 param = V_FW_PARAMS_MNEM(FW_PARAMS_MNEM_DMAQ) |
2223 V_FW_PARAMS_PARAM_X(FW_PARAMS_PARAM_DMAQ_CONM_CTXT) |
2224 V_FW_PARAMS_PARAM_YZ(iq->cntxt_id);
2229 for (i = 0; i < 4; i++) {
2230 if (cong & (1 << i))
2231 val |= 1 << (i << 2);
2235 rc = -t4_set_params(sc, sc->mbox, sc->pf, 0, 1, ¶m, &val);
2237 /* report error but carry on */
2238 device_printf(sc->dev,
2239 "failed to set congestion manager context for "
2240 "ingress queue %d: %d\n", iq->cntxt_id, rc);
2244 /* Enable IQ interrupts */
2245 atomic_store_rel_int(&iq->state, IQS_IDLE);
2246 t4_write_reg(sc, MYPF_REG(A_SGE_PF_GTS), V_SEINTARM(iq->intr_params) |
2247 V_INGRESSQID(iq->cntxt_id));
2253 free_iq_fl(struct port_info *pi, struct sge_iq *iq, struct sge_fl *fl)
2256 struct adapter *sc = iq->adapter;
2260 return (0); /* nothing to do */
2262 dev = pi ? pi->dev : sc->dev;
2264 if (iq->flags & IQ_ALLOCATED) {
2265 rc = -t4_iq_free(sc, sc->mbox, sc->pf, 0,
2266 FW_IQ_TYPE_FL_INT_CAP, iq->cntxt_id,
2267 fl ? fl->cntxt_id : 0xffff, 0xffff);
2270 "failed to free queue %p: %d\n", iq, rc);
2273 iq->flags &= ~IQ_ALLOCATED;
2276 free_ring(sc, iq->desc_tag, iq->desc_map, iq->ba, iq->desc);
2278 bzero(iq, sizeof(*iq));
2281 free_ring(sc, fl->desc_tag, fl->desc_map, fl->ba,
2285 free_fl_sdesc(sc, fl);
2287 if (mtx_initialized(&fl->fl_lock))
2288 mtx_destroy(&fl->fl_lock);
2290 bzero(fl, sizeof(*fl));
2297 add_fl_sysctls(struct sysctl_ctx_list *ctx, struct sysctl_oid *oid,
2300 struct sysctl_oid_list *children = SYSCTL_CHILDREN(oid);
2302 oid = SYSCTL_ADD_NODE(ctx, children, OID_AUTO, "fl", CTLFLAG_RD, NULL,
2304 children = SYSCTL_CHILDREN(oid);
2306 SYSCTL_ADD_PROC(ctx, children, OID_AUTO, "cntxt_id",
2307 CTLTYPE_INT | CTLFLAG_RD, &fl->cntxt_id, 0, sysctl_uint16, "I",
2308 "SGE context id of the freelist");
2309 SYSCTL_ADD_UINT(ctx, children, OID_AUTO, "cidx", CTLFLAG_RD, &fl->cidx,
2310 0, "consumer index");
2311 if (fl->flags & FL_BUF_PACKING) {
2312 SYSCTL_ADD_UINT(ctx, children, OID_AUTO, "rx_offset",
2313 CTLFLAG_RD, &fl->rx_offset, 0, "packing rx offset");
2315 SYSCTL_ADD_UINT(ctx, children, OID_AUTO, "pidx", CTLFLAG_RD, &fl->pidx,
2316 0, "producer index");
2317 SYSCTL_ADD_UQUAD(ctx, children, OID_AUTO, "mbuf_allocated",
2318 CTLFLAG_RD, &fl->mbuf_allocated, "# of mbuf allocated");
2319 SYSCTL_ADD_UQUAD(ctx, children, OID_AUTO, "mbuf_inlined",
2320 CTLFLAG_RD, &fl->mbuf_inlined, "# of mbuf inlined in clusters");
2321 SYSCTL_ADD_UQUAD(ctx, children, OID_AUTO, "cluster_allocated",
2322 CTLFLAG_RD, &fl->cl_allocated, "# of clusters allocated");
2323 SYSCTL_ADD_UQUAD(ctx, children, OID_AUTO, "cluster_recycled",
2324 CTLFLAG_RD, &fl->cl_recycled, "# of clusters recycled");
2325 SYSCTL_ADD_UQUAD(ctx, children, OID_AUTO, "cluster_fast_recycled",
2326 CTLFLAG_RD, &fl->cl_fast_recycled, "# of clusters recycled (fast)");
2330 alloc_fwq(struct adapter *sc)
2333 struct sge_iq *fwq = &sc->sge.fwq;
2334 struct sysctl_oid *oid = device_get_sysctl_tree(sc->dev);
2335 struct sysctl_oid_list *children = SYSCTL_CHILDREN(oid);
2337 init_iq(fwq, sc, 0, 0, FW_IQ_QSIZE, FW_IQ_ESIZE);
2338 fwq->flags |= IQ_INTR; /* always */
2339 intr_idx = sc->intr_count > 1 ? 1 : 0;
2340 rc = alloc_iq_fl(sc->port[0], fwq, NULL, intr_idx, -1);
2342 device_printf(sc->dev,
2343 "failed to create firmware event queue: %d\n", rc);
2347 oid = SYSCTL_ADD_NODE(&sc->ctx, children, OID_AUTO, "fwq", CTLFLAG_RD,
2348 NULL, "firmware event queue");
2349 children = SYSCTL_CHILDREN(oid);
2351 SYSCTL_ADD_PROC(&sc->ctx, children, OID_AUTO, "abs_id",
2352 CTLTYPE_INT | CTLFLAG_RD, &fwq->abs_id, 0, sysctl_uint16, "I",
2353 "absolute id of the queue");
2354 SYSCTL_ADD_PROC(&sc->ctx, children, OID_AUTO, "cntxt_id",
2355 CTLTYPE_INT | CTLFLAG_RD, &fwq->cntxt_id, 0, sysctl_uint16, "I",
2356 "SGE context id of the queue");
2357 SYSCTL_ADD_PROC(&sc->ctx, children, OID_AUTO, "cidx",
2358 CTLTYPE_INT | CTLFLAG_RD, &fwq->cidx, 0, sysctl_uint16, "I",
2365 free_fwq(struct adapter *sc)
2367 return free_iq_fl(NULL, &sc->sge.fwq, NULL);
2371 alloc_mgmtq(struct adapter *sc)
2374 struct sge_wrq *mgmtq = &sc->sge.mgmtq;
2376 struct sysctl_oid *oid = device_get_sysctl_tree(sc->dev);
2377 struct sysctl_oid_list *children = SYSCTL_CHILDREN(oid);
2379 oid = SYSCTL_ADD_NODE(&sc->ctx, children, OID_AUTO, "mgmtq", CTLFLAG_RD,
2380 NULL, "management queue");
2382 snprintf(name, sizeof(name), "%s mgmtq", device_get_nameunit(sc->dev));
2383 init_eq(&mgmtq->eq, EQ_CTRL, CTRL_EQ_QSIZE, sc->port[0]->tx_chan,
2384 sc->sge.fwq.cntxt_id, name);
2385 rc = alloc_wrq(sc, NULL, mgmtq, oid);
2387 device_printf(sc->dev,
2388 "failed to create management queue: %d\n", rc);
2396 free_mgmtq(struct adapter *sc)
2399 return free_wrq(sc, &sc->sge.mgmtq);
2403 tnl_cong(struct port_info *pi)
2406 if (cong_drop == -1)
2408 else if (cong_drop == 1)
2411 return (pi->rx_chan_map);
2415 alloc_rxq(struct port_info *pi, struct sge_rxq *rxq, int intr_idx, int idx,
2416 struct sysctl_oid *oid)
2419 struct sysctl_oid_list *children;
2422 rc = alloc_iq_fl(pi, &rxq->iq, &rxq->fl, intr_idx, tnl_cong(pi));
2427 refill_fl(pi->adapter, &rxq->fl, rxq->fl.needed / 8);
2428 FL_UNLOCK(&rxq->fl);
2430 #if defined(INET) || defined(INET6)
2431 rc = tcp_lro_init(&rxq->lro);
2434 rxq->lro.ifp = pi->ifp; /* also indicates LRO init'ed */
2436 if (pi->ifp->if_capenable & IFCAP_LRO)
2437 rxq->iq.flags |= IQ_LRO_ENABLED;
2441 children = SYSCTL_CHILDREN(oid);
2443 snprintf(name, sizeof(name), "%d", idx);
2444 oid = SYSCTL_ADD_NODE(&pi->ctx, children, OID_AUTO, name, CTLFLAG_RD,
2446 children = SYSCTL_CHILDREN(oid);
2448 SYSCTL_ADD_PROC(&pi->ctx, children, OID_AUTO, "abs_id",
2449 CTLTYPE_INT | CTLFLAG_RD, &rxq->iq.abs_id, 0, sysctl_uint16, "I",
2450 "absolute id of the queue");
2451 SYSCTL_ADD_PROC(&pi->ctx, children, OID_AUTO, "cntxt_id",
2452 CTLTYPE_INT | CTLFLAG_RD, &rxq->iq.cntxt_id, 0, sysctl_uint16, "I",
2453 "SGE context id of the queue");
2454 SYSCTL_ADD_PROC(&pi->ctx, children, OID_AUTO, "cidx",
2455 CTLTYPE_INT | CTLFLAG_RD, &rxq->iq.cidx, 0, sysctl_uint16, "I",
2457 #if defined(INET) || defined(INET6)
2458 SYSCTL_ADD_INT(&pi->ctx, children, OID_AUTO, "lro_queued", CTLFLAG_RD,
2459 &rxq->lro.lro_queued, 0, NULL);
2460 SYSCTL_ADD_INT(&pi->ctx, children, OID_AUTO, "lro_flushed", CTLFLAG_RD,
2461 &rxq->lro.lro_flushed, 0, NULL);
2463 SYSCTL_ADD_UQUAD(&pi->ctx, children, OID_AUTO, "rxcsum", CTLFLAG_RD,
2464 &rxq->rxcsum, "# of times hardware assisted with checksum");
2465 SYSCTL_ADD_UQUAD(&pi->ctx, children, OID_AUTO, "vlan_extraction",
2466 CTLFLAG_RD, &rxq->vlan_extraction,
2467 "# of times hardware extracted 802.1Q tag");
2469 add_fl_sysctls(&pi->ctx, oid, &rxq->fl);
2475 free_rxq(struct port_info *pi, struct sge_rxq *rxq)
2479 #if defined(INET) || defined(INET6)
2481 tcp_lro_free(&rxq->lro);
2482 rxq->lro.ifp = NULL;
2486 rc = free_iq_fl(pi, &rxq->iq, &rxq->fl);
2488 bzero(rxq, sizeof(*rxq));
2495 alloc_ofld_rxq(struct port_info *pi, struct sge_ofld_rxq *ofld_rxq,
2496 int intr_idx, int idx, struct sysctl_oid *oid)
2499 struct sysctl_oid_list *children;
2502 rc = alloc_iq_fl(pi, &ofld_rxq->iq, &ofld_rxq->fl, intr_idx,
2507 children = SYSCTL_CHILDREN(oid);
2509 snprintf(name, sizeof(name), "%d", idx);
2510 oid = SYSCTL_ADD_NODE(&pi->ctx, children, OID_AUTO, name, CTLFLAG_RD,
2512 children = SYSCTL_CHILDREN(oid);
2514 SYSCTL_ADD_PROC(&pi->ctx, children, OID_AUTO, "abs_id",
2515 CTLTYPE_INT | CTLFLAG_RD, &ofld_rxq->iq.abs_id, 0, sysctl_uint16,
2516 "I", "absolute id of the queue");
2517 SYSCTL_ADD_PROC(&pi->ctx, children, OID_AUTO, "cntxt_id",
2518 CTLTYPE_INT | CTLFLAG_RD, &ofld_rxq->iq.cntxt_id, 0, sysctl_uint16,
2519 "I", "SGE context id of the queue");
2520 SYSCTL_ADD_PROC(&pi->ctx, children, OID_AUTO, "cidx",
2521 CTLTYPE_INT | CTLFLAG_RD, &ofld_rxq->iq.cidx, 0, sysctl_uint16, "I",
2524 add_fl_sysctls(&pi->ctx, oid, &ofld_rxq->fl);
2530 free_ofld_rxq(struct port_info *pi, struct sge_ofld_rxq *ofld_rxq)
2534 rc = free_iq_fl(pi, &ofld_rxq->iq, &ofld_rxq->fl);
2536 bzero(ofld_rxq, sizeof(*ofld_rxq));
2543 ctrl_eq_alloc(struct adapter *sc, struct sge_eq *eq)
2546 struct fw_eq_ctrl_cmd c;
2548 bzero(&c, sizeof(c));
2550 c.op_to_vfn = htobe32(V_FW_CMD_OP(FW_EQ_CTRL_CMD) | F_FW_CMD_REQUEST |
2551 F_FW_CMD_WRITE | F_FW_CMD_EXEC | V_FW_EQ_CTRL_CMD_PFN(sc->pf) |
2552 V_FW_EQ_CTRL_CMD_VFN(0));
2553 c.alloc_to_len16 = htobe32(F_FW_EQ_CTRL_CMD_ALLOC |
2554 F_FW_EQ_CTRL_CMD_EQSTART | FW_LEN16(c));
2555 c.cmpliqid_eqid = htonl(V_FW_EQ_CTRL_CMD_CMPLIQID(eq->iqid)); /* XXX */
2556 c.physeqid_pkd = htobe32(0);
2557 c.fetchszm_to_iqid =
2558 htobe32(V_FW_EQ_CTRL_CMD_HOSTFCMODE(X_HOSTFCMODE_STATUS_PAGE) |
2559 V_FW_EQ_CTRL_CMD_PCIECHN(eq->tx_chan) |
2560 F_FW_EQ_CTRL_CMD_FETCHRO | V_FW_EQ_CTRL_CMD_IQID(eq->iqid));
2562 htobe32(V_FW_EQ_CTRL_CMD_FBMIN(X_FETCHBURSTMIN_64B) |
2563 V_FW_EQ_CTRL_CMD_FBMAX(X_FETCHBURSTMAX_512B) |
2564 V_FW_EQ_CTRL_CMD_CIDXFTHRESH(X_CIDXFLUSHTHRESH_32) |
2565 V_FW_EQ_CTRL_CMD_EQSIZE(eq->qsize));
2566 c.eqaddr = htobe64(eq->ba);
2568 rc = -t4_wr_mbox(sc, sc->mbox, &c, sizeof(c), &c);
2570 device_printf(sc->dev,
2571 "failed to create control queue %d: %d\n", eq->tx_chan, rc);
2574 eq->flags |= EQ_ALLOCATED;
2576 eq->cntxt_id = G_FW_EQ_CTRL_CMD_EQID(be32toh(c.cmpliqid_eqid));
2577 cntxt_id = eq->cntxt_id - sc->sge.eq_start;
2578 if (cntxt_id >= sc->sge.neq)
2579 panic("%s: eq->cntxt_id (%d) more than the max (%d)", __func__,
2580 cntxt_id, sc->sge.neq - 1);
2581 sc->sge.eqmap[cntxt_id] = eq;
2587 eth_eq_alloc(struct adapter *sc, struct port_info *pi, struct sge_eq *eq)
2590 struct fw_eq_eth_cmd c;
2592 bzero(&c, sizeof(c));
2594 c.op_to_vfn = htobe32(V_FW_CMD_OP(FW_EQ_ETH_CMD) | F_FW_CMD_REQUEST |
2595 F_FW_CMD_WRITE | F_FW_CMD_EXEC | V_FW_EQ_ETH_CMD_PFN(sc->pf) |
2596 V_FW_EQ_ETH_CMD_VFN(0));
2597 c.alloc_to_len16 = htobe32(F_FW_EQ_ETH_CMD_ALLOC |
2598 F_FW_EQ_ETH_CMD_EQSTART | FW_LEN16(c));
2599 c.viid_pkd = htobe32(V_FW_EQ_ETH_CMD_VIID(pi->viid));
2600 c.fetchszm_to_iqid =
2601 htobe32(V_FW_EQ_ETH_CMD_HOSTFCMODE(X_HOSTFCMODE_STATUS_PAGE) |
2602 V_FW_EQ_ETH_CMD_PCIECHN(eq->tx_chan) | F_FW_EQ_ETH_CMD_FETCHRO |
2603 V_FW_EQ_ETH_CMD_IQID(eq->iqid));
2604 c.dcaen_to_eqsize = htobe32(V_FW_EQ_ETH_CMD_FBMIN(X_FETCHBURSTMIN_64B) |
2605 V_FW_EQ_ETH_CMD_FBMAX(X_FETCHBURSTMAX_512B) |
2606 V_FW_EQ_ETH_CMD_CIDXFTHRESH(X_CIDXFLUSHTHRESH_32) |
2607 V_FW_EQ_ETH_CMD_EQSIZE(eq->qsize));
2608 c.eqaddr = htobe64(eq->ba);
2610 rc = -t4_wr_mbox(sc, sc->mbox, &c, sizeof(c), &c);
2612 device_printf(pi->dev,
2613 "failed to create Ethernet egress queue: %d\n", rc);
2616 eq->flags |= EQ_ALLOCATED;
2618 eq->cntxt_id = G_FW_EQ_ETH_CMD_EQID(be32toh(c.eqid_pkd));
2619 cntxt_id = eq->cntxt_id - sc->sge.eq_start;
2620 if (cntxt_id >= sc->sge.neq)
2621 panic("%s: eq->cntxt_id (%d) more than the max (%d)", __func__,
2622 cntxt_id, sc->sge.neq - 1);
2623 sc->sge.eqmap[cntxt_id] = eq;
2630 ofld_eq_alloc(struct adapter *sc, struct port_info *pi, struct sge_eq *eq)
2633 struct fw_eq_ofld_cmd c;
2635 bzero(&c, sizeof(c));
2637 c.op_to_vfn = htonl(V_FW_CMD_OP(FW_EQ_OFLD_CMD) | F_FW_CMD_REQUEST |
2638 F_FW_CMD_WRITE | F_FW_CMD_EXEC | V_FW_EQ_OFLD_CMD_PFN(sc->pf) |
2639 V_FW_EQ_OFLD_CMD_VFN(0));
2640 c.alloc_to_len16 = htonl(F_FW_EQ_OFLD_CMD_ALLOC |
2641 F_FW_EQ_OFLD_CMD_EQSTART | FW_LEN16(c));
2642 c.fetchszm_to_iqid =
2643 htonl(V_FW_EQ_OFLD_CMD_HOSTFCMODE(X_HOSTFCMODE_STATUS_PAGE) |
2644 V_FW_EQ_OFLD_CMD_PCIECHN(eq->tx_chan) |
2645 F_FW_EQ_OFLD_CMD_FETCHRO | V_FW_EQ_OFLD_CMD_IQID(eq->iqid));
2647 htobe32(V_FW_EQ_OFLD_CMD_FBMIN(X_FETCHBURSTMIN_64B) |
2648 V_FW_EQ_OFLD_CMD_FBMAX(X_FETCHBURSTMAX_512B) |
2649 V_FW_EQ_OFLD_CMD_CIDXFTHRESH(X_CIDXFLUSHTHRESH_32) |
2650 V_FW_EQ_OFLD_CMD_EQSIZE(eq->qsize));
2651 c.eqaddr = htobe64(eq->ba);
2653 rc = -t4_wr_mbox(sc, sc->mbox, &c, sizeof(c), &c);
2655 device_printf(pi->dev,
2656 "failed to create egress queue for TCP offload: %d\n", rc);
2659 eq->flags |= EQ_ALLOCATED;
2661 eq->cntxt_id = G_FW_EQ_OFLD_CMD_EQID(be32toh(c.eqid_pkd));
2662 cntxt_id = eq->cntxt_id - sc->sge.eq_start;
2663 if (cntxt_id >= sc->sge.neq)
2664 panic("%s: eq->cntxt_id (%d) more than the max (%d)", __func__,
2665 cntxt_id, sc->sge.neq - 1);
2666 sc->sge.eqmap[cntxt_id] = eq;
2673 alloc_eq(struct adapter *sc, struct port_info *pi, struct sge_eq *eq)
2678 mtx_init(&eq->eq_lock, eq->lockname, NULL, MTX_DEF);
2680 len = eq->qsize * EQ_ESIZE;
2681 rc = alloc_ring(sc, len, &eq->desc_tag, &eq->desc_map,
2682 &eq->ba, (void **)&eq->desc);
2686 eq->cap = eq->qsize - spg_len / EQ_ESIZE;
2687 eq->spg = (void *)&eq->desc[eq->cap];
2688 eq->avail = eq->cap - 1; /* one less to avoid cidx = pidx */
2689 eq->pidx = eq->cidx = 0;
2690 eq->doorbells = sc->doorbells;
2692 switch (eq->flags & EQ_TYPEMASK) {
2694 rc = ctrl_eq_alloc(sc, eq);
2698 rc = eth_eq_alloc(sc, pi, eq);
2703 rc = ofld_eq_alloc(sc, pi, eq);
2708 panic("%s: invalid eq type %d.", __func__,
2709 eq->flags & EQ_TYPEMASK);
2712 device_printf(sc->dev,
2713 "failed to allocate egress queue(%d): %d",
2714 eq->flags & EQ_TYPEMASK, rc);
2717 eq->tx_callout.c_cpu = eq->cntxt_id % mp_ncpus;
2719 if (isset(&eq->doorbells, DOORBELL_UDB) ||
2720 isset(&eq->doorbells, DOORBELL_UDBWC) ||
2721 isset(&eq->doorbells, DOORBELL_WCWR)) {
2722 uint32_t s_qpp = sc->sge.eq_s_qpp;
2723 uint32_t mask = (1 << s_qpp) - 1;
2724 volatile uint8_t *udb;
2726 udb = sc->udbs_base + UDBS_DB_OFFSET;
2727 udb += (eq->cntxt_id >> s_qpp) << PAGE_SHIFT; /* pg offset */
2728 eq->udb_qid = eq->cntxt_id & mask; /* id in page */
2729 if (eq->udb_qid > PAGE_SIZE / UDBS_SEG_SIZE)
2730 clrbit(&eq->doorbells, DOORBELL_WCWR);
2732 udb += eq->udb_qid << UDBS_SEG_SHIFT; /* seg offset */
2735 eq->udb = (volatile void *)udb;
2742 free_eq(struct adapter *sc, struct sge_eq *eq)
2746 if (eq->flags & EQ_ALLOCATED) {
2747 switch (eq->flags & EQ_TYPEMASK) {
2749 rc = -t4_ctrl_eq_free(sc, sc->mbox, sc->pf, 0,
2754 rc = -t4_eth_eq_free(sc, sc->mbox, sc->pf, 0,
2760 rc = -t4_ofld_eq_free(sc, sc->mbox, sc->pf, 0,
2766 panic("%s: invalid eq type %d.", __func__,
2767 eq->flags & EQ_TYPEMASK);
2770 device_printf(sc->dev,
2771 "failed to free egress queue (%d): %d\n",
2772 eq->flags & EQ_TYPEMASK, rc);
2775 eq->flags &= ~EQ_ALLOCATED;
2778 free_ring(sc, eq->desc_tag, eq->desc_map, eq->ba, eq->desc);
2780 if (mtx_initialized(&eq->eq_lock))
2781 mtx_destroy(&eq->eq_lock);
2783 bzero(eq, sizeof(*eq));
2788 alloc_wrq(struct adapter *sc, struct port_info *pi, struct sge_wrq *wrq,
2789 struct sysctl_oid *oid)
2792 struct sysctl_ctx_list *ctx = pi ? &pi->ctx : &sc->ctx;
2793 struct sysctl_oid_list *children = SYSCTL_CHILDREN(oid);
2795 rc = alloc_eq(sc, pi, &wrq->eq);
2800 STAILQ_INIT(&wrq->wr_list);
2802 SYSCTL_ADD_UINT(ctx, children, OID_AUTO, "cntxt_id", CTLFLAG_RD,
2803 &wrq->eq.cntxt_id, 0, "SGE context id of the queue");
2804 SYSCTL_ADD_PROC(ctx, children, OID_AUTO, "cidx",
2805 CTLTYPE_INT | CTLFLAG_RD, &wrq->eq.cidx, 0, sysctl_uint16, "I",
2807 SYSCTL_ADD_PROC(ctx, children, OID_AUTO, "pidx",
2808 CTLTYPE_INT | CTLFLAG_RD, &wrq->eq.pidx, 0, sysctl_uint16, "I",
2810 SYSCTL_ADD_UQUAD(ctx, children, OID_AUTO, "tx_wrs", CTLFLAG_RD,
2811 &wrq->tx_wrs, "# of work requests");
2812 SYSCTL_ADD_UINT(ctx, children, OID_AUTO, "no_desc", CTLFLAG_RD,
2814 "# of times queue ran out of hardware descriptors");
2815 SYSCTL_ADD_UINT(ctx, children, OID_AUTO, "unstalled", CTLFLAG_RD,
2816 &wrq->eq.unstalled, 0, "# of times queue recovered after stall");
2822 free_wrq(struct adapter *sc, struct sge_wrq *wrq)
2826 rc = free_eq(sc, &wrq->eq);
2830 bzero(wrq, sizeof(*wrq));
2835 alloc_txq(struct port_info *pi, struct sge_txq *txq, int idx,
2836 struct sysctl_oid *oid)
2839 struct adapter *sc = pi->adapter;
2840 struct sge_eq *eq = &txq->eq;
2842 struct sysctl_oid_list *children = SYSCTL_CHILDREN(oid);
2844 rc = alloc_eq(sc, pi, eq);
2850 txq->sdesc = malloc(eq->cap * sizeof(struct tx_sdesc), M_CXGBE,
2852 txq->br = buf_ring_alloc(eq->qsize, M_CXGBE, M_WAITOK, &eq->eq_lock);
2854 rc = bus_dma_tag_create(sc->dmat, 1, 0, BUS_SPACE_MAXADDR,
2855 BUS_SPACE_MAXADDR, NULL, NULL, 64 * 1024, TX_SGL_SEGS,
2856 BUS_SPACE_MAXSIZE, BUS_DMA_ALLOCNOW, NULL, NULL, &txq->tx_tag);
2858 device_printf(sc->dev,
2859 "failed to create tx DMA tag: %d\n", rc);
2864 * We can stuff ~10 frames in an 8-descriptor txpkts WR (8 is the SGE
2865 * limit for any WR). txq->no_dmamap events shouldn't occur if maps is
2866 * sized for the worst case.
2868 rc = t4_alloc_tx_maps(&txq->txmaps, txq->tx_tag, eq->qsize * 10 / 8,
2871 device_printf(sc->dev, "failed to setup tx DMA maps: %d\n", rc);
2875 snprintf(name, sizeof(name), "%d", idx);
2876 oid = SYSCTL_ADD_NODE(&pi->ctx, children, OID_AUTO, name, CTLFLAG_RD,
2878 children = SYSCTL_CHILDREN(oid);
2880 SYSCTL_ADD_UINT(&pi->ctx, children, OID_AUTO, "cntxt_id", CTLFLAG_RD,
2881 &eq->cntxt_id, 0, "SGE context id of the queue");
2882 SYSCTL_ADD_PROC(&pi->ctx, children, OID_AUTO, "cidx",
2883 CTLTYPE_INT | CTLFLAG_RD, &eq->cidx, 0, sysctl_uint16, "I",
2885 SYSCTL_ADD_PROC(&pi->ctx, children, OID_AUTO, "pidx",
2886 CTLTYPE_INT | CTLFLAG_RD, &eq->pidx, 0, sysctl_uint16, "I",
2889 SYSCTL_ADD_UQUAD(&pi->ctx, children, OID_AUTO, "txcsum", CTLFLAG_RD,
2890 &txq->txcsum, "# of times hardware assisted with checksum");
2891 SYSCTL_ADD_UQUAD(&pi->ctx, children, OID_AUTO, "vlan_insertion",
2892 CTLFLAG_RD, &txq->vlan_insertion,
2893 "# of times hardware inserted 802.1Q tag");
2894 SYSCTL_ADD_UQUAD(&pi->ctx, children, OID_AUTO, "tso_wrs", CTLFLAG_RD,
2895 &txq->tso_wrs, "# of TSO work requests");
2896 SYSCTL_ADD_UQUAD(&pi->ctx, children, OID_AUTO, "imm_wrs", CTLFLAG_RD,
2897 &txq->imm_wrs, "# of work requests with immediate data");
2898 SYSCTL_ADD_UQUAD(&pi->ctx, children, OID_AUTO, "sgl_wrs", CTLFLAG_RD,
2899 &txq->sgl_wrs, "# of work requests with direct SGL");
2900 SYSCTL_ADD_UQUAD(&pi->ctx, children, OID_AUTO, "txpkt_wrs", CTLFLAG_RD,
2901 &txq->txpkt_wrs, "# of txpkt work requests (one pkt/WR)");
2902 SYSCTL_ADD_UQUAD(&pi->ctx, children, OID_AUTO, "txpkts_wrs", CTLFLAG_RD,
2903 &txq->txpkts_wrs, "# of txpkts work requests (multiple pkts/WR)");
2904 SYSCTL_ADD_UQUAD(&pi->ctx, children, OID_AUTO, "txpkts_pkts", CTLFLAG_RD,
2905 &txq->txpkts_pkts, "# of frames tx'd using txpkts work requests");
2907 SYSCTL_ADD_UQUAD(&pi->ctx, children, OID_AUTO, "br_drops", CTLFLAG_RD,
2908 &txq->br->br_drops, "# of drops in the buf_ring for this queue");
2909 SYSCTL_ADD_UINT(&pi->ctx, children, OID_AUTO, "no_dmamap", CTLFLAG_RD,
2910 &txq->no_dmamap, 0, "# of times txq ran out of DMA maps");
2911 SYSCTL_ADD_UINT(&pi->ctx, children, OID_AUTO, "no_desc", CTLFLAG_RD,
2912 &txq->no_desc, 0, "# of times txq ran out of hardware descriptors");
2913 SYSCTL_ADD_UINT(&pi->ctx, children, OID_AUTO, "egr_update", CTLFLAG_RD,
2914 &eq->egr_update, 0, "egress update notifications from the SGE");
2915 SYSCTL_ADD_UINT(&pi->ctx, children, OID_AUTO, "unstalled", CTLFLAG_RD,
2916 &eq->unstalled, 0, "# of times txq recovered after stall");
2922 free_txq(struct port_info *pi, struct sge_txq *txq)
2925 struct adapter *sc = pi->adapter;
2926 struct sge_eq *eq = &txq->eq;
2928 rc = free_eq(sc, eq);
2932 free(txq->sdesc, M_CXGBE);
2934 if (txq->txmaps.maps)
2935 t4_free_tx_maps(&txq->txmaps, txq->tx_tag);
2937 buf_ring_free(txq->br, M_CXGBE);
2940 bus_dma_tag_destroy(txq->tx_tag);
2942 bzero(txq, sizeof(*txq));
2947 oneseg_dma_callback(void *arg, bus_dma_segment_t *segs, int nseg, int error)
2949 bus_addr_t *ba = arg;
2952 ("%s meant for single segment mappings only.", __func__));
2954 *ba = error ? 0 : segs->ds_addr;
2958 is_new_response(const struct sge_iq *iq, struct rsp_ctrl **ctrl)
2960 *ctrl = (void *)((uintptr_t)iq->cdesc +
2961 (iq->esize - sizeof(struct rsp_ctrl)));
2963 return (((*ctrl)->u.type_gen >> S_RSPD_GEN) == iq->gen);
2967 iq_next(struct sge_iq *iq)
2969 iq->cdesc = (void *) ((uintptr_t)iq->cdesc + iq->esize);
2970 if (__predict_false(++iq->cidx == iq->qsize - 1)) {
2973 iq->cdesc = iq->desc;
2977 #define FL_HW_IDX(x) ((x) >> 3)
2979 ring_fl_db(struct adapter *sc, struct sge_fl *fl)
2981 int ndesc = fl->pending / 8;
2984 if (FL_HW_IDX(fl->pidx) == FL_HW_IDX(fl->cidx))
2985 ndesc--; /* hold back one credit */
2988 return; /* nothing to do */
2990 v = F_DBPRIO | V_QID(fl->cntxt_id) | V_PIDX(ndesc);
2996 t4_write_reg(sc, MYPF_REG(A_SGE_PF_KDOORBELL), v);
2997 fl->pending -= ndesc * 8;
3001 * Fill up the freelist by upto nbufs and maybe ring its doorbell.
3003 * Returns non-zero to indicate that it should be added to the list of starving
3007 refill_fl(struct adapter *sc, struct sge_fl *fl, int nbufs)
3009 __be64 *d = &fl->desc[fl->pidx];
3010 struct fl_sdesc *sd = &fl->sdesc[fl->pidx];
3013 struct cluster_layout *cll = &fl->cll_def; /* default layout */
3014 struct sw_zone_info *swz = &sc->sge.sw_zone_info[cll->zidx];
3015 struct cluster_metadata *clm;
3017 FL_LOCK_ASSERT_OWNED(fl);
3019 if (nbufs > fl->needed)
3021 nbufs -= (fl->pidx + nbufs) % 8;
3025 if (sd->cl != NULL) {
3027 if (sd->nmbuf == 0) {
3029 * Fast recycle without involving any atomics on
3030 * the cluster's metadata (if the cluster has
3031 * metadata). This happens when all frames
3032 * received in the cluster were small enough to
3033 * fit within a single mbuf each.
3035 fl->cl_fast_recycled++;
3040 * Cluster is guaranteed to have metadata. Clusters
3041 * without metadata always take the fast recycle path
3042 * when they're recycled.
3044 clm = cl_metadata(sc, fl, &sd->cll, sd->cl);
3047 if (atomic_fetchadd_int(&clm->refcount, -1) == 1) {
3051 sd->cl = NULL; /* gave up my reference */
3053 MPASS(sd->cl == NULL);
3055 cl = uma_zalloc(swz->zone, M_NOWAIT);
3056 if (__predict_false(cl == NULL)) {
3057 if (cll == &fl->cll_alt || fl->cll_alt.zidx == -1 ||
3058 fl->cll_def.zidx == fl->cll_alt.zidx)
3061 /* fall back to the safe zone */
3063 swz = &sc->sge.sw_zone_info[cll->zidx];
3068 pa = pmap_kextract((vm_offset_t)cl);
3072 *d = htobe64(pa | cll->hwidx);
3073 clm = cl_metadata(sc, fl, cll, cl);
3087 if (__predict_false(++fl->pidx == fl->cap)) {
3094 if (fl->pending >= 8)
3097 return (FL_RUNNING_LOW(fl) && !(fl->flags & FL_STARVING));
3101 * Attempt to refill all starving freelists.
3104 refill_sfl(void *arg)
3106 struct adapter *sc = arg;
3107 struct sge_fl *fl, *fl_temp;
3109 mtx_lock(&sc->sfl_lock);
3110 TAILQ_FOREACH_SAFE(fl, &sc->sfl, link, fl_temp) {
3112 refill_fl(sc, fl, 64);
3113 if (FL_NOT_RUNNING_LOW(fl) || fl->flags & FL_DOOMED) {
3114 TAILQ_REMOVE(&sc->sfl, fl, link);
3115 fl->flags &= ~FL_STARVING;
3120 if (!TAILQ_EMPTY(&sc->sfl))
3121 callout_schedule(&sc->sfl_callout, hz / 5);
3122 mtx_unlock(&sc->sfl_lock);
3126 alloc_fl_sdesc(struct sge_fl *fl)
3129 fl->sdesc = malloc(fl->cap * sizeof(struct fl_sdesc), M_CXGBE,
3136 free_fl_sdesc(struct adapter *sc, struct sge_fl *fl)
3138 struct fl_sdesc *sd;
3139 struct cluster_metadata *clm;
3140 struct cluster_layout *cll;
3144 for (i = 0; i < fl->cap; i++, sd++) {
3149 clm = cl_metadata(sc, fl, cll, sd->cl);
3150 if (sd->nmbuf == 0 ||
3151 (clm && atomic_fetchadd_int(&clm->refcount, -1) == 1)) {
3152 uma_zfree(sc->sge.sw_zone_info[cll->zidx].zone, sd->cl);
3157 free(fl->sdesc, M_CXGBE);
3162 t4_alloc_tx_maps(struct tx_maps *txmaps, bus_dma_tag_t tx_tag, int count,
3168 txmaps->map_total = txmaps->map_avail = count;
3169 txmaps->map_cidx = txmaps->map_pidx = 0;
3171 txmaps->maps = malloc(count * sizeof(struct tx_map), M_CXGBE,
3175 for (i = 0; i < count; i++, txm++) {
3176 rc = bus_dmamap_create(tx_tag, 0, &txm->map);
3185 bus_dmamap_destroy(tx_tag, txm->map);
3187 KASSERT(txm == txmaps->maps, ("%s: EDOOFUS", __func__));
3189 free(txmaps->maps, M_CXGBE);
3190 txmaps->maps = NULL;
3196 t4_free_tx_maps(struct tx_maps *txmaps, bus_dma_tag_t tx_tag)
3202 for (i = 0; i < txmaps->map_total; i++, txm++) {
3205 bus_dmamap_unload(tx_tag, txm->map);
3210 bus_dmamap_destroy(tx_tag, txm->map);
3213 free(txmaps->maps, M_CXGBE);
3214 txmaps->maps = NULL;
3218 * We'll do immediate data tx for non-TSO, but only when not coalescing. We're
3219 * willing to use upto 2 hardware descriptors which means a maximum of 96 bytes
3220 * of immediate data.
3224 - sizeof(struct fw_eth_tx_pkt_wr) \
3225 - sizeof(struct cpl_tx_pkt_core))
3228 * Returns non-zero on failure, no need to cleanup anything in that case.
3230 * Note 1: We always try to defrag the mbuf if required and return EFBIG only
3231 * if the resulting chain still won't fit in a tx descriptor.
3233 * Note 2: We'll pullup the mbuf chain if TSO is requested and the first mbuf
3234 * does not have the TCP header in it.
3237 get_pkt_sgl(struct sge_txq *txq, struct mbuf **fp, struct sgl *sgl,
3240 struct mbuf *m = *fp;
3241 struct tx_maps *txmaps;
3243 int rc, defragged = 0, n;
3245 TXQ_LOCK_ASSERT_OWNED(txq);
3247 if (m->m_pkthdr.tso_segsz)
3248 sgl_only = 1; /* Do not allow immediate data with LSO */
3250 start: sgl->nsegs = 0;
3252 if (m->m_pkthdr.len <= IMM_LEN && !sgl_only)
3253 return (0); /* nsegs = 0 tells caller to use imm. tx */
3255 txmaps = &txq->txmaps;
3256 if (txmaps->map_avail == 0) {
3260 txm = &txmaps->maps[txmaps->map_pidx];
3262 if (m->m_pkthdr.tso_segsz && m->m_len < 50) {
3263 *fp = m_pullup(m, 50);
3269 rc = bus_dmamap_load_mbuf_sg(txq->tx_tag, txm->map, m, sgl->seg,
3270 &sgl->nsegs, BUS_DMA_NOWAIT);
3271 if (rc == EFBIG && defragged == 0) {
3272 m = m_defrag(m, M_NOWAIT);
3284 txmaps->map_avail--;
3285 if (++txmaps->map_pidx == txmaps->map_total)
3286 txmaps->map_pidx = 0;
3288 KASSERT(sgl->nsegs > 0 && sgl->nsegs <= TX_SGL_SEGS,
3289 ("%s: bad DMA mapping (%d segments)", __func__, sgl->nsegs));
3292 * Store the # of flits required to hold this frame's SGL in nflits. An
3293 * SGL has a (ULPTX header + len0, addr0) tuple optionally followed by
3294 * multiple (len0 + len1, addr0, addr1) tuples. If addr1 is not used
3295 * then len1 must be set to 0.
3298 sgl->nflits = (3 * n) / 2 + (n & 1) + 2;
3305 * Releases all the txq resources used up in the specified sgl.
3308 free_pkt_sgl(struct sge_txq *txq, struct sgl *sgl)
3310 struct tx_maps *txmaps;
3313 TXQ_LOCK_ASSERT_OWNED(txq);
3315 if (sgl->nsegs == 0)
3316 return (0); /* didn't use any map */
3318 txmaps = &txq->txmaps;
3320 /* 1 pkt uses exactly 1 map, back it out */
3322 txmaps->map_avail++;
3323 if (txmaps->map_pidx > 0)
3326 txmaps->map_pidx = txmaps->map_total - 1;
3328 txm = &txmaps->maps[txmaps->map_pidx];
3329 bus_dmamap_unload(txq->tx_tag, txm->map);
3336 write_txpkt_wr(struct port_info *pi, struct sge_txq *txq, struct mbuf *m,
3339 struct sge_eq *eq = &txq->eq;
3340 struct fw_eth_tx_pkt_wr *wr;
3341 struct cpl_tx_pkt_core *cpl;
3342 uint32_t ctrl; /* used in many unrelated places */
3344 int nflits, ndesc, pktlen;
3345 struct tx_sdesc *txsd;
3348 TXQ_LOCK_ASSERT_OWNED(txq);
3350 pktlen = m->m_pkthdr.len;
3353 * Do we have enough flits to send this frame out?
3355 ctrl = sizeof(struct cpl_tx_pkt_core);
3356 if (m->m_pkthdr.tso_segsz) {
3357 nflits = TXPKT_LSO_WR_HDR;
3358 ctrl += sizeof(struct cpl_tx_pkt_lso_core);
3360 nflits = TXPKT_WR_HDR;
3362 nflits += sgl->nflits;
3364 nflits += howmany(pktlen, 8);
3367 ndesc = howmany(nflits, 8);
3368 if (ndesc > eq->avail)
3371 /* Firmware work request header */
3372 wr = (void *)&eq->desc[eq->pidx];
3373 wr->op_immdlen = htobe32(V_FW_WR_OP(FW_ETH_TX_PKT_WR) |
3374 V_FW_ETH_TX_PKT_WR_IMMDLEN(ctrl));
3375 ctrl = V_FW_WR_LEN16(howmany(nflits, 2));
3376 if (eq->avail == ndesc) {
3377 if (!(eq->flags & EQ_CRFLUSHED)) {
3378 ctrl |= F_FW_WR_EQUEQ | F_FW_WR_EQUIQ;
3379 eq->flags |= EQ_CRFLUSHED;
3381 eq->flags |= EQ_STALLED;
3384 wr->equiq_to_len16 = htobe32(ctrl);
3387 if (m->m_pkthdr.tso_segsz) {
3388 struct cpl_tx_pkt_lso_core *lso = (void *)(wr + 1);
3389 struct ether_header *eh;
3391 #if defined(INET) || defined(INET6)
3396 ctrl = V_LSO_OPCODE(CPL_TX_PKT_LSO) | F_LSO_FIRST_SLICE |
3399 eh = mtod(m, struct ether_header *);
3400 eh_type = ntohs(eh->ether_type);
3401 if (eh_type == ETHERTYPE_VLAN) {
3402 struct ether_vlan_header *evh = (void *)eh;
3404 ctrl |= V_LSO_ETHHDR_LEN(1);
3406 eh_type = ntohs(evh->evl_proto);
3412 case ETHERTYPE_IPV6:
3414 struct ip6_hdr *ip6 = l3hdr;
3417 * XXX-BZ For now we do not pretend to support
3418 * IPv6 extension headers.
3420 KASSERT(ip6->ip6_nxt == IPPROTO_TCP, ("%s: CSUM_TSO "
3421 "with ip6_nxt != TCP: %u", __func__, ip6->ip6_nxt));
3422 tcp = (struct tcphdr *)(ip6 + 1);
3424 ctrl |= V_LSO_IPHDR_LEN(sizeof(*ip6) >> 2) |
3425 V_LSO_TCPHDR_LEN(tcp->th_off);
3432 struct ip *ip = l3hdr;
3434 tcp = (void *)((uintptr_t)ip + ip->ip_hl * 4);
3435 ctrl |= V_LSO_IPHDR_LEN(ip->ip_hl) |
3436 V_LSO_TCPHDR_LEN(tcp->th_off);
3441 panic("%s: CSUM_TSO but no supported IP version "
3442 "(0x%04x)", __func__, eh_type);
3445 lso->lso_ctrl = htobe32(ctrl);
3446 lso->ipid_ofst = htobe16(0);
3447 lso->mss = htobe16(m->m_pkthdr.tso_segsz);
3448 lso->seqno_offset = htobe32(0);
3449 lso->len = htobe32(pktlen);
3451 cpl = (void *)(lso + 1);
3455 cpl = (void *)(wr + 1);
3457 /* Checksum offload */
3459 if (!(m->m_pkthdr.csum_flags & (CSUM_IP | CSUM_TSO)))
3460 ctrl1 |= F_TXPKT_IPCSUM_DIS;
3461 if (!(m->m_pkthdr.csum_flags & (CSUM_TCP | CSUM_UDP | CSUM_UDP_IPV6 |
3462 CSUM_TCP_IPV6 | CSUM_TSO)))
3463 ctrl1 |= F_TXPKT_L4CSUM_DIS;
3464 if (m->m_pkthdr.csum_flags & (CSUM_IP | CSUM_TCP | CSUM_UDP |
3465 CSUM_UDP_IPV6 | CSUM_TCP_IPV6 | CSUM_TSO))
3466 txq->txcsum++; /* some hardware assistance provided */
3468 /* VLAN tag insertion */
3469 if (m->m_flags & M_VLANTAG) {
3470 ctrl1 |= F_TXPKT_VLAN_VLD | V_TXPKT_VLAN(m->m_pkthdr.ether_vtag);
3471 txq->vlan_insertion++;
3475 cpl->ctrl0 = htobe32(V_TXPKT_OPCODE(CPL_TX_PKT) |
3476 V_TXPKT_INTF(pi->tx_chan) | V_TXPKT_PF(pi->adapter->pf));
3478 cpl->len = htobe16(pktlen);
3479 cpl->ctrl1 = htobe64(ctrl1);
3481 /* Software descriptor */
3482 txsd = &txq->sdesc[eq->pidx];
3483 txsd->desc_used = ndesc;
3485 eq->pending += ndesc;
3488 if (eq->pidx >= eq->cap)
3489 eq->pidx -= eq->cap;
3492 dst = (void *)(cpl + 1);
3493 if (sgl->nsegs > 0) {
3496 write_sgl_to_txd(eq, sgl, &dst);
3500 for (; m; m = m->m_next) {
3501 copy_to_txd(eq, mtod(m, caddr_t), &dst, m->m_len);
3507 KASSERT(pktlen == 0, ("%s: %d bytes left.", __func__, pktlen));
3517 * Returns 0 to indicate that m has been accepted into a coalesced tx work
3518 * request. It has either been folded into txpkts or txpkts was flushed and m
3519 * has started a new coalesced work request (as the first frame in a fresh
3522 * Returns non-zero to indicate a failure - caller is responsible for
3523 * transmitting m, if there was anything in txpkts it has been flushed.
3526 add_to_txpkts(struct port_info *pi, struct sge_txq *txq, struct txpkts *txpkts,
3527 struct mbuf *m, struct sgl *sgl)
3529 struct sge_eq *eq = &txq->eq;
3531 struct tx_sdesc *txsd;
3534 TXQ_LOCK_ASSERT_OWNED(txq);
3536 KASSERT(sgl->nsegs, ("%s: can't coalesce imm data", __func__));
3538 if (txpkts->npkt > 0) {
3539 flits = TXPKTS_PKT_HDR + sgl->nflits;
3540 can_coalesce = m->m_pkthdr.tso_segsz == 0 &&
3541 txpkts->nflits + flits <= TX_WR_FLITS &&
3542 txpkts->nflits + flits <= eq->avail * 8 &&
3543 txpkts->plen + m->m_pkthdr.len < 65536;
3547 txpkts->nflits += flits;
3548 txpkts->plen += m->m_pkthdr.len;
3550 txsd = &txq->sdesc[eq->pidx];
3557 * Couldn't coalesce m into txpkts. The first order of business
3558 * is to send txpkts on its way. Then we'll revisit m.
3560 write_txpkts_wr(txq, txpkts);
3564 * Check if we can start a new coalesced tx work request with m as
3565 * the first packet in it.
3568 KASSERT(txpkts->npkt == 0, ("%s: txpkts not empty", __func__));
3570 flits = TXPKTS_WR_HDR + sgl->nflits;
3571 can_coalesce = m->m_pkthdr.tso_segsz == 0 &&
3572 flits <= eq->avail * 8 && flits <= TX_WR_FLITS;
3574 if (can_coalesce == 0)
3578 * Start a fresh coalesced tx WR with m as the first frame in it.
3581 txpkts->nflits = flits;
3582 txpkts->flitp = &eq->desc[eq->pidx].flit[2];
3583 txpkts->plen = m->m_pkthdr.len;
3585 txsd = &txq->sdesc[eq->pidx];
3592 * Note that write_txpkts_wr can never run out of hardware descriptors (but
3593 * write_txpkt_wr can). add_to_txpkts ensures that a frame is accepted for
3594 * coalescing only if sufficient hardware descriptors are available.
3597 write_txpkts_wr(struct sge_txq *txq, struct txpkts *txpkts)
3599 struct sge_eq *eq = &txq->eq;
3600 struct fw_eth_tx_pkts_wr *wr;
3601 struct tx_sdesc *txsd;
3605 TXQ_LOCK_ASSERT_OWNED(txq);
3607 ndesc = howmany(txpkts->nflits, 8);
3609 wr = (void *)&eq->desc[eq->pidx];
3610 wr->op_pkd = htobe32(V_FW_WR_OP(FW_ETH_TX_PKTS_WR));
3611 ctrl = V_FW_WR_LEN16(howmany(txpkts->nflits, 2));
3612 if (eq->avail == ndesc) {
3613 if (!(eq->flags & EQ_CRFLUSHED)) {
3614 ctrl |= F_FW_WR_EQUEQ | F_FW_WR_EQUIQ;
3615 eq->flags |= EQ_CRFLUSHED;
3617 eq->flags |= EQ_STALLED;
3619 wr->equiq_to_len16 = htobe32(ctrl);
3620 wr->plen = htobe16(txpkts->plen);
3621 wr->npkt = txpkts->npkt;
3622 wr->r3 = wr->type = 0;
3624 /* Everything else already written */
3626 txsd = &txq->sdesc[eq->pidx];
3627 txsd->desc_used = ndesc;
3629 KASSERT(eq->avail >= ndesc, ("%s: out of descriptors", __func__));
3631 eq->pending += ndesc;
3634 if (eq->pidx >= eq->cap)
3635 eq->pidx -= eq->cap;
3637 txq->txpkts_pkts += txpkts->npkt;
3639 txpkts->npkt = 0; /* emptied */
3643 write_ulp_cpl_sgl(struct port_info *pi, struct sge_txq *txq,
3644 struct txpkts *txpkts, struct mbuf *m, struct sgl *sgl)
3646 struct ulp_txpkt *ulpmc;
3647 struct ulptx_idata *ulpsc;
3648 struct cpl_tx_pkt_core *cpl;
3649 struct sge_eq *eq = &txq->eq;
3650 uintptr_t flitp, start, end;
3654 KASSERT(txpkts->npkt > 0, ("%s: txpkts is empty", __func__));
3656 start = (uintptr_t)eq->desc;
3657 end = (uintptr_t)eq->spg;
3659 /* Checksum offload */
3661 if (!(m->m_pkthdr.csum_flags & (CSUM_IP | CSUM_TSO)))
3662 ctrl |= F_TXPKT_IPCSUM_DIS;
3663 if (!(m->m_pkthdr.csum_flags & (CSUM_TCP | CSUM_UDP | CSUM_UDP_IPV6 |
3664 CSUM_TCP_IPV6 | CSUM_TSO)))
3665 ctrl |= F_TXPKT_L4CSUM_DIS;
3666 if (m->m_pkthdr.csum_flags & (CSUM_IP | CSUM_TCP | CSUM_UDP |
3667 CSUM_UDP_IPV6 | CSUM_TCP_IPV6 | CSUM_TSO))
3668 txq->txcsum++; /* some hardware assistance provided */
3670 /* VLAN tag insertion */
3671 if (m->m_flags & M_VLANTAG) {
3672 ctrl |= F_TXPKT_VLAN_VLD | V_TXPKT_VLAN(m->m_pkthdr.ether_vtag);
3673 txq->vlan_insertion++;
3677 * The previous packet's SGL must have ended at a 16 byte boundary (this
3678 * is required by the firmware/hardware). It follows that flitp cannot
3679 * wrap around between the ULPTX master command and ULPTX subcommand (8
3680 * bytes each), and that it can not wrap around in the middle of the
3681 * cpl_tx_pkt_core either.
3683 flitp = (uintptr_t)txpkts->flitp;
3684 KASSERT((flitp & 0xf) == 0,
3685 ("%s: last SGL did not end at 16 byte boundary: %p",
3686 __func__, txpkts->flitp));
3688 /* ULP master command */
3689 ulpmc = (void *)flitp;
3690 ulpmc->cmd_dest = htonl(V_ULPTX_CMD(ULP_TX_PKT) | V_ULP_TXPKT_DEST(0) |
3691 V_ULP_TXPKT_FID(eq->iqid));
3692 ulpmc->len = htonl(howmany(sizeof(*ulpmc) + sizeof(*ulpsc) +
3693 sizeof(*cpl) + 8 * sgl->nflits, 16));
3695 /* ULP subcommand */
3696 ulpsc = (void *)(ulpmc + 1);
3697 ulpsc->cmd_more = htobe32(V_ULPTX_CMD((u32)ULP_TX_SC_IMM) |
3699 ulpsc->len = htobe32(sizeof(struct cpl_tx_pkt_core));
3701 flitp += sizeof(*ulpmc) + sizeof(*ulpsc);
3706 cpl = (void *)flitp;
3707 cpl->ctrl0 = htobe32(V_TXPKT_OPCODE(CPL_TX_PKT) |
3708 V_TXPKT_INTF(pi->tx_chan) | V_TXPKT_PF(pi->adapter->pf));
3710 cpl->len = htobe16(m->m_pkthdr.len);
3711 cpl->ctrl1 = htobe64(ctrl);
3713 flitp += sizeof(*cpl);
3717 /* SGL for this frame */
3718 dst = (caddr_t)flitp;
3719 txpkts->nflits += write_sgl_to_txd(eq, sgl, &dst);
3720 txpkts->flitp = (void *)dst;
3722 KASSERT(((uintptr_t)dst & 0xf) == 0,
3723 ("%s: SGL ends at %p (not a 16 byte boundary)", __func__, dst));
3727 * If the SGL ends on an address that is not 16 byte aligned, this function will
3728 * add a 0 filled flit at the end. It returns 1 in that case.
3731 write_sgl_to_txd(struct sge_eq *eq, struct sgl *sgl, caddr_t *to)
3733 __be64 *flitp, *end;
3734 struct ulptx_sgl *usgl;
3735 bus_dma_segment_t *seg;
3738 KASSERT(sgl->nsegs > 0 && sgl->nflits > 0,
3739 ("%s: bad SGL - nsegs=%d, nflits=%d",
3740 __func__, sgl->nsegs, sgl->nflits));
3742 KASSERT(((uintptr_t)(*to) & 0xf) == 0,
3743 ("%s: SGL must start at a 16 byte boundary: %p", __func__, *to));
3745 flitp = (__be64 *)(*to);
3746 end = flitp + sgl->nflits;
3748 usgl = (void *)flitp;
3751 * We start at a 16 byte boundary somewhere inside the tx descriptor
3752 * ring, so we're at least 16 bytes away from the status page. There is
3753 * no chance of a wrap around in the middle of usgl (which is 16 bytes).
3756 usgl->cmd_nsge = htobe32(V_ULPTX_CMD(ULP_TX_SC_DSGL) |
3757 V_ULPTX_NSGE(sgl->nsegs));
3758 usgl->len0 = htobe32(seg->ds_len);
3759 usgl->addr0 = htobe64(seg->ds_addr);
3762 if ((uintptr_t)end <= (uintptr_t)eq->spg) {
3764 /* Won't wrap around at all */
3766 for (i = 0; i < sgl->nsegs - 1; i++, seg++) {
3767 usgl->sge[i / 2].len[i & 1] = htobe32(seg->ds_len);
3768 usgl->sge[i / 2].addr[i & 1] = htobe64(seg->ds_addr);
3771 usgl->sge[i / 2].len[1] = htobe32(0);
3774 /* Will wrap somewhere in the rest of the SGL */
3776 /* 2 flits already written, write the rest flit by flit */
3777 flitp = (void *)(usgl + 1);
3778 for (i = 0; i < sgl->nflits - 2; i++) {
3779 if ((uintptr_t)flitp == (uintptr_t)eq->spg)
3780 flitp = (void *)eq->desc;
3781 *flitp++ = get_flit(seg, sgl->nsegs - 1, i);
3786 if ((uintptr_t)end & 0xf) {
3787 *(uint64_t *)end = 0;
3793 if ((uintptr_t)end == (uintptr_t)eq->spg)
3794 *to = (void *)eq->desc;
3802 copy_to_txd(struct sge_eq *eq, caddr_t from, caddr_t *to, int len)
3804 if (__predict_true((uintptr_t)(*to) + len <= (uintptr_t)eq->spg)) {
3805 bcopy(from, *to, len);
3808 int portion = (uintptr_t)eq->spg - (uintptr_t)(*to);
3810 bcopy(from, *to, portion);
3812 portion = len - portion; /* remaining */
3813 bcopy(from, (void *)eq->desc, portion);
3814 (*to) = (caddr_t)eq->desc + portion;
3819 ring_eq_db(struct adapter *sc, struct sge_eq *eq)
3824 pending = eq->pending;
3826 clrbit(&db, DOORBELL_WCWR);
3830 switch (ffs(db) - 1) {
3832 *eq->udb = htole32(V_QID(eq->udb_qid) | V_PIDX(pending));
3835 case DOORBELL_WCWR: {
3836 volatile uint64_t *dst, *src;
3840 * Queues whose 128B doorbell segment fits in the page do not
3841 * use relative qid (udb_qid is always 0). Only queues with
3842 * doorbell segments can do WCWR.
3844 KASSERT(eq->udb_qid == 0 && pending == 1,
3845 ("%s: inappropriate doorbell (0x%x, %d, %d) for eq %p",
3846 __func__, eq->doorbells, pending, eq->pidx, eq));
3848 dst = (volatile void *)((uintptr_t)eq->udb + UDBS_WR_OFFSET -
3850 i = eq->pidx ? eq->pidx - 1 : eq->cap - 1;
3851 src = (void *)&eq->desc[i];
3852 while (src != (void *)&eq->desc[i + 1])
3858 case DOORBELL_UDBWC:
3859 *eq->udb = htole32(V_QID(eq->udb_qid) | V_PIDX(pending));
3864 t4_write_reg(sc, MYPF_REG(A_SGE_PF_KDOORBELL),
3865 V_QID(eq->cntxt_id) | V_PIDX(pending));
3871 reclaimable(struct sge_eq *eq)
3875 cidx = eq->spg->cidx; /* stable snapshot */
3876 cidx = be16toh(cidx);
3878 if (cidx >= eq->cidx)
3879 return (cidx - eq->cidx);
3881 return (cidx + eq->cap - eq->cidx);
3885 * There are "can_reclaim" tx descriptors ready to be reclaimed. Reclaim as
3886 * many as possible but stop when there are around "n" mbufs to free.
3888 * The actual number reclaimed is provided as the return value.
3891 reclaim_tx_descs(struct sge_txq *txq, int can_reclaim, int n)
3893 struct tx_sdesc *txsd;
3894 struct tx_maps *txmaps;
3896 unsigned int reclaimed, maps;
3897 struct sge_eq *eq = &txq->eq;
3899 TXQ_LOCK_ASSERT_OWNED(txq);
3901 if (can_reclaim == 0)
3902 can_reclaim = reclaimable(eq);
3904 maps = reclaimed = 0;
3905 while (can_reclaim && maps < n) {
3908 txsd = &txq->sdesc[eq->cidx];
3909 ndesc = txsd->desc_used;
3911 /* Firmware doesn't return "partial" credits. */
3912 KASSERT(can_reclaim >= ndesc,
3913 ("%s: unexpected number of credits: %d, %d",
3914 __func__, can_reclaim, ndesc));
3916 maps += txsd->credits;
3919 can_reclaim -= ndesc;
3922 if (__predict_false(eq->cidx >= eq->cap))
3923 eq->cidx -= eq->cap;
3926 txmaps = &txq->txmaps;
3927 txm = &txmaps->maps[txmaps->map_cidx];
3931 eq->avail += reclaimed;
3932 KASSERT(eq->avail < eq->cap, /* avail tops out at (cap - 1) */
3933 ("%s: too many descriptors available", __func__));
3935 txmaps->map_avail += maps;
3936 KASSERT(txmaps->map_avail <= txmaps->map_total,
3937 ("%s: too many maps available", __func__));
3940 struct tx_map *next;
3943 if (__predict_false(txmaps->map_cidx + 1 == txmaps->map_total))
3944 next = txmaps->maps;
3947 bus_dmamap_unload(txq->tx_tag, txm->map);
3952 if (__predict_false(++txmaps->map_cidx == txmaps->map_total))
3953 txmaps->map_cidx = 0;
3960 write_eqflush_wr(struct sge_eq *eq)
3962 struct fw_eq_flush_wr *wr;
3964 EQ_LOCK_ASSERT_OWNED(eq);
3965 KASSERT(eq->avail > 0, ("%s: no descriptors left.", __func__));
3966 KASSERT(!(eq->flags & EQ_CRFLUSHED), ("%s: flushed already", __func__));
3968 wr = (void *)&eq->desc[eq->pidx];
3969 bzero(wr, sizeof(*wr));
3970 wr->opcode = FW_EQ_FLUSH_WR;
3971 wr->equiq_to_len16 = htobe32(V_FW_WR_LEN16(sizeof(*wr) / 16) |
3972 F_FW_WR_EQUEQ | F_FW_WR_EQUIQ);
3974 eq->flags |= (EQ_CRFLUSHED | EQ_STALLED);
3977 if (++eq->pidx == eq->cap)
3982 get_flit(bus_dma_segment_t *sgl, int nsegs, int idx)
3984 int i = (idx / 3) * 2;
3990 rc = htobe32(sgl[i].ds_len);
3992 rc |= (uint64_t)htobe32(sgl[i + 1].ds_len) << 32;
3997 return htobe64(sgl[i].ds_addr);
3999 return htobe64(sgl[i + 1].ds_addr);
4006 find_best_refill_source(struct adapter *sc, struct sge_fl *fl, int maxp)
4008 int8_t zidx, hwidx, idx;
4009 uint16_t region1, region3;
4010 int spare, spare_needed, n;
4011 struct sw_zone_info *swz;
4012 struct hw_buf_info *hwb, *hwb_list = &sc->sge.hw_buf_info[0];
4015 * Buffer Packing: Look for PAGE_SIZE or larger zone which has a bufsize
4016 * large enough for the max payload and cluster metadata. Otherwise
4017 * settle for the largest bufsize that leaves enough room in the cluster
4020 * Without buffer packing: Look for the smallest zone which has a
4021 * bufsize large enough for the max payload. Settle for the largest
4022 * bufsize available if there's nothing big enough for max payload.
4024 spare_needed = fl->flags & FL_BUF_PACKING ? CL_METADATA_SIZE : 0;
4025 swz = &sc->sge.sw_zone_info[0];
4027 for (zidx = 0; zidx < SW_ZONE_SIZES; zidx++, swz++) {
4028 if (swz->size > largest_rx_cluster) {
4029 if (__predict_true(hwidx != -1))
4033 * This is a misconfiguration. largest_rx_cluster is
4034 * preventing us from finding a refill source. See
4035 * dev.t5nex.<n>.buffer_sizes to figure out why.
4037 device_printf(sc->dev, "largest_rx_cluster=%u leaves no"
4038 " refill source for fl %p (dma %u). Ignored.\n",
4039 largest_rx_cluster, fl, maxp);
4041 for (idx = swz->head_hwidx; idx != -1; idx = hwb->next) {
4042 hwb = &hwb_list[idx];
4043 spare = swz->size - hwb->size;
4044 if (spare < spare_needed)
4047 hwidx = idx; /* best option so far */
4048 if (hwb->size >= maxp) {
4050 if ((fl->flags & FL_BUF_PACKING) == 0)
4051 goto done; /* stop looking (not packing) */
4053 if (swz->size >= safest_rx_cluster)
4054 goto done; /* stop looking (packing) */
4056 break; /* keep looking, next zone */
4060 /* A usable hwidx has been located. */
4062 hwb = &hwb_list[hwidx];
4064 swz = &sc->sge.sw_zone_info[zidx];
4066 region3 = swz->size - hwb->size;
4069 * Stay within this zone and see if there is a better match when mbuf
4070 * inlining is allowed. Remember that the hwidx's are sorted in
4071 * decreasing order of size (so in increasing order of spare area).
4073 for (idx = hwidx; idx != -1; idx = hwb->next) {
4074 hwb = &hwb_list[idx];
4075 spare = swz->size - hwb->size;
4077 if (allow_mbufs_in_cluster == 0 || hwb->size < maxp)
4079 if (spare < CL_METADATA_SIZE + MSIZE)
4081 n = (spare - CL_METADATA_SIZE) / MSIZE;
4082 if (n > howmany(hwb->size, maxp))
4086 if (fl->flags & FL_BUF_PACKING) {
4087 region1 = n * MSIZE;
4088 region3 = spare - region1;
4091 region3 = spare - region1;
4096 KASSERT(zidx >= 0 && zidx < SW_ZONE_SIZES,
4097 ("%s: bad zone %d for fl %p, maxp %d", __func__, zidx, fl, maxp));
4098 KASSERT(hwidx >= 0 && hwidx <= SGE_FLBUF_SIZES,
4099 ("%s: bad hwidx %d for fl %p, maxp %d", __func__, hwidx, fl, maxp));
4100 KASSERT(region1 + sc->sge.hw_buf_info[hwidx].size + region3 ==
4101 sc->sge.sw_zone_info[zidx].size,
4102 ("%s: bad buffer layout for fl %p, maxp %d. "
4103 "cl %d; r1 %d, payload %d, r3 %d", __func__, fl, maxp,
4104 sc->sge.sw_zone_info[zidx].size, region1,
4105 sc->sge.hw_buf_info[hwidx].size, region3));
4106 if (fl->flags & FL_BUF_PACKING || region1 > 0) {
4107 KASSERT(region3 >= CL_METADATA_SIZE,
4108 ("%s: no room for metadata. fl %p, maxp %d; "
4109 "cl %d; r1 %d, payload %d, r3 %d", __func__, fl, maxp,
4110 sc->sge.sw_zone_info[zidx].size, region1,
4111 sc->sge.hw_buf_info[hwidx].size, region3));
4112 KASSERT(region1 % MSIZE == 0,
4113 ("%s: bad mbuf region for fl %p, maxp %d. "
4114 "cl %d; r1 %d, payload %d, r3 %d", __func__, fl, maxp,
4115 sc->sge.sw_zone_info[zidx].size, region1,
4116 sc->sge.hw_buf_info[hwidx].size, region3));
4119 fl->cll_def.zidx = zidx;
4120 fl->cll_def.hwidx = hwidx;
4121 fl->cll_def.region1 = region1;
4122 fl->cll_def.region3 = region3;
4126 find_safe_refill_source(struct adapter *sc, struct sge_fl *fl)
4128 struct sge *s = &sc->sge;
4129 struct hw_buf_info *hwb;
4130 struct sw_zone_info *swz;
4134 if (fl->flags & FL_BUF_PACKING)
4135 hwidx = s->safe_hwidx2; /* with room for metadata */
4136 else if (allow_mbufs_in_cluster && s->safe_hwidx2 != -1) {
4137 hwidx = s->safe_hwidx2;
4138 hwb = &s->hw_buf_info[hwidx];
4139 swz = &s->sw_zone_info[hwb->zidx];
4140 spare = swz->size - hwb->size;
4142 /* no good if there isn't room for an mbuf as well */
4143 if (spare < CL_METADATA_SIZE + MSIZE)
4144 hwidx = s->safe_hwidx1;
4146 hwidx = s->safe_hwidx1;
4149 /* No fallback source */
4150 fl->cll_alt.hwidx = -1;
4151 fl->cll_alt.zidx = -1;
4156 hwb = &s->hw_buf_info[hwidx];
4157 swz = &s->sw_zone_info[hwb->zidx];
4158 spare = swz->size - hwb->size;
4159 fl->cll_alt.hwidx = hwidx;
4160 fl->cll_alt.zidx = hwb->zidx;
4161 if (allow_mbufs_in_cluster)
4162 fl->cll_alt.region1 = ((spare - CL_METADATA_SIZE) / MSIZE) * MSIZE;
4164 fl->cll_alt.region1 = 0;
4165 fl->cll_alt.region3 = spare - fl->cll_alt.region1;
4169 add_fl_to_sfl(struct adapter *sc, struct sge_fl *fl)
4171 mtx_lock(&sc->sfl_lock);
4173 if ((fl->flags & FL_DOOMED) == 0) {
4174 fl->flags |= FL_STARVING;
4175 TAILQ_INSERT_TAIL(&sc->sfl, fl, link);
4176 callout_reset(&sc->sfl_callout, hz / 5, refill_sfl, sc);
4179 mtx_unlock(&sc->sfl_lock);
4183 handle_sge_egr_update(struct sge_iq *iq, const struct rss_header *rss,
4186 const struct cpl_sge_egr_update *cpl = (const void *)(rss + 1);
4187 unsigned int qid = G_EGR_QID(ntohl(cpl->opcode_qid));
4188 struct adapter *sc = iq->adapter;
4189 struct sge *s = &sc->sge;
4192 KASSERT(m == NULL, ("%s: payload with opcode %02x", __func__,
4195 eq = s->eqmap[qid - s->eq_start];
4197 KASSERT(eq->flags & EQ_CRFLUSHED,
4198 ("%s: unsolicited egress update", __func__));
4199 eq->flags &= ~EQ_CRFLUSHED;
4202 if (__predict_false(eq->flags & EQ_DOOMED))
4204 else if (eq->flags & EQ_STALLED && can_resume_tx(eq))
4205 taskqueue_enqueue(sc->tq[eq->tx_chan], &eq->tx_task);
4211 /* handle_fw_msg works for both fw4_msg and fw6_msg because this is valid */
4212 CTASSERT(offsetof(struct cpl_fw4_msg, data) == \
4213 offsetof(struct cpl_fw6_msg, data));
4216 handle_fw_msg(struct sge_iq *iq, const struct rss_header *rss, struct mbuf *m)
4218 struct adapter *sc = iq->adapter;
4219 const struct cpl_fw6_msg *cpl = (const void *)(rss + 1);
4221 KASSERT(m == NULL, ("%s: payload with opcode %02x", __func__,
4224 if (cpl->type == FW_TYPE_RSSCPL || cpl->type == FW6_TYPE_RSSCPL) {
4225 const struct rss_header *rss2;
4227 rss2 = (const struct rss_header *)&cpl->data[0];
4228 return (sc->cpl_handler[rss2->opcode](iq, rss2, m));
4231 return (sc->fw_msg_handler[cpl->type](sc, &cpl->data[0]));
4235 sysctl_uint16(SYSCTL_HANDLER_ARGS)
4237 uint16_t *id = arg1;
4240 return sysctl_handle_int(oidp, &i, 0, req);
4244 sysctl_bufsizes(SYSCTL_HANDLER_ARGS)
4246 struct sge *s = arg1;
4247 struct hw_buf_info *hwb = &s->hw_buf_info[0];
4248 struct sw_zone_info *swz = &s->sw_zone_info[0];
4253 sbuf_new(&sb, NULL, 32, SBUF_AUTOEXTEND);
4254 for (i = 0; i < SGE_FLBUF_SIZES; i++, hwb++) {
4255 if (hwb->zidx >= 0 && swz[hwb->zidx].size <= largest_rx_cluster)
4260 sbuf_printf(&sb, "%u%c ", hwb->size, c);
4264 rc = sysctl_handle_string(oidp, sbuf_data(&sb), sbuf_len(&sb), req);