2 * Copyright (c) 2016 Chelsio Communications, Inc.
4 * Written by: John Baldwin <jhb@FreeBSD.org>
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28 #include <sys/cdefs.h>
29 __FBSDID("$FreeBSD$");
32 #include "opt_inet6.h"
34 #include <sys/param.h>
35 #include <sys/systm.h>
38 #include <sys/counter.h>
39 #include <sys/kernel.h>
40 #include <sys/module.h>
42 #include <dev/pci/pcivar.h>
43 #if defined(__i386__) || defined(__amd64__)
48 #include "common/common.h"
49 #include "common/t4_regs.h"
51 #include "t4_mp_ring.h"
56 * The Virtual Interfaces are connected to an internal switch on the chip
57 * which allows VIs attached to the same port to talk to each other even when
58 * the port link is down. As a result, we might want to always report a
59 * VF's link as being "up".
61 * XXX: Add a TUNABLE and possible per-device sysctl for this?
64 struct intrs_and_queues {
65 uint16_t intr_type; /* MSI, or MSI-X */
66 uint16_t nirq; /* Total # of vectors */
67 uint16_t intr_flags_10g;/* Interrupt flags for each 10G port */
68 uint16_t intr_flags_1g; /* Interrupt flags for each 1G port */
69 uint16_t ntxq10g; /* # of NIC txq's for each 10G port */
70 uint16_t nrxq10g; /* # of NIC rxq's for each 10G port */
71 uint16_t ntxq1g; /* # of NIC txq's for each 1G port */
72 uint16_t nrxq1g; /* # of NIC rxq's for each 1G port */
79 {0x4800, "Chelsio T440-dbg VF"},
80 {0x4801, "Chelsio T420-CR VF"},
81 {0x4802, "Chelsio T422-CR VF"},
82 {0x4803, "Chelsio T440-CR VF"},
83 {0x4804, "Chelsio T420-BCH VF"},
84 {0x4805, "Chelsio T440-BCH VF"},
85 {0x4806, "Chelsio T440-CH VF"},
86 {0x4807, "Chelsio T420-SO VF"},
87 {0x4808, "Chelsio T420-CX VF"},
88 {0x4809, "Chelsio T420-BT VF"},
89 {0x480a, "Chelsio T404-BT VF"},
90 {0x480e, "Chelsio T440-LP-CR VF"},
92 {0x5800, "Chelsio T580-dbg VF"},
93 {0x5801, "Chelsio T520-CR VF"}, /* 2 x 10G */
94 {0x5802, "Chelsio T522-CR VF"}, /* 2 x 10G, 2 X 1G */
95 {0x5803, "Chelsio T540-CR VF"}, /* 4 x 10G */
96 {0x5807, "Chelsio T520-SO VF"}, /* 2 x 10G, nomem */
97 {0x5809, "Chelsio T520-BT VF"}, /* 2 x 10GBaseT */
98 {0x580a, "Chelsio T504-BT VF"}, /* 4 x 1G */
99 {0x580d, "Chelsio T580-CR VF"}, /* 2 x 40G */
100 {0x580e, "Chelsio T540-LP-CR VF"}, /* 4 x 10G */
101 {0x5810, "Chelsio T580-LP-CR VF"}, /* 2 x 40G */
102 {0x5811, "Chelsio T520-LL-CR VF"}, /* 2 x 10G */
103 {0x5812, "Chelsio T560-CR VF"}, /* 1 x 40G, 2 x 10G */
104 {0x5814, "Chelsio T580-LP-SO-CR VF"}, /* 2 x 40G, nomem */
105 {0x5815, "Chelsio T502-BT VF"}, /* 2 x 1G */
107 {0x5804, "Chelsio T520-BCH VF"},
108 {0x5805, "Chelsio T540-BCH VF"},
109 {0x5806, "Chelsio T540-CH VF"},
110 {0x5808, "Chelsio T520-CX VF"},
111 {0x580b, "Chelsio B520-SR VF"},
112 {0x580c, "Chelsio B504-BT VF"},
113 {0x580f, "Chelsio Amsterdam VF"},
114 {0x5813, "Chelsio T580-CHR VF"},
117 {0x6800, "Chelsio T6-DBG-25 VF"}, /* 2 x 10/25G, debug */
118 {0x6801, "Chelsio T6225-CR VF"}, /* 2 x 10/25G */
119 {0x6802, "Chelsio T6225-SO-CR VF"}, /* 2 x 10/25G, nomem */
120 {0x6803, "Chelsio T6425-CR VF"}, /* 4 x 10/25G */
121 {0x6804, "Chelsio T6425-SO-CR VF"}, /* 4 x 10/25G, nomem */
122 {0x6805, "Chelsio T6225-OCP-SO VF"}, /* 2 x 10/25G, nomem */
123 {0x6806, "Chelsio T62100-OCP-SO VF"}, /* 2 x 40/50/100G, nomem */
124 {0x6807, "Chelsio T62100-LP-CR VF"}, /* 2 x 40/50/100G */
125 {0x6808, "Chelsio T62100-SO-CR VF"}, /* 2 x 40/50/100G, nomem */
126 {0x6809, "Chelsio T6210-BT VF"}, /* 2 x 10GBASE-T */
127 {0x680d, "Chelsio T62100-CR VF"}, /* 2 x 40/50/100G */
128 {0x6810, "Chelsio T6-DBG-100 VF"}, /* 2 x 40/50/100G, debug */
129 {0x6811, "Chelsio T6225-LL-CR VF"}, /* 2 x 10/25G */
130 {0x6814, "Chelsio T61100-OCP-SO VF"}, /* 1 x 40/50/100G, nomem */
131 {0x6815, "Chelsio T6201-BT VF"}, /* 2 x 1000BASE-T */
134 {0x6880, "Chelsio T6225 80 VF"},
135 {0x6881, "Chelsio T62100 81 VF"},
138 static d_ioctl_t t4vf_ioctl;
140 static struct cdevsw t4vf_cdevsw = {
141 .d_version = D_VERSION,
142 .d_ioctl = t4vf_ioctl,
147 t4vf_probe(device_t dev)
152 d = pci_get_device(dev);
153 for (i = 0; i < nitems(t4vf_pciids); i++) {
154 if (d == t4vf_pciids[i].device) {
155 device_set_desc(dev, t4vf_pciids[i].desc);
156 return (BUS_PROBE_DEFAULT);
163 t5vf_probe(device_t dev)
168 d = pci_get_device(dev);
169 for (i = 0; i < nitems(t5vf_pciids); i++) {
170 if (d == t5vf_pciids[i].device) {
171 device_set_desc(dev, t5vf_pciids[i].desc);
172 return (BUS_PROBE_DEFAULT);
179 t6vf_probe(device_t dev)
184 d = pci_get_device(dev);
185 for (i = 0; i < nitems(t6vf_pciids); i++) {
186 if (d == t6vf_pciids[i].device) {
187 device_set_desc(dev, t6vf_pciids[i].desc);
188 return (BUS_PROBE_DEFAULT);
194 #define FW_PARAM_DEV(param) \
195 (V_FW_PARAMS_MNEM(FW_PARAMS_MNEM_DEV) | \
196 V_FW_PARAMS_PARAM_X(FW_PARAMS_PARAM_DEV_##param))
197 #define FW_PARAM_PFVF(param) \
198 (V_FW_PARAMS_MNEM(FW_PARAMS_MNEM_PFVF) | \
199 V_FW_PARAMS_PARAM_X(FW_PARAMS_PARAM_PFVF_##param))
202 get_params__pre_init(struct adapter *sc)
205 uint32_t param[3], val[3];
207 param[0] = FW_PARAM_DEV(FWREV);
208 param[1] = FW_PARAM_DEV(TPREV);
209 param[2] = FW_PARAM_DEV(CCLK);
210 rc = -t4vf_query_params(sc, nitems(param), param, val);
212 device_printf(sc->dev,
213 "failed to query parameters (pre_init): %d.\n", rc);
217 sc->params.fw_vers = val[0];
218 sc->params.tp_vers = val[1];
219 sc->params.vpd.cclk = val[2];
221 snprintf(sc->fw_version, sizeof(sc->fw_version), "%u.%u.%u.%u",
222 G_FW_HDR_FW_VER_MAJOR(sc->params.fw_vers),
223 G_FW_HDR_FW_VER_MINOR(sc->params.fw_vers),
224 G_FW_HDR_FW_VER_MICRO(sc->params.fw_vers),
225 G_FW_HDR_FW_VER_BUILD(sc->params.fw_vers));
227 snprintf(sc->tp_version, sizeof(sc->tp_version), "%u.%u.%u.%u",
228 G_FW_HDR_FW_VER_MAJOR(sc->params.tp_vers),
229 G_FW_HDR_FW_VER_MINOR(sc->params.tp_vers),
230 G_FW_HDR_FW_VER_MICRO(sc->params.tp_vers),
231 G_FW_HDR_FW_VER_BUILD(sc->params.tp_vers));
237 get_params__post_init(struct adapter *sc)
241 rc = -t4vf_get_sge_params(sc);
243 device_printf(sc->dev,
244 "unable to retrieve adapter SGE parameters: %d\n", rc);
248 rc = -t4vf_get_rss_glb_config(sc);
250 device_printf(sc->dev,
251 "unable to retrieve adapter RSS parameters: %d\n", rc);
254 if (sc->params.rss.mode != FW_RSS_GLB_CONFIG_CMD_MODE_BASICVIRTUAL) {
255 device_printf(sc->dev,
256 "unable to operate with global RSS mode %d\n",
257 sc->params.rss.mode);
261 rc = t4_read_chip_settings(sc);
266 * Grab our Virtual Interface resource allocation, extract the
267 * features that we're interested in and do a bit of sanity testing on
270 rc = -t4vf_get_vfres(sc);
272 device_printf(sc->dev,
273 "unable to get virtual interface resources: %d\n", rc);
278 * Check for various parameter sanity issues.
280 if (sc->params.vfres.pmask == 0) {
281 device_printf(sc->dev, "no port access configured/usable!\n");
284 if (sc->params.vfres.nvi == 0) {
285 device_printf(sc->dev,
286 "no virtual interfaces configured/usable!\n");
289 sc->params.portvec = sc->params.vfres.pmask;
295 set_params__post_init(struct adapter *sc)
299 /* ask for encapsulated CPLs */
300 param = FW_PARAM_PFVF(CPLFW4MSG_ENCAP);
302 (void)t4vf_set_params(sc, 1, ¶m, &val);
311 cfg_itype_and_nqueues(struct adapter *sc, int n10g, int n1g,
312 struct intrs_and_queues *iaq)
314 struct vf_resources *vfres;
315 int nrxq10g, nrxq1g, nrxq;
316 int ntxq10g, ntxq1g, ntxq;
317 int itype, iq_avail, navail, rc;
320 * Figure out the layout of queues across our VIs and ensure
321 * we can allocate enough interrupts for our layout.
323 vfres = &sc->params.vfres;
324 bzero(iaq, sizeof(*iaq));
326 for (itype = INTR_MSIX; itype != 0; itype >>= 1) {
327 if (itype == INTR_INTX)
330 if (itype == INTR_MSIX)
331 navail = pci_msix_count(sc->dev);
333 navail = pci_msi_count(sc->dev);
338 iaq->intr_type = itype;
339 iaq->intr_flags_10g = 0;
340 iaq->intr_flags_1g = 0;
343 * XXX: The Linux driver reserves an Ingress Queue for
344 * forwarded interrupts when using MSI (but not MSI-X).
345 * It seems it just always asks for 2 interrupts and
346 * forwards all rxqs to the forwarded interrupt.
348 * We must reserve one IRQ for the for the firmware
351 * Every rxq requires an ingress queue with a free
352 * list and interrupts and an egress queue. Every txq
353 * requires an ETH egress queue.
355 iaq->nirq = T4VF_EXTRA_INTR;
358 * First, determine how many queues we can allocate.
359 * Start by finding the upper bound on rxqs from the
360 * limit on ingress queues.
362 iq_avail = vfres->niqflint - iaq->nirq;
363 if (iq_avail < n10g + n1g) {
364 device_printf(sc->dev,
365 "Not enough ingress queues (%d) for %d ports\n",
366 vfres->niqflint, n10g + n1g);
371 * Try to honor the cap on interrupts. If there aren't
372 * enough interrupts for at least one interrupt per
373 * port, then don't bother, we will just forward all
374 * interrupts to one interrupt in that case.
376 if (iaq->nirq + n10g + n1g <= navail) {
377 if (iq_avail > navail - iaq->nirq)
378 iq_avail = navail - iaq->nirq;
381 nrxq10g = t4_nrxq10g;
383 nrxq = n10g * nrxq10g + n1g * nrxq1g;
384 if (nrxq > iq_avail && nrxq1g > 1) {
385 /* Too many ingress queues. Try just 1 for 1G. */
387 nrxq = n10g * nrxq10g + n1g * nrxq1g;
389 if (nrxq > iq_avail) {
391 * Still too many ingress queues. Use what we
392 * can for each 10G port.
394 nrxq10g = (iq_avail - n1g) / n10g;
395 nrxq = n10g * nrxq10g + n1g * nrxq1g;
397 KASSERT(nrxq <= iq_avail, ("too many ingress queues"));
400 * Next, determine the upper bound on txqs from the limit
403 if (vfres->nethctrl < n10g + n1g) {
404 device_printf(sc->dev,
405 "Not enough ETH queues (%d) for %d ports\n",
406 vfres->nethctrl, n10g + n1g);
410 ntxq10g = t4_ntxq10g;
412 ntxq = n10g * ntxq10g + n1g * ntxq1g;
413 if (ntxq > vfres->nethctrl) {
414 /* Too many ETH queues. Try just 1 for 1G. */
416 ntxq = n10g * ntxq10g + n1g * ntxq1g;
418 if (ntxq > vfres->nethctrl) {
420 * Still too many ETH queues. Use what we
421 * can for each 10G port.
423 ntxq10g = (vfres->nethctrl - n1g) / n10g;
424 ntxq = n10g * ntxq10g + n1g * ntxq1g;
426 KASSERT(ntxq <= vfres->nethctrl, ("too many ETH queues"));
429 * Finally, ensure we have enough egress queues.
431 if (vfres->neq < (n10g + n1g) * 2) {
432 device_printf(sc->dev,
433 "Not enough egress queues (%d) for %d ports\n",
434 vfres->neq, n10g + n1g);
437 if (nrxq + ntxq > vfres->neq) {
438 /* Just punt and use 1 for everything. */
439 nrxq1g = ntxq1g = nrxq10g = ntxq10g = 1;
440 nrxq = n10g * nrxq10g + n1g * nrxq1g;
441 ntxq = n10g * ntxq10g + n1g * ntxq1g;
443 KASSERT(nrxq <= iq_avail, ("too many ingress queues"));
444 KASSERT(ntxq <= vfres->nethctrl, ("too many ETH queues"));
445 KASSERT(nrxq + ntxq <= vfres->neq, ("too many egress queues"));
448 * Do we have enough interrupts? For MSI the interrupts
449 * have to be a power of 2 as well.
452 iaq->ntxq10g = ntxq10g;
453 iaq->ntxq1g = ntxq1g;
454 iaq->nrxq10g = nrxq10g;
455 iaq->nrxq1g = nrxq1g;
456 if (iaq->nirq <= navail &&
457 (itype != INTR_MSI || powerof2(iaq->nirq))) {
459 if (itype == INTR_MSIX)
460 rc = pci_alloc_msix(sc->dev, &navail);
462 rc = pci_alloc_msi(sc->dev, &navail);
464 device_printf(sc->dev,
465 "failed to allocate vectors:%d, type=%d, req=%d, rcvd=%d\n",
466 itype, rc, iaq->nirq, navail);
469 if (navail == iaq->nirq) {
470 iaq->intr_flags_10g = INTR_RXQ;
471 iaq->intr_flags_1g = INTR_RXQ;
474 pci_release_msi(sc->dev);
477 /* Fall back to a single interrupt. */
480 if (itype == INTR_MSIX)
481 rc = pci_alloc_msix(sc->dev, &navail);
483 rc = pci_alloc_msi(sc->dev, &navail);
485 device_printf(sc->dev,
486 "failed to allocate vectors:%d, type=%d, req=%d, rcvd=%d\n",
487 itype, rc, iaq->nirq, navail);
488 iaq->intr_flags_10g = 0;
489 iaq->intr_flags_1g = 0;
493 device_printf(sc->dev,
494 "failed to find a usable interrupt type. "
495 "allowed=%d, msi-x=%d, msi=%d, intx=1", t4_intr_types,
496 pci_msix_count(sc->dev), pci_msi_count(sc->dev));
502 t4vf_attach(device_t dev)
505 int rc = 0, i, j, n10g, n1g, rqidx, tqidx;
506 struct make_dev_args mda;
507 struct intrs_and_queues iaq;
510 sc = device_get_softc(dev);
512 pci_enable_busmaster(dev);
513 pci_set_max_read_req(dev, 4096);
514 sc->params.pci.mps = pci_get_max_payload(dev);
518 sc->sge_gts_reg = VF_SGE_REG(A_SGE_VF_GTS);
519 sc->sge_kdoorbell_reg = VF_SGE_REG(A_SGE_VF_KDOORBELL);
520 snprintf(sc->lockname, sizeof(sc->lockname), "%s",
521 device_get_nameunit(dev));
522 mtx_init(&sc->sc_lock, sc->lockname, 0, MTX_DEF);
525 mtx_init(&sc->sfl_lock, "starving freelists", 0, MTX_DEF);
526 TAILQ_INIT(&sc->sfl);
527 callout_init_mtx(&sc->sfl_callout, &sc->sfl_lock, 0);
529 mtx_init(&sc->reg_lock, "indirect register access", 0, MTX_DEF);
531 rc = t4_map_bars_0_and_4(sc);
533 goto done; /* error message displayed already */
535 rc = -t4vf_prep_adapter(sc);
539 t4_init_devnames(sc);
540 if (sc->names == NULL) {
542 goto done; /* error message displayed already */
546 * Leave the 'pf' and 'mbox' values as zero. This ensures
547 * that various firmware messages do not set the fields which
548 * is the correct thing to do for a VF.
551 memset(sc->chan_map, 0xff, sizeof(sc->chan_map));
553 make_dev_args_init(&mda);
554 mda.mda_devsw = &t4vf_cdevsw;
555 mda.mda_uid = UID_ROOT;
556 mda.mda_gid = GID_WHEEL;
558 mda.mda_si_drv1 = sc;
559 rc = make_dev_s(&mda, &sc->cdev, "%s", device_get_nameunit(dev));
561 device_printf(dev, "failed to create nexus char device: %d.\n",
564 #if defined(__i386__)
565 if ((cpu_feature & CPUID_CX8) == 0) {
566 device_printf(dev, "64 bit atomics not available.\n");
573 * Some environments do not properly handle PCIE FLRs -- e.g. in Linux
574 * 2.6.31 and later we can't call pci_reset_function() in order to
575 * issue an FLR because of a self- deadlock on the device semaphore.
576 * Meanwhile, the OS infrastructure doesn't issue FLRs in all the
577 * cases where they're needed -- for instance, some versions of KVM
578 * fail to reset "Assigned Devices" when the VM reboots. Therefore we
579 * use the firmware based reset in order to reset any per function
582 rc = -t4vf_fw_reset(sc);
584 device_printf(dev, "FW reset failed: %d\n", rc);
590 * Grab basic operational parameters. These will predominantly have
591 * been set up by the Physical Function Driver or will be hard coded
592 * into the adapter. We just have to live with them ... Note that
593 * we _must_ get our VPD parameters before our SGE parameters because
594 * we need to know the adapter's core clock from the VPD in order to
595 * properly decode the SGE Timer Values.
597 rc = get_params__pre_init(sc);
599 goto done; /* error message displayed already */
600 rc = get_params__post_init(sc);
602 goto done; /* error message displayed already */
604 rc = set_params__post_init(sc);
606 goto done; /* error message displayed already */
608 rc = t4_map_bar_2(sc);
610 goto done; /* error message displayed already */
612 rc = t4_create_dma_tag(sc);
614 goto done; /* error message displayed already */
617 * The number of "ports" which we support is equal to the number of
618 * Virtual Interfaces with which we've been provisioned.
620 sc->params.nports = imin(sc->params.vfres.nvi, MAX_NPORTS);
623 * We may have been provisioned with more VIs than the number of
624 * ports we're allowed to access (our Port Access Rights Mask).
625 * Just use a single VI for each port.
627 sc->params.nports = imin(sc->params.nports,
628 bitcount32(sc->params.vfres.pmask));
632 * XXX: The Linux VF driver will lower nports if it thinks there
633 * are too few resources in vfres (niqflint, nethctrl, neq).
638 * First pass over all the ports - allocate VIs and initialize some
639 * basic parameters like mac address, port type, etc. We also figure
640 * out whether a port is 10G or 1G and use that information when
641 * calculating how many interrupts to attempt to allocate.
644 for_each_port(sc, i) {
645 struct port_info *pi;
647 pi = malloc(sizeof(*pi), M_CXGBE, M_ZERO | M_WAITOK);
650 /* These must be set before t4_port_init */
654 pi->vi = malloc(sizeof(struct vi_info) * pi->nvi, M_CXGBE,
658 * Allocate the "main" VI and initialize parameters
661 rc = -t4_port_init(sc, sc->mbox, sc->pf, 0, i);
663 device_printf(dev, "unable to initialize port %d: %d\n",
665 free(pi->vi, M_CXGBE);
671 /* No t4_link_start. */
673 snprintf(pi->lockname, sizeof(pi->lockname), "%sp%d",
674 device_get_nameunit(dev), i);
675 mtx_init(&pi->pi_lock, pi->lockname, 0, MTX_DEF);
676 sc->chan_map[pi->tx_chan] = i;
678 if (port_top_speed(pi) >= 10) {
684 pi->dev = device_add_child(dev, sc->names->vf_ifnet_name, -1);
685 if (pi->dev == NULL) {
687 "failed to add device for port %d.\n", i);
691 pi->vi[0].dev = pi->dev;
692 device_set_softc(pi->dev, pi);
696 * Interrupt type, # of interrupts, # of rx/tx queues, etc.
698 rc = cfg_itype_and_nqueues(sc, n10g, n1g, &iaq);
700 goto done; /* error message displayed already */
702 sc->intr_type = iaq.intr_type;
703 sc->intr_count = iaq.nirq;
706 s->nrxq = n10g * iaq.nrxq10g + n1g * iaq.nrxq1g;
707 s->ntxq = n10g * iaq.ntxq10g + n1g * iaq.ntxq1g;
708 s->neq = s->ntxq + s->nrxq; /* the free list in an rxq is an eq */
709 s->neq += sc->params.nports + 1;/* ctrl queues: 1 per port + 1 mgmt */
710 s->niq = s->nrxq + 1; /* 1 extra for firmware event queue */
712 s->rxq = malloc(s->nrxq * sizeof(struct sge_rxq), M_CXGBE,
714 s->txq = malloc(s->ntxq * sizeof(struct sge_txq), M_CXGBE,
716 s->iqmap = malloc(s->niq * sizeof(struct sge_iq *), M_CXGBE,
718 s->eqmap = malloc(s->neq * sizeof(struct sge_eq *), M_CXGBE,
721 sc->irq = malloc(sc->intr_count * sizeof(struct irq), M_CXGBE,
725 * Second pass over the ports. This time we know the number of rx and
726 * tx queues that each port should get.
729 for_each_port(sc, i) {
730 struct port_info *pi = sc->port[i];
736 for_each_vi(pi, j, vi) {
738 vi->qsize_rxq = t4_qsize_rxq;
739 vi->qsize_txq = t4_qsize_txq;
741 vi->first_rxq = rqidx;
742 vi->first_txq = tqidx;
743 if (port_top_speed(pi) >= 10) {
744 vi->tmr_idx = t4_tmr_idx_10g;
745 vi->pktc_idx = t4_pktc_idx_10g;
746 vi->flags |= iaq.intr_flags_10g & INTR_RXQ;
747 vi->nrxq = j == 0 ? iaq.nrxq10g : 1;
748 vi->ntxq = j == 0 ? iaq.ntxq10g : 1;
750 vi->tmr_idx = t4_tmr_idx_1g;
751 vi->pktc_idx = t4_pktc_idx_1g;
752 vi->flags |= iaq.intr_flags_1g & INTR_RXQ;
753 vi->nrxq = j == 0 ? iaq.nrxq1g : 1;
754 vi->ntxq = j == 0 ? iaq.ntxq1g : 1;
759 vi->rsrv_noflowq = 0;
763 rc = t4_setup_intr_handlers(sc);
766 "failed to setup interrupt handlers: %d\n", rc);
770 rc = bus_generic_attach(dev);
773 "failed to attach all child ports: %d\n", rc);
778 "%d ports, %d %s interrupt%s, %d eq, %d iq\n",
779 sc->params.nports, sc->intr_count, sc->intr_type == INTR_MSIX ?
780 "MSI-X" : "MSI", sc->intr_count > 1 ? "s" : "", sc->sge.neq,
785 t4_detach_common(dev);
793 get_regs(struct adapter *sc, struct t4_regdump *regs, uint8_t *buf)
796 /* 0x3f is used as the revision for VFs. */
797 regs->version = chip_id(sc) | (0x3f << 10);
798 t4_get_regs(sc, buf, regs->len);
802 t4_clr_vi_stats(struct adapter *sc)
806 for (reg = A_MPS_VF_STAT_TX_VF_BCAST_BYTES_L;
807 reg <= A_MPS_VF_STAT_RX_VF_ERR_FRAMES_H; reg += 4)
808 t4_write_reg(sc, VF_MPS_REG(reg), 0);
812 t4vf_ioctl(struct cdev *dev, unsigned long cmd, caddr_t data, int fflag,
816 struct adapter *sc = dev->si_drv1;
818 rc = priv_check(td, PRIV_DRIVER);
823 case CHELSIO_T4_GETREG: {
824 struct t4_reg *edata = (struct t4_reg *)data;
826 if ((edata->addr & 0x3) != 0 || edata->addr >= sc->mmio_len)
829 if (edata->size == 4)
830 edata->val = t4_read_reg(sc, edata->addr);
831 else if (edata->size == 8)
832 edata->val = t4_read_reg64(sc, edata->addr);
838 case CHELSIO_T4_SETREG: {
839 struct t4_reg *edata = (struct t4_reg *)data;
841 if ((edata->addr & 0x3) != 0 || edata->addr >= sc->mmio_len)
844 if (edata->size == 4) {
845 if (edata->val & 0xffffffff00000000)
847 t4_write_reg(sc, edata->addr, (uint32_t) edata->val);
848 } else if (edata->size == 8)
849 t4_write_reg64(sc, edata->addr, edata->val);
854 case CHELSIO_T4_REGDUMP: {
855 struct t4_regdump *regs = (struct t4_regdump *)data;
856 int reglen = t4_get_regs_len(sc);
859 if (regs->len < reglen) {
860 regs->len = reglen; /* hint to the caller */
865 buf = malloc(reglen, M_CXGBE, M_WAITOK | M_ZERO);
866 get_regs(sc, regs, buf);
867 rc = copyout(buf, regs->data, reglen);
871 case CHELSIO_T4_CLEAR_STATS: {
873 u_int port_id = *(uint32_t *)data;
874 struct port_info *pi;
877 if (port_id >= sc->params.nports)
879 pi = sc->port[port_id];
882 pi->tx_parse_error = 0;
886 * Since this command accepts a port, clear stats for
887 * all VIs on this port.
889 for_each_vi(pi, v, vi) {
890 if (vi->flags & VI_INIT_DONE) {
894 for_each_rxq(vi, i, rxq) {
895 #if defined(INET) || defined(INET6)
896 rxq->lro.lro_queued = 0;
897 rxq->lro.lro_flushed = 0;
900 rxq->vlan_extraction = 0;
903 for_each_txq(vi, i, txq) {
906 txq->vlan_insertion = 0;
910 txq->txpkts0_wrs = 0;
911 txq->txpkts1_wrs = 0;
912 txq->txpkts0_pkts = 0;
913 txq->txpkts1_pkts = 0;
914 mp_ring_reset_stats(txq->r);
920 case CHELSIO_T4_SCHED_CLASS:
921 rc = t4_set_sched_class(sc, (struct t4_sched_params *)data);
923 case CHELSIO_T4_SCHED_QUEUE:
924 rc = t4_set_sched_queue(sc, (struct t4_sched_queue *)data);
933 static device_method_t t4vf_methods[] = {
934 DEVMETHOD(device_probe, t4vf_probe),
935 DEVMETHOD(device_attach, t4vf_attach),
936 DEVMETHOD(device_detach, t4_detach_common),
941 static driver_t t4vf_driver = {
944 sizeof(struct adapter)
947 static device_method_t t5vf_methods[] = {
948 DEVMETHOD(device_probe, t5vf_probe),
949 DEVMETHOD(device_attach, t4vf_attach),
950 DEVMETHOD(device_detach, t4_detach_common),
955 static driver_t t5vf_driver = {
958 sizeof(struct adapter)
961 static device_method_t t6vf_methods[] = {
962 DEVMETHOD(device_probe, t6vf_probe),
963 DEVMETHOD(device_attach, t4vf_attach),
964 DEVMETHOD(device_detach, t4_detach_common),
969 static driver_t t6vf_driver = {
972 sizeof(struct adapter)
975 static driver_t cxgbev_driver = {
978 sizeof(struct port_info)
981 static driver_t cxlv_driver = {
984 sizeof(struct port_info)
987 static driver_t ccv_driver = {
990 sizeof(struct port_info)
993 static devclass_t t4vf_devclass, t5vf_devclass, t6vf_devclass;
994 static devclass_t cxgbev_devclass, cxlv_devclass, ccv_devclass;
996 DRIVER_MODULE(t4vf, pci, t4vf_driver, t4vf_devclass, 0, 0);
997 MODULE_VERSION(t4vf, 1);
998 MODULE_DEPEND(t4vf, t4nex, 1, 1, 1);
1000 DRIVER_MODULE(t5vf, pci, t5vf_driver, t5vf_devclass, 0, 0);
1001 MODULE_VERSION(t5vf, 1);
1002 MODULE_DEPEND(t5vf, t5nex, 1, 1, 1);
1004 DRIVER_MODULE(t6vf, pci, t6vf_driver, t6vf_devclass, 0, 0);
1005 MODULE_VERSION(t6vf, 1);
1006 MODULE_DEPEND(t6vf, t6nex, 1, 1, 1);
1008 DRIVER_MODULE(cxgbev, t4vf, cxgbev_driver, cxgbev_devclass, 0, 0);
1009 MODULE_VERSION(cxgbev, 1);
1011 DRIVER_MODULE(cxlv, t5vf, cxlv_driver, cxlv_devclass, 0, 0);
1012 MODULE_VERSION(cxlv, 1);
1014 DRIVER_MODULE(ccv, t6vf, ccv_driver, ccv_devclass, 0, 0);
1015 MODULE_VERSION(ccv, 1);