1 /* r128_drm.h -- Public header for the r128 driver -*- linux-c -*-
2 * Created: Wed Apr 5 19:24:19 2000 by kevin@precisioninsight.com
5 * Copyright 2000 Precision Insight, Inc., Cedar Park, Texas.
6 * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
9 * Permission is hereby granted, free of charge, to any person obtaining a
10 * copy of this software and associated documentation files (the "Software"),
11 * to deal in the Software without restriction, including without limitation
12 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
13 * and/or sell copies of the Software, and to permit persons to whom the
14 * Software is furnished to do so, subject to the following conditions:
16 * The above copyright notice and this permission notice (including the next
17 * paragraph) shall be included in all copies or substantial portions of the
20 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
21 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
22 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
23 * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
24 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
25 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
26 * DEALINGS IN THE SOFTWARE.
29 * Gareth Hughes <gareth@valinux.com>
30 * Kevin E. Martin <martin@valinux.com>
33 #include <sys/cdefs.h>
34 __FBSDID("$FreeBSD$");
36 #ifndef __R128_DRM_H__
37 #define __R128_DRM_H__
39 /* WARNING: If you change any of these defines, make sure to change the
40 * defines in the X server file (r128_sarea.h)
42 #ifndef __R128_SAREA_DEFINES__
43 #define __R128_SAREA_DEFINES__
45 /* What needs to be changed for the current vertex buffer?
47 #define R128_UPLOAD_CONTEXT 0x001
48 #define R128_UPLOAD_SETUP 0x002
49 #define R128_UPLOAD_TEX0 0x004
50 #define R128_UPLOAD_TEX1 0x008
51 #define R128_UPLOAD_TEX0IMAGES 0x010
52 #define R128_UPLOAD_TEX1IMAGES 0x020
53 #define R128_UPLOAD_CORE 0x040
54 #define R128_UPLOAD_MASKS 0x080
55 #define R128_UPLOAD_WINDOW 0x100
56 #define R128_UPLOAD_CLIPRECTS 0x200 /* handled client-side */
57 #define R128_REQUIRE_QUIESCENCE 0x400
58 #define R128_UPLOAD_ALL 0x7ff
60 #define R128_FRONT 0x1
62 #define R128_DEPTH 0x4
66 #define R128_POINTS 0x1
67 #define R128_LINES 0x2
68 #define R128_LINE_STRIP 0x3
69 #define R128_TRIANGLES 0x4
70 #define R128_TRIANGLE_FAN 0x5
71 #define R128_TRIANGLE_STRIP 0x6
73 /* Vertex/indirect buffer size
75 #define R128_BUFFER_SIZE 16384
77 /* Byte offsets for indirect buffer data
79 #define R128_INDEX_PRIM_OFFSET 20
80 #define R128_HOSTDATA_BLIT_OFFSET 32
82 /* Keep these small for testing.
84 #define R128_NR_SAREA_CLIPRECTS 12
86 /* There are 2 heaps (local/AGP). Each region within a heap is a
87 * minimum of 64k, and there are at most 64 of them per heap.
89 #define R128_LOCAL_TEX_HEAP 0
90 #define R128_AGP_TEX_HEAP 1
91 #define R128_NR_TEX_HEAPS 2
92 #define R128_NR_TEX_REGIONS 64
93 #define R128_LOG_TEX_GRANULARITY 16
95 #define R128_NR_CONTEXT_REGS 12
97 #define R128_MAX_TEXTURE_LEVELS 11
98 #define R128_MAX_TEXTURE_UNITS 2
100 #endif /* __R128_SAREA_DEFINES__ */
103 /* Context state - can be written in one large chunk */
104 unsigned int dst_pitch_offset_c;
105 unsigned int dp_gui_master_cntl_c;
106 unsigned int sc_top_left_c;
107 unsigned int sc_bottom_right_c;
108 unsigned int z_offset_c;
109 unsigned int z_pitch_c;
110 unsigned int z_sten_cntl_c;
111 unsigned int tex_cntl_c;
112 unsigned int misc_3d_state_cntl_reg;
113 unsigned int texture_clr_cmp_clr_c;
114 unsigned int texture_clr_cmp_msk_c;
115 unsigned int fog_color_c;
118 unsigned int tex_size_pitch_c;
119 unsigned int constant_color_c;
122 unsigned int pm4_vc_fpu_setup;
123 unsigned int setup_cntl;
126 unsigned int dp_write_mask;
127 unsigned int sten_ref_mask_c;
128 unsigned int plane_3d_mask_c;
131 unsigned int window_xy_offset;
134 unsigned int scale_3d_cntl;
135 } drm_r128_context_regs_t;
137 /* Setup registers for each texture unit
140 unsigned int tex_cntl;
141 unsigned int tex_combine_cntl;
142 unsigned int tex_size_pitch;
143 unsigned int tex_offset[R128_MAX_TEXTURE_LEVELS];
144 unsigned int tex_border_color;
145 } drm_r128_texture_regs_t;
147 typedef struct drm_r128_sarea {
148 /* The channel for communication of state information to the kernel
149 * on firing a vertex buffer.
151 drm_r128_context_regs_t context_state;
152 drm_r128_texture_regs_t tex_state[R128_MAX_TEXTURE_UNITS];
154 unsigned int vertsize;
155 unsigned int vc_format;
157 /* The current cliprects, or a subset thereof.
159 struct drm_clip_rect boxes[R128_NR_SAREA_CLIPRECTS];
162 /* Counters for client-side throttling of rendering clients.
164 unsigned int last_frame;
165 unsigned int last_dispatch;
167 struct drm_tex_region tex_list[R128_NR_TEX_HEAPS][R128_NR_TEX_REGIONS + 1];
168 unsigned int tex_age[R128_NR_TEX_HEAPS];
170 int pfAllowPageFlip; /* number of 3d windows (0,1,2 or more) */
171 int pfCurrentPage; /* which buffer is being displayed? */
174 /* WARNING: If you change any of these defines, make sure to change the
175 * defines in the Xserver file (xf86drmR128.h)
178 /* Rage 128 specific ioctls
179 * The device specific ioctl range is 0x40 to 0x79.
181 #define DRM_R128_INIT 0x00
182 #define DRM_R128_CCE_START 0x01
183 #define DRM_R128_CCE_STOP 0x02
184 #define DRM_R128_CCE_RESET 0x03
185 #define DRM_R128_CCE_IDLE 0x04
187 #define DRM_R128_RESET 0x06
188 #define DRM_R128_SWAP 0x07
189 #define DRM_R128_CLEAR 0x08
190 #define DRM_R128_VERTEX 0x09
191 #define DRM_R128_INDICES 0x0a
192 #define DRM_R128_BLIT 0x0b
193 #define DRM_R128_DEPTH 0x0c
194 #define DRM_R128_STIPPLE 0x0d
196 #define DRM_R128_INDIRECT 0x0f
197 #define DRM_R128_FULLSCREEN 0x10
198 #define DRM_R128_CLEAR2 0x11
199 #define DRM_R128_GETPARAM 0x12
200 #define DRM_R128_FLIP 0x13
202 #define DRM_IOCTL_R128_INIT DRM_IOW( DRM_COMMAND_BASE + DRM_R128_INIT, drm_r128_init_t)
203 #define DRM_IOCTL_R128_CCE_START DRM_IO( DRM_COMMAND_BASE + DRM_R128_CCE_START)
204 #define DRM_IOCTL_R128_CCE_STOP DRM_IOW( DRM_COMMAND_BASE + DRM_R128_CCE_STOP, drm_r128_cce_stop_t)
205 #define DRM_IOCTL_R128_CCE_RESET DRM_IO( DRM_COMMAND_BASE + DRM_R128_CCE_RESET)
206 #define DRM_IOCTL_R128_CCE_IDLE DRM_IO( DRM_COMMAND_BASE + DRM_R128_CCE_IDLE)
208 #define DRM_IOCTL_R128_RESET DRM_IO( DRM_COMMAND_BASE + DRM_R128_RESET)
209 #define DRM_IOCTL_R128_SWAP DRM_IO( DRM_COMMAND_BASE + DRM_R128_SWAP)
210 #define DRM_IOCTL_R128_CLEAR DRM_IOW( DRM_COMMAND_BASE + DRM_R128_CLEAR, drm_r128_clear_t)
211 #define DRM_IOCTL_R128_VERTEX DRM_IOW( DRM_COMMAND_BASE + DRM_R128_VERTEX, drm_r128_vertex_t)
212 #define DRM_IOCTL_R128_INDICES DRM_IOW( DRM_COMMAND_BASE + DRM_R128_INDICES, drm_r128_indices_t)
213 #define DRM_IOCTL_R128_BLIT DRM_IOW( DRM_COMMAND_BASE + DRM_R128_BLIT, drm_r128_blit_t)
214 #define DRM_IOCTL_R128_DEPTH DRM_IOW( DRM_COMMAND_BASE + DRM_R128_DEPTH, drm_r128_depth_t)
215 #define DRM_IOCTL_R128_STIPPLE DRM_IOW( DRM_COMMAND_BASE + DRM_R128_STIPPLE, drm_r128_stipple_t)
217 #define DRM_IOCTL_R128_INDIRECT DRM_IOWR(DRM_COMMAND_BASE + DRM_R128_INDIRECT, drm_r128_indirect_t)
218 #define DRM_IOCTL_R128_FULLSCREEN DRM_IOW( DRM_COMMAND_BASE + DRM_R128_FULLSCREEN, drm_r128_fullscreen_t)
219 #define DRM_IOCTL_R128_CLEAR2 DRM_IOW( DRM_COMMAND_BASE + DRM_R128_CLEAR2, drm_r128_clear2_t)
220 #define DRM_IOCTL_R128_GETPARAM DRM_IOWR( DRM_COMMAND_BASE + DRM_R128_GETPARAM, drm_r128_getparam_t)
221 #define DRM_IOCTL_R128_FLIP DRM_IO( DRM_COMMAND_BASE + DRM_R128_FLIP)
223 typedef struct drm_r128_init {
225 R128_INIT_CCE = 0x01,
226 R128_CLEANUP_CCE = 0x02
228 unsigned long sarea_priv_offset;
236 unsigned int front_offset, front_pitch;
237 unsigned int back_offset, back_pitch;
238 unsigned int depth_bpp;
239 unsigned int depth_offset, depth_pitch;
240 unsigned int span_offset;
242 unsigned long fb_offset;
243 unsigned long mmio_offset;
244 unsigned long ring_offset;
245 unsigned long ring_rptr_offset;
246 unsigned long buffers_offset;
247 unsigned long agp_textures_offset;
250 typedef struct drm_r128_cce_stop {
253 } drm_r128_cce_stop_t;
255 typedef struct drm_r128_clear {
257 unsigned int clear_color;
258 unsigned int clear_depth;
259 unsigned int color_mask;
260 unsigned int depth_mask;
263 typedef struct drm_r128_vertex {
265 int idx; /* Index of vertex buffer */
266 int count; /* Number of vertices in buffer */
267 int discard; /* Client finished with buffer? */
270 typedef struct drm_r128_indices {
275 int discard; /* Client finished with buffer? */
276 } drm_r128_indices_t;
278 typedef struct drm_r128_blit {
284 unsigned short width, height;
287 typedef struct drm_r128_depth {
289 R128_WRITE_SPAN = 0x01,
290 R128_WRITE_PIXELS = 0x02,
291 R128_READ_SPAN = 0x03,
292 R128_READ_PIXELS = 0x04
297 unsigned int __user *buffer;
298 unsigned char __user *mask;
301 typedef struct drm_r128_stipple {
302 unsigned int __user *mask;
303 } drm_r128_stipple_t;
305 typedef struct drm_r128_indirect {
310 } drm_r128_indirect_t;
312 typedef struct drm_r128_fullscreen {
314 R128_INIT_FULLSCREEN = 0x01,
315 R128_CLEANUP_FULLSCREEN = 0x02
317 } drm_r128_fullscreen_t;
319 /* 2.3: An ioctl to get parameters that aren't available to the 3d
320 * client any other way.
322 #define R128_PARAM_IRQ_NR 1
324 typedef struct drm_r128_getparam {
327 } drm_r128_getparam_t;