4 #define R100_TRACK_MAX_TEXTURE 3
5 #define R200_TRACK_MAX_TEXTURE 6
6 #define R300_TRACK_MAX_TEXTURE 16
14 struct r100_cs_track_cb {
15 struct radeon_bo *robj;
21 struct r100_cs_track_array {
22 struct radeon_bo *robj;
26 struct r100_cs_cube_info {
27 struct radeon_bo *robj;
33 #define R100_TRACK_COMP_NONE 0
34 #define R100_TRACK_COMP_DXT1 1
35 #define R100_TRACK_COMP_DXT35 2
37 struct r100_cs_track_texture {
38 struct radeon_bo *robj;
39 struct r100_cs_cube_info cube_info[5]; /* info for 5 non-primary faces */
45 unsigned tex_coord_type;
54 unsigned compress_format;
57 struct r100_cs_track {
63 unsigned vap_alt_nverts;
67 unsigned color_channel_mask;
68 struct r100_cs_track_array arrays[16];
69 struct r100_cs_track_cb cb[R300_MAX_CB];
70 struct r100_cs_track_cb zb;
71 struct r100_cs_track_cb aa;
72 struct r100_cs_track_texture textures[R300_TRACK_MAX_TEXTURE];
76 bool blend_read_enable;
84 int r100_cs_track_check(struct radeon_device *rdev, struct r100_cs_track *track);
85 void r100_cs_track_clear(struct radeon_device *rdev, struct r100_cs_track *track);
86 int r100_cs_packet_next_reloc(struct radeon_cs_parser *p,
87 struct radeon_cs_reloc **cs_reloc);
88 void r100_cs_dump_packet(struct radeon_cs_parser *p,
89 struct radeon_cs_packet *pkt);
91 int r100_cs_packet_parse_vline(struct radeon_cs_parser *p);
93 int r200_packet0_check(struct radeon_cs_parser *p,
94 struct radeon_cs_packet *pkt,
95 unsigned idx, unsigned reg);
97 int r100_reloc_pitch_offset(struct radeon_cs_parser *p,
98 struct radeon_cs_packet *pkt,
101 int r100_packet3_load_vbpntr(struct radeon_cs_parser *p,
102 struct radeon_cs_packet *pkt,