2 * Copyright 2008 Advanced Micro Devices, Inc.
3 * Copyright 2008 Red Hat Inc.
4 * Copyright 2009 Jerome Glisse.
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22 * OTHER DEALINGS IN THE SOFTWARE.
24 * Authors: Dave Airlie
29 #include <sys/cdefs.h>
30 __FBSDID("$FreeBSD$");
32 #include <dev/drm2/drmP.h>
33 #include <dev/drm2/radeon/radeon_drm.h>
35 #include "radeon_reg.h"
39 * The GART (Graphics Aperture Remapping Table) is an aperture
40 * in the GPU's address space. System pages can be mapped into
41 * the aperture and look like contiguous pages from the GPU's
42 * perspective. A page table maps the pages in the aperture
43 * to the actual backing pages in system memory.
45 * Radeon GPUs support both an internal GART, as described above,
46 * and AGP. AGP works similarly, but the GART table is configured
47 * and maintained by the northbridge rather than the driver.
48 * Radeon hw has a separate AGP aperture that is programmed to
49 * point to the AGP aperture provided by the northbridge and the
50 * requests are passed through to the northbridge aperture.
51 * Both AGP and internal GART can be used at the same time, however
52 * that is not currently supported by the driver.
54 * This file handles the common internal GART management.
58 * Common GART table functions.
61 * radeon_gart_table_ram_alloc - allocate system ram for gart page table
63 * @rdev: radeon_device pointer
65 * Allocate system memory for GART page table
66 * (r1xx-r3xx, non-pcie r4xx, rs400). These asics require the
67 * gart table to be in system memory.
68 * Returns 0 for success, -ENOMEM for failure.
70 int radeon_gart_table_ram_alloc(struct radeon_device *rdev)
72 drm_dma_handle_t *dmah;
74 dmah = drm_pci_alloc(rdev->ddev, rdev->gart.table_size,
75 PAGE_SIZE, BUS_SPACE_MAXADDR);
79 rdev->gart.dmah = dmah;
80 rdev->gart.ptr = dmah->vaddr;
82 if (rdev->family == CHIP_RS400 || rdev->family == CHIP_RS480 ||
83 rdev->family == CHIP_RS690 || rdev->family == CHIP_RS740) {
84 pmap_change_attr((vm_offset_t)rdev->gart.ptr,
85 rdev->gart.table_size >> PAGE_SHIFT, PAT_UNCACHED);
88 rdev->gart.table_addr = dmah->busaddr;
89 memset((void *)rdev->gart.ptr, 0, rdev->gart.table_size);
94 * radeon_gart_table_ram_free - free system ram for gart page table
96 * @rdev: radeon_device pointer
98 * Free system memory for GART page table
99 * (r1xx-r3xx, non-pcie r4xx, rs400). These asics require the
100 * gart table to be in system memory.
102 void radeon_gart_table_ram_free(struct radeon_device *rdev)
104 if (rdev->gart.ptr == NULL) {
108 if (rdev->family == CHIP_RS400 || rdev->family == CHIP_RS480 ||
109 rdev->family == CHIP_RS690 || rdev->family == CHIP_RS740) {
110 pmap_change_attr((vm_offset_t)rdev->gart.ptr,
111 rdev->gart.table_size >> PAGE_SHIFT, PAT_WRITE_COMBINING);
114 drm_pci_free(rdev->ddev, rdev->gart.dmah);
115 rdev->gart.dmah = NULL;
116 rdev->gart.ptr = NULL;
117 rdev->gart.table_addr = 0;
121 * radeon_gart_table_vram_alloc - allocate vram for gart page table
123 * @rdev: radeon_device pointer
125 * Allocate video memory for GART page table
126 * (pcie r4xx, r5xx+). These asics require the
127 * gart table to be in video memory.
128 * Returns 0 for success, error for failure.
130 int radeon_gart_table_vram_alloc(struct radeon_device *rdev)
134 if (rdev->gart.robj == NULL) {
135 r = radeon_bo_create(rdev, rdev->gart.table_size,
136 PAGE_SIZE, true, RADEON_GEM_DOMAIN_VRAM,
137 NULL, &rdev->gart.robj);
146 * radeon_gart_table_vram_pin - pin gart page table in vram
148 * @rdev: radeon_device pointer
150 * Pin the GART page table in vram so it will not be moved
151 * by the memory manager (pcie r4xx, r5xx+). These asics require the
152 * gart table to be in video memory.
153 * Returns 0 for success, error for failure.
155 int radeon_gart_table_vram_pin(struct radeon_device *rdev)
160 r = radeon_bo_reserve(rdev->gart.robj, false);
161 if (unlikely(r != 0))
163 r = radeon_bo_pin(rdev->gart.robj,
164 RADEON_GEM_DOMAIN_VRAM, &gpu_addr);
166 radeon_bo_unreserve(rdev->gart.robj);
169 r = radeon_bo_kmap(rdev->gart.robj, &rdev->gart.ptr);
171 radeon_bo_unpin(rdev->gart.robj);
172 radeon_bo_unreserve(rdev->gart.robj);
173 rdev->gart.table_addr = gpu_addr;
178 * radeon_gart_table_vram_unpin - unpin gart page table in vram
180 * @rdev: radeon_device pointer
182 * Unpin the GART page table in vram (pcie r4xx, r5xx+).
183 * These asics require the gart table to be in video memory.
185 void radeon_gart_table_vram_unpin(struct radeon_device *rdev)
189 if (rdev->gart.robj == NULL) {
192 r = radeon_bo_reserve(rdev->gart.robj, false);
193 if (likely(r == 0)) {
194 radeon_bo_kunmap(rdev->gart.robj);
195 radeon_bo_unpin(rdev->gart.robj);
196 radeon_bo_unreserve(rdev->gart.robj);
197 rdev->gart.ptr = NULL;
202 * radeon_gart_table_vram_free - free gart page table vram
204 * @rdev: radeon_device pointer
206 * Free the video memory used for the GART page table
207 * (pcie r4xx, r5xx+). These asics require the gart table to
208 * be in video memory.
210 void radeon_gart_table_vram_free(struct radeon_device *rdev)
212 if (rdev->gart.robj == NULL) {
215 radeon_gart_table_vram_unpin(rdev);
216 radeon_bo_unref(&rdev->gart.robj);
220 * Common gart functions.
223 * radeon_gart_unbind - unbind pages from the gart page table
225 * @rdev: radeon_device pointer
226 * @offset: offset into the GPU's gart aperture
227 * @pages: number of pages to unbind
229 * Unbinds the requested pages from the gart page table and
230 * replaces them with the dummy page (all asics).
232 void radeon_gart_unbind(struct radeon_device *rdev, unsigned offset,
240 if (!rdev->gart.ready) {
241 DRM_ERROR("trying to unbind memory from uninitialized GART !\n");
244 t = offset / RADEON_GPU_PAGE_SIZE;
245 p = t / (PAGE_SIZE / RADEON_GPU_PAGE_SIZE);
246 for (i = 0; i < pages; i++, p++) {
247 if (rdev->gart.pages[p]) {
248 rdev->gart.pages[p] = NULL;
249 rdev->gart.pages_addr[p] = rdev->dummy_page.addr;
250 page_base = rdev->gart.pages_addr[p];
251 for (j = 0; j < (PAGE_SIZE / RADEON_GPU_PAGE_SIZE); j++, t++) {
252 if (rdev->gart.ptr) {
253 radeon_gart_set_page(rdev, t, page_base);
255 page_base += RADEON_GPU_PAGE_SIZE;
260 radeon_gart_tlb_flush(rdev);
264 * radeon_gart_bind - bind pages into the gart page table
266 * @rdev: radeon_device pointer
267 * @offset: offset into the GPU's gart aperture
268 * @pages: number of pages to bind
269 * @pagelist: pages to bind
270 * @dma_addr: DMA addresses of pages
272 * Binds the requested pages to the gart page table
274 * Returns 0 for success, -EINVAL for failure.
276 int radeon_gart_bind(struct radeon_device *rdev, unsigned offset,
277 int pages, vm_page_t *pagelist, dma_addr_t *dma_addr)
284 if (!rdev->gart.ready) {
285 DRM_ERROR("trying to bind memory to uninitialized GART !\n");
288 t = offset / RADEON_GPU_PAGE_SIZE;
289 p = t / (PAGE_SIZE / RADEON_GPU_PAGE_SIZE);
291 for (i = 0; i < pages; i++, p++) {
292 rdev->gart.pages_addr[p] = dma_addr[i];
293 rdev->gart.pages[p] = pagelist[i];
294 if (rdev->gart.ptr) {
295 page_base = rdev->gart.pages_addr[p];
296 for (j = 0; j < (PAGE_SIZE / RADEON_GPU_PAGE_SIZE); j++, t++) {
297 radeon_gart_set_page(rdev, t, page_base);
298 page_base += RADEON_GPU_PAGE_SIZE;
303 radeon_gart_tlb_flush(rdev);
308 * radeon_gart_restore - bind all pages in the gart page table
310 * @rdev: radeon_device pointer
312 * Binds all pages in the gart page table (all asics).
313 * Used to rebuild the gart table on device startup or resume.
315 void radeon_gart_restore(struct radeon_device *rdev)
320 if (!rdev->gart.ptr) {
323 for (i = 0, t = 0; i < rdev->gart.num_cpu_pages; i++) {
324 page_base = rdev->gart.pages_addr[i];
325 for (j = 0; j < (PAGE_SIZE / RADEON_GPU_PAGE_SIZE); j++, t++) {
326 radeon_gart_set_page(rdev, t, page_base);
327 page_base += RADEON_GPU_PAGE_SIZE;
331 radeon_gart_tlb_flush(rdev);
335 * radeon_gart_init - init the driver info for managing the gart
337 * @rdev: radeon_device pointer
339 * Allocate the dummy page and init the gart driver info (all asics).
340 * Returns 0 for success, error for failure.
342 int radeon_gart_init(struct radeon_device *rdev)
346 if (rdev->gart.pages) {
349 /* We need PAGE_SIZE >= RADEON_GPU_PAGE_SIZE */
350 if (PAGE_SIZE < RADEON_GPU_PAGE_SIZE) {
351 DRM_ERROR("Page size is smaller than GPU page size!\n");
354 r = radeon_dummy_page_init(rdev);
357 /* Compute table size */
358 rdev->gart.num_cpu_pages = rdev->mc.gtt_size / PAGE_SIZE;
359 rdev->gart.num_gpu_pages = rdev->mc.gtt_size / RADEON_GPU_PAGE_SIZE;
360 DRM_INFO("GART: num cpu pages %u, num gpu pages %u\n",
361 rdev->gart.num_cpu_pages, rdev->gart.num_gpu_pages);
362 /* Allocate pages table */
363 rdev->gart.pages = malloc(sizeof(void *) * rdev->gart.num_cpu_pages,
364 DRM_MEM_DRIVER, M_NOWAIT | M_ZERO);
365 if (rdev->gart.pages == NULL) {
366 radeon_gart_fini(rdev);
369 rdev->gart.pages_addr = malloc(sizeof(dma_addr_t) *
370 rdev->gart.num_cpu_pages,
371 DRM_MEM_DRIVER, M_NOWAIT | M_ZERO);
372 if (rdev->gart.pages_addr == NULL) {
373 radeon_gart_fini(rdev);
376 /* set GART entry to point to the dummy page by default */
377 for (i = 0; i < rdev->gart.num_cpu_pages; i++) {
378 rdev->gart.pages_addr[i] = rdev->dummy_page.addr;
384 * radeon_gart_fini - tear down the driver info for managing the gart
386 * @rdev: radeon_device pointer
388 * Tear down the gart driver info and free the dummy page (all asics).
390 void radeon_gart_fini(struct radeon_device *rdev)
392 if (rdev->gart.pages && rdev->gart.pages_addr && rdev->gart.ready) {
394 radeon_gart_unbind(rdev, 0, rdev->gart.num_cpu_pages);
396 rdev->gart.ready = false;
397 free(rdev->gart.pages, DRM_MEM_DRIVER);
398 free(rdev->gart.pages_addr, DRM_MEM_DRIVER);
399 rdev->gart.pages = NULL;
400 rdev->gart.pages_addr = NULL;
402 radeon_dummy_page_fini(rdev);
407 * GPUVM is similar to the legacy gart on older asics, however
408 * rather than there being a single global gart table
409 * for the entire GPU, there are multiple VM page tables active
410 * at any given time. The VM page tables can contain a mix
411 * vram pages and system memory pages and system memory pages
412 * can be mapped as snooped (cached system pages) or unsnooped
413 * (uncached system pages).
414 * Each VM has an ID associated with it and there is a page table
415 * associated with each VMID. When execting a command buffer,
416 * the kernel tells the the ring what VMID to use for that command
417 * buffer. VMIDs are allocated dynamically as commands are submitted.
418 * The userspace drivers maintain their own address space and the kernel
419 * sets up their pages tables accordingly when they submit their
420 * command buffers and a VMID is assigned.
421 * Cayman/Trinity support up to 8 active VMs at any given time;
428 * TODO bind a default page at vm initialization for default address
432 * radeon_vm_num_pde - return the number of page directory entries
434 * @rdev: radeon_device pointer
436 * Calculate the number of page directory entries (cayman+).
438 static unsigned radeon_vm_num_pdes(struct radeon_device *rdev)
440 return rdev->vm_manager.max_pfn >> RADEON_VM_BLOCK_SIZE;
444 * radeon_vm_directory_size - returns the size of the page directory in bytes
446 * @rdev: radeon_device pointer
448 * Calculate the size of the page directory in bytes (cayman+).
450 static unsigned radeon_vm_directory_size(struct radeon_device *rdev)
452 return RADEON_GPU_PAGE_ALIGN(radeon_vm_num_pdes(rdev) * 8);
456 * radeon_vm_manager_init - init the vm manager
458 * @rdev: radeon_device pointer
460 * Init the vm manager (cayman+).
461 * Returns 0 for success, error for failure.
463 int radeon_vm_manager_init(struct radeon_device *rdev)
465 struct radeon_vm *vm;
466 struct radeon_bo_va *bo_va;
470 if (!rdev->vm_manager.enabled) {
471 /* allocate enough for 2 full VM pts */
472 size = radeon_vm_directory_size(rdev);
473 size += rdev->vm_manager.max_pfn * 8;
475 r = radeon_sa_bo_manager_init(rdev, &rdev->vm_manager.sa_manager,
476 RADEON_GPU_PAGE_ALIGN(size),
477 RADEON_GEM_DOMAIN_VRAM);
479 dev_err(rdev->dev, "failed to allocate vm bo (%dKB)\n",
480 (rdev->vm_manager.max_pfn * 8) >> 10);
484 r = radeon_asic_vm_init(rdev);
488 rdev->vm_manager.enabled = true;
490 r = radeon_sa_bo_manager_start(rdev, &rdev->vm_manager.sa_manager);
495 /* restore page table */
496 list_for_each_entry(vm, &rdev->vm_manager.lru_vm, list) {
497 if (vm->page_directory == NULL)
500 list_for_each_entry(bo_va, &vm->va, vm_list) {
501 bo_va->valid = false;
508 * radeon_vm_free_pt - free the page table for a specific vm
510 * @rdev: radeon_device pointer
513 * Free the page table of a specific vm (cayman+).
515 * Global and local mutex must be lock!
517 static void radeon_vm_free_pt(struct radeon_device *rdev,
518 struct radeon_vm *vm)
520 struct radeon_bo_va *bo_va;
523 if (!vm->page_directory)
526 list_del_init(&vm->list);
527 radeon_sa_bo_free(rdev, &vm->page_directory, vm->fence);
529 list_for_each_entry(bo_va, &vm->va, vm_list) {
530 bo_va->valid = false;
533 if (vm->page_tables == NULL)
536 for (i = 0; i < radeon_vm_num_pdes(rdev); i++)
537 radeon_sa_bo_free(rdev, &vm->page_tables[i], vm->fence);
539 free(vm->page_tables, DRM_MEM_DRIVER);
543 * radeon_vm_manager_fini - tear down the vm manager
545 * @rdev: radeon_device pointer
547 * Tear down the VM manager (cayman+).
549 void radeon_vm_manager_fini(struct radeon_device *rdev)
551 struct radeon_vm *vm, *tmp;
554 if (!rdev->vm_manager.enabled)
557 sx_xlock(&rdev->vm_manager.lock);
558 /* free all allocated page tables */
559 list_for_each_entry_safe(vm, tmp, &rdev->vm_manager.lru_vm, list) {
560 sx_xlock(&vm->mutex);
561 radeon_vm_free_pt(rdev, vm);
562 sx_xunlock(&vm->mutex);
564 for (i = 0; i < RADEON_NUM_VM; ++i) {
565 radeon_fence_unref(&rdev->vm_manager.active[i]);
567 radeon_asic_vm_fini(rdev);
568 sx_xunlock(&rdev->vm_manager.lock);
570 radeon_sa_bo_manager_suspend(rdev, &rdev->vm_manager.sa_manager);
571 radeon_sa_bo_manager_fini(rdev, &rdev->vm_manager.sa_manager);
572 rdev->vm_manager.enabled = false;
576 * radeon_vm_evict - evict page table to make room for new one
578 * @rdev: radeon_device pointer
579 * @vm: VM we want to allocate something for
581 * Evict a VM from the lru, making sure that it isn't @vm. (cayman+).
582 * Returns 0 for success, -ENOMEM for failure.
584 * Global and local mutex must be locked!
586 static int radeon_vm_evict(struct radeon_device *rdev, struct radeon_vm *vm)
588 struct radeon_vm *vm_evict;
590 if (list_empty(&rdev->vm_manager.lru_vm))
593 vm_evict = list_first_entry(&rdev->vm_manager.lru_vm,
594 struct radeon_vm, list);
598 sx_xlock(&vm_evict->mutex);
599 radeon_vm_free_pt(rdev, vm_evict);
600 sx_xunlock(&vm_evict->mutex);
605 * radeon_vm_alloc_pt - allocates a page table for a VM
607 * @rdev: radeon_device pointer
610 * Allocate a page table for the requested vm (cayman+).
611 * Returns 0 for success, error for failure.
613 * Global and local mutex must be locked!
615 int radeon_vm_alloc_pt(struct radeon_device *rdev, struct radeon_vm *vm)
617 unsigned pd_size, pts_size;
625 if (vm->page_directory != NULL) {
630 pd_size = RADEON_GPU_PAGE_ALIGN(radeon_vm_directory_size(rdev));
631 r = radeon_sa_bo_new(rdev, &rdev->vm_manager.sa_manager,
632 &vm->page_directory, pd_size,
633 RADEON_GPU_PAGE_SIZE, false);
635 r = radeon_vm_evict(rdev, vm);
644 vm->pd_gpu_addr = radeon_sa_bo_gpu_addr(vm->page_directory);
646 /* Initially clear the page directory */
647 pd_addr = radeon_sa_bo_cpu_addr(vm->page_directory);
648 memset(pd_addr, 0, pd_size);
650 pts_size = radeon_vm_num_pdes(rdev) * sizeof(struct radeon_sa_bo *);
651 vm->page_tables = malloc(pts_size, DRM_MEM_DRIVER, M_NOWAIT | M_ZERO);
653 if (vm->page_tables == NULL) {
654 DRM_ERROR("Cannot allocate memory for page table array\n");
655 radeon_sa_bo_free(rdev, &vm->page_directory, vm->fence);
663 * radeon_vm_add_to_lru - add VMs page table to LRU list
665 * @rdev: radeon_device pointer
666 * @vm: vm to add to LRU
668 * Add the allocated page table to the LRU list (cayman+).
670 * Global mutex must be locked!
672 void radeon_vm_add_to_lru(struct radeon_device *rdev, struct radeon_vm *vm)
674 list_del_init(&vm->list);
675 list_add_tail(&vm->list, &rdev->vm_manager.lru_vm);
679 * radeon_vm_grab_id - allocate the next free VMID
681 * @rdev: radeon_device pointer
682 * @vm: vm to allocate id for
683 * @ring: ring we want to submit job to
685 * Allocate an id for the vm (cayman+).
686 * Returns the fence we need to sync to (if any).
688 * Global and local mutex must be locked!
690 struct radeon_fence *radeon_vm_grab_id(struct radeon_device *rdev,
691 struct radeon_vm *vm, int ring)
693 struct radeon_fence *best[RADEON_NUM_RINGS] = {};
694 unsigned choices[2] = {};
697 /* check if the id is still valid */
698 if (vm->fence && vm->fence == rdev->vm_manager.active[vm->id])
701 /* we definately need to flush */
702 radeon_fence_unref(&vm->last_flush);
704 /* skip over VMID 0, since it is the system VM */
705 for (i = 1; i < rdev->vm_manager.nvm; ++i) {
706 struct radeon_fence *fence = rdev->vm_manager.active[i];
709 /* found a free one */
714 if (radeon_fence_is_earlier(fence, best[fence->ring])) {
715 best[fence->ring] = fence;
716 choices[fence->ring == ring ? 0 : 1] = i;
720 for (i = 0; i < 2; ++i) {
723 return rdev->vm_manager.active[choices[i]];
727 /* should never happen */
728 panic("%s: failed to allocate next VMID", __func__);
733 * radeon_vm_fence - remember fence for vm
735 * @rdev: radeon_device pointer
736 * @vm: vm we want to fence
737 * @fence: fence to remember
739 * Fence the vm (cayman+).
740 * Set the fence used to protect page table and id.
742 * Global and local mutex must be locked!
744 void radeon_vm_fence(struct radeon_device *rdev,
745 struct radeon_vm *vm,
746 struct radeon_fence *fence)
748 radeon_fence_unref(&rdev->vm_manager.active[vm->id]);
749 rdev->vm_manager.active[vm->id] = radeon_fence_ref(fence);
751 radeon_fence_unref(&vm->fence);
752 vm->fence = radeon_fence_ref(fence);
756 * radeon_vm_bo_find - find the bo_va for a specific vm & bo
759 * @bo: requested buffer object
761 * Find @bo inside the requested vm (cayman+).
762 * Search inside the @bos vm list for the requested vm
763 * Returns the found bo_va or NULL if none is found
765 * Object has to be reserved!
767 struct radeon_bo_va *radeon_vm_bo_find(struct radeon_vm *vm,
768 struct radeon_bo *bo)
770 struct radeon_bo_va *bo_va;
772 list_for_each_entry(bo_va, &bo->va, bo_list) {
773 if (bo_va->vm == vm) {
781 * radeon_vm_bo_add - add a bo to a specific vm
783 * @rdev: radeon_device pointer
785 * @bo: radeon buffer object
787 * Add @bo into the requested vm (cayman+).
788 * Add @bo to the list of bos associated with the vm
789 * Returns newly added bo_va or NULL for failure
791 * Object has to be reserved!
793 struct radeon_bo_va *radeon_vm_bo_add(struct radeon_device *rdev,
794 struct radeon_vm *vm,
795 struct radeon_bo *bo)
797 struct radeon_bo_va *bo_va;
799 bo_va = malloc(sizeof(struct radeon_bo_va),
800 DRM_MEM_DRIVER, M_NOWAIT | M_ZERO);
809 bo_va->valid = false;
810 bo_va->ref_count = 1;
811 INIT_LIST_HEAD(&bo_va->bo_list);
812 INIT_LIST_HEAD(&bo_va->vm_list);
814 sx_xlock(&vm->mutex);
815 list_add(&bo_va->vm_list, &vm->va);
816 list_add_tail(&bo_va->bo_list, &bo->va);
817 sx_xunlock(&vm->mutex);
823 * radeon_vm_bo_set_addr - set bos virtual address inside a vm
825 * @rdev: radeon_device pointer
826 * @bo_va: bo_va to store the address
827 * @soffset: requested offset of the buffer in the VM address space
828 * @flags: attributes of pages (read/write/valid/etc.)
830 * Set offset of @bo_va (cayman+).
831 * Validate and set the offset requested within the vm address space.
832 * Returns 0 for success, error for failure.
834 * Object has to be reserved!
836 int radeon_vm_bo_set_addr(struct radeon_device *rdev,
837 struct radeon_bo_va *bo_va,
841 uint64_t size = radeon_bo_size(bo_va->bo);
842 uint64_t eoffset, last_offset = 0;
843 struct radeon_vm *vm = bo_va->vm;
844 struct radeon_bo_va *tmp;
845 struct list_head *head;
849 /* make sure object fit at this offset */
850 eoffset = soffset + size;
851 if (soffset >= eoffset) {
855 last_pfn = eoffset / RADEON_GPU_PAGE_SIZE;
856 if (last_pfn > rdev->vm_manager.max_pfn) {
857 dev_err(rdev->dev, "va above limit (0x%08X > 0x%08X)\n",
858 last_pfn, rdev->vm_manager.max_pfn);
863 eoffset = last_pfn = 0;
866 sx_xlock(&vm->mutex);
869 list_for_each_entry(tmp, &vm->va, vm_list) {
871 /* skip over currently modified bo */
875 if (soffset >= last_offset && eoffset <= tmp->soffset) {
876 /* bo can be added before this one */
879 if (eoffset > tmp->soffset && soffset < tmp->eoffset) {
880 /* bo and tmp overlap, invalid offset */
881 dev_err(rdev->dev, "bo %p va 0x%08X conflict with (bo %p 0x%08X 0x%08X)\n",
882 bo_va->bo, (unsigned)bo_va->soffset, tmp->bo,
883 (unsigned)tmp->soffset, (unsigned)tmp->eoffset);
884 sx_xunlock(&vm->mutex);
887 last_offset = tmp->eoffset;
888 head = &tmp->vm_list;
891 bo_va->soffset = soffset;
892 bo_va->eoffset = eoffset;
893 bo_va->flags = flags;
894 bo_va->valid = false;
895 list_move(&bo_va->vm_list, head);
897 sx_xunlock(&vm->mutex);
902 * radeon_vm_map_gart - get the physical address of a gart page
904 * @rdev: radeon_device pointer
905 * @addr: the unmapped addr
907 * Look up the physical address of the page that the pte resolves
909 * Returns the physical address of the page.
911 uint64_t radeon_vm_map_gart(struct radeon_device *rdev, uint64_t addr)
915 /* page table offset */
916 result = rdev->gart.pages_addr[addr >> PAGE_SHIFT];
918 /* in case cpu page size != gpu page size*/
920 * FreeBSD port note: FreeBSD's PAGE_MASK is the inverse of
921 * Linux's one. That's why the test below doesn't inverse the
924 result |= addr & (PAGE_MASK);
930 * radeon_vm_update_pdes - make sure that page directory is valid
932 * @rdev: radeon_device pointer
934 * @start: start of GPU address range
935 * @end: end of GPU address range
937 * Allocates new page tables if necessary
938 * and updates the page directory (cayman+).
939 * Returns 0 for success, error for failure.
941 * Global and local mutex must be locked!
943 static int radeon_vm_update_pdes(struct radeon_device *rdev,
944 struct radeon_vm *vm,
945 uint64_t start, uint64_t end)
947 static const uint32_t incr = RADEON_VM_PTE_COUNT * 8;
949 uint64_t last_pde = ~0, last_pt = ~0;
954 start = (start / RADEON_GPU_PAGE_SIZE) >> RADEON_VM_BLOCK_SIZE;
955 end = (end / RADEON_GPU_PAGE_SIZE) >> RADEON_VM_BLOCK_SIZE;
957 /* walk over the address space and update the page directory */
958 for (pt_idx = start; pt_idx <= end; ++pt_idx) {
961 if (vm->page_tables[pt_idx])
965 r = radeon_sa_bo_new(rdev, &rdev->vm_manager.sa_manager,
966 &vm->page_tables[pt_idx],
967 RADEON_VM_PTE_COUNT * 8,
968 RADEON_GPU_PAGE_SIZE, false);
971 r = radeon_vm_evict(rdev, vm);
979 pde = vm->pd_gpu_addr + pt_idx * 8;
981 pt = radeon_sa_bo_gpu_addr(vm->page_tables[pt_idx]);
983 if (((last_pde + 8 * count) != pde) ||
984 ((last_pt + incr * count) != pt)) {
987 radeon_asic_vm_set_page(rdev, last_pde,
988 last_pt, count, incr,
989 RADEON_VM_PAGE_VALID);
1001 radeon_asic_vm_set_page(rdev, last_pde, last_pt, count,
1002 incr, RADEON_VM_PAGE_VALID);
1010 * radeon_vm_update_ptes - make sure that page tables are valid
1012 * @rdev: radeon_device pointer
1014 * @start: start of GPU address range
1015 * @end: end of GPU address range
1016 * @dst: destination address to map to
1017 * @flags: mapping flags
1019 * Update the page tables in the range @start - @end (cayman+).
1021 * Global and local mutex must be locked!
1023 static void radeon_vm_update_ptes(struct radeon_device *rdev,
1024 struct radeon_vm *vm,
1025 uint64_t start, uint64_t end,
1026 uint64_t dst, uint32_t flags)
1028 static const uint64_t mask = RADEON_VM_PTE_COUNT - 1;
1030 uint64_t last_pte = ~0, last_dst = ~0;
1034 start = start / RADEON_GPU_PAGE_SIZE;
1035 end = end / RADEON_GPU_PAGE_SIZE;
1037 /* walk over the address space and update the page tables */
1038 for (addr = start; addr < end; ) {
1039 uint64_t pt_idx = addr >> RADEON_VM_BLOCK_SIZE;
1043 if ((addr & ~mask) == (end & ~mask))
1046 nptes = RADEON_VM_PTE_COUNT - (addr & mask);
1048 pte = radeon_sa_bo_gpu_addr(vm->page_tables[pt_idx]);
1049 pte += (addr & mask) * 8;
1051 if ((last_pte + 8 * count) != pte) {
1054 radeon_asic_vm_set_page(rdev, last_pte,
1056 RADEON_GPU_PAGE_SIZE,
1068 dst += nptes * RADEON_GPU_PAGE_SIZE;
1072 radeon_asic_vm_set_page(rdev, last_pte, last_dst, count,
1073 RADEON_GPU_PAGE_SIZE, flags);
1078 * radeon_vm_bo_update_pte - map a bo into the vm page table
1080 * @rdev: radeon_device pointer
1082 * @bo: radeon buffer object
1085 * Fill in the page table entries for @bo (cayman+).
1086 * Returns 0 for success, -EINVAL for failure.
1088 * Object have to be reserved & global and local mutex must be locked!
1090 int radeon_vm_bo_update_pte(struct radeon_device *rdev,
1091 struct radeon_vm *vm,
1092 struct radeon_bo *bo,
1093 struct ttm_mem_reg *mem)
1095 unsigned ridx = rdev->asic->vm.pt_ring_index;
1096 struct radeon_ring *ring = &rdev->ring[ridx];
1097 struct radeon_semaphore *sem = NULL;
1098 struct radeon_bo_va *bo_va;
1099 unsigned nptes, npdes, ndw;
1103 /* nothing to do if vm isn't bound */
1104 if (vm->page_directory == NULL)
1107 bo_va = radeon_vm_bo_find(vm, bo);
1108 if (bo_va == NULL) {
1109 dev_err(rdev->dev, "bo %p not in vm %p\n", bo, vm);
1113 if (!bo_va->soffset) {
1114 dev_err(rdev->dev, "bo %p don't has a mapping in vm %p\n",
1119 if ((bo_va->valid && mem) || (!bo_va->valid && mem == NULL))
1122 bo_va->flags &= ~RADEON_VM_PAGE_VALID;
1123 bo_va->flags &= ~RADEON_VM_PAGE_SYSTEM;
1125 addr = mem->start << PAGE_SHIFT;
1126 if (mem->mem_type != TTM_PL_SYSTEM) {
1127 bo_va->flags |= RADEON_VM_PAGE_VALID;
1128 bo_va->valid = true;
1130 if (mem->mem_type == TTM_PL_TT) {
1131 bo_va->flags |= RADEON_VM_PAGE_SYSTEM;
1133 addr += rdev->vm_manager.vram_base_offset;
1137 bo_va->valid = false;
1140 if (vm->fence && radeon_fence_signaled(vm->fence)) {
1141 radeon_fence_unref(&vm->fence);
1144 if (vm->fence && vm->fence->ring != ridx) {
1145 r = radeon_semaphore_create(rdev, &sem);
1151 nptes = radeon_bo_ngpu_pages(bo);
1153 /* assume two extra pdes in case the mapping overlaps the borders */
1154 npdes = (nptes >> RADEON_VM_BLOCK_SIZE) + 2;
1156 /* estimate number of dw needed */
1157 /* semaphore, fence and padding */
1160 if (RADEON_VM_BLOCK_SIZE > 11)
1161 /* reserve space for one header for every 2k dwords */
1162 ndw += (nptes >> 11) * 4;
1164 /* reserve space for one header for
1165 every (1 << BLOCK_SIZE) entries */
1166 ndw += (nptes >> RADEON_VM_BLOCK_SIZE) * 4;
1168 /* reserve space for pte addresses */
1171 /* reserve space for one header for every 2k dwords */
1172 ndw += (npdes >> 11) * 4;
1174 /* reserve space for pde addresses */
1177 r = radeon_ring_lock(rdev, ring, ndw);
1182 if (sem && radeon_fence_need_sync(vm->fence, ridx)) {
1183 radeon_semaphore_sync_rings(rdev, sem, vm->fence->ring, ridx);
1184 radeon_fence_note_sync(vm->fence, ridx);
1187 r = radeon_vm_update_pdes(rdev, vm, bo_va->soffset, bo_va->eoffset);
1189 radeon_ring_unlock_undo(rdev, ring);
1193 radeon_vm_update_ptes(rdev, vm, bo_va->soffset, bo_va->eoffset,
1194 addr, bo_va->flags);
1196 radeon_fence_unref(&vm->fence);
1197 r = radeon_fence_emit(rdev, &vm->fence, ridx);
1199 radeon_ring_unlock_undo(rdev, ring);
1202 radeon_ring_unlock_commit(rdev, ring);
1203 radeon_semaphore_free(rdev, &sem, vm->fence);
1204 radeon_fence_unref(&vm->last_flush);
1210 * radeon_vm_bo_rmv - remove a bo to a specific vm
1212 * @rdev: radeon_device pointer
1213 * @bo_va: requested bo_va
1215 * Remove @bo_va->bo from the requested vm (cayman+).
1216 * Remove @bo_va->bo from the list of bos associated with the bo_va->vm and
1217 * remove the ptes for @bo_va in the page table.
1218 * Returns 0 for success.
1220 * Object have to be reserved!
1222 int radeon_vm_bo_rmv(struct radeon_device *rdev,
1223 struct radeon_bo_va *bo_va)
1227 sx_xlock(&rdev->vm_manager.lock);
1228 sx_xlock(&bo_va->vm->mutex);
1229 r = radeon_vm_bo_update_pte(rdev, bo_va->vm, bo_va->bo, NULL);
1230 sx_xunlock(&rdev->vm_manager.lock);
1231 list_del(&bo_va->vm_list);
1232 sx_xunlock(&bo_va->vm->mutex);
1233 list_del(&bo_va->bo_list);
1235 free(bo_va, DRM_MEM_DRIVER);
1240 * radeon_vm_bo_invalidate - mark the bo as invalid
1242 * @rdev: radeon_device pointer
1244 * @bo: radeon buffer object
1246 * Mark @bo as invalid (cayman+).
1248 void radeon_vm_bo_invalidate(struct radeon_device *rdev,
1249 struct radeon_bo *bo)
1251 struct radeon_bo_va *bo_va;
1253 list_for_each_entry(bo_va, &bo->va, bo_list) {
1254 bo_va->valid = false;
1259 * radeon_vm_init - initialize a vm instance
1261 * @rdev: radeon_device pointer
1264 * Init @vm fields (cayman+).
1266 void radeon_vm_init(struct radeon_device *rdev, struct radeon_vm *vm)
1270 sx_init(&vm->mutex, "drm__radeon_vm__mutex");
1271 INIT_LIST_HEAD(&vm->list);
1272 INIT_LIST_HEAD(&vm->va);
1276 * radeon_vm_fini - tear down a vm instance
1278 * @rdev: radeon_device pointer
1281 * Tear down @vm (cayman+).
1282 * Unbind the VM and remove all bos from the vm bo list
1284 void radeon_vm_fini(struct radeon_device *rdev, struct radeon_vm *vm)
1286 struct radeon_bo_va *bo_va, *tmp;
1289 sx_xlock(&rdev->vm_manager.lock);
1290 sx_xlock(&vm->mutex);
1291 radeon_vm_free_pt(rdev, vm);
1292 sx_xunlock(&rdev->vm_manager.lock);
1294 if (!list_empty(&vm->va)) {
1295 dev_err(rdev->dev, "still active bo inside vm\n");
1297 list_for_each_entry_safe(bo_va, tmp, &vm->va, vm_list) {
1298 list_del_init(&bo_va->vm_list);
1299 r = radeon_bo_reserve(bo_va->bo, false);
1301 list_del_init(&bo_va->bo_list);
1302 radeon_bo_unreserve(bo_va->bo);
1303 free(bo_va, DRM_MEM_DRIVER);
1306 radeon_fence_unref(&vm->fence);
1307 radeon_fence_unref(&vm->last_flush);
1308 sx_xunlock(&vm->mutex);