2 * Copyright (c) 1995, David Greenman
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice unmodified, this list of conditions, and the following
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
30 #ifndef SYS_DEV_ED_IF_EDVAR_H
31 #define SYS_DEV_ED_IF_EDVAR_H
33 * ed_softc: per line info and status
37 struct ifmedia ifmedia; /* Media info */
41 char *type_str; /* pointer to type string */
42 u_char vendor; /* interface vendor */
43 u_char type; /* interface type code */
44 u_char chip_type; /* the type of chip (one of ED_CHIP_TYPE_*) */
45 u_char isa16bit; /* width of access to card 0=8 or 1=16 */
46 u_char mem_shared; /* NIC memory is shared with host */
47 u_char xmit_busy; /* transmitter is busy */
50 int port_used; /* nonzero if ports used */
51 struct resource* port_res; /* resource for port range */
52 struct resource* port_res2; /* resource for port range */
53 bus_space_tag_t port_bst;
54 bus_space_handle_t port_bsh;
55 int mem_used; /* nonzero if memory used */
56 struct resource* mem_res; /* resource for memory range */
57 bus_space_tag_t mem_bst;
58 bus_space_handle_t mem_bsh;
59 struct resource* irq_res; /* resource for irq */
60 void* irq_handle; /* handle for irq handler */
61 int (*sc_media_ioctl)(struct ed_softc *sc, struct ifreq *ifr,
63 void (*sc_mediachg)(struct ed_softc *);
64 device_t miibus; /* MII bus for cards with MII. */
65 void (*mii_writebits)(struct ed_softc *, u_int, int);
66 u_int (*mii_readbits)(struct ed_softc *, int);
67 struct callout tick_ch;
68 void (*sc_tick)(struct ed_softc *);
69 void (*readmem)(struct ed_softc *sc, bus_size_t src, uint8_t *dst,
71 u_short (*sc_write_mbufs)(struct ed_softc *, struct mbuf *, bus_size_t);
74 int nic_offset; /* NIC (DS8390) I/O bus address offset */
75 int asic_offset; /* ASIC I/O bus address offset */
78 * The following 'proto' variable is part of a work-around for 8013EBT asics
79 * being write-only. It's sort of a prototype/shadow of the real thing.
85 * HP PC LAN PLUS card support.
88 u_short hpp_options; /* flags controlling behaviour of the HP card */
89 u_short hpp_id; /* software revision and other fields */
90 caddr_t hpp_mem_start; /* Memory-mapped IO register address */
92 bus_size_t mem_start; /* NIC memory start address */
93 bus_size_t mem_end; /* NIC memory end address */
94 uint32_t mem_size; /* total NIC memory size */
95 bus_size_t mem_ring; /* start of RX ring-buffer (in NIC mem) */
97 u_char txb_cnt; /* number of transmit buffers */
98 u_char txb_inuse; /* number of TX buffers currently in-use */
100 u_char txb_new; /* pointer to where new buffer will be added */
101 u_char txb_next_tx; /* pointer to next buffer ready to xmit */
102 u_short txb_len[8]; /* buffered xmit buffer lengths */
103 u_char tx_page_start; /* first page of TX buffer area */
104 u_char rec_page_start; /* first page of RX ring-buffer */
105 u_char rec_page_stop; /* last page of RX ring-buffer */
106 u_char next_packet; /* pointer to next unread RX packet */
107 u_int tx_mem; /* Total amount of RAM for tx */
108 u_int rx_mem; /* Total amount of RAM for rx */
109 struct ifmib_iso_8802_3 mibdata; /* stuff for network mgmt */
112 #define ed_nic_inb(sc, port) \
113 bus_space_read_1(sc->port_bst, sc->port_bsh, (sc)->nic_offset + (port))
115 #define ed_nic_outb(sc, port, value) \
116 bus_space_write_1(sc->port_bst, sc->port_bsh, \
117 (sc)->nic_offset + (port), (value))
119 #define ed_nic_inw(sc, port) \
120 bus_space_read_2(sc->port_bst, sc->port_bsh, (sc)->nic_offset + (port))
122 #define ed_nic_outw(sc, port, value) \
123 bus_space_write_2(sc->port_bst, sc->port_bsh, \
124 (sc)->nic_offset + (port), (value))
126 #define ed_nic_insb(sc, port, addr, count) \
127 bus_space_read_multi_1(sc->port_bst, sc->port_bsh, \
128 (sc)->nic_offset + (port), (addr), (count))
130 #define ed_nic_outsb(sc, port, addr, count) \
131 bus_space_write_multi_1(sc->port_bst, sc->port_bsh, \
132 (sc)->nic_offset + (port), (addr), (count))
134 #define ed_nic_insw(sc, port, addr, count) \
135 bus_space_read_multi_2(sc->port_bst, sc->port_bsh, \
136 (sc)->nic_offset + (port), (uint16_t *)(addr), (count))
138 #define ed_nic_outsw(sc, port, addr, count) \
139 bus_space_write_multi_2(sc->port_bst, sc->port_bsh, \
140 (sc)->nic_offset + (port), (uint16_t *)(addr), (count))
142 #define ed_nic_insl(sc, port, addr, count) \
143 bus_space_read_multi_4(sc->port_bst, sc->port_bsh, \
144 (sc)->nic_offset + (port), (uint32_t *)(addr), (count))
146 #define ed_nic_outsl(sc, port, addr, count) \
147 bus_space_write_multi_4(sc->port_bst, sc->port_bsh, \
148 (sc)->nic_offset + (port), (uint32_t *)(addr), (count))
150 #define ed_asic_inb(sc, port) \
151 bus_space_read_1(sc->port_bst, sc->port_bsh, \
152 (sc)->asic_offset + (port))
154 #define ed_asic_outb(sc, port, value) \
155 bus_space_write_1(sc->port_bst, sc->port_bsh, \
156 (sc)->asic_offset + (port), (value))
158 #define ed_asic_inw(sc, port) \
159 bus_space_read_2(sc->port_bst, sc->port_bsh, \
160 (sc)->asic_offset + (port))
162 #define ed_asic_outw(sc, port, value) \
163 bus_space_write_2(sc->port_bst, sc->port_bsh, \
164 (sc)->asic_offset + (port), (value))
166 #define ed_asic_insb(sc, port, addr, count) \
167 bus_space_read_multi_1(sc->port_bst, sc->port_bsh, \
168 (sc)->asic_offset + (port), (addr), (count))
170 #define ed_asic_outsb(sc, port, addr, count) \
171 bus_space_write_multi_1(sc->port_bst, sc->port_bsh, \
172 (sc)->asic_offset + (port), (addr), (count))
174 #define ed_asic_insw(sc, port, addr, count) \
175 bus_space_read_multi_2(sc->port_bst, sc->port_bsh, \
176 (sc)->asic_offset + (port), (uint16_t *)(addr), (count))
178 #define ed_asic_outsw(sc, port, addr, count) \
179 bus_space_write_multi_2(sc->port_bst, sc->port_bsh, \
180 (sc)->asic_offset + (port), (uint16_t *)(addr), (count))
182 #define ed_asic_insl(sc, port, addr, count) \
183 bus_space_read_multi_4(sc->port_bst, sc->port_bsh, \
184 (sc)->asic_offset + (port), (uint32_t *)(addr), (count))
186 #define ed_asic_outsl(sc, port, addr, count) \
187 bus_space_write_multi_4(sc->port_bst, sc->port_bsh, \
188 (sc)->asic_offset + (port), (uint32_t *)(addr), (count))
190 void ed_release_resources(device_t);
191 int ed_alloc_port(device_t, int, int);
192 int ed_alloc_memory(device_t, int, int);
193 int ed_alloc_irq(device_t, int, int);
195 int ed_probe_generic8390(struct ed_softc *);
196 int ed_probe_WD80x3(device_t, int, int);
197 int ed_probe_WD80x3_generic(device_t, int, uint16_t *[]);
198 int ed_probe_RTL80x9(device_t, int, int);
200 int ed_probe_3Com(device_t, int, int);
203 int ed_probe_SIC(device_t, int, int);
205 int ed_probe_Novell_generic(device_t, int);
206 int ed_probe_Novell(device_t, int, int);
207 void ed_Novell_read_mac(struct ed_softc *);
209 int ed_probe_HP_pclanp(device_t, int, int);
212 int ed_attach(device_t);
213 int ed_detach(device_t);
214 int ed_clear_memory(device_t);
215 int ed_isa_mem_ok(device_t, u_long, u_int); /* XXX isa specific */
216 void ed_stop(struct ed_softc *);
217 void ed_shmem_readmem16(struct ed_softc *, bus_size_t, uint8_t *, uint16_t);
218 void ed_shmem_readmem8(struct ed_softc *, bus_size_t, uint8_t *, uint16_t);
219 u_short ed_shmem_write_mbufs(struct ed_softc *, struct mbuf *, bus_size_t);
220 void ed_pio_readmem(struct ed_softc *, bus_size_t, uint8_t *, uint16_t);
221 void ed_pio_writemem(struct ed_softc *, uint8_t *, uint16_t, uint16_t);
222 u_short ed_pio_write_mbufs(struct ed_softc *, struct mbuf *, bus_size_t);
224 void ed_disable_16bit_access(struct ed_softc *);
225 void ed_enable_16bit_access(struct ed_softc *);
227 void ed_gen_ifmedia_init(struct ed_softc *);
229 driver_intr_t edintr;
231 extern devclass_t ed_devclass;
237 #define ED_VENDOR_WD_SMC 0x00 /* Western Digital/SMC */
238 #define ED_VENDOR_3COM 0x01 /* 3Com */
239 #define ED_VENDOR_NOVELL 0x02 /* Novell */
240 #define ED_VENDOR_HP 0x03 /* Hewlett Packard */
241 #define ED_VENDOR_SIC 0x04 /* Allied-Telesis SIC */
244 * Configure time flags
247 * this sets the default for enabling/disabling the transceiver
249 #define ED_FLAGS_DISABLE_TRANCEIVER 0x0001
252 * This forces the board to be used in 8/16bit mode even if it
253 * autoconfigs differently
255 #define ED_FLAGS_FORCE_8BIT_MODE 0x0002
256 #define ED_FLAGS_FORCE_16BIT_MODE 0x0004
259 * This disables the use of double transmit buffers.
261 #define ED_FLAGS_NO_MULTI_BUFFERING 0x0008
264 * This forces all operations with the NIC memory to use Programmed
265 * I/O (i.e. not via shared memory)
267 #define ED_FLAGS_FORCE_PIO 0x0010
270 * This forces a PC Card, and disables ISA memory range checks
272 #define ED_FLAGS_PCCARD 0x0020
275 * These are flags describing the chip type.
277 #define ED_FLAGS_TOSH_ETHER 0x10000
278 #define ED_FLAGS_GWETHER 0x20000
280 #define ED_FLAGS_GETTYPE(flg) ((flg) & 0xff0000)
282 #define ED_MUTEX(_sc) (&(_sc)->sc_mtx)
283 #define ED_LOCK(_sc) mtx_lock(ED_MUTEX(_sc))
284 #define ED_UNLOCK(_sc) mtx_unlock(ED_MUTEX(_sc))
285 #define ED_LOCK_INIT(_sc) \
286 mtx_init(ED_MUTEX(_sc), device_get_nameunit(_sc->dev), \
287 MTX_NETWORK_LOCK, MTX_DEF)
288 #define ED_LOCK_DESTROY(_sc) mtx_destroy(ED_MUTEX(_sc));
289 #define ED_ASSERT_LOCKED(_sc) mtx_assert(ED_MUTEX(_sc), MA_OWNED);
290 #define ED_ASSERT_UNLOCKED(_sc) mtx_assert(ED_MUTEX(_sc), MA_NOTOWNED);
292 #endif /* SYS_DEV_ED_IF_EDVAR_H */