2 * Copyright (c) 2001-2003
3 * Fraunhofer Institute for Open Communication Systems (FhG Fokus).
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27 * Author: Hartmut Brandt <harti@freebsd.org>
29 * Fore PCA200E driver for NATM
32 #include <sys/cdefs.h>
33 __FBSDID("$FreeBSD$");
38 #include <sys/types.h>
39 #include <sys/param.h>
40 #include <sys/systm.h>
41 #include <sys/malloc.h>
42 #include <sys/kernel.h>
44 #include <sys/errno.h>
46 #include <sys/module.h>
47 #include <sys/queue.h>
48 #include <sys/syslog.h>
49 #include <sys/endian.h>
50 #include <sys/sysctl.h>
51 #include <sys/condvar.h>
54 #include <sys/sockio.h>
56 #include <sys/socket.h>
59 #include <net/if_media.h>
60 #include <net/if_types.h>
61 #include <net/if_atm.h>
62 #include <net/route.h>
67 #include <netinet/in.h>
68 #include <netinet/if_atm.h>
71 #include <machine/bus.h>
72 #include <machine/resource.h>
75 #include <dev/pci/pcireg.h>
76 #include <dev/pci/pcivar.h>
78 #include <dev/utopia/utopia.h>
80 #include <dev/fatm/if_fatmreg.h>
81 #include <dev/fatm/if_fatmvar.h>
83 #include <dev/fatm/firmware.h>
85 devclass_t fatm_devclass;
97 static const struct rate {
101 #include <dev/fatm/if_fatm_rate.h>
103 #define RATE_TABLE_SIZE (sizeof(rate_table) / sizeof(rate_table[0]))
105 SYSCTL_DECL(_hw_atm);
107 MODULE_DEPEND(fatm, utopia, 1, 1, 1);
109 static int fatm_utopia_readregs(struct ifatm *, u_int, uint8_t *, u_int *);
110 static int fatm_utopia_writereg(struct ifatm *, u_int, u_int, u_int);
112 static const struct utopia_methods fatm_utopia_methods = {
113 fatm_utopia_readregs,
117 #define VC_OK(SC, VPI, VCI) \
118 (((VPI) & ~((1 << IFP2IFATM((SC)->ifp)->mib.vpi_bits) - 1)) == 0 && \
119 (VCI) != 0 && ((VCI) & ~((1 << IFP2IFATM((SC)->ifp)->mib.vci_bits) - 1)) == 0)
121 static int fatm_load_vc(struct fatm_softc *sc, struct card_vcc *vc);
124 * Probing is easy: step trough the list of known vendor and device
125 * ids and compare. If one is found - it's our.
128 fatm_probe(device_t dev)
132 for (i = 0; fatm_devs[i].name; i++)
133 if (pci_get_vendor(dev) == fatm_devs[i].vid &&
134 pci_get_device(dev) == fatm_devs[i].did) {
135 device_set_desc(dev, fatm_devs[i].name);
136 return (BUS_PROBE_DEFAULT);
142 * Function called at completion of a SUNI writeregs/readregs command.
143 * This is called from the interrupt handler while holding the softc lock.
144 * We use the queue entry as the randevouze point.
147 fatm_utopia_writeregs_complete(struct fatm_softc *sc, struct cmdqueue *q)
150 H_SYNCSTAT_POSTREAD(sc, q->q.statp);
151 if(H_GETSTAT(q->q.statp) & FATM_STAT_ERROR) {
152 sc->istats.suni_reg_errors++;
159 * Write a SUNI register. The bits that are 1 in mask are written from val
160 * into register reg. We wait for the command to complete by sleeping on
161 * the register memory.
163 * We assume, that we already hold the softc mutex.
166 fatm_utopia_writereg(struct ifatm *ifatm, u_int reg, u_int mask, u_int val)
170 struct fatm_softc *sc;
172 sc = ifatm->ifp->if_softc;
174 if (!(ifatm->ifp->if_drv_flags & IFF_DRV_RUNNING))
177 /* get queue element and fill it */
178 q = GET_QUEUE(sc->cmdqueue, struct cmdqueue, sc->cmdqueue.head);
180 H_SYNCSTAT_POSTREAD(sc, q->q.statp);
181 if (!(H_GETSTAT(q->q.statp) & FATM_STAT_FREE)) {
182 sc->istats.cmd_queue_full++;
185 NEXT_QUEUE_ENTRY(sc->cmdqueue.head, FATM_CMD_QLEN);
188 q->cb = fatm_utopia_writeregs_complete;
189 H_SETSTAT(q->q.statp, FATM_STAT_PENDING);
190 H_SYNCSTAT_PREWRITE(sc, q->q.statp);
192 WRITE4(sc, q->q.card + FATMOC_GETOC3_BUF, 0);
194 WRITE4(sc, q->q.card + FATMOC_OP,
195 FATM_MAKE_SETOC3(reg, val, mask) | FATM_OP_INTERRUPT_SEL);
199 * Wait for the command to complete
201 error = msleep(q, &sc->mtx, PZERO | PCATCH, "fatm_setreg", hz);
222 * Function called at completion of a SUNI readregs command.
223 * This is called from the interrupt handler while holding the softc lock.
224 * We use reg_mem as the randevouze point.
227 fatm_utopia_readregs_complete(struct fatm_softc *sc, struct cmdqueue *q)
230 H_SYNCSTAT_POSTREAD(sc, q->q.statp);
231 if (H_GETSTAT(q->q.statp) & FATM_STAT_ERROR) {
232 sc->istats.suni_reg_errors++;
235 wakeup(&sc->reg_mem);
239 * Read SUNI registers
241 * We use a preallocated buffer to read the registers. Therefor we need
242 * to protect against multiple threads trying to read registers. We do this
243 * with a condition variable and a flag. We wait for the command to complete by sleeping on
244 * the register memory.
246 * We assume, that we already hold the softc mutex.
249 fatm_utopia_readregs_internal(struct fatm_softc *sc)
257 if (!(sc->ifp->if_drv_flags & IFF_DRV_RUNNING))
259 if (!(sc->flags & FATM_REGS_INUSE))
261 cv_wait(&sc->cv_regs, &sc->mtx);
263 sc->flags |= FATM_REGS_INUSE;
265 q = GET_QUEUE(sc->cmdqueue, struct cmdqueue, sc->cmdqueue.head);
267 H_SYNCSTAT_POSTREAD(sc, q->q.statp);
268 if (!(H_GETSTAT(q->q.statp) & FATM_STAT_FREE)) {
269 sc->istats.cmd_queue_full++;
272 NEXT_QUEUE_ENTRY(sc->cmdqueue.head, FATM_CMD_QLEN);
275 q->cb = fatm_utopia_readregs_complete;
276 H_SETSTAT(q->q.statp, FATM_STAT_PENDING);
277 H_SYNCSTAT_PREWRITE(sc, q->q.statp);
279 bus_dmamap_sync(sc->reg_mem.dmat, sc->reg_mem.map, BUS_DMASYNC_PREREAD);
281 WRITE4(sc, q->q.card + FATMOC_GETOC3_BUF, sc->reg_mem.paddr);
283 WRITE4(sc, q->q.card + FATMOC_OP,
284 FATM_OP_OC3_GET_REG | FATM_OP_INTERRUPT_SEL);
288 * Wait for the command to complete
290 error = msleep(&sc->reg_mem, &sc->mtx, PZERO | PCATCH,
304 bus_dmamap_sync(sc->reg_mem.dmat, sc->reg_mem.map,
305 BUS_DMASYNC_POSTREAD);
311 /* declare buffer to be free */
312 sc->flags &= ~FATM_REGS_INUSE;
313 cv_signal(&sc->cv_regs);
318 ptr = (uint32_t *)sc->reg_mem.mem;
319 for (i = 0; i < FATM_NREGS; i++)
320 ptr[i] = le32toh(ptr[i]) & 0xff;
326 * Read SUNI registers for the SUNI module.
328 * We assume, that we already hold the mutex.
331 fatm_utopia_readregs(struct ifatm *ifatm, u_int reg, uint8_t *valp, u_int *np)
335 struct fatm_softc *sc;
337 if (reg >= FATM_NREGS)
339 if (reg + *np > FATM_NREGS)
340 *np = FATM_NREGS - reg;
341 sc = ifatm->ifp->if_softc;
344 err = fatm_utopia_readregs_internal(sc);
348 for (i = 0; i < *np; i++)
349 valp[i] = ((uint32_t *)sc->reg_mem.mem)[reg + i];
351 /* declare buffer to be free */
352 sc->flags &= ~FATM_REGS_INUSE;
353 cv_signal(&sc->cv_regs);
359 * Check whether the hard is beating. We remember the last heart beat and
360 * compare it to the current one. If it appears stuck for 10 times, we have
363 * Assume we hold the lock.
366 fatm_check_heartbeat(struct fatm_softc *sc)
372 h = READ4(sc, FATMO_HEARTBEAT);
373 DBG(sc, BEAT, ("heartbeat %08x", h));
375 if (sc->stop_cnt == 10)
378 if (h == sc->heartbeat) {
379 if (++sc->stop_cnt == 10) {
380 log(LOG_ERR, "i960 stopped???\n");
381 WRITE4(sc, FATMO_HIMR, 1);
391 * Ensure that the heart is still beating.
394 fatm_watchdog(void *arg)
396 struct fatm_softc *sc;
400 fatm_check_heartbeat(sc);
401 callout_reset(&sc->watchdog_timer, hz * 5, fatm_watchdog, sc);
405 * Hard reset the i960 on the board. This is done by initializing registers,
406 * clearing interrupts and waiting for the selftest to finish. Not sure,
407 * whether all these barriers are actually needed.
409 * Assumes that we hold the lock.
412 fatm_reset(struct fatm_softc *sc)
419 WRITE4(sc, FATMO_APP_BASE, FATMO_COMMON_ORIGIN);
422 WRITE4(sc, FATMO_UART_TO_960, XMIT_READY);
425 WRITE4(sc, FATMO_UART_TO_HOST, XMIT_READY);
428 WRITE4(sc, FATMO_BOOT_STATUS, COLD_START);
431 WRITE1(sc, FATMO_HCR, FATM_HCR_RESET);
436 WRITE1(sc, FATMO_HCR, 0);
441 for (w = 100; w; w--) {
443 val = READ4(sc, FATMO_BOOT_STATUS);
456 * Stop the card. Must be called WITH the lock held
457 * Reset, free transmit and receive buffers. Wakeup everybody who may sleep.
460 fatm_stop(struct fatm_softc *sc)
471 utopia_stop(&sc->utopia);
472 (void)fatm_reset(sc);
475 callout_stop(&sc->watchdog_timer);
477 if (sc->ifp->if_drv_flags & IFF_DRV_RUNNING) {
478 sc->ifp->if_drv_flags &= ~(IFF_DRV_RUNNING | IFF_DRV_OACTIVE);
479 ATMEV_SEND_IFSTATE_CHANGED(IFP2IFATM(sc->ifp),
480 sc->utopia.carrier == UTP_CARR_OK);
483 * Collect transmit mbufs, partial receive mbufs and
486 for (i = 0; i < FATM_TX_QLEN; i++) {
487 tx = GET_QUEUE(sc->txqueue, struct txqueue, i);
489 bus_dmamap_unload(sc->tx_tag, tx->map);
495 /* Collect supplied mbufs */
496 while ((rb = LIST_FIRST(&sc->rbuf_used)) != NULL) {
497 LIST_REMOVE(rb, link);
498 bus_dmamap_unload(sc->rbuf_tag, rb->map);
501 LIST_INSERT_HEAD(&sc->rbuf_free, rb, link);
504 /* Unwait any waiters */
505 wakeup(&sc->sadi_mem);
507 /* wakeup all threads waiting for STAT or REG buffers */
508 cv_broadcast(&sc->cv_stat);
509 cv_broadcast(&sc->cv_regs);
511 sc->flags &= ~(FATM_STAT_INUSE | FATM_REGS_INUSE);
513 /* wakeup all threads waiting on commands */
514 for (i = 0; i < FATM_CMD_QLEN; i++) {
515 q = GET_QUEUE(sc->cmdqueue, struct cmdqueue, i);
517 H_SYNCSTAT_POSTREAD(sc, q->q.statp);
518 if ((stat = H_GETSTAT(q->q.statp)) != FATM_STAT_FREE) {
519 H_SETSTAT(q->q.statp, stat | FATM_STAT_ERROR);
520 H_SYNCSTAT_PREWRITE(sc, q->q.statp);
524 utopia_reset_media(&sc->utopia);
526 sc->small_cnt = sc->large_cnt = 0;
529 if (sc->vccs != NULL) {
531 for (i = 0; i < FORE_MAX_VCC + 1; i++) {
532 if (sc->vccs[i] != NULL) {
533 if ((sc->vccs[i]->vflags & (FATM_VCC_OPEN |
534 FATM_VCC_TRY_OPEN)) == 0) {
535 uma_zfree(sc->vcc_zone, sc->vccs[i]);
538 sc->vccs[i]->vflags = 0;
548 * Load the firmware into the board and save the entry point.
551 firmware_load(struct fatm_softc *sc)
553 struct firmware *fw = (struct firmware *)firmware;
555 DBG(sc, INIT, ("loading - entry=%x", fw->entry));
556 bus_space_write_region_4(sc->memt, sc->memh, fw->offset, firmware,
557 sizeof(firmware) / sizeof(firmware[0]));
564 * Read a character from the virtual UART. The availability of a character
565 * is signaled by a non-null value of the 32 bit register. The eating of
566 * the character by us is signalled to the card by setting that register
570 rx_getc(struct fatm_softc *sc)
576 c = READ4(sc, FATMO_UART_TO_HOST);
579 WRITE4(sc, FATMO_UART_TO_HOST, 0);
580 DBGC(sc, UART, ("%c", c & 0xff));
589 * Eat up characters from the board and stuff them in the bit-bucket.
592 rx_flush(struct fatm_softc *sc)
596 while (w-- && rx_getc(sc) >= 0)
601 * Write a character to the card. The UART is available if the register
605 tx_putc(struct fatm_softc *sc, u_char c)
611 c1 = READ4(sc, FATMO_UART_TO_960);
614 WRITE4(sc, FATMO_UART_TO_960, c | CHAR_AVAIL);
615 DBGC(sc, UART, ("%c", c & 0xff));
624 * Start the firmware. This is doing by issuing a 'go' command with
625 * the hex entry address of the firmware. Then we wait for the self-test to
629 fatm_start_firmware(struct fatm_softc *sc, uint32_t start)
631 static char hex[] = "0123456789abcdef";
634 DBG(sc, INIT, ("starting"));
648 tx_putc(sc, hex[(start >> 12) & 0xf]);
650 tx_putc(sc, hex[(start >> 8) & 0xf]);
652 tx_putc(sc, hex[(start >> 4) & 0xf]);
654 tx_putc(sc, hex[(start >> 0) & 0xf]);
660 for (w = 100; w; w--) {
662 val = READ4(sc, FATMO_BOOT_STATUS);
675 * Initialize one card and host queue.
678 init_card_queue(struct fatm_softc *sc, struct fqueue *queue, int qlen,
679 size_t qel_size, size_t desc_size, cardoff_t off,
680 u_char **statpp, uint32_t *cardstat, u_char *descp, uint32_t carddesc)
682 struct fqelem *el = queue->chunk;
686 off += 8; /* size of card entry */
688 el->statp = (uint32_t *)(*statpp);
689 (*statpp) += sizeof(uint32_t);
690 H_SETSTAT(el->statp, FATM_STAT_FREE);
691 H_SYNCSTAT_PREWRITE(sc, el->statp);
693 WRITE4(sc, el->card + FATMOS_STATP, (*cardstat));
694 (*cardstat) += sizeof(uint32_t);
698 el->card_ioblk = carddesc;
699 carddesc += desc_size;
701 el = (struct fqelem *)((u_char *)el + qel_size);
703 queue->tail = queue->head = 0;
707 * Issue the initialize operation to the card, wait for completion and
708 * initialize the on-board and host queue structures with offsets and
712 fatm_init_cmd(struct fatm_softc *sc)
721 DBG(sc, INIT, ("command"));
722 WRITE4(sc, FATMO_ISTAT, 0);
723 WRITE4(sc, FATMO_IMASK, 1);
724 WRITE4(sc, FATMO_HLOGGER, 0);
726 WRITE4(sc, FATMO_INIT + FATMOI_RECEIVE_TRESHOLD, 0);
727 WRITE4(sc, FATMO_INIT + FATMOI_NUM_CONNECT, FORE_MAX_VCC);
728 WRITE4(sc, FATMO_INIT + FATMOI_CQUEUE_LEN, FATM_CMD_QLEN);
729 WRITE4(sc, FATMO_INIT + FATMOI_TQUEUE_LEN, FATM_TX_QLEN);
730 WRITE4(sc, FATMO_INIT + FATMOI_RQUEUE_LEN, FATM_RX_QLEN);
731 WRITE4(sc, FATMO_INIT + FATMOI_RPD_EXTENSION, RPD_EXTENSIONS);
732 WRITE4(sc, FATMO_INIT + FATMOI_TPD_EXTENSION, TPD_EXTENSIONS);
735 * initialize buffer descriptors
737 WRITE4(sc, FATMO_INIT + FATMOI_SMALL_B1 + FATMOB_QUEUE_LENGTH,
739 WRITE4(sc, FATMO_INIT + FATMOI_SMALL_B1 + FATMOB_BUFFER_SIZE,
741 WRITE4(sc, FATMO_INIT + FATMOI_SMALL_B1 + FATMOB_POOL_SIZE,
743 WRITE4(sc, FATMO_INIT + FATMOI_SMALL_B1 + FATMOB_SUPPLY_BLKSIZE,
744 SMALL_SUPPLY_BLKSIZE);
746 WRITE4(sc, FATMO_INIT + FATMOI_LARGE_B1 + FATMOB_QUEUE_LENGTH,
748 WRITE4(sc, FATMO_INIT + FATMOI_LARGE_B1 + FATMOB_BUFFER_SIZE,
750 WRITE4(sc, FATMO_INIT + FATMOI_LARGE_B1 + FATMOB_POOL_SIZE,
752 WRITE4(sc, FATMO_INIT + FATMOI_LARGE_B1 + FATMOB_SUPPLY_BLKSIZE,
753 LARGE_SUPPLY_BLKSIZE);
755 WRITE4(sc, FATMO_INIT + FATMOI_SMALL_B2 + FATMOB_QUEUE_LENGTH, 0);
756 WRITE4(sc, FATMO_INIT + FATMOI_SMALL_B2 + FATMOB_BUFFER_SIZE, 0);
757 WRITE4(sc, FATMO_INIT + FATMOI_SMALL_B2 + FATMOB_POOL_SIZE, 0);
758 WRITE4(sc, FATMO_INIT + FATMOI_SMALL_B2 + FATMOB_SUPPLY_BLKSIZE, 0);
760 WRITE4(sc, FATMO_INIT + FATMOI_LARGE_B2 + FATMOB_QUEUE_LENGTH, 0);
761 WRITE4(sc, FATMO_INIT + FATMOI_LARGE_B2 + FATMOB_BUFFER_SIZE, 0);
762 WRITE4(sc, FATMO_INIT + FATMOI_LARGE_B2 + FATMOB_POOL_SIZE, 0);
763 WRITE4(sc, FATMO_INIT + FATMOI_LARGE_B2 + FATMOB_SUPPLY_BLKSIZE, 0);
769 WRITE4(sc, FATMO_INIT + FATMOI_STATUS, FATM_STAT_PENDING);
771 WRITE4(sc, FATMO_INIT + FATMOI_OP, FATM_OP_INITIALIZE);
775 * Busy wait for completion
779 c = READ4(sc, FATMO_INIT + FATMOI_STATUS);
781 if (c & FATM_STAT_COMPLETE)
786 if (c & FATM_STAT_ERROR)
790 * Initialize the queues
792 statp = sc->stat_mem.mem;
793 card_stat = sc->stat_mem.paddr;
796 * Command queue. This is special in that it's on the card.
798 el = sc->cmdqueue.chunk;
799 off = READ4(sc, FATMO_COMMAND_QUEUE);
800 DBG(sc, INIT, ("cmd queue=%x", off));
801 for (cnt = 0; cnt < FATM_CMD_QLEN; cnt++) {
802 el = &((struct cmdqueue *)sc->cmdqueue.chunk + cnt)->q;
805 off += 32; /* size of card structure */
807 el->statp = (uint32_t *)statp;
808 statp += sizeof(uint32_t);
809 H_SETSTAT(el->statp, FATM_STAT_FREE);
810 H_SYNCSTAT_PREWRITE(sc, el->statp);
812 WRITE4(sc, el->card + FATMOC_STATP, card_stat);
813 card_stat += sizeof(uint32_t);
815 sc->cmdqueue.tail = sc->cmdqueue.head = 0;
818 * Now the other queues. These are in memory
820 init_card_queue(sc, &sc->txqueue, FATM_TX_QLEN,
821 sizeof(struct txqueue), TPD_SIZE,
822 READ4(sc, FATMO_TRANSMIT_QUEUE),
823 &statp, &card_stat, sc->txq_mem.mem, sc->txq_mem.paddr);
825 init_card_queue(sc, &sc->rxqueue, FATM_RX_QLEN,
826 sizeof(struct rxqueue), RPD_SIZE,
827 READ4(sc, FATMO_RECEIVE_QUEUE),
828 &statp, &card_stat, sc->rxq_mem.mem, sc->rxq_mem.paddr);
830 init_card_queue(sc, &sc->s1queue, SMALL_SUPPLY_QLEN,
831 sizeof(struct supqueue), BSUP_BLK2SIZE(SMALL_SUPPLY_BLKSIZE),
832 READ4(sc, FATMO_SMALL_B1_QUEUE),
833 &statp, &card_stat, sc->s1q_mem.mem, sc->s1q_mem.paddr);
835 init_card_queue(sc, &sc->l1queue, LARGE_SUPPLY_QLEN,
836 sizeof(struct supqueue), BSUP_BLK2SIZE(LARGE_SUPPLY_BLKSIZE),
837 READ4(sc, FATMO_LARGE_B1_QUEUE),
838 &statp, &card_stat, sc->l1q_mem.mem, sc->l1q_mem.paddr);
846 * Read PROM. Called only from attach code. Here we spin because the interrupt
847 * handler is not yet set up.
850 fatm_getprom(struct fatm_softc *sc)
856 DBG(sc, INIT, ("reading prom"));
857 q = GET_QUEUE(sc->cmdqueue, struct cmdqueue, sc->cmdqueue.head);
858 NEXT_QUEUE_ENTRY(sc->cmdqueue.head, FATM_CMD_QLEN);
862 H_SETSTAT(q->q.statp, FATM_STAT_PENDING);
863 H_SYNCSTAT_PREWRITE(sc, q->q.statp);
865 bus_dmamap_sync(sc->prom_mem.dmat, sc->prom_mem.map,
866 BUS_DMASYNC_PREREAD);
868 WRITE4(sc, q->q.card + FATMOC_GPROM_BUF, sc->prom_mem.paddr);
870 WRITE4(sc, q->q.card + FATMOC_OP, FATM_OP_GET_PROM_DATA);
873 for (i = 0; i < 1000; i++) {
874 H_SYNCSTAT_POSTREAD(sc, q->q.statp);
875 if (H_GETSTAT(q->q.statp) &
876 (FATM_STAT_COMPLETE | FATM_STAT_ERROR))
881 if_printf(sc->ifp, "getprom timeout\n");
884 H_SYNCSTAT_POSTREAD(sc, q->q.statp);
885 if (H_GETSTAT(q->q.statp) & FATM_STAT_ERROR) {
886 if_printf(sc->ifp, "getprom error\n");
889 H_SETSTAT(q->q.statp, FATM_STAT_FREE);
890 H_SYNCSTAT_PREWRITE(sc, q->q.statp);
891 NEXT_QUEUE_ENTRY(sc->cmdqueue.tail, FATM_CMD_QLEN);
893 bus_dmamap_sync(sc->prom_mem.dmat, sc->prom_mem.map,
894 BUS_DMASYNC_POSTREAD);
902 u_char *ptr = (u_char *)sc->prom_mem.mem;
903 for (i = 0; i < sizeof(struct prom); i++)
904 printf("%02x ", *ptr++);
909 prom = (struct prom *)sc->prom_mem.mem;
911 bcopy(prom->mac + 2, IFP2IFATM(sc->ifp)->mib.esi, 6);
912 IFP2IFATM(sc->ifp)->mib.serial = le32toh(prom->serial);
913 IFP2IFATM(sc->ifp)->mib.hw_version = le32toh(prom->version);
914 IFP2IFATM(sc->ifp)->mib.sw_version = READ4(sc, FATMO_FIRMWARE_RELEASE);
916 if_printf(sc->ifp, "ESI=%02x:%02x:%02x:%02x:%02x:%02x "
917 "serial=%u hw=0x%x sw=0x%x\n", IFP2IFATM(sc->ifp)->mib.esi[0],
918 IFP2IFATM(sc->ifp)->mib.esi[1], IFP2IFATM(sc->ifp)->mib.esi[2], IFP2IFATM(sc->ifp)->mib.esi[3],
919 IFP2IFATM(sc->ifp)->mib.esi[4], IFP2IFATM(sc->ifp)->mib.esi[5], IFP2IFATM(sc->ifp)->mib.serial,
920 IFP2IFATM(sc->ifp)->mib.hw_version, IFP2IFATM(sc->ifp)->mib.sw_version);
926 * This is the callback function for bus_dmamap_load. We assume, that we
927 * have a 32-bit bus and so have always one segment.
930 dmaload_helper(void *arg, bus_dma_segment_t *segs, int nsegs, int error)
932 bus_addr_t *ptr = (bus_addr_t *)arg;
935 printf("%s: error=%d\n", __func__, error);
938 KASSERT(nsegs == 1, ("too many DMA segments"));
939 KASSERT(segs[0].ds_addr <= 0xffffffff, ("DMA address too large %lx",
940 (u_long)segs[0].ds_addr));
942 *ptr = segs[0].ds_addr;
946 * Allocate a chunk of DMA-able memory and map it.
949 alloc_dma_memory(struct fatm_softc *sc, const char *nm, struct fatm_mem *mem)
955 if (bus_dma_tag_create(sc->parent_dmat, mem->align, 0,
956 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR,
957 NULL, NULL, mem->size, 1, BUS_SPACE_MAXSIZE_32BIT,
958 BUS_DMA_ALLOCNOW, NULL, NULL, &mem->dmat)) {
959 if_printf(sc->ifp, "could not allocate %s DMA tag\n",
964 error = bus_dmamem_alloc(mem->dmat, &mem->mem, 0, &mem->map);
966 if_printf(sc->ifp, "could not allocate %s DMA memory: "
968 bus_dma_tag_destroy(mem->dmat);
973 error = bus_dmamap_load(mem->dmat, mem->map, mem->mem, mem->size,
974 dmaload_helper, &mem->paddr, BUS_DMA_NOWAIT);
976 if_printf(sc->ifp, "could not load %s DMA memory: "
978 bus_dmamem_free(mem->dmat, mem->mem, mem->map);
979 bus_dma_tag_destroy(mem->dmat);
984 DBG(sc, DMA, ("DMA %s V/P/S/Z %p/%lx/%x/%x", nm, mem->mem,
985 (u_long)mem->paddr, mem->size, mem->align));
992 alloc_dma_memoryX(struct fatm_softc *sc, const char *nm, struct fatm_mem *mem)
998 if (bus_dma_tag_create(NULL, mem->align, 0,
999 BUS_SPACE_MAXADDR_24BIT, BUS_SPACE_MAXADDR,
1000 NULL, NULL, mem->size, 1, mem->size,
1001 BUS_DMA_ALLOCNOW, NULL, NULL, &mem->dmat)) {
1002 if_printf(sc->ifp, "could not allocate %s DMA tag\n",
1007 mem->mem = contigmalloc(mem->size, M_DEVBUF, M_WAITOK,
1008 BUS_SPACE_MAXADDR_24BIT, BUS_SPACE_MAXADDR_32BIT, mem->align, 0);
1010 error = bus_dmamap_create(mem->dmat, 0, &mem->map);
1012 if_printf(sc->ifp, "could not allocate %s DMA map: "
1014 contigfree(mem->mem, mem->size, M_DEVBUF);
1015 bus_dma_tag_destroy(mem->dmat);
1020 error = bus_dmamap_load(mem->dmat, mem->map, mem->mem, mem->size,
1021 dmaload_helper, &mem->paddr, BUS_DMA_NOWAIT);
1023 if_printf(sc->ifp, "could not load %s DMA memory: "
1025 bus_dmamap_destroy(mem->dmat, mem->map);
1026 contigfree(mem->mem, mem->size, M_DEVBUF);
1027 bus_dma_tag_destroy(mem->dmat);
1032 DBG(sc, DMA, ("DMAX %s V/P/S/Z %p/%lx/%x/%x", nm, mem->mem,
1033 (u_long)mem->paddr, mem->size, mem->align));
1035 printf("DMAX: %s V/P/S/Z %p/%lx/%x/%x", nm, mem->mem,
1036 (u_long)mem->paddr, mem->size, mem->align);
1040 #endif /* TEST_DMA_SYNC */
1043 * Destroy all resources of an dma-able memory chunk
1046 destroy_dma_memory(struct fatm_mem *mem)
1048 if (mem->mem != NULL) {
1049 bus_dmamap_unload(mem->dmat, mem->map);
1050 bus_dmamem_free(mem->dmat, mem->mem, mem->map);
1051 bus_dma_tag_destroy(mem->dmat);
1055 #ifdef TEST_DMA_SYNC
1057 destroy_dma_memoryX(struct fatm_mem *mem)
1059 if (mem->mem != NULL) {
1060 bus_dmamap_unload(mem->dmat, mem->map);
1061 bus_dmamap_destroy(mem->dmat, mem->map);
1062 contigfree(mem->mem, mem->size, M_DEVBUF);
1063 bus_dma_tag_destroy(mem->dmat);
1067 #endif /* TEST_DMA_SYNC */
1070 * Try to supply buffers to the card if there are free entries in the queues
1073 fatm_supply_small_buffers(struct fatm_softc *sc)
1078 int i, j, error, cnt;
1083 nbufs = max(4 * sc->open_vccs, 32);
1084 nbufs = min(nbufs, SMALL_POOL_SIZE);
1085 nbufs -= sc->small_cnt;
1087 nblocks = (nbufs + SMALL_SUPPLY_BLKSIZE - 1) / SMALL_SUPPLY_BLKSIZE;
1088 for (cnt = 0; cnt < nblocks; cnt++) {
1089 q = GET_QUEUE(sc->s1queue, struct supqueue, sc->s1queue.head);
1091 H_SYNCSTAT_POSTREAD(sc, q->q.statp);
1092 if (H_GETSTAT(q->q.statp) != FATM_STAT_FREE)
1095 bd = (struct rbd *)q->q.ioblk;
1097 for (i = 0; i < SMALL_SUPPLY_BLKSIZE; i++) {
1098 if ((rb = LIST_FIRST(&sc->rbuf_free)) == NULL) {
1099 if_printf(sc->ifp, "out of rbufs\n");
1102 MGETHDR(m, M_NOWAIT, MT_DATA);
1104 LIST_INSERT_HEAD(&sc->rbuf_free, rb, link);
1107 MH_ALIGN(m, SMALL_BUFFER_LEN);
1108 error = bus_dmamap_load(sc->rbuf_tag, rb->map,
1109 m->m_data, SMALL_BUFFER_LEN, dmaload_helper,
1110 &phys, BUS_DMA_NOWAIT);
1113 "dmamap_load mbuf failed %d", error);
1115 LIST_INSERT_HEAD(&sc->rbuf_free, rb, link);
1118 bus_dmamap_sync(sc->rbuf_tag, rb->map,
1119 BUS_DMASYNC_PREREAD);
1121 LIST_REMOVE(rb, link);
1122 LIST_INSERT_HEAD(&sc->rbuf_used, rb, link);
1125 bd[i].handle = rb - sc->rbufs;
1126 H_SETDESC(bd[i].buffer, phys);
1129 if (i < SMALL_SUPPLY_BLKSIZE) {
1130 for (j = 0; j < i; j++) {
1131 rb = sc->rbufs + bd[j].handle;
1132 bus_dmamap_unload(sc->rbuf_tag, rb->map);
1136 LIST_REMOVE(rb, link);
1137 LIST_INSERT_HEAD(&sc->rbuf_free, rb, link);
1141 H_SYNCQ_PREWRITE(&sc->s1q_mem, bd,
1142 sizeof(struct rbd) * SMALL_SUPPLY_BLKSIZE);
1144 H_SETSTAT(q->q.statp, FATM_STAT_PENDING);
1145 H_SYNCSTAT_PREWRITE(sc, q->q.statp);
1147 WRITE4(sc, q->q.card, q->q.card_ioblk);
1150 sc->small_cnt += SMALL_SUPPLY_BLKSIZE;
1152 NEXT_QUEUE_ENTRY(sc->s1queue.head, SMALL_SUPPLY_QLEN);
1157 * Try to supply buffers to the card if there are free entries in the queues
1158 * We assume that all buffers are within the address space accessible by the
1159 * card (32-bit), so we don't need bounce buffers.
1162 fatm_supply_large_buffers(struct fatm_softc *sc)
1164 int nbufs, nblocks, cnt;
1172 nbufs = max(4 * sc->open_vccs, 32);
1173 nbufs = min(nbufs, LARGE_POOL_SIZE);
1174 nbufs -= sc->large_cnt;
1176 nblocks = (nbufs + LARGE_SUPPLY_BLKSIZE - 1) / LARGE_SUPPLY_BLKSIZE;
1178 for (cnt = 0; cnt < nblocks; cnt++) {
1179 q = GET_QUEUE(sc->l1queue, struct supqueue, sc->l1queue.head);
1181 H_SYNCSTAT_POSTREAD(sc, q->q.statp);
1182 if (H_GETSTAT(q->q.statp) != FATM_STAT_FREE)
1185 bd = (struct rbd *)q->q.ioblk;
1187 for (i = 0; i < LARGE_SUPPLY_BLKSIZE; i++) {
1188 if ((rb = LIST_FIRST(&sc->rbuf_free)) == NULL) {
1189 if_printf(sc->ifp, "out of rbufs\n");
1192 if ((m = m_getcl(M_NOWAIT, MT_DATA,
1193 M_PKTHDR)) == NULL) {
1194 LIST_INSERT_HEAD(&sc->rbuf_free, rb, link);
1198 m->m_data += MCLBYTES - LARGE_BUFFER_LEN;
1199 error = bus_dmamap_load(sc->rbuf_tag, rb->map,
1200 m->m_data, LARGE_BUFFER_LEN, dmaload_helper,
1201 &phys, BUS_DMA_NOWAIT);
1204 "dmamap_load mbuf failed %d", error);
1206 LIST_INSERT_HEAD(&sc->rbuf_free, rb, link);
1210 bus_dmamap_sync(sc->rbuf_tag, rb->map,
1211 BUS_DMASYNC_PREREAD);
1213 LIST_REMOVE(rb, link);
1214 LIST_INSERT_HEAD(&sc->rbuf_used, rb, link);
1217 bd[i].handle = rb - sc->rbufs;
1218 H_SETDESC(bd[i].buffer, phys);
1221 if (i < LARGE_SUPPLY_BLKSIZE) {
1222 for (j = 0; j < i; j++) {
1223 rb = sc->rbufs + bd[j].handle;
1224 bus_dmamap_unload(sc->rbuf_tag, rb->map);
1228 LIST_REMOVE(rb, link);
1229 LIST_INSERT_HEAD(&sc->rbuf_free, rb, link);
1233 H_SYNCQ_PREWRITE(&sc->l1q_mem, bd,
1234 sizeof(struct rbd) * LARGE_SUPPLY_BLKSIZE);
1236 H_SETSTAT(q->q.statp, FATM_STAT_PENDING);
1237 H_SYNCSTAT_PREWRITE(sc, q->q.statp);
1238 WRITE4(sc, q->q.card, q->q.card_ioblk);
1241 sc->large_cnt += LARGE_SUPPLY_BLKSIZE;
1243 NEXT_QUEUE_ENTRY(sc->l1queue.head, LARGE_SUPPLY_QLEN);
1249 * Actually start the card. The lock must be held here.
1250 * Reset, load the firmware, start it, initializes queues, read the PROM
1251 * and supply receive buffers to the card.
1254 fatm_init_locked(struct fatm_softc *sc)
1260 DBG(sc, INIT, ("initialize"));
1261 if (sc->ifp->if_drv_flags & IFF_DRV_RUNNING)
1265 * Hard reset the board
1270 start = firmware_load(sc);
1271 if (fatm_start_firmware(sc, start) || fatm_init_cmd(sc) ||
1280 c = READ4(sc, FATMO_MEDIA_TYPE);
1283 case FORE_MT_TAXI_100:
1284 IFP2IFATM(sc->ifp)->mib.media = IFM_ATM_TAXI_100;
1285 IFP2IFATM(sc->ifp)->mib.pcr = 227273;
1288 case FORE_MT_TAXI_140:
1289 IFP2IFATM(sc->ifp)->mib.media = IFM_ATM_TAXI_140;
1290 IFP2IFATM(sc->ifp)->mib.pcr = 318181;
1293 case FORE_MT_UTP_SONET:
1294 IFP2IFATM(sc->ifp)->mib.media = IFM_ATM_UTP_155;
1295 IFP2IFATM(sc->ifp)->mib.pcr = 353207;
1298 case FORE_MT_MM_OC3_ST:
1299 case FORE_MT_MM_OC3_SC:
1300 IFP2IFATM(sc->ifp)->mib.media = IFM_ATM_MM_155;
1301 IFP2IFATM(sc->ifp)->mib.pcr = 353207;
1304 case FORE_MT_SM_OC3_ST:
1305 case FORE_MT_SM_OC3_SC:
1306 IFP2IFATM(sc->ifp)->mib.media = IFM_ATM_SM_155;
1307 IFP2IFATM(sc->ifp)->mib.pcr = 353207;
1311 log(LOG_ERR, "fatm: unknown media type %d\n", c);
1312 IFP2IFATM(sc->ifp)->mib.media = IFM_ATM_UNKNOWN;
1313 IFP2IFATM(sc->ifp)->mib.pcr = 353207;
1316 sc->ifp->if_baudrate = 53 * 8 * IFP2IFATM(sc->ifp)->mib.pcr;
1317 utopia_init_media(&sc->utopia);
1320 * Initialize the RBDs
1322 for (i = 0; i < FATM_RX_QLEN; i++) {
1323 q = GET_QUEUE(sc->rxqueue, struct rxqueue, i);
1324 WRITE4(sc, q->q.card + 0, q->q.card_ioblk);
1329 * Supply buffers to the card
1331 fatm_supply_small_buffers(sc);
1332 fatm_supply_large_buffers(sc);
1335 * Now set flags, that we are ready
1337 sc->ifp->if_drv_flags |= IFF_DRV_RUNNING;
1340 * Start the watchdog timer
1342 callout_reset(&sc->watchdog_timer, hz * 5, fatm_watchdog, sc);
1345 utopia_start(&sc->utopia);
1347 ATMEV_SEND_IFSTATE_CHANGED(IFP2IFATM(sc->ifp),
1348 sc->utopia.carrier == UTP_CARR_OK);
1350 /* start all channels */
1351 for (i = 0; i < FORE_MAX_VCC + 1; i++)
1352 if (sc->vccs[i] != NULL) {
1353 sc->vccs[i]->vflags |= FATM_VCC_REOPEN;
1354 error = fatm_load_vc(sc, sc->vccs[i]);
1356 if_printf(sc->ifp, "reopening %u "
1357 "failed: %d\n", i, error);
1358 sc->vccs[i]->vflags &= ~FATM_VCC_REOPEN;
1362 DBG(sc, INIT, ("done"));
1366 * This is the exported as initialisation function.
1371 struct fatm_softc *sc = p;
1374 fatm_init_locked(sc);
1378 /************************************************************/
1380 * The INTERRUPT handling
1383 * Check the command queue. If a command was completed, call the completion
1384 * function for that command.
1387 fatm_intr_drain_cmd(struct fatm_softc *sc)
1393 * Drain command queue
1396 q = GET_QUEUE(sc->cmdqueue, struct cmdqueue, sc->cmdqueue.tail);
1398 H_SYNCSTAT_POSTREAD(sc, q->q.statp);
1399 stat = H_GETSTAT(q->q.statp);
1401 if (stat != FATM_STAT_COMPLETE &&
1402 stat != (FATM_STAT_COMPLETE | FATM_STAT_ERROR) &&
1403 stat != FATM_STAT_ERROR)
1408 H_SETSTAT(q->q.statp, FATM_STAT_FREE);
1409 H_SYNCSTAT_PREWRITE(sc, q->q.statp);
1411 NEXT_QUEUE_ENTRY(sc->cmdqueue.tail, FATM_CMD_QLEN);
1416 * Drain the small buffer supply queue.
1419 fatm_intr_drain_small_buffers(struct fatm_softc *sc)
1425 q = GET_QUEUE(sc->s1queue, struct supqueue, sc->s1queue.tail);
1427 H_SYNCSTAT_POSTREAD(sc, q->q.statp);
1428 stat = H_GETSTAT(q->q.statp);
1430 if ((stat & FATM_STAT_COMPLETE) == 0)
1432 if (stat & FATM_STAT_ERROR)
1433 log(LOG_ERR, "%s: status %x\n", __func__, stat);
1435 H_SETSTAT(q->q.statp, FATM_STAT_FREE);
1436 H_SYNCSTAT_PREWRITE(sc, q->q.statp);
1438 NEXT_QUEUE_ENTRY(sc->s1queue.tail, SMALL_SUPPLY_QLEN);
1443 * Drain the large buffer supply queue.
1446 fatm_intr_drain_large_buffers(struct fatm_softc *sc)
1452 q = GET_QUEUE(sc->l1queue, struct supqueue, sc->l1queue.tail);
1454 H_SYNCSTAT_POSTREAD(sc, q->q.statp);
1455 stat = H_GETSTAT(q->q.statp);
1457 if ((stat & FATM_STAT_COMPLETE) == 0)
1459 if (stat & FATM_STAT_ERROR)
1460 log(LOG_ERR, "%s status %x\n", __func__, stat);
1462 H_SETSTAT(q->q.statp, FATM_STAT_FREE);
1463 H_SYNCSTAT_PREWRITE(sc, q->q.statp);
1465 NEXT_QUEUE_ENTRY(sc->l1queue.tail, LARGE_SUPPLY_QLEN);
1470 * Check the receive queue. Send any received PDU up the protocol stack
1471 * (except when there was an error or the VCI appears to be closed. In this
1472 * case discard the PDU).
1475 fatm_intr_drain_rx(struct fatm_softc *sc)
1481 struct mbuf *last, *m0;
1485 struct atm_pseudohdr aph;
1487 struct card_vcc *vc;
1490 q = GET_QUEUE(sc->rxqueue, struct rxqueue, sc->rxqueue.tail);
1492 H_SYNCSTAT_POSTREAD(sc, q->q.statp);
1493 stat = H_GETSTAT(q->q.statp);
1495 if ((stat & FATM_STAT_COMPLETE) == 0)
1498 rpd = (struct rpd *)q->q.ioblk;
1499 H_SYNCQ_POSTREAD(&sc->rxq_mem, rpd, RPD_SIZE);
1501 rpd->nseg = le32toh(rpd->nseg);
1504 for (i = 0; i < rpd->nseg; i++) {
1505 rb = sc->rbufs + rpd->segment[i].handle;
1509 last->m_next = rb->m;
1512 last->m_next = NULL;
1513 if (last->m_flags & M_EXT)
1517 bus_dmamap_sync(sc->rbuf_tag, rb->map,
1518 BUS_DMASYNC_POSTREAD);
1519 bus_dmamap_unload(sc->rbuf_tag, rb->map);
1522 LIST_REMOVE(rb, link);
1523 LIST_INSERT_HEAD(&sc->rbuf_free, rb, link);
1525 last->m_len = le32toh(rpd->segment[i].length);
1526 mlen += last->m_len;
1529 m0->m_pkthdr.len = mlen;
1530 m0->m_pkthdr.rcvif = sc->ifp;
1532 h = le32toh(rpd->atm_header);
1533 vpi = (h >> 20) & 0xff;
1534 vci = (h >> 4 ) & 0xffff;
1535 pt = (h >> 1 ) & 0x7;
1538 * Locate the VCC this packet belongs to
1540 if (!VC_OK(sc, vpi, vci))
1542 else if ((vc = sc->vccs[vci]) == NULL ||
1543 !(sc->vccs[vci]->vflags & FATM_VCC_OPEN)) {
1544 sc->istats.rx_closed++;
1548 DBG(sc, RCV, ("RCV: vc=%u.%u pt=%u mlen=%d %s", vpi, vci,
1549 pt, mlen, vc == NULL ? "dropped" : ""));
1555 if (!(vc->param.flags & ATMIO_FLAG_NG) &&
1556 vc->param.aal == ATMIO_AAL_5 &&
1557 (vc->param.flags & ATM_PH_LLCSNAP))
1558 BPF_MTAP(sc->ifp, m0);
1561 ATM_PH_FLAGS(&aph) = vc->param.flags;
1562 ATM_PH_VPI(&aph) = vpi;
1563 ATM_PH_SETVCI(&aph, vci);
1569 vc->ibytes += m0->m_pkthdr.len;
1571 atm_input(ifp, &aph, m0, vc->rxhand);
1574 H_SETSTAT(q->q.statp, FATM_STAT_FREE);
1575 H_SYNCSTAT_PREWRITE(sc, q->q.statp);
1577 WRITE4(sc, q->q.card, q->q.card_ioblk);
1580 NEXT_QUEUE_ENTRY(sc->rxqueue.tail, FATM_RX_QLEN);
1585 * Check the transmit queue. Free the mbuf chains that we were transmitting.
1588 fatm_intr_drain_tx(struct fatm_softc *sc)
1597 q = GET_QUEUE(sc->txqueue, struct txqueue, sc->txqueue.tail);
1599 H_SYNCSTAT_POSTREAD(sc, q->q.statp);
1600 stat = H_GETSTAT(q->q.statp);
1602 if (stat != FATM_STAT_COMPLETE &&
1603 stat != (FATM_STAT_COMPLETE | FATM_STAT_ERROR) &&
1604 stat != FATM_STAT_ERROR)
1607 H_SETSTAT(q->q.statp, FATM_STAT_FREE);
1608 H_SYNCSTAT_PREWRITE(sc, q->q.statp);
1610 bus_dmamap_sync(sc->tx_tag, q->map, BUS_DMASYNC_POSTWRITE);
1611 bus_dmamap_unload(sc->tx_tag, q->map);
1617 NEXT_QUEUE_ENTRY(sc->txqueue.tail, FATM_TX_QLEN);
1627 struct fatm_softc *sc = (struct fatm_softc *)p;
1630 if (!READ4(sc, FATMO_PSR)) {
1634 WRITE4(sc, FATMO_HCR, FATM_HCR_CLRIRQ);
1636 if (!(sc->ifp->if_drv_flags & IFF_DRV_RUNNING)) {
1640 fatm_intr_drain_cmd(sc);
1641 fatm_intr_drain_rx(sc);
1642 fatm_intr_drain_tx(sc);
1643 fatm_intr_drain_small_buffers(sc);
1644 fatm_intr_drain_large_buffers(sc);
1645 fatm_supply_small_buffers(sc);
1646 fatm_supply_large_buffers(sc);
1650 if (sc->retry_tx && _IF_QLEN(&sc->ifp->if_snd))
1651 (*sc->ifp->if_start)(sc->ifp);
1655 * Get device statistics. This must be called with the softc locked.
1656 * We use a preallocated buffer, so we need to protect this buffer.
1657 * We do this by using a condition variable and a flag. If the flag is set
1658 * the buffer is in use by one thread (one thread is executing a GETSTAT
1659 * card command). In this case all other threads that are trying to get
1660 * statistics block on that condition variable. When the thread finishes
1661 * using the buffer it resets the flag and signals the condition variable. This
1662 * will wakeup the next thread that is waiting for the buffer. If the interface
1663 * is stopped the stopping function will broadcast the cv. All threads will
1664 * find that the interface has been stopped and return.
1666 * Aquiring of the buffer is done by the fatm_getstat() function. The freeing
1667 * must be done by the caller when he has finished using the buffer.
1670 fatm_getstat_complete(struct fatm_softc *sc, struct cmdqueue *q)
1673 H_SYNCSTAT_POSTREAD(sc, q->q.statp);
1674 if (H_GETSTAT(q->q.statp) & FATM_STAT_ERROR) {
1675 sc->istats.get_stat_errors++;
1678 wakeup(&sc->sadi_mem);
1681 fatm_getstat(struct fatm_softc *sc)
1687 * Wait until either the interface is stopped or we can get the
1691 if (!(sc->ifp->if_drv_flags & IFF_DRV_RUNNING))
1693 if (!(sc->flags & FATM_STAT_INUSE))
1695 cv_wait(&sc->cv_stat, &sc->mtx);
1697 sc->flags |= FATM_STAT_INUSE;
1699 q = GET_QUEUE(sc->cmdqueue, struct cmdqueue, sc->cmdqueue.head);
1701 H_SYNCSTAT_POSTREAD(sc, q->q.statp);
1702 if (!(H_GETSTAT(q->q.statp) & FATM_STAT_FREE)) {
1703 sc->istats.cmd_queue_full++;
1706 NEXT_QUEUE_ENTRY(sc->cmdqueue.head, FATM_CMD_QLEN);
1709 q->cb = fatm_getstat_complete;
1710 H_SETSTAT(q->q.statp, FATM_STAT_PENDING);
1711 H_SYNCSTAT_PREWRITE(sc, q->q.statp);
1713 bus_dmamap_sync(sc->sadi_mem.dmat, sc->sadi_mem.map,
1714 BUS_DMASYNC_PREREAD);
1716 WRITE4(sc, q->q.card + FATMOC_GSTAT_BUF,
1717 sc->sadi_mem.paddr);
1719 WRITE4(sc, q->q.card + FATMOC_OP,
1720 FATM_OP_REQUEST_STATS | FATM_OP_INTERRUPT_SEL);
1724 * Wait for the command to complete
1726 error = msleep(&sc->sadi_mem, &sc->mtx, PZERO | PCATCH,
1740 bus_dmamap_sync(sc->sadi_mem.dmat, sc->sadi_mem.map,
1741 BUS_DMASYNC_POSTREAD);
1749 if (q->error == 0) {
1751 uint32_t *p = (uint32_t *)sc->sadi_mem.mem;
1753 for (i = 0; i < sizeof(struct fatm_stats) / sizeof(uint32_t);
1762 * Create a copy of a single mbuf. It can have either internal or
1763 * external data, it may have a packet header. External data is really
1764 * copied, so the new buffer is writeable.
1766 static struct mbuf *
1767 copy_mbuf(struct mbuf *m)
1771 MGET(new, M_NOWAIT, MT_DATA);
1775 if (m->m_flags & M_PKTHDR) {
1776 M_MOVE_PKTHDR(new, m);
1777 if (m->m_len > MHLEN)
1778 MCLGET(new, M_WAITOK);
1780 if (m->m_len > MLEN)
1781 MCLGET(new, M_WAITOK);
1784 bcopy(m->m_data, new->m_data, m->m_len);
1785 new->m_len = m->m_len;
1786 new->m_flags &= ~M_RDONLY;
1792 * All segments must have a four byte aligned buffer address and a four
1793 * byte aligned length. Step through an mbuf chain and check these conditions.
1794 * If the buffer address is not aligned and this is a normal mbuf, move
1795 * the data down. Else make a copy of the mbuf with aligned data.
1796 * If the buffer length is not aligned steel data from the next mbuf.
1797 * We don't need to check whether this has more than one external reference,
1798 * because steeling data doesn't change the external cluster.
1799 * If the last mbuf is not aligned, fill with zeroes.
1801 * Return packet length (well we should have this in the packet header),
1802 * but be careful not to count the zero fill at the end.
1804 * If fixing fails free the chain and zero the pointer.
1806 * We assume, that aligning the virtual address also aligns the mapped bus
1810 fatm_fix_chain(struct fatm_softc *sc, struct mbuf **mp)
1812 struct mbuf *m = *mp, *prev = NULL, *next, *new;
1813 u_int mlen = 0, fill = 0;
1820 if ((uintptr_t)mtod(m, void *) % 4 != 0 ||
1821 (m->m_len % 4 != 0 && next)) {
1827 d = mtod(m, u_char *);
1828 if ((off = (uintptr_t)(void *)d % 4) != 0) {
1829 if (M_WRITABLE(m)) {
1830 sc->istats.fix_addr_copy++;
1831 bcopy(d, d - off, m->m_len);
1832 m->m_data = (caddr_t)(d - off);
1834 if ((new = copy_mbuf(m)) == NULL) {
1835 sc->istats.fix_addr_noext++;
1838 sc->istats.fix_addr_ext++;
1847 if ((off = m->m_len % 4) != 0) {
1848 if (!M_WRITABLE(m)) {
1849 if ((new = copy_mbuf(m)) == NULL) {
1850 sc->istats.fix_len_noext++;
1853 sc->istats.fix_len_copy++;
1860 sc->istats.fix_len++;
1861 d = mtod(m, u_char *) + m->m_len;
1867 } else if (next->m_len == 0) {
1868 sc->istats.fix_empty++;
1869 next = m_free(next);
1872 cp = mtod(next, u_char *);
1875 next->m_data = (caddr_t)cp;
1888 } while ((m = next) != NULL);
1890 return (mlen - fill);
1899 * The helper function is used to load the computed physical addresses
1900 * into the transmit descriptor.
1903 fatm_tpd_load(void *varg, bus_dma_segment_t *segs, int nsegs,
1904 bus_size_t mapsize, int error)
1906 struct tpd *tpd = varg;
1911 KASSERT(nsegs <= TPD_EXTENSIONS + TXD_FIXED, ("too many segments"));
1915 H_SETDESC(tpd->segment[tpd->spec].buffer, segs->ds_addr);
1916 H_SETDESC(tpd->segment[tpd->spec].length, segs->ds_len);
1925 * Note, that we update the internal statistics without the lock here.
1928 fatm_tx(struct fatm_softc *sc, struct mbuf *m, struct card_vcc *vc, u_int mlen)
1932 int error, aal, nsegs;
1936 * Get a queue element.
1937 * If there isn't one - try to drain the transmit queue
1938 * We used to sleep here if that doesn't help, but we
1939 * should not sleep here, because we are called with locks.
1941 q = GET_QUEUE(sc->txqueue, struct txqueue, sc->txqueue.head);
1943 H_SYNCSTAT_POSTREAD(sc, q->q.statp);
1944 if (H_GETSTAT(q->q.statp) != FATM_STAT_FREE) {
1945 fatm_intr_drain_tx(sc);
1946 H_SYNCSTAT_POSTREAD(sc, q->q.statp);
1947 if (H_GETSTAT(q->q.statp) != FATM_STAT_FREE) {
1949 sc->istats.tx_retry++;
1950 IF_PREPEND(&sc->ifp->if_snd, m);
1953 sc->istats.tx_queue_full++;
1957 sc->istats.tx_queue_almost_full++;
1962 m->m_data += sizeof(struct atm_pseudohdr);
1963 m->m_len -= sizeof(struct atm_pseudohdr);
1966 if (!(vc->param.flags & ATMIO_FLAG_NG) &&
1967 vc->param.aal == ATMIO_AAL_5 &&
1968 (vc->param.flags & ATM_PH_LLCSNAP))
1969 BPF_MTAP(sc->ifp, m);
1973 error = bus_dmamap_load_mbuf(sc->tx_tag, q->map, m,
1974 fatm_tpd_load, tpd, BUS_DMA_NOWAIT);
1976 sc->ifp->if_oerrors++;
1977 if_printf(sc->ifp, "mbuf loaded error=%d\n", error);
1983 bus_dmamap_sync(sc->tx_tag, q->map, BUS_DMASYNC_PREWRITE);
1986 * OK. Now go and do it.
1988 aal = (vc->param.aal == ATMIO_AAL_5) ? 5 : 0;
1990 H_SETSTAT(q->q.statp, FATM_STAT_PENDING);
1991 H_SYNCSTAT_PREWRITE(sc, q->q.statp);
1995 * If the transmit queue is almost full, schedule a
1996 * transmit interrupt so that transmit descriptors can
1999 H_SETDESC(tpd->spec, TDX_MKSPEC((sc->txcnt >=
2000 (4 * FATM_TX_QLEN) / 5), aal, nsegs, mlen));
2001 H_SETDESC(tpd->atm_header, TDX_MKHDR(vc->param.vpi,
2002 vc->param.vci, 0, 0));
2004 if (vc->param.traffic == ATMIO_TRAFFIC_UBR)
2005 H_SETDESC(tpd->stream, 0);
2009 for (i = 0; i < RATE_TABLE_SIZE; i++)
2010 if (rate_table[i].cell_rate < vc->param.tparam.pcr)
2014 H_SETDESC(tpd->stream, rate_table[i].ratio);
2016 H_SYNCQ_PREWRITE(&sc->txq_mem, tpd, TPD_SIZE);
2018 nblks = TDX_SEGS2BLKS(nsegs);
2020 DBG(sc, XMIT, ("XMIT: mlen=%d spec=0x%x nsegs=%d blocks=%d",
2021 mlen, le32toh(tpd->spec), nsegs, nblks));
2023 WRITE4(sc, q->q.card + 0, q->q.card_ioblk | nblks);
2027 sc->ifp->if_opackets++;
2028 vc->obytes += m->m_pkthdr.len;
2031 NEXT_QUEUE_ENTRY(sc->txqueue.head, FATM_TX_QLEN);
2037 fatm_start(struct ifnet *ifp)
2039 struct atm_pseudohdr aph;
2040 struct fatm_softc *sc;
2042 u_int mlen, vpi, vci;
2043 struct card_vcc *vc;
2048 IF_DEQUEUE(&ifp->if_snd, m);
2053 * Loop through the mbuf chain and compute the total length
2054 * of the packet. Check that all data pointer are
2055 * 4 byte aligned. If they are not, call fatm_mfix to
2056 * fix that problem. This comes more or less from the
2059 mlen = fatm_fix_chain(sc, &m);
2063 if (m->m_len < sizeof(struct atm_pseudohdr) &&
2064 (m = m_pullup(m, sizeof(struct atm_pseudohdr))) == NULL)
2067 aph = *mtod(m, struct atm_pseudohdr *);
2068 mlen -= sizeof(struct atm_pseudohdr);
2074 if (mlen > FATM_MAXPDU) {
2075 sc->istats.tx_pdu2big++;
2080 vci = ATM_PH_VCI(&aph);
2081 vpi = ATM_PH_VPI(&aph);
2084 * From here on we need the softc
2087 if (!(ifp->if_drv_flags & IFF_DRV_RUNNING)) {
2092 if (!VC_OK(sc, vpi, vci) || (vc = sc->vccs[vci]) == NULL ||
2093 !(vc->vflags & FATM_VCC_OPEN)) {
2098 if (fatm_tx(sc, m, vc, mlen)) {
2109 * This may seem complicated. The reason for this is, that we need an
2110 * asynchronuous open/close for the NATM VCCs because our ioctl handler
2111 * is called with the radix node head of the routing table locked. Therefor
2112 * we cannot sleep there and wait for the open/close to succeed. For this
2113 * reason we just initiate the operation from the ioctl.
2117 * Command the card to open/close a VC.
2118 * Return the queue entry for waiting if we are succesful.
2120 static struct cmdqueue *
2121 fatm_start_vcc(struct fatm_softc *sc, u_int vpi, u_int vci, uint32_t cmd,
2122 u_int mtu, void (*func)(struct fatm_softc *, struct cmdqueue *))
2126 q = GET_QUEUE(sc->cmdqueue, struct cmdqueue, sc->cmdqueue.head);
2128 H_SYNCSTAT_POSTREAD(sc, q->q.statp);
2129 if (!(H_GETSTAT(q->q.statp) & FATM_STAT_FREE)) {
2130 sc->istats.cmd_queue_full++;
2133 NEXT_QUEUE_ENTRY(sc->cmdqueue.head, FATM_CMD_QLEN);
2137 H_SETSTAT(q->q.statp, FATM_STAT_PENDING);
2138 H_SYNCSTAT_PREWRITE(sc, q->q.statp);
2140 WRITE4(sc, q->q.card + FATMOC_ACTIN_VPVC, MKVPVC(vpi, vci));
2142 WRITE4(sc, q->q.card + FATMOC_ACTIN_MTU, mtu);
2144 WRITE4(sc, q->q.card + FATMOC_OP, cmd);
2151 * The VC has been opened/closed and somebody has been waiting for this.
2155 fatm_cmd_complete(struct fatm_softc *sc, struct cmdqueue *q)
2158 H_SYNCSTAT_POSTREAD(sc, q->q.statp);
2159 if (H_GETSTAT(q->q.statp) & FATM_STAT_ERROR) {
2160 sc->istats.get_stat_errors++;
2170 fatm_open_finish(struct fatm_softc *sc, struct card_vcc *vc)
2172 vc->vflags &= ~FATM_VCC_TRY_OPEN;
2173 vc->vflags |= FATM_VCC_OPEN;
2175 if (vc->vflags & FATM_VCC_REOPEN) {
2176 vc->vflags &= ~FATM_VCC_REOPEN;
2180 /* inform management if this is not an NG
2181 * VCC or it's an NG PVC. */
2182 if (!(vc->param.flags & ATMIO_FLAG_NG) ||
2183 (vc->param.flags & ATMIO_FLAG_PVC))
2184 ATMEV_SEND_VCC_CHANGED(IFP2IFATM(sc->ifp), 0, vc->param.vci, 1);
2188 * The VC that we have tried to open asynchronuosly has been opened.
2191 fatm_open_complete(struct fatm_softc *sc, struct cmdqueue *q)
2194 struct card_vcc *vc;
2196 vci = GETVCI(READ4(sc, q->q.card + FATMOC_ACTIN_VPVC));
2198 H_SYNCSTAT_POSTREAD(sc, q->q.statp);
2199 if (H_GETSTAT(q->q.statp) & FATM_STAT_ERROR) {
2200 sc->istats.get_stat_errors++;
2201 sc->vccs[vci] = NULL;
2202 uma_zfree(sc->vcc_zone, vc);
2203 if_printf(sc->ifp, "opening VCI %u failed\n", vci);
2206 fatm_open_finish(sc, vc);
2210 * Wait on the queue entry until the VCC is opened/closed.
2213 fatm_waitvcc(struct fatm_softc *sc, struct cmdqueue *q)
2218 * Wait for the command to complete
2220 error = msleep(q, &sc->mtx, PZERO | PCATCH, "fatm_vci", hz);
2228 * Start to open a VCC. This just initiates the operation.
2231 fatm_open_vcc(struct fatm_softc *sc, struct atmio_openvcc *op)
2234 struct card_vcc *vc;
2239 if ((op->param.flags & ATMIO_FLAG_NOTX) &&
2240 (op->param.flags & ATMIO_FLAG_NORX))
2243 if (!VC_OK(sc, op->param.vpi, op->param.vci))
2245 if (op->param.aal != ATMIO_AAL_0 && op->param.aal != ATMIO_AAL_5)
2248 vc = uma_zalloc(sc->vcc_zone, M_NOWAIT | M_ZERO);
2255 if (!(sc->ifp->if_drv_flags & IFF_DRV_RUNNING)) {
2259 if (sc->vccs[op->param.vci] != NULL) {
2263 vc->param = op->param;
2264 vc->rxhand = op->rxhand;
2266 switch (op->param.traffic) {
2268 case ATMIO_TRAFFIC_UBR:
2271 case ATMIO_TRAFFIC_CBR:
2272 if (op->param.tparam.pcr == 0 ||
2273 op->param.tparam.pcr > IFP2IFATM(sc->ifp)->mib.pcr) {
2283 vc->ibytes = vc->obytes = 0;
2284 vc->ipackets = vc->opackets = 0;
2286 vc->vflags = FATM_VCC_TRY_OPEN;
2287 sc->vccs[op->param.vci] = vc;
2290 error = fatm_load_vc(sc, vc);
2292 sc->vccs[op->param.vci] = NULL;
2297 /* don't free below */
2303 uma_zfree(sc->vcc_zone, vc);
2308 * Try to initialize the given VC
2311 fatm_load_vc(struct fatm_softc *sc, struct card_vcc *vc)
2317 /* Command and buffer strategy */
2318 cmd = FATM_OP_ACTIVATE_VCIN | FATM_OP_INTERRUPT_SEL | (0 << 16);
2319 if (vc->param.aal == ATMIO_AAL_0)
2324 q = fatm_start_vcc(sc, vc->param.vpi, vc->param.vci, cmd, 1,
2325 (vc->param.flags & ATMIO_FLAG_ASYNC) ?
2326 fatm_open_complete : fatm_cmd_complete);
2330 if (!(vc->param.flags & ATMIO_FLAG_ASYNC)) {
2331 error = fatm_waitvcc(sc, q);
2334 fatm_open_finish(sc, vc);
2343 fatm_close_finish(struct fatm_softc *sc, struct card_vcc *vc)
2345 /* inform management of this is not an NG
2346 * VCC or it's an NG PVC. */
2347 if (!(vc->param.flags & ATMIO_FLAG_NG) ||
2348 (vc->param.flags & ATMIO_FLAG_PVC))
2349 ATMEV_SEND_VCC_CHANGED(IFP2IFATM(sc->ifp), 0, vc->param.vci, 0);
2351 sc->vccs[vc->param.vci] = NULL;
2354 uma_zfree(sc->vcc_zone, vc);
2358 * The VC has been closed.
2361 fatm_close_complete(struct fatm_softc *sc, struct cmdqueue *q)
2364 struct card_vcc *vc;
2366 vci = GETVCI(READ4(sc, q->q.card + FATMOC_ACTIN_VPVC));
2368 H_SYNCSTAT_POSTREAD(sc, q->q.statp);
2369 if (H_GETSTAT(q->q.statp) & FATM_STAT_ERROR) {
2370 sc->istats.get_stat_errors++;
2371 /* keep the VCC in that state */
2372 if_printf(sc->ifp, "closing VCI %u failed\n", vci);
2376 fatm_close_finish(sc, vc);
2380 * Initiate closing a VCC
2383 fatm_close_vcc(struct fatm_softc *sc, struct atmio_closevcc *cl)
2387 struct card_vcc *vc;
2389 if (!VC_OK(sc, cl->vpi, cl->vci))
2395 if (!(sc->ifp->if_drv_flags & IFF_DRV_RUNNING)) {
2399 vc = sc->vccs[cl->vci];
2400 if (vc == NULL || !(vc->vflags & (FATM_VCC_OPEN | FATM_VCC_TRY_OPEN))) {
2405 q = fatm_start_vcc(sc, cl->vpi, cl->vci,
2406 FATM_OP_DEACTIVATE_VCIN | FATM_OP_INTERRUPT_SEL, 1,
2407 (vc->param.flags & ATMIO_FLAG_ASYNC) ?
2408 fatm_close_complete : fatm_cmd_complete);
2414 vc->vflags &= ~(FATM_VCC_OPEN | FATM_VCC_TRY_OPEN);
2415 vc->vflags |= FATM_VCC_TRY_CLOSE;
2417 if (!(vc->param.flags & ATMIO_FLAG_ASYNC)) {
2418 error = fatm_waitvcc(sc, q);
2422 fatm_close_finish(sc, vc);
2434 fatm_ioctl(struct ifnet *ifp, u_long cmd, caddr_t arg)
2437 struct fatm_softc *sc = ifp->if_softc;
2438 struct ifaddr *ifa = (struct ifaddr *)arg;
2439 struct ifreq *ifr = (struct ifreq *)arg;
2440 struct atmio_closevcc *cl = (struct atmio_closevcc *)arg;
2441 struct atmio_openvcc *op = (struct atmio_openvcc *)arg;
2442 struct atmio_vcctable *vtab;
2447 case SIOCATMOPENVCC: /* kernel internal use */
2448 error = fatm_open_vcc(sc, op);
2451 case SIOCATMCLOSEVCC: /* kernel internal use */
2452 error = fatm_close_vcc(sc, cl);
2457 ifp->if_flags |= IFF_UP;
2458 if (!(ifp->if_drv_flags & IFF_DRV_RUNNING))
2459 fatm_init_locked(sc);
2460 switch (ifa->ifa_addr->sa_family) {
2464 ifa->ifa_rtrequest = atm_rtrequest;
2475 if (ifp->if_flags & IFF_UP) {
2476 if (!(ifp->if_drv_flags & IFF_DRV_RUNNING)) {
2477 fatm_init_locked(sc);
2480 if (ifp->if_drv_flags & IFF_DRV_RUNNING) {
2489 if (ifp->if_drv_flags & IFF_DRV_RUNNING)
2490 error = ifmedia_ioctl(ifp, ifr, &sc->media, cmd);
2496 /* return vcc table */
2497 vtab = atm_getvccs((struct atmio_vcc **)sc->vccs,
2498 FORE_MAX_VCC + 1, sc->open_vccs, &sc->mtx, 1);
2499 error = copyout(vtab, ifr->ifr_data, sizeof(*vtab) +
2500 vtab->count * sizeof(vtab->vccs[0]));
2501 free(vtab, M_DEVBUF);
2504 case SIOCATMGETVCCS: /* internal netgraph use */
2505 vtab = atm_getvccs((struct atmio_vcc **)sc->vccs,
2506 FORE_MAX_VCC + 1, sc->open_vccs, &sc->mtx, 0);
2511 *(void **)arg = vtab;
2515 DBG(sc, IOCTL, ("+++ cmd=%08lx arg=%p", cmd, arg));
2524 * Detach from the interface and free all resources allocated during
2525 * initialisation and later.
2528 fatm_detach(device_t dev)
2532 struct fatm_softc *sc;
2535 sc = device_get_softc(dev);
2537 if (device_is_alive(dev)) {
2540 utopia_detach(&sc->utopia);
2542 atm_ifdetach(sc->ifp); /* XXX race */
2544 callout_drain(&sc->watchdog_timer);
2547 bus_teardown_intr(dev, sc->irqres, sc->ih);
2549 while ((rb = LIST_FIRST(&sc->rbuf_used)) != NULL) {
2550 if_printf(sc->ifp, "rbuf %p still in use!\n", rb);
2551 bus_dmamap_unload(sc->rbuf_tag, rb->map);
2553 LIST_REMOVE(rb, link);
2554 LIST_INSERT_HEAD(&sc->rbuf_free, rb, link);
2557 if (sc->txqueue.chunk != NULL) {
2558 for (i = 0; i < FATM_TX_QLEN; i++) {
2559 tx = GET_QUEUE(sc->txqueue, struct txqueue, i);
2560 bus_dmamap_destroy(sc->tx_tag, tx->map);
2564 while ((rb = LIST_FIRST(&sc->rbuf_free)) != NULL) {
2565 bus_dmamap_destroy(sc->rbuf_tag, rb->map);
2566 LIST_REMOVE(rb, link);
2569 if (sc->rbufs != NULL)
2570 free(sc->rbufs, M_DEVBUF);
2571 if (sc->vccs != NULL) {
2572 for (i = 0; i < FORE_MAX_VCC + 1; i++)
2573 if (sc->vccs[i] != NULL) {
2574 uma_zfree(sc->vcc_zone, sc->vccs[i]);
2577 free(sc->vccs, M_DEVBUF);
2579 if (sc->vcc_zone != NULL)
2580 uma_zdestroy(sc->vcc_zone);
2582 if (sc->l1queue.chunk != NULL)
2583 free(sc->l1queue.chunk, M_DEVBUF);
2584 if (sc->s1queue.chunk != NULL)
2585 free(sc->s1queue.chunk, M_DEVBUF);
2586 if (sc->rxqueue.chunk != NULL)
2587 free(sc->rxqueue.chunk, M_DEVBUF);
2588 if (sc->txqueue.chunk != NULL)
2589 free(sc->txqueue.chunk, M_DEVBUF);
2590 if (sc->cmdqueue.chunk != NULL)
2591 free(sc->cmdqueue.chunk, M_DEVBUF);
2593 destroy_dma_memory(&sc->reg_mem);
2594 destroy_dma_memory(&sc->sadi_mem);
2595 destroy_dma_memory(&sc->prom_mem);
2596 #ifdef TEST_DMA_SYNC
2597 destroy_dma_memoryX(&sc->s1q_mem);
2598 destroy_dma_memoryX(&sc->l1q_mem);
2599 destroy_dma_memoryX(&sc->rxq_mem);
2600 destroy_dma_memoryX(&sc->txq_mem);
2601 destroy_dma_memoryX(&sc->stat_mem);
2604 if (sc->tx_tag != NULL)
2605 if (bus_dma_tag_destroy(sc->tx_tag))
2606 printf("tx DMA tag busy!\n");
2608 if (sc->rbuf_tag != NULL)
2609 if (bus_dma_tag_destroy(sc->rbuf_tag))
2610 printf("rbuf DMA tag busy!\n");
2612 if (sc->parent_dmat != NULL)
2613 if (bus_dma_tag_destroy(sc->parent_dmat))
2614 printf("parent DMA tag busy!\n");
2616 if (sc->irqres != NULL)
2617 bus_release_resource(dev, SYS_RES_IRQ, sc->irqid, sc->irqres);
2619 if (sc->memres != NULL)
2620 bus_release_resource(dev, SYS_RES_MEMORY,
2621 sc->memid, sc->memres);
2623 (void)sysctl_ctx_free(&sc->sysctl_ctx);
2625 cv_destroy(&sc->cv_stat);
2626 cv_destroy(&sc->cv_regs);
2628 mtx_destroy(&sc->mtx);
2639 fatm_sysctl_istats(SYSCTL_HANDLER_ARGS)
2641 struct fatm_softc *sc = arg1;
2645 ret = malloc(sizeof(sc->istats), M_TEMP, M_WAITOK);
2648 bcopy(&sc->istats, ret, sizeof(sc->istats));
2651 error = SYSCTL_OUT(req, ret, sizeof(sc->istats));
2658 * Sysctl handler for card statistics
2659 * This is disable because it destroys the PHY statistics.
2662 fatm_sysctl_stats(SYSCTL_HANDLER_ARGS)
2664 struct fatm_softc *sc = arg1;
2666 const struct fatm_stats *s;
2670 ret = malloc(sizeof(u_long) * FATM_NSTATS, M_TEMP, M_WAITOK);
2674 if ((error = fatm_getstat(sc)) == 0) {
2675 s = sc->sadi_mem.mem;
2677 ret[i++] = s->phy_4b5b.crc_header_errors;
2678 ret[i++] = s->phy_4b5b.framing_errors;
2679 ret[i++] = s->phy_oc3.section_bip8_errors;
2680 ret[i++] = s->phy_oc3.path_bip8_errors;
2681 ret[i++] = s->phy_oc3.line_bip24_errors;
2682 ret[i++] = s->phy_oc3.line_febe_errors;
2683 ret[i++] = s->phy_oc3.path_febe_errors;
2684 ret[i++] = s->phy_oc3.corr_hcs_errors;
2685 ret[i++] = s->phy_oc3.ucorr_hcs_errors;
2686 ret[i++] = s->atm.cells_transmitted;
2687 ret[i++] = s->atm.cells_received;
2688 ret[i++] = s->atm.vpi_bad_range;
2689 ret[i++] = s->atm.vpi_no_conn;
2690 ret[i++] = s->atm.vci_bad_range;
2691 ret[i++] = s->atm.vci_no_conn;
2692 ret[i++] = s->aal0.cells_transmitted;
2693 ret[i++] = s->aal0.cells_received;
2694 ret[i++] = s->aal0.cells_dropped;
2695 ret[i++] = s->aal4.cells_transmitted;
2696 ret[i++] = s->aal4.cells_received;
2697 ret[i++] = s->aal4.cells_crc_errors;
2698 ret[i++] = s->aal4.cels_protocol_errors;
2699 ret[i++] = s->aal4.cells_dropped;
2700 ret[i++] = s->aal4.cspdus_transmitted;
2701 ret[i++] = s->aal4.cspdus_received;
2702 ret[i++] = s->aal4.cspdus_protocol_errors;
2703 ret[i++] = s->aal4.cspdus_dropped;
2704 ret[i++] = s->aal5.cells_transmitted;
2705 ret[i++] = s->aal5.cells_received;
2706 ret[i++] = s->aal5.congestion_experienced;
2707 ret[i++] = s->aal5.cells_dropped;
2708 ret[i++] = s->aal5.cspdus_transmitted;
2709 ret[i++] = s->aal5.cspdus_received;
2710 ret[i++] = s->aal5.cspdus_crc_errors;
2711 ret[i++] = s->aal5.cspdus_protocol_errors;
2712 ret[i++] = s->aal5.cspdus_dropped;
2713 ret[i++] = s->aux.small_b1_failed;
2714 ret[i++] = s->aux.large_b1_failed;
2715 ret[i++] = s->aux.small_b2_failed;
2716 ret[i++] = s->aux.large_b2_failed;
2717 ret[i++] = s->aux.rpd_alloc_failed;
2718 ret[i++] = s->aux.receive_carrier;
2720 /* declare the buffer free */
2721 sc->flags &= ~FATM_STAT_INUSE;
2722 cv_signal(&sc->cv_stat);
2727 error = SYSCTL_OUT(req, ret, sizeof(u_long) * FATM_NSTATS);
2733 #define MAXDMASEGS 32 /* maximum number of receive descriptors */
2736 * Attach to the device.
2738 * We assume, that there is a global lock (Giant in this case) that protects
2739 * multiple threads from entering this function. This makes sense, doesn't it?
2742 fatm_attach(device_t dev)
2745 struct fatm_softc *sc;
2753 sc = device_get_softc(dev);
2754 unit = device_get_unit(dev);
2756 ifp = sc->ifp = if_alloc(IFT_ATM);
2762 IFP2IFATM(sc->ifp)->mib.device = ATM_DEVICE_PCA200E;
2763 IFP2IFATM(sc->ifp)->mib.serial = 0;
2764 IFP2IFATM(sc->ifp)->mib.hw_version = 0;
2765 IFP2IFATM(sc->ifp)->mib.sw_version = 0;
2766 IFP2IFATM(sc->ifp)->mib.vpi_bits = 0;
2767 IFP2IFATM(sc->ifp)->mib.vci_bits = FORE_VCIBITS;
2768 IFP2IFATM(sc->ifp)->mib.max_vpcs = 0;
2769 IFP2IFATM(sc->ifp)->mib.max_vccs = FORE_MAX_VCC;
2770 IFP2IFATM(sc->ifp)->mib.media = IFM_ATM_UNKNOWN;
2771 IFP2IFATM(sc->ifp)->phy = &sc->utopia;
2773 LIST_INIT(&sc->rbuf_free);
2774 LIST_INIT(&sc->rbuf_used);
2777 * Initialize mutex and condition variables.
2779 mtx_init(&sc->mtx, device_get_nameunit(dev),
2780 MTX_NETWORK_LOCK, MTX_DEF);
2782 cv_init(&sc->cv_stat, "fatm_stat");
2783 cv_init(&sc->cv_regs, "fatm_regs");
2785 sysctl_ctx_init(&sc->sysctl_ctx);
2786 callout_init_mtx(&sc->watchdog_timer, &sc->mtx, 0);
2789 * Make the sysctl tree
2791 if ((sc->sysctl_tree = SYSCTL_ADD_NODE(&sc->sysctl_ctx,
2792 SYSCTL_STATIC_CHILDREN(_hw_atm), OID_AUTO,
2793 device_get_nameunit(dev), CTLFLAG_RD, 0, "")) == NULL)
2796 if (SYSCTL_ADD_PROC(&sc->sysctl_ctx, SYSCTL_CHILDREN(sc->sysctl_tree),
2797 OID_AUTO, "istats", CTLTYPE_ULONG | CTLFLAG_RD, sc, 0,
2798 fatm_sysctl_istats, "LU", "internal statistics") == NULL)
2801 if (SYSCTL_ADD_PROC(&sc->sysctl_ctx, SYSCTL_CHILDREN(sc->sysctl_tree),
2802 OID_AUTO, "stats", CTLTYPE_ULONG | CTLFLAG_RD, sc, 0,
2803 fatm_sysctl_stats, "LU", "card statistics") == NULL)
2806 if (SYSCTL_ADD_INT(&sc->sysctl_ctx, SYSCTL_CHILDREN(sc->sysctl_tree),
2807 OID_AUTO, "retry_tx", CTLFLAG_RW, &sc->retry_tx, 0,
2808 "retry flag") == NULL)
2812 if (SYSCTL_ADD_UINT(&sc->sysctl_ctx, SYSCTL_CHILDREN(sc->sysctl_tree),
2813 OID_AUTO, "debug", CTLFLAG_RW, &sc->debug, 0, "debug flags")
2816 sc->debug = FATM_DEBUG;
2820 * Network subsystem stuff
2823 if_initname(ifp, device_get_name(dev), device_get_unit(dev));
2824 ifp->if_flags = IFF_SIMPLEX;
2825 ifp->if_ioctl = fatm_ioctl;
2826 ifp->if_start = fatm_start;
2827 ifp->if_init = fatm_init;
2828 ifp->if_linkmib = &IFP2IFATM(sc->ifp)->mib;
2829 ifp->if_linkmiblen = sizeof(IFP2IFATM(sc->ifp)->mib);
2834 pci_enable_busmaster(dev);
2840 sc->memres = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &sc->memid,
2842 if (sc->memres == NULL) {
2843 if_printf(ifp, "could not map memory\n");
2847 sc->memh = rman_get_bushandle(sc->memres);
2848 sc->memt = rman_get_bustag(sc->memres);
2851 * Convert endianess of slave access
2853 cfg = pci_read_config(dev, FATM_PCIR_MCTL, 1);
2854 cfg |= FATM_PCIM_SWAB;
2855 pci_write_config(dev, FATM_PCIR_MCTL, cfg, 1);
2858 * Allocate interrupt (activate at the end)
2861 sc->irqres = bus_alloc_resource_any(dev, SYS_RES_IRQ, &sc->irqid,
2862 RF_SHAREABLE | RF_ACTIVE);
2863 if (sc->irqres == NULL) {
2864 if_printf(ifp, "could not allocate irq\n");
2870 * Allocate the parent DMA tag. This is used simply to hold overall
2871 * restrictions for the controller (and PCI bus) and is never used
2874 if (bus_dma_tag_create(bus_get_dma_tag(dev), 1, 0,
2875 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR,
2876 NULL, NULL, BUS_SPACE_MAXSIZE_32BIT, MAXDMASEGS,
2877 BUS_SPACE_MAXSIZE_32BIT, 0, NULL, NULL,
2878 &sc->parent_dmat)) {
2879 if_printf(ifp, "could not allocate parent DMA tag\n");
2885 * Allocate the receive buffer DMA tag. This tag must map a maximum of
2888 if (bus_dma_tag_create(sc->parent_dmat, 1, 0,
2889 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR,
2890 NULL, NULL, MCLBYTES, 1, MCLBYTES, 0,
2891 NULL, NULL, &sc->rbuf_tag)) {
2892 if_printf(ifp, "could not allocate rbuf DMA tag\n");
2898 * Allocate the transmission DMA tag. Must add 1, because
2899 * rounded up PDU will be 65536 bytes long.
2901 if (bus_dma_tag_create(sc->parent_dmat, 1, 0,
2902 BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR,
2904 FATM_MAXPDU + 1, TPD_EXTENSIONS + TXD_FIXED, MCLBYTES, 0,
2905 NULL, NULL, &sc->tx_tag)) {
2906 if_printf(ifp, "could not allocate tx DMA tag\n");
2912 * Allocate DMAable memory.
2914 sc->stat_mem.size = sizeof(uint32_t) * (FATM_CMD_QLEN + FATM_TX_QLEN
2915 + FATM_RX_QLEN + SMALL_SUPPLY_QLEN + LARGE_SUPPLY_QLEN);
2916 sc->stat_mem.align = 4;
2918 sc->txq_mem.size = FATM_TX_QLEN * TPD_SIZE;
2919 sc->txq_mem.align = 32;
2921 sc->rxq_mem.size = FATM_RX_QLEN * RPD_SIZE;
2922 sc->rxq_mem.align = 32;
2924 sc->s1q_mem.size = SMALL_SUPPLY_QLEN *
2925 BSUP_BLK2SIZE(SMALL_SUPPLY_BLKSIZE);
2926 sc->s1q_mem.align = 32;
2928 sc->l1q_mem.size = LARGE_SUPPLY_QLEN *
2929 BSUP_BLK2SIZE(LARGE_SUPPLY_BLKSIZE);
2930 sc->l1q_mem.align = 32;
2932 #ifdef TEST_DMA_SYNC
2933 if ((error = alloc_dma_memoryX(sc, "STATUS", &sc->stat_mem)) != 0 ||
2934 (error = alloc_dma_memoryX(sc, "TXQ", &sc->txq_mem)) != 0 ||
2935 (error = alloc_dma_memoryX(sc, "RXQ", &sc->rxq_mem)) != 0 ||
2936 (error = alloc_dma_memoryX(sc, "S1Q", &sc->s1q_mem)) != 0 ||
2937 (error = alloc_dma_memoryX(sc, "L1Q", &sc->l1q_mem)) != 0)
2940 if ((error = alloc_dma_memory(sc, "STATUS", &sc->stat_mem)) != 0 ||
2941 (error = alloc_dma_memory(sc, "TXQ", &sc->txq_mem)) != 0 ||
2942 (error = alloc_dma_memory(sc, "RXQ", &sc->rxq_mem)) != 0 ||
2943 (error = alloc_dma_memory(sc, "S1Q", &sc->s1q_mem)) != 0 ||
2944 (error = alloc_dma_memory(sc, "L1Q", &sc->l1q_mem)) != 0)
2948 sc->prom_mem.size = sizeof(struct prom);
2949 sc->prom_mem.align = 32;
2950 if ((error = alloc_dma_memory(sc, "PROM", &sc->prom_mem)) != 0)
2953 sc->sadi_mem.size = sizeof(struct fatm_stats);
2954 sc->sadi_mem.align = 32;
2955 if ((error = alloc_dma_memory(sc, "STATISTICS", &sc->sadi_mem)) != 0)
2958 sc->reg_mem.size = sizeof(uint32_t) * FATM_NREGS;
2959 sc->reg_mem.align = 32;
2960 if ((error = alloc_dma_memory(sc, "REGISTERS", &sc->reg_mem)) != 0)
2966 sc->cmdqueue.chunk = malloc(FATM_CMD_QLEN * sizeof(struct cmdqueue),
2967 M_DEVBUF, M_ZERO | M_WAITOK);
2968 sc->txqueue.chunk = malloc(FATM_TX_QLEN * sizeof(struct txqueue),
2969 M_DEVBUF, M_ZERO | M_WAITOK);
2970 sc->rxqueue.chunk = malloc(FATM_RX_QLEN * sizeof(struct rxqueue),
2971 M_DEVBUF, M_ZERO | M_WAITOK);
2972 sc->s1queue.chunk = malloc(SMALL_SUPPLY_QLEN * sizeof(struct supqueue),
2973 M_DEVBUF, M_ZERO | M_WAITOK);
2974 sc->l1queue.chunk = malloc(LARGE_SUPPLY_QLEN * sizeof(struct supqueue),
2975 M_DEVBUF, M_ZERO | M_WAITOK);
2977 sc->vccs = malloc((FORE_MAX_VCC + 1) * sizeof(sc->vccs[0]),
2978 M_DEVBUF, M_ZERO | M_WAITOK);
2979 sc->vcc_zone = uma_zcreate("FATM vccs", sizeof(struct card_vcc),
2980 NULL, NULL, NULL, NULL, UMA_ALIGN_PTR, 0);
2981 if (sc->vcc_zone == NULL) {
2987 * Allocate memory for the receive buffer headers. The total number
2988 * of headers should probably also include the maximum number of
2989 * buffers on the receive queue.
2991 sc->rbuf_total = SMALL_POOL_SIZE + LARGE_POOL_SIZE;
2992 sc->rbufs = malloc(sc->rbuf_total * sizeof(struct rbuf),
2993 M_DEVBUF, M_ZERO | M_WAITOK);
2996 * Put all rbuf headers on the free list and create DMA maps.
2998 for (rb = sc->rbufs, i = 0; i < sc->rbuf_total; i++, rb++) {
2999 if ((error = bus_dmamap_create(sc->rbuf_tag, 0, &rb->map))) {
3000 if_printf(sc->ifp, "creating rx map: %d\n",
3004 LIST_INSERT_HEAD(&sc->rbuf_free, rb, link);
3008 * Create dma maps for transmission. In case of an error, free the
3009 * allocated DMA maps, because on some architectures maps are NULL
3010 * and we cannot distinguish between a failure and a NULL map in
3011 * the detach routine.
3013 for (i = 0; i < FATM_TX_QLEN; i++) {
3014 tx = GET_QUEUE(sc->txqueue, struct txqueue, i);
3015 if ((error = bus_dmamap_create(sc->tx_tag, 0, &tx->map))) {
3016 if_printf(sc->ifp, "creating tx map: %d\n",
3019 tx = GET_QUEUE(sc->txqueue, struct txqueue,
3021 bus_dmamap_destroy(sc->tx_tag, tx->map);
3028 utopia_attach(&sc->utopia, IFP2IFATM(sc->ifp), &sc->media, &sc->mtx,
3029 &sc->sysctl_ctx, SYSCTL_CHILDREN(sc->sysctl_tree),
3030 &fatm_utopia_methods);
3031 sc->utopia.flags |= UTP_FL_NORESET | UTP_FL_POLL_CARRIER;
3034 * Attach the interface
3037 ifp->if_snd.ifq_maxlen = 512;
3040 bpfattach(ifp, DLT_ATM_RFC1483, sizeof(struct atmllc));
3043 error = bus_setup_intr(dev, sc->irqres, INTR_TYPE_NET | INTR_MPSAFE,
3044 NULL, fatm_intr, sc, &sc->ih);
3046 if_printf(ifp, "couldn't setup irq\n");
3057 #if defined(FATM_DEBUG) && 0
3059 dump_s1_queue(struct fatm_softc *sc)
3064 for(i = 0; i < SMALL_SUPPLY_QLEN; i++) {
3065 q = GET_QUEUE(sc->s1queue, struct supqueue, i);
3066 printf("%2d: card=%x(%x,%x) stat=%x\n", i,
3068 READ4(sc, q->q.card),
3069 READ4(sc, q->q.card + 4),
3076 * Driver infrastructure.
3078 static device_method_t fatm_methods[] = {
3079 DEVMETHOD(device_probe, fatm_probe),
3080 DEVMETHOD(device_attach, fatm_attach),
3081 DEVMETHOD(device_detach, fatm_detach),
3084 static driver_t fatm_driver = {
3087 sizeof(struct fatm_softc),
3090 DRIVER_MODULE(fatm, pci, fatm_driver, fatm_devclass, 0, 0);