2 * Hardware specification of various 8696x based Ethernet cards.
3 * Contributed by M. Sekiguchi <seki@sysrap.cs.fujitsu.co.jp>
5 * All Rights Reserved, Copyright (C) Fujitsu Limited 1995
7 * This software may be used, modified, copied, distributed, and sold,
8 * in both source and binary form provided that the above copyright,
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14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND THE CONTRIBUTOR ``AS IS'' AND
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16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR THE CONTRIBUTOR BE LIABLE
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20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
30 * Registers on FMV-180 series' ISA bus interface ASIC.
31 * I'm not sure the following register names are appropriate.
32 * Doesn't it look silly, eh? FIXME.
35 #define FE_FMV0 16 /* Card status register #0 */
36 #define FE_FMV1 17 /* Card status register #1 */
37 #define FE_FMV2 18 /* Card config register #0 */
38 #define FE_FMV3 19 /* Card config register #1 */
39 #define FE_FMV4 20 /* Station address #1 */
40 #define FE_FMV5 21 /* Station address #2 */
41 #define FE_FMV6 22 /* Station address #3 */
42 #define FE_FMV7 23 /* Station address #4 */
43 #define FE_FMV8 24 /* Station address #5 */
44 #define FE_FMV9 25 /* Station address #6 */
45 #define FE_FMV10 26 /* Buffer RAM control register */
46 #define FE_FMV11 27 /* Buffer RAM data register */
49 * FMV-180 series' ASIC register values.
52 /* FMV0: Card status register #0: Misc info? */
53 #define FE_FMV0_MEDIA 0x07 /* Supported physical media. */
54 #define FE_FMV0_PRRDY 0x10 /* ??? */
55 #define FE_FMV0_PRERR 0x20 /* ??? */
56 #define FE_FMV0_ERRDY 0x40 /* ??? */
57 #define FE_FMV0_IREQ 0x80 /* ??? */
59 #define FE_FMV0_MEDIUM_5 0x01 /* 10base5/Dsub */
60 #define FE_FMV0_MEDIUM_2 0x02 /* 10base2/BNC */
61 #define FE_FMV0_MEDIUM_T 0x04 /* 10baseT/RJ45 */
63 /* Card status register #1: Hardware revision. */
64 #define FE_FMV1_REV 0x0F /* Card revision */
65 #define FE_FMV1_UPPER 0xF0 /* Usage unknown */
67 /* Card config register #0: I/O port address assignment. */
68 #define FE_FMV2_IOS 0x07 /* I/O selection. */
69 #define FE_FMV2_MES 0x38 /* ??? boot ROM? */
70 #define FE_FMV2_IRS 0xC0 /* IRQ selection. */
72 #define FE_FMV2_IOS_SHIFT 0
73 #define FE_FMV2_MES_SHIFT 3
74 #define FE_FMV2_IRS_SHIFT 6
76 /* Card config register #1: IRQ enable */
77 #define FE_FMV3_IRQENB 0x80 /* IRQ enable. */
81 * Register(?) specific to AT1700/RE2000.
84 #define FE_ATI_RESET 0x1F /* Write to reset the 86965. */
86 /* EEPROM allocation (offsets) of AT1700/RE2000. */
87 #define FE_ATI_EEP_ADDR 0x08 /* Station address. (8-13) */
88 #define FE_ATI_EEP_MEDIA 0x18 /* Media type. */
89 #define FE_ATI_EEP_MAGIC 0x19 /* XXX Magic. */
90 #define FE_ATI_EEP_MODEL 0x1e /* Hardware type. */
91 #define FE_ATI_EEP_REVISION 0x1f /* Hardware revision. */
93 /* Value for FE_ATI_EEP_MODEL. */
94 #define FE_ATI_MODEL_AT1700T 0x00
95 #define FE_ATI_MODEL_AT1700BT 0x01
96 #define FE_ATI_MODEL_AT1700FT 0x02
97 #define FE_ATI_MODEL_AT1700AT 0x03
101 * Registers on MBH10302.
104 #define FE_MBH0 0x10 /* ??? Including interrupt. */
105 #define FE_MBH1 0x11 /* ??? */
106 #define FE_MBH10 0x1A /* Station address. (10 - 15) */
108 /* Values to be set in MBH0 register. */
109 #define FE_MBH0_MAGIC 0x0D /* Just a magic constant? */
110 #define FE_MBH0_INTR 0x10 /* Master interrupt control. */
112 #define FE_MBH0_INTR_ENABLE 0x10 /* Enable interrupts. */
113 #define FE_MBH0_INTR_DISABLE 0x00 /* Disable interrupts. */
117 * Registers on RE1000. (*NOT* on RE1000 Plus.)
120 /* IRQ configuration. */
121 #define FE_RE1000_IRQCONF 0x10
125 * Fujitsu MB86965 JLI mode support routines.
128 /* Datasheet for 86965 explicitly states that it only supports serial
129 * EEPROM with 16 words (32 bytes) capacity. (I.e., 93C06.) However,
130 * ones with 64 words (128 bytes) are available in the marked, namely
131 * 93C46, and are also fully compatible with 86965. It is known that
132 * some boards (e.g., ICL) actually have 93C46 on them and use extra
133 * storage to keep various config info. */
134 #define JLI_EEPROM_SIZE 128
138 * SSi 78Q8377A support routines.
140 #define SSI_EEPROM_SIZE 512
147 #define FE_SSI_EEP_IRQ 9 /* Irq ??? */
148 #define FE_SSI_EEP_ADDR 16 /* Station(MAC) address */
149 #define FE_SSI_EEP_DUPLEX 25 /* Duplex mode ??? */
153 * TDK/LANX boards support routines.
156 /* AX012/AX013 equips an X24C01 chip, which has 128 bytes of memory cells. */
157 #define LNX_EEPROM_SIZE 128
159 /* Bit assignments and command definitions for the serial EEPROM
160 interface register in LANX ASIC. */
161 #define LNX_SDA_HI 0x08 /* Drive SDA line high (logical 1.) */
162 #define LNX_SDA_LO 0x00 /* Drive SDA line low (logical 0.) */
163 #define LNX_SDA_FL 0x08 /* Float (don't drive) SDA line. */
164 #define LNX_SDA_IN 0x01 /* Mask for reading SDA line. */
165 #define LNX_CLK_HI 0x04 /* Drive clock line high (active.) */
166 #define LNX_CLK_LO 0x00 /* Drive clock line low (inactive.) */