2 * Copyright (c) 2011 HighPoint Technologies, Inc.
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
8 * 1. Redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution.
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
29 #include <dev/hpt27xx/hpt27xx_config.h>
34 #define VERMAGIC_HIM 55
36 #if defined(__cplusplus)
40 #include <dev/hpt27xx/list.h>
42 #define SECTOR_TO_BYTE_SHIFT 9
43 #define SECTOR_TO_BYTE(x) ((HPT_U32)(x) << SECTOR_TO_BYTE_SHIFT)
44 #define BYTE_TO_SECTOR(x) ((x)>>SECTOR_TO_BYTE_SHIFT)
46 typedef struct _PCI_ID
57 typedef struct _PCI_ADDRESS
66 typedef struct _HIM_ADAPTER_CONFIG
73 HPT_U8 bProbeInInitializing:1;
75 HPT_U8 bSpinupOneDevEachTime:1;
78 HPT_U8 bSGPIOPartSupport:1;
80 HPT_U8 bNeedSASIdleTimer:1;
91 HPT_U8 szVendorID[36];
92 HPT_U8 szProductID[36];
102 HIM_ADAPTER_CONFIG, *PHIM_ADAPTER_CONFIG;
104 typedef struct _HIM_CHANNEL_CONFIG
108 } HIM_CHANNEL_CONFIG, *PHIM_CHANNEL_CONFIG;
110 typedef struct _HIM_DEVICE_FLAGS
112 HPT_UINT df_atapi :1;
113 HPT_UINT df_removable_drive :1;
114 HPT_UINT df_on_line :1;
115 HPT_UINT df_reduce_mode :1;
117 HPT_UINT df_on_pm_port :1;
118 HPT_UINT df_support_read_ahead :1;
119 HPT_UINT df_read_ahead_enabled :1;
120 HPT_UINT df_support_write_cache :1;
121 HPT_UINT df_write_cache_enabled :1;
122 HPT_UINT df_cdrom_device :1;
123 HPT_UINT df_tape_device :1;
124 HPT_UINT df_changer_device :1;
125 HPT_UINT df_support_tcq :1;
126 HPT_UINT df_tcq_enabled :1;
127 HPT_UINT df_support_ncq :1;
128 HPT_UINT df_ncq_enabled :1;
130 HPT_UINT df_in_enclosure :1;
132 } DEVICE_FLAGS, *PDEVICE_FLAGS;
135 typedef struct _IDENTIFY_DATA {
136 HPT_U16 GeneralConfiguration;
137 HPT_U16 NumberOfCylinders;
139 HPT_U16 NumberOfHeads;
140 HPT_U16 UnformattedBytesPerTrack;
141 HPT_U16 UnformattedBytesPerSector;
142 HPT_U8 SasAddress[8];
143 HPT_U16 SerialNumber[10];
145 HPT_U16 BufferSectorSize;
146 HPT_U16 NumberOfEccBytes;
147 HPT_U16 FirmwareRevision[4];
148 HPT_U16 ModelNumber[20];
149 HPT_U8 MaximumBlockTransfer;
150 HPT_U8 VendorUnique2;
151 HPT_U16 DoubleWordIo;
152 HPT_U16 Capabilities;
154 HPT_U8 VendorUnique3;
155 HPT_U8 PioCycleTimingMode;
156 HPT_U8 VendorUnique4;
157 HPT_U8 DmaCycleTimingMode;
158 HPT_U16 TranslationFieldsValid;
159 HPT_U16 NumberOfCurrentCylinders;
160 HPT_U16 NumberOfCurrentHeads;
161 HPT_U16 CurrentSectorsPerTrack;
162 HPT_U32 CurrentSectorCapacity;
163 HPT_U16 CurrentMultiSectorSetting;
164 HPT_U32 UserAddressableSectors;
165 HPT_U8 SingleWordDMASupport;
166 HPT_U8 SingleWordDMAActive;
167 HPT_U8 MultiWordDMASupport;
168 HPT_U8 MultiWordDMAActive;
169 HPT_U8 AdvancedPIOModes;
171 HPT_U16 MinimumMWXferCycleTime;
172 HPT_U16 RecommendedMWXferCycleTime;
173 HPT_U16 MinimumPIOCycleTime;
174 HPT_U16 MinimumPIOCycleTimeIORDY;
175 HPT_U16 Reserved5[2];
176 HPT_U16 ReleaseTimeOverlapped;
177 HPT_U16 ReleaseTimeServiceCommand;
178 HPT_U16 MajorRevision;
179 HPT_U16 MinorRevision;
180 HPT_U16 MaxQueueDepth;
181 HPT_U16 SataCapability;
182 HPT_U16 Reserved6[9];
183 HPT_U16 CommandSupport;
184 HPT_U16 CommandEnable;
185 HPT_U16 UtralDmaMode;
186 HPT_U16 Reserved7[11];
188 HPT_U32 Lba48BitHigh;
189 HPT_U16 Reserved8[23];
190 HPT_U16 SpecialFunctionsEnabled;
191 HPT_U16 Reserved9[128];
194 __attribute__((packed))
196 IDENTIFY_DATA, *PIDENTIFY_DATA;
199 typedef struct _HIM_DEVICE_CONFIG
202 HPT_U32 logical_sector_size;
208 HPT_U8 max_queue_depth;
212 HPT_U8 transfer_mode;
214 HPT_U8 bDeUsable_Mode;
216 HPT_U16 max_sectors_per_cmd;
218 PIDENTIFY_DATA pIdentifyData;
221 HPT_U8 fixed_path_id; /*equals to phy id */
223 HIM_DEVICE_CONFIG, *PHIM_DEVICE_CONFIG;
228 #define _DIT_READ_AHEAD 2
229 #define _DIT_WRITE_CACHE 3
232 #define _DIT_BEEP_OFF 6
233 #define _DIT_SPIN_UP_MODE 7
234 #define _DIT_IDLE_STANDBY 8
235 #define _DIT_IDENTIFY 9
237 #define SPIN_UP_MODE_NOSUPPORT 0
238 #define SPIN_UP_MODE_FULL 1
239 #define SPIN_UP_MODE_STANDBY 2
251 typedef struct _HIM_ALTERABLE_DEV_INFO{
255 HPT_U8 enable_read_ahead;
256 HPT_U8 enable_read_cache;
257 HPT_U8 enable_write_cache;
258 struct tcq_control tcq;
259 struct ncq_control ncq;
262 HPT_U8 idle_standby_timeout;
263 HPT_U8 identify_indicator;
265 } HIM_ALTERABLE_DEV_INFO, *PHIM_ALTERABLE_DEV_INFO;
270 typedef void (*PROBE_CALLBACK)(void *arg, void *dev, int index);
272 typedef struct _HIM {
275 HPT_UINT max_sg_descriptors;
276 #define _HIM_INTERFACE(_type, _fn, _args) _type (* _fn) _args;
277 #include <dev/hpt27xx/himfuncs.h>
284 #error "don't use SG_FLAG_EOT with _SG.eot. clean the code!"
291 HPT_U8 FAR * _logical;
299 typedef struct _AtaCommand
304 } AtaComm, *PAtaComm;
306 #define ATA_CMD_NOP 0x0
308 #define ATA_CMD_SET_FEATURES 0xef
309 #define ATA_CMD_FLUSH 0xE7
310 #define ATA_CMD_VERIFY 0x40
311 #define ATA_CMD_STANDBY 0xe2
312 #define ATA_CMD_READ_MULTI 0xC4
313 #define ATA_CMD_READ_MULTI_EXT 0x29
314 #define ATA_CMD_WRITE_MULTI 0xC5
315 #define ATA_CMD_WRITE_MULTI_EXT 0x39
316 #define ATA_CMD_WRITE_MULTI_FUA_EXT 0xCE
318 #define ATA_CMD_READ_DMA 0xc8 /* IDE DMA read command */
319 #define ATA_CMD_WRITE_DMA 0xca /* IDE DMA write command */
320 #define ATA_CMD_READ_DMA_EXT 0x25
321 #define ATA_CMD_READ_QUEUE_EXT 0x26
322 #define ATA_CMD_READ_MAX_ADDR 0x27
323 #define ATA_CMD_READ_EXT 0x24
324 #define ATA_CMD_VERIFY_EXT 0x42
325 #define ATA_CMD_WRITE_DMA_EXT 0x35
326 #define ATA_CMD_WRITE_QUEUE_EXT 0x36
327 #define ATA_CMD_WRITE_EXT 0x34
329 #define ATA_SET_FEATURES_XFER 0x3
330 #define ATA_SECTOR_SIZE 512
332 typedef struct _PassthroughCmd {
333 HPT_U16 bFeaturesReg;
334 HPT_U16 bSectorCountReg;
338 HPT_U8 bDriveHeadReg;
345 typedef struct _ScsiComm {
356 typedef struct _ScsiExtComm {
369 #define CTRL_CMD_REBUILD 1
370 #define CTRL_CMD_VERIFY 2
371 #define CTRL_CMD_INIT 3
374 typedef struct _R5ControlCmd {
380 R5ControlCmd, *PR5ControlCmd;
382 typedef struct _HPT_ADDRESS
390 typedef struct ctl_pages {
394 HPT_UINT min_sg_descriptors;
395 } CONTROL_PAGES, *PCONTROL_PAGES;
397 typedef struct _R1ControlCmd {
402 PCONTROL_PAGES ctl_pages;
404 R1ControlCmd, *PR1ControlCmd;
406 typedef void (*TQ_PROC)(void *arg);
411 struct tq_item *next;
414 #define INIT_TQ_ITEM(t, p, a) \
415 do { (t)->proc = p; (t)->arg = a; (t)->next = 0; } while (0)
417 typedef struct _COMMAND
422 struct freelist *grplist;
426 struct list_head q_link;
427 struct tq_item done_dpc;
439 struct lock_request *owned_lock;
440 struct lock_request *lock_req;
441 void (*dtor)(struct _COMMAND *, void *);
446 PassthroughCmd Passthrough;
449 R5ControlCmd R5Control;
450 R1ControlCmd R1Control;
453 HPT_U8 type; /* CMD_TYPE_* */
456 HPT_U8 physical_sg: 1;
459 HPT_U8 transform : 1;
460 HPT_U8 hard_flush: 2;
474 int (*buildsgl)(struct _COMMAND *cmd, PSG psg, int logical);
475 void (*done)(struct _COMMAND *cmd);
480 #define CMD_TYPE_IO 0
481 #define CMD_TYPE_CONTROL 1
482 #define CMD_TYPE_ATAPI 2
483 #define CMD_TYPE_SCSI CMD_TYPE_ATAPI
484 #define CMD_TYPE_PASSTHROUGH 3
485 #define CMD_TYPE_FLUSH 4
486 #define CMD_TYPE_SCSI_EXT 5
487 #define CMD_TYPE_IO_INDIRECT 0x80
489 /* flush command flags */
490 #define CF_HARD_FLUSH_CACHE 1
491 #define CF_HARD_FLUSH_STANDBY 2
493 /* command return values */
494 #define RETURN_PENDING 0
495 #define RETURN_SUCCESS 1
496 #define RETURN_BAD_DEVICE 2
497 #define RETURN_BAD_PARAMETER 3
498 #define RETURN_WRITE_NO_DRQ 4
499 #define RETURN_DEVICE_BUSY 5
500 #define RETURN_INVALID_REQUEST 6
501 #define RETURN_SELECTION_TIMEOUT 7
502 #define RETURN_IDE_ERROR 8
503 #define RETURN_NEED_LOGICAL_SG 9
504 #define RETURN_NEED_PHYSICAL_SG 10
505 #define RETURN_RETRY 11
506 #define RETURN_DATA_ERROR 12
507 #define RETURN_BUS_RESET 13
508 #define RETURN_BAD_TRANSFER_LENGTH 14
509 #define RETURN_INSUFFICIENT_MEMORY 15
510 #define RETURN_SECTOR_ERROR 16
511 #define RETURN_NEED_SPINUP 17
513 #if defined(__cplusplus)